1 /* Disassemble h8300 instructions.
2 Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
18 MA 02110-1301, USA. */
23 #define h8_opcodes h8ops
24 #include "opcode/h8300.h"
27 #include "libiberty.h"
32 const struct h8_opcode
*opcode
;
35 struct h8_instruction
*h8_instructions
;
37 /* Run through the opcodes and sort them into order to make them easy
41 bfd_h8_disassemble_init (void)
44 unsigned int nopcodes
;
45 const struct h8_opcode
*p
;
46 struct h8_instruction
*pi
;
48 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
50 h8_instructions
= xmalloc (nopcodes
* sizeof (struct h8_instruction
));
52 for (p
= h8_opcodes
, pi
= h8_instructions
; p
->name
; p
++, pi
++)
57 if ((int) p
->data
.nib
[0] < 16)
58 n1
= (int) p
->data
.nib
[0];
62 if ((int) p
->data
.nib
[1] < 16)
63 n2
= (int) p
->data
.nib
[1];
67 /* Just make sure there are an even number of nibbles in it, and
68 that the count is the same as the length. */
69 for (i
= 0; p
->data
.nib
[i
] != (op_type
) E
; i
++)
74 fprintf (stderr
, "Internal error, h8_disassemble_init.\n");
82 /* Add entry for the NULL vector terminator. */
88 extract_immediate (FILE *stream
,
94 const struct h8_opcode
*q
)
96 switch (looking_for
& SIZE
)
102 /* DISP2 special treatment. */
103 if ((looking_for
& MODE
) == DISP
)
105 if (OP_KIND (q
->how
) == O_MOVAB
106 || OP_KIND (q
->how
) == O_MOVAW
107 || OP_KIND (q
->how
) == O_MOVAL
)
109 /* Handling for mova insn. */
110 switch (q
->args
.nib
[0] & MODE
)
125 /* Handling for non-mova insn. */
126 switch (OP_SIZE (q
->how
))
146 *cst
= (data
[0] << 8) + data
[1];
148 if ((looking_for
& SIZE
) == L_16
)
149 *cst
= (short) *cst
; /* Sign extend. */
154 *cst
= (data
[0] << 24) + (data
[1] << 16) + (data
[2] << 8) + data
[3];
159 fprintf (stream
, "DISP bad size\n");
164 static const char *regnames
[] =
166 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
167 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
169 static const char *wregnames
[] =
171 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
172 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
174 static const char *lregnames
[] =
176 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
177 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
179 static const char *cregnames
[] =
181 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
185 print_one_arg (disassemble_info
*info
,
192 const char **pregnames
,
195 void * stream
= info
->stream
;
196 fprintf_ftype outfn
= info
->fprintf_func
;
198 if ((x
& SIZE
) == L_3
|| (x
& SIZE
) == L_3NZ
)
199 outfn (stream
, "#0x%x", (unsigned) cst
);
200 else if ((x
& MODE
) == IMM
)
201 outfn (stream
, "#0x%x", (unsigned) cst
);
202 else if ((x
& MODE
) == DBIT
|| (x
& MODE
) == KBIT
)
203 outfn (stream
, "#%d", (unsigned) cst
);
204 else if ((x
& MODE
) == CONST_2
)
205 outfn (stream
, "#2");
206 else if ((x
& MODE
) == CONST_4
)
207 outfn (stream
, "#4");
208 else if ((x
& MODE
) == CONST_8
)
209 outfn (stream
, "#8");
210 else if ((x
& MODE
) == CONST_16
)
211 outfn (stream
, "#16");
212 else if ((x
& MODE
) == REG
)
217 outfn (stream
, "%s", regnames
[rn
]);
221 outfn (stream
, "%s", wregnames
[rn
]);
225 outfn (stream
, "%s", lregnames
[rn
]);
229 else if ((x
& MODE
) == LOWREG
)
234 /* Always take low half of reg. */
235 outfn (stream
, "%s.b", regnames
[rn
< 8 ? rn
+ 8 : rn
]);
239 /* Always take low half of reg. */
240 outfn (stream
, "%s.w", wregnames
[rn
< 8 ? rn
: rn
- 8]);
244 outfn (stream
, "%s.l", lregnames
[rn
]);
248 else if ((x
& MODE
) == POSTINC
)
249 outfn (stream
, "@%s+", pregnames
[rn
]);
251 else if ((x
& MODE
) == POSTDEC
)
252 outfn (stream
, "@%s-", pregnames
[rn
]);
254 else if ((x
& MODE
) == PREINC
)
255 outfn (stream
, "@+%s", pregnames
[rn
]);
257 else if ((x
& MODE
) == PREDEC
)
258 outfn (stream
, "@-%s", pregnames
[rn
]);
260 else if ((x
& MODE
) == IND
)
261 outfn (stream
, "@%s", pregnames
[rn
]);
263 else if ((x
& MODE
) == ABS
|| (x
& ABSJMP
))
264 outfn (stream
, "@0x%x:%d", (unsigned) cst
, cstlen
);
266 else if ((x
& MODE
) == MEMIND
)
267 outfn (stream
, "@@%d (0x%x)", cst
, cst
);
269 else if ((x
& MODE
) == VECIND
)
271 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
272 by which is meant "normal" vs. "middle", "advanced", "maximum". */
274 int offset
= (cst
+ 0x80) * 4;
275 outfn (stream
, "@@%d (0x%x)", offset
, offset
);
277 else if ((x
& MODE
) == PCREL
)
279 if ((x
& SIZE
) == L_16
||
282 outfn (stream
, ".%s%d (0x%x)",
283 (short) cst
> 0 ? "+" : "",
285 addr
+ (short) cst
+ len
);
289 outfn (stream
, ".%s%d (0x%x)",
290 (char) cst
> 0 ? "+" : "",
292 addr
+ (char) cst
+ len
);
295 else if ((x
& MODE
) == DISP
)
296 outfn (stream
, "@(0x%x:%d,%s)", cst
, cstlen
, pregnames
[rdisp_n
]);
298 else if ((x
& MODE
) == INDEXB
)
299 /* Always take low half of reg. */
300 outfn (stream
, "@(0x%x:%d,%s.b)", cst
, cstlen
,
301 regnames
[rdisp_n
< 8 ? rdisp_n
+ 8 : rdisp_n
]);
303 else if ((x
& MODE
) == INDEXW
)
304 /* Always take low half of reg. */
305 outfn (stream
, "@(0x%x:%d,%s.w)", cst
, cstlen
,
306 wregnames
[rdisp_n
< 8 ? rdisp_n
: rdisp_n
- 8]);
308 else if ((x
& MODE
) == INDEXL
)
309 outfn (stream
, "@(0x%x:%d,%s.l)", cst
, cstlen
, lregnames
[rdisp_n
]);
312 outfn (stream
, cregnames
[rn
]);
314 else if ((x
& MODE
) == CCR
)
315 outfn (stream
, "ccr");
317 else if ((x
& MODE
) == EXR
)
318 outfn (stream
, "exr");
320 else if ((x
& MODE
) == MACREG
)
321 outfn (stream
, "mac%c", cst
? 'l' : 'h');
324 /* xgettext:c-format */
325 outfn (stream
, _("Hmmmm 0x%x"), x
);
329 bfd_h8_disassemble (bfd_vma addr
, disassemble_info
*info
, int mach
)
331 /* Find the first entry in the table for this opcode. */
332 int regno
[3] = { 0, 0, 0 };
333 int dispregno
[3] = { 0, 0, 0 };
334 int cst
[3] = { 0, 0, 0 };
335 int cstlen
[3] = { 0, 0, 0 };
336 static bfd_boolean init
= 0;
337 const struct h8_instruction
*qi
;
338 char const **pregnames
= mach
!= 0 ? lregnames
: wregnames
;
341 unsigned char data
[MAX_CODE_NIBBLES
];
342 void *stream
= info
->stream
;
343 fprintf_ftype outfn
= info
->fprintf_func
;
347 bfd_h8_disassemble_init ();
351 status
= info
->read_memory_func (addr
, data
, 2, info
);
354 info
->memory_error_func (status
, addr
, info
);
358 for (l
= 2; status
== 0 && l
< sizeof (data
) / 2; l
+= 2)
359 status
= info
->read_memory_func (addr
+ l
, data
+ l
, 2, info
);
361 /* Find the exact opcode/arg combo. */
362 for (qi
= h8_instructions
; qi
->opcode
->name
; qi
++)
364 const struct h8_opcode
*q
= qi
->opcode
;
365 op_type
*nib
= q
->data
.nib
;
366 unsigned int len
= 0;
370 op_type looking_for
= *nib
;
371 int thisnib
= data
[len
/ 2];
374 thisnib
= (len
& 1) ? (thisnib
& 0xf) : ((thisnib
/ 16) & 0xf);
375 opnr
= ((looking_for
& OP3
) == OP3
? 2
376 : (looking_for
& DST
) == DST
? 1 : 0);
378 if (looking_for
< 16 && looking_for
>= 0)
380 if (looking_for
!= thisnib
)
385 if ((int) looking_for
& (int) B31
)
387 if (!((thisnib
& 0x8) != 0))
390 looking_for
= (op_type
) ((int) looking_for
& ~(int) B31
);
393 else if ((int) looking_for
& (int) B30
)
395 if (!((thisnib
& 0x8) == 0))
398 looking_for
= (op_type
) ((int) looking_for
& ~(int) B30
);
401 if ((int) looking_for
& (int) B21
)
403 if (!((thisnib
& 0x4) != 0))
406 looking_for
= (op_type
) ((int) looking_for
& ~(int) B21
);
409 else if ((int) looking_for
& (int) B20
)
411 if (!((thisnib
& 0x4) == 0))
414 looking_for
= (op_type
) ((int) looking_for
& ~(int) B20
);
416 if ((int) looking_for
& (int) B11
)
418 if (!((thisnib
& 0x2) != 0))
421 looking_for
= (op_type
) ((int) looking_for
& ~(int) B11
);
424 else if ((int) looking_for
& (int) B10
)
426 if (!((thisnib
& 0x2) == 0))
429 looking_for
= (op_type
) ((int) looking_for
& ~(int) B10
);
432 if ((int) looking_for
& (int) B01
)
434 if (!((thisnib
& 0x1) != 0))
437 looking_for
= (op_type
) ((int) looking_for
& ~(int) B01
);
440 else if ((int) looking_for
& (int) B00
)
442 if (!((thisnib
& 0x1) == 0))
445 looking_for
= (op_type
) ((int) looking_for
& ~(int) B00
);
448 if (looking_for
& IGNORE
)
450 /* Hitachi has declared that IGNORE must be zero. */
454 else if ((looking_for
& MODE
) == DATA
)
456 ; /* Skip embedded data. */
458 else if ((looking_for
& MODE
) == DBIT
)
460 /* Exclude adds/subs by looking at bit 0 and 2, and
461 make sure the operand size, either w or l,
462 matches by looking at bit 1. */
463 if ((looking_for
& 7) != (thisnib
& 7))
466 cst
[opnr
] = (thisnib
& 0x8) ? 2 : 1;
468 else if ((looking_for
& MODE
) == DISP
469 || (looking_for
& MODE
) == ABS
470 || (looking_for
& MODE
) == PCREL
471 || (looking_for
& MODE
) == INDEXB
472 || (looking_for
& MODE
) == INDEXW
473 || (looking_for
& MODE
) == INDEXL
)
475 extract_immediate (stream
, looking_for
, thisnib
,
476 data
+ len
/ 2, cst
+ opnr
,
478 /* Even address == bra, odd == bra/s. */
479 if (q
->how
== O (O_BRAS
, SB
))
482 else if ((looking_for
& MODE
) == REG
483 || (looking_for
& MODE
) == LOWREG
484 || (looking_for
& MODE
) == IND
485 || (looking_for
& MODE
) == PREINC
486 || (looking_for
& MODE
) == POSTINC
487 || (looking_for
& MODE
) == PREDEC
488 || (looking_for
& MODE
) == POSTDEC
)
490 regno
[opnr
] = thisnib
;
492 else if (looking_for
& CTRL
) /* Control Register. */
495 if (((looking_for
& MODE
) == CCR
&& (thisnib
!= C_CCR
))
496 || ((looking_for
& MODE
) == EXR
&& (thisnib
!= C_EXR
))
497 || ((looking_for
& MODE
) == MACH
&& (thisnib
!= C_MACH
))
498 || ((looking_for
& MODE
) == MACL
&& (thisnib
!= C_MACL
))
499 || ((looking_for
& MODE
) == VBR
&& (thisnib
!= C_VBR
))
500 || ((looking_for
& MODE
) == SBR
&& (thisnib
!= C_SBR
)))
502 if (((looking_for
& MODE
) == CCR_EXR
503 && (thisnib
!= C_CCR
&& thisnib
!= C_EXR
))
504 || ((looking_for
& MODE
) == VBR_SBR
505 && (thisnib
!= C_VBR
&& thisnib
!= C_SBR
))
506 || ((looking_for
& MODE
) == MACREG
507 && (thisnib
!= C_MACH
&& thisnib
!= C_MACL
)))
509 if (((looking_for
& MODE
) == CC_EX_VB_SB
510 && (thisnib
!= C_CCR
&& thisnib
!= C_EXR
511 && thisnib
!= C_VBR
&& thisnib
!= C_SBR
)))
514 regno
[opnr
] = thisnib
;
516 else if ((looking_for
& SIZE
) == L_5
)
518 cst
[opnr
] = data
[len
/ 2] & 31;
521 else if ((looking_for
& SIZE
) == L_4
)
526 else if ((looking_for
& SIZE
) == L_16
527 || (looking_for
& SIZE
) == L_16U
)
529 cst
[opnr
] = (data
[len
/ 2]) * 256 + data
[(len
+ 2) / 2];
532 else if ((looking_for
& MODE
) == MEMIND
)
536 else if ((looking_for
& MODE
) == VECIND
)
538 cst
[opnr
] = data
[1] & 0x7f;
540 else if ((looking_for
& SIZE
) == L_32
)
544 cst
[opnr
] = ((data
[i
] << 24)
545 | (data
[i
+ 1] << 16)
551 else if ((looking_for
& SIZE
) == L_24
)
556 (data
[i
] << 16) | (data
[i
+ 1] << 8) | (data
[i
+ 2]);
559 else if (looking_for
& IGNORE
)
563 else if (looking_for
& DISPREG
)
565 dispregno
[opnr
] = thisnib
& 7;
567 else if ((looking_for
& MODE
) == KBIT
)
584 else if ((looking_for
& SIZE
) == L_8
)
587 cst
[opnr
] = data
[len
/ 2];
589 else if ((looking_for
& SIZE
) == L_3
590 || (looking_for
& SIZE
) == L_3NZ
)
592 cst
[opnr
] = thisnib
& 0x7;
593 if (cst
[opnr
] == 0 && (looking_for
& SIZE
) == L_3NZ
)
596 else if ((looking_for
& SIZE
) == L_2
)
599 cst
[opnr
] = thisnib
& 0x3;
601 else if ((looking_for
& MODE
) == MACREG
)
603 cst
[opnr
] = (thisnib
== 3);
605 else if (looking_for
== (op_type
) E
)
607 outfn (stream
, "%s\t", q
->name
);
609 /* Gross. Disgusting. */
610 if (strcmp (q
->name
, "ldm.l") == 0)
614 count
= (data
[1] / 16) & 0x3;
617 outfn (stream
, "@sp+,er%d-er%d", high
- count
, high
);
621 if (strcmp (q
->name
, "stm.l") == 0)
625 count
= (data
[1] / 16) & 0x3;
628 outfn (stream
, "er%d-er%d,@-sp", low
, low
+ count
);
631 if (strcmp (q
->name
, "rte/l") == 0
632 || strcmp (q
->name
, "rts/l") == 0)
635 outfn (stream
, "er%d", regno
[1]);
637 outfn (stream
, "er%d-er%d", regno
[1] - regno
[0],
641 if (strncmp (q
->name
, "mova", 4) == 0)
643 op_type
*args
= q
->args
.nib
;
645 if (args
[1] == (op_type
) E
)
648 print_one_arg (info
, addr
, args
[0], cst
[0],
649 cstlen
[0], dispregno
[0], regno
[0],
650 pregnames
, qi
->length
);
651 outfn (stream
, ",er%d", dispregno
[0]);
655 outfn (stream
, "@(0x%x:%d,", cst
[0], cstlen
[0]);
656 print_one_arg (info
, addr
, args
[1], cst
[1],
657 cstlen
[1], dispregno
[1], regno
[1],
658 pregnames
, qi
->length
);
659 outfn (stream
, ".%c),",
660 (args
[0] & MODE
) == INDEXB
? 'b' : 'w');
661 print_one_arg (info
, addr
, args
[2], cst
[2],
662 cstlen
[2], dispregno
[2], regno
[2],
663 pregnames
, qi
->length
);
667 /* Fill in the args. */
669 op_type
*args
= q
->args
.nib
;
673 /* Special case handling for the adds and subs instructions
674 since in H8 mode thay can only take the r0-r7 registers
675 but in other (higher) modes they can take the er0-er7
676 registers as well. */
677 if (strcmp (qi
->opcode
->name
, "adds") == 0
678 || strcmp (qi
->opcode
->name
, "subs") == 0)
680 outfn (stream
, "#%d,%s", cst
[0], pregnames
[regno
[1] & 0x7]);
685 nargs
< 3 && args
[nargs
] != (op_type
) E
;
693 print_one_arg (info
, addr
, x
,
694 cst
[nargs
], cstlen
[nargs
],
695 dispregno
[nargs
], regno
[nargs
],
696 pregnames
, qi
->length
);
705 /* xgettext:c-format */
706 outfn (stream
, _("Don't understand 0x%x \n"), looking_for
);
717 /* Fell off the end. */
718 outfn (stream
, ".word\tH'%x,H'%x", data
[0], data
[1]);
723 print_insn_h8300 (bfd_vma addr
, disassemble_info
*info
)
725 return bfd_h8_disassemble (addr
, info
, 0);
729 print_insn_h8300h (bfd_vma addr
, disassemble_info
*info
)
731 return bfd_h8_disassemble (addr
, info
, 1);
735 print_insn_h8300s (bfd_vma addr
, disassemble_info
*info
)
737 return bfd_h8_disassemble (addr
, info
, 2);