| blob | b5dd1723aa63bd960df0edf6a94472d9d1503b7c |
1 2006-09-08 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
5 2006-09-07 Paul Brook <paul@codesourcery.com>
7 * config/tc-arm.c (parse_operands): Mark operand as present.
9 2006-09-04 Paul Brook <paul@codesourcery.com>
11 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
12 (do_neon_dyadic_if_i_d): Avoid setting U bit.
13 (do_neon_mac_maybe_scalar): Ditto.
14 (do_neon_dyadic_narrow): Force operand type to NT_integer.
15 (insns): Remove out of date comments.
17 2006-08-29 Nick Clifton <nickc@redhat.com>
19 * read.c (s_align): Initialize the 'stopc' variable to prevent
20 compiler complaints about it being used without being
21 initialized.
22 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
23 s_float_space, s_struct, cons_worker, equals): Likewise.
25 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
27 * ecoff.c (ecoff_directive_val): Fix message typo.
28 * config/tc-ns32k.c (convert_iif): Likewise.
29 * config/tc-sh64.c (shmedia_check_limits): Likewise.
31 2006-08-25 Sterling Augustine <sterling@tensilica.com>
32 Bob Wilson <bob.wilson@acm.org>
34 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
35 the state of the absolute_literals directive. Remove align frag at
36 the start of the literal pool position.
38 2006-08-25 Bob Wilson <bob.wilson@acm.org>
40 * doc/c-xtensa.texi: Add @group commands in examples.
42 2006-08-24 Bob Wilson <bob.wilson@acm.org>
44 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
45 (INIT_LITERAL_SECTION_NAME): Delete.
46 (lit_state struct): Remove segment names, init_lit_seg, and
47 fini_lit_seg. Add lit_prefix and current_text_seg.
48 (init_literal_head_h, init_literal_head): Delete.
49 (fini_literal_head_h, fini_literal_head): Delete.
50 (xtensa_begin_directive): Move argument parsing to
51 xtensa_literal_prefix function.
52 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
53 (xtensa_literal_prefix): Parse the directive argument here and
54 record it in the lit_prefix field. Remove code to derive literal
55 section names.
56 (linkonce_len): New.
57 (get_is_linkonce_section): Use linkonce_len. Check for any
58 ".gnu.linkonce.*" section, not just text sections.
59 (md_begin): Remove initialization of deleted lit_state fields.
60 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
61 to init_literal_head and fini_literal_head.
62 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
63 when traversing literal_head list.
64 (match_section_group): New.
65 (cache_literal_section): Rewrite to determine the literal section
66 name on the fly, create the section and return it.
67 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
68 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
69 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
70 Use xtensa_get_property_section from bfd.
71 (retrieve_xtensa_section): Delete.
72 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
73 description to refer to plural literal sections and add xref to
74 the Literal Directive section.
75 (Literal Directive): Describe new rules for deriving literal section
76 names. Add footnote for special case of .init/.fini with
77 --text-section-literals.
78 (Literal Prefix Directive): Replace old naming rules with xref to the
79 Literal Directive section.
81 2006-08-21 Joseph Myers <joseph@codesourcery.com>
83 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
84 merging with previous long opcode.
86 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
88 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
89 * Makefile.in: Regenerate.
90 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
91 renamed. Adjust.
93 2006-08-16 Julian Brown <julian@codesourcery.com>
95 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
96 to use ARM instructions on non-ARM-supporting cores.
97 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
98 mode automatically based on cpu variant.
99 (md_begin): Call above function.
101 2006-08-16 Julian Brown <julian@codesourcery.com>
103 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
104 recognized in non-unified syntax mode.
106 2006-08-15 Thiemo Seufer <ths@mips.com>
107 Nigel Stephens <nigel@mips.com>
108 David Ung <davidu@mips.com>
110 * configure.tgt: Handle mips*-sde-elf*.
112 2006-08-12 Thiemo Seufer <ths@networkno.de>
114 * config/tc-mips.c (mips16_ip): Fix argument register handling
115 for restore instruction.
117 2006-08-08 Bob Wilson <bob.wilson@acm.org>
119 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
120 (out_sleb128): New.
121 (out_fixed_inc_line_addr): New.
122 (process_entries): Use out_fixed_inc_line_addr when
123 DWARF2_USE_FIXED_ADVANCE_PC is set.
124 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
126 2006-08-08 DJ Delorie <dj@redhat.com>
128 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
129 vs full symbols so that we never have more than one pointer value
130 for any given symbol in our symbol table.
132 2006-08-08 Sterling Augustine <sterling@tensilica.com>
134 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
135 and emit DW_AT_ranges when code in compilation unit is not
136 contiguous.
137 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
138 is not contiguous.
139 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
140 (out_debug_ranges): New function to emit .debug_ranges section
141 when code is not contiguous.
143 2006-08-08 Nick Clifton <nickc@redhat.com>
145 * config/tc-arm.c (WARN_DEPRECATED): Enable.
147 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
149 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
150 only block.
151 (pe_directive_secrel) [TE_PE]: New function.
152 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
153 loc, loc_mark_labels.
154 [TE_PE]: Handle secrel32.
155 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
156 call.
157 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
158 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
159 (md_section_align): Only round section sizes here for AOUT
160 targets.
161 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
162 (tc_pe_dwarf2_emit_offset): New function.
163 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
164 (cons_fix_new_arm): Handle O_secrel.
165 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
166 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
167 of OBJ_ELF only block.
168 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
169 tc_pe_dwarf2_emit_offset.
171 2006-08-04 Richard Sandiford <richard@codesourcery.com>
173 * config/tc-sh.c (apply_full_field_fix): New function.
174 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
175 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
176 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
177 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
179 2006-08-03 Nick Clifton <nickc@redhat.com>
181 PR gas/2991
182 * config.in: Regenerate.
184 2006-08-03 Joseph Myers <joseph@codesourcery.com>
186 * config/tc-arm.c (parse_operands): Handle invalid register name
187 for OP_RIWR_RIWC.
189 2006-08-03 Joseph Myers <joseph@codesourcery.com>
191 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
192 (parse_operands): Handle it.
193 (insns): Use it for tmcr and tmrc.
195 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
197 PR binutils/2983
198 * config/tc-i386.c (md_parse_option): Treat any target starting
199 with elf64_x86_64 as a viable target for the -64 switch.
200 (i386_target_format): For 64-bit ELF flavoured output use
201 ELF_TARGET_FORMAT64.
202 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
204 2006-08-02 Nick Clifton <nickc@redhat.com>
206 PR gas/2991
207 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
208 bfd/aclocal.m4.
209 * configure.in: Run BFD_BINARY_FOPEN.
210 * configure: Regenerate.
211 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
212 file to include.
214 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
216 * config/tc-i386.c (md_assemble): Don't update
217 cpu_arch_isa_flags.
219 2006-08-01 Thiemo Seufer <ths@mips.com>
221 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
223 2006-08-01 Thiemo Seufer <ths@mips.com>
225 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
226 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
227 BFD_RELOC_32 and BFD_RELOC_16.
228 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
229 md_convert_frag, md_obj_end): Fix comment formatting.
231 2006-07-31 Thiemo Seufer <ths@mips.com>
233 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
234 handling for BFD_RELOC_MIPS16_JMP.
236 2006-07-24 Andreas Schwab <schwab@suse.de>
238 PR/2756
239 * read.c (read_a_source_file): Ignore unknown text after line
240 comment character. Fix misleading comment.
242 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
244 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
245 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
246 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
247 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
248 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
249 doc/c-z80.texi, doc/internals.texi: Fix some typos.
251 2006-07-21 Nick Clifton <nickc@redhat.com>
253 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
254 linker testsuite.
256 2006-07-20 Thiemo Seufer <ths@mips.com>
257 Nigel Stephens <nigel@mips.com>
259 * config/tc-mips.c (md_parse_option): Don't infer optimisation
260 options from debug options.
262 2006-07-20 Thiemo Seufer <ths@mips.com>
264 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
265 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
267 2006-07-19 Paul Brook <paul@codesourcery.com>
269 * config/tc-arm.c (insns): Fix rbit Arm opcode.
271 2006-07-18 Paul Brook <paul@codesourcery.com>
273 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
274 (md_convert_frag): Use correct reloc for add_pc. Use
275 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
276 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
277 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
279 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
281 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
282 when file and line unknown.
284 2006-07-17 Thiemo Seufer <ths@mips.com>
286 * read.c (s_struct): Use IS_ELF.
287 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
288 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
289 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
290 s_mips_mask): Likewise.
292 2006-07-16 Thiemo Seufer <ths@mips.com>
293 David Ung <davidu@mips.com>
295 * read.c (s_struct): Handle ELF section changing.
296 * config/tc-mips.c (s_align): Leave enabling auto-align to the
297 generic code.
298 (s_change_sec): Try section changing only if we output ELF.
300 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
302 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
303 CpuAmdFam10.
304 (smallest_imm_type): Remove Cpu086.
305 (i386_target_format): Likewise.
307 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
308 Update CpuXXX.
310 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
311 Michael Meissner <michael.meissner@amd.com>
313 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
314 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
315 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
316 architecture.
317 (i386_align_code): Ditto.
318 (md_assemble_code): Add support for insertq/extrq instructions,
319 swapping as needed for intel syntax.
320 (swap_imm_operands): New function to swap immediate operands.
321 (swap_operands): Deal with 4 operand instructions.
322 (build_modrm_byte): Add support for insertq instruction.
324 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
326 * config/tc-i386.h (Size64): Fix a typo in comment.
328 2006-07-12 Nick Clifton <nickc@redhat.com>
330 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
331 fixup_segment() to repeat a range check on a value that has
332 already been checked here.
334 2006-07-07 James E Wilson <wilson@specifix.com>
336 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
338 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
339 Nick Clifton <nickc@redhat.com>
341 PR binutils/2877
342 * doc/as.texi: Fix spelling typo: branchs => branches.
343 * doc/c-m68hc11.texi: Likewise.
344 * config/tc-m68hc11.c: Likewise.
345 Support old spelling of command line switch for backwards
346 compatibility.
348 2006-07-04 Thiemo Seufer <ths@mips.com>
349 David Ung <davidu@mips.com>
351 * config/tc-mips.c (s_is_linkonce): New function.
352 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
353 weak, external, and linkonce symbols.
354 (pic_need_relax): Use s_is_linkonce.
356 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
358 * doc/as.texinfo (Org): Remove space.
359 (P2align): Add "@var{abs-expr},".
361 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
363 * config/tc-i386.c (cpu_arch_tune_set): New.
364 (cpu_arch_isa): Likewise.
365 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
366 nops with short or long nop sequences based on -march=/.arch
367 and -mtune=.
368 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
369 set cpu_arch_tune and cpu_arch_tune_flags.
370 (md_parse_option): For -march=, set cpu_arch_isa and set
371 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
372 0. Set cpu_arch_tune_set to 1 for -mtune=.
373 (i386_target_format): Don't set cpu_arch_tune.
375 2006-06-23 Nigel Stephens <nigel@mips.com>
377 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
378 generated .sbss.* and .gnu.linkonce.sb.*.
380 2006-06-23 Thiemo Seufer <ths@mips.com>
381 David Ung <davidu@mips.com>
383 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
384 label_list.
385 * config/tc-mips.c (label_list): Define per-segment label_list.
386 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
387 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
388 mips_from_file_after_relocs, mips_define_label): Use per-segment
389 label_list.
391 2006-06-22 Thiemo Seufer <ths@mips.com>
393 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
394 (append_insn): Use it.
395 (md_apply_fix): Whitespace formatting.
396 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
397 mips16_extended_frag): Remove register specifier.
398 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
399 constants.
401 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
403 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
404 a directive saving VFP registers for ARMv6 or later.
405 (s_arm_unwind_save): Add parameter arch_v6 and call
406 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
407 appropriate.
408 (md_pseudo_table): Add entry for new "vsave" directive.
409 * doc/c-arm.texi: Correct error in example for "save"
410 directive (fstmdf -> fstmdx). Also document "vsave" directive.
412 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
413 Anatoly Sokolov <aesok@post.ru>
415 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
416 and atmega644p devices. Rename atmega164/atmega324 devices to
417 atmega164p/atmega324p.
418 * doc/c-avr.texi: Document new mcu and arch options.
420 2006-06-17 Nick Clifton <nickc@redhat.com>
422 * config/tc-arm.c (enum parse_operand_result): Move outside of
423 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
425 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
427 * config/tc-i386.h (processor_type): New.
428 (arch_entry): Add type.
430 * config/tc-i386.c (cpu_arch_tune): New.
431 (cpu_arch_tune_flags): Likewise.
432 (cpu_arch_isa_flags): Likewise.
433 (cpu_arch): Updated.
434 (set_cpu_arch): Also update cpu_arch_isa_flags.
435 (md_assemble): Update cpu_arch_isa_flags.
436 (OPTION_MARCH): New.
437 (OPTION_MTUNE): Likewise.
438 (md_longopts): Add -march= and -mtune=.
439 (md_parse_option): Support -march= and -mtune=.
440 (md_show_usage): Add -march=CPU/-mtune=CPU.
441 (i386_target_format): Also update cpu_arch_isa_flags,
442 cpu_arch_tune and cpu_arch_tune_flags.
444 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
446 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
448 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
450 * config/tc-arm.c (enum parse_operand_result): New.
451 (struct group_reloc_table_entry): New.
452 (enum group_reloc_type): New.
453 (group_reloc_table): New array.
454 (find_group_reloc_table_entry): New function.
455 (parse_shifter_operand_group_reloc): New function.
456 (parse_address_main): New function, incorporating code
457 from the old parse_address function. To be used via...
458 (parse_address): wrapper for parse_address_main; and
459 (parse_address_group_reloc): new function, likewise.
460 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
461 OP_ADDRGLDRS, OP_ADDRGLDC.
462 (parse_operands): Support for these new operand codes.
463 New macro po_misc_or_fail_no_backtrack.
464 (encode_arm_cp_address): Preserve group relocations.
465 (insns): Modify to use the above operand codes where group
466 relocations are permitted.
467 (md_apply_fix): Handle the group relocations
468 ALU_PC_G0_NC through LDC_SB_G2.
469 (tc_gen_reloc): Likewise.
470 (arm_force_relocation): Leave group relocations for the linker.
471 (arm_fix_adjustable): Likewise.
473 2006-06-15 Julian Brown <julian@codesourcery.com>
475 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
476 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
477 relocs properly.
479 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
481 * config/tc-i386.c (process_suffix): Don't add rex64 for
482 "xchg %rax,%rax".
484 2006-06-09 Thiemo Seufer <ths@mips.com>
486 * config/tc-mips.c (mips_ip): Maintain argument count.
488 2006-06-09 Alan Modra <amodra@bigpond.net.au>
490 * config/tc-iq2000.c: Include sb.h.
492 2006-06-08 Nigel Stephens <nigel@mips.com>
494 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
495 aliases for better compatibility with SGI tools.
497 2006-06-08 Alan Modra <amodra@bigpond.net.au>
499 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
500 * Makefile.am (GASLIBS): Expand @BFDLIB@.
501 (BFDVER_H): Delete.
502 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
503 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
504 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
505 Run "make dep-am".
506 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
507 * Makefile.in: Regenerate.
508 * doc/Makefile.in: Regenerate.
509 * configure: Regenerate.
511 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
513 * po/Make-in (pdf, ps): New dummy targets.
515 2006-06-07 Julian Brown <julian@codesourcery.com>
517 * config/tc-arm.c (stdarg.h): include.
518 (arm_it): Add uncond_value field. Add isvec and issingle to operand
519 array.
520 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
521 REG_TYPE_NSDQ (single, double or quad vector reg).
522 (reg_expected_msgs): Update.
523 (BAD_FPU): Add macro for unsupported FPU instruction error.
524 (parse_neon_type): Support 'd' as an alias for .f64.
525 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
526 sets of registers.
527 (parse_vfp_reg_list): Don't update first arg on error.
528 (parse_neon_mov): Support extra syntax for VFP moves.
529 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
530 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
531 (parse_operands): Support isvec, issingle operands fields, new parse
532 codes above.
533 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
534 msr variants.
535 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
536 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
537 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
538 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
539 shapes.
540 (neon_shape): Redefine in terms of above.
541 (neon_shape_class): New enumeration, table of shape classes.
542 (neon_shape_el): New enumeration. One element of a shape.
543 (neon_shape_el_size): Register widths of above, where appropriate.
544 (neon_shape_info): New struct. Info for shape table.
545 (neon_shape_tab): New array.
546 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
547 (neon_check_shape): Rewrite as...
548 (neon_select_shape): New function to classify instruction shapes,
549 driven by new table neon_shape_tab array.
550 (neon_quad): New function. Return 1 if shape should set Q flag in
551 instructions (or equivalent), 0 otherwise.
552 (type_chk_of_el_type): Support F64.
553 (el_type_of_type_chk): Likewise.
554 (neon_check_type): Add support for VFP type checking (VFP data
555 elements fill their containing registers).
556 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
557 in thumb mode for VFP instructions.
558 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
559 and encode the current instruction as if it were that opcode.
560 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
561 arguments, call function in PFN.
562 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
563 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
564 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
565 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
566 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
567 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
568 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
569 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
570 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
571 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
572 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
573 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
574 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
575 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
576 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
577 neon_quad.
578 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
579 between VFP and Neon turns out to belong to Neon. Perform
580 architecture check and fill in condition field if appropriate.
581 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
582 (do_neon_cvt): Add support for VFP variants of instructions.
583 (neon_cvt_flavour): Extend to cover VFP conversions.
584 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
585 vmov variants.
586 (do_neon_ldr_str): Handle single-precision VFP load/store.
587 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
588 NS_NULL not NS_IGNORE.
589 (opcode_tag): Add OT_csuffixF for operands which either take a
590 conditional suffix, or have 0xF in the condition field.
591 (md_assemble): Add support for OT_csuffixF.
592 (NCE): Replace macro with...
593 (NCE_tag, NCE, NCEF): New macros.
594 (nCE): Replace macro with...
595 (nCE_tag, nCE, nCEF): New macros.
596 (insns): Add support for VFP insns or VFP versions of insns msr,
597 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
598 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
599 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
600 VFP/Neon insns together.
602 2006-06-07 Alan Modra <amodra@bigpond.net.au>
603 Ladislav Michl <ladis@linux-mips.org>
605 * app.c: Don't include headers already included by as.h.
606 * as.c: Likewise.
607 * atof-generic.c: Likewise.
608 * cgen.c: Likewise.
609 * dwarf2dbg.c: Likewise.
610 * expr.c: Likewise.
611 * input-file.c: Likewise.
612 * input-scrub.c: Likewise.
613 * macro.c: Likewise.
614 * output-file.c: Likewise.
615 * read.c: Likewise.
616 * sb.c: Likewise.
617 * config/bfin-lex.l: Likewise.
618 * config/obj-coff.h: Likewise.
619 * config/obj-elf.h: Likewise.
620 * config/obj-som.h: Likewise.
621 * config/tc-arc.c: Likewise.
622 * config/tc-arm.c: Likewise.
623 * config/tc-avr.c: Likewise.
624 * config/tc-bfin.c: Likewise.
625 * config/tc-cris.c: Likewise.
626 * config/tc-d10v.c: Likewise.
627 * config/tc-d30v.c: Likewise.
628 * config/tc-dlx.h: Likewise.
629 * config/tc-fr30.c: Likewise.
630 * config/tc-frv.c: Likewise.
631 * config/tc-h8300.c: Likewise.
632 * config/tc-hppa.c: Likewise.
633 * config/tc-i370.c: Likewise.
634 * config/tc-i860.c: Likewise.
635 * config/tc-i960.c: Likewise.
636 * config/tc-ip2k.c: Likewise.
637 * config/tc-iq2000.c: Likewise.
638 * config/tc-m32c.c: Likewise.
639 * config/tc-m32r.c: Likewise.
640 * config/tc-maxq.c: Likewise.
641 * config/tc-mcore.c: Likewise.
642 * config/tc-mips.c: Likewise.
643 * config/tc-mmix.c: Likewise.
644 * config/tc-mn10200.c: Likewise.
645 * config/tc-mn10300.c: Likewise.
646 * config/tc-msp430.c: Likewise.
647 * config/tc-mt.c: Likewise.
648 * config/tc-ns32k.c: Likewise.
649 * config/tc-openrisc.c: Likewise.
650 * config/tc-ppc.c: Likewise.
651 * config/tc-s390.c: Likewise.
652 * config/tc-sh.c: Likewise.
653 * config/tc-sh64.c: Likewise.
654 * config/tc-sparc.c: Likewise.
655 * config/tc-tic30.c: Likewise.
656 * config/tc-tic4x.c: Likewise.
657 * config/tc-tic54x.c: Likewise.
658 * config/tc-v850.c: Likewise.
659 * config/tc-vax.c: Likewise.
660 * config/tc-xc16x.c: Likewise.
661 * config/tc-xstormy16.c: Likewise.
662 * config/tc-xtensa.c: Likewise.
663 * config/tc-z80.c: Likewise.
664 * config/tc-z8k.c: Likewise.
665 * macro.h: Don't include sb.h or ansidecl.h.
666 * sb.h: Don't include stdio.h or ansidecl.h.
667 * cond.c: Include sb.h.
668 * itbl-lex.l: Include as.h instead of other system headers.
669 * itbl-parse.y: Likewise.
670 * itbl-ops.c: Similarly.
671 * itbl-ops.h: Don't include as.h or ansidecl.h.
672 * config/bfin-defs.h: Don't include bfd.h or as.h.
673 * config/bfin-parse.y: Include as.h instead of other system headers.
675 2006-06-06 Ben Elliston <bje@au.ibm.com>
676 Anton Blanchard <anton@samba.org>
678 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
679 (md_show_usage): Document it.
680 (ppc_setup_opcodes): Test power6 opcode flag bits.
681 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
683 2006-06-06 Thiemo Seufer <ths@mips.com>
684 Chao-ying Fu <fu@mips.com>
686 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
687 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
688 (macro_build): Update comment.
689 (mips_ip): Allow DSP64 instructions for MIPS64R2.
690 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
691 CPU_HAS_MDMX.
692 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
693 MIPS_CPU_ASE_MDMX flags for sb1.
695 2006-06-05 Thiemo Seufer <ths@mips.com>
697 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
698 appropriate.
699 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
700 (mips_ip): Make overflowed/underflowed constant arguments in DSP
701 and MT instructions a fatal error. Use INSERT_OPERAND where
702 appropriate. Improve warnings for break and wait code overflows.
703 Use symbolic constant of OP_MASK_COPZ.
704 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
706 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
708 * po/Make-in (top_builddir): Define.
710 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
712 * doc/Makefile.am (TEXI2DVI): Define.
713 * doc/Makefile.in: Regenerate.
714 * doc/c-arc.texi: Fix typo.
716 2006-06-01 Alan Modra <amodra@bigpond.net.au>
718 * config/obj-ieee.c: Delete.
719 * config/obj-ieee.h: Delete.
720 * Makefile.am (OBJ_FORMATS): Remove ieee.
721 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
722 (obj-ieee.o): Remove rule.
723 * Makefile.in: Regenerate.
724 * configure.in (atof): Remove tahoe.
725 (OBJ_MAYBE_IEEE): Don't define.
726 * configure: Regenerate.
727 * config.in: Regenerate.
728 * doc/Makefile.in: Regenerate.
729 * po/POTFILES.in: Regenerate.
731 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
733 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
734 and LIBINTL_DEP everywhere.
735 (INTLLIBS): Remove.
736 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
737 * acinclude.m4: Include new gettext macros.
738 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
739 Remove local code for po/Makefile.
740 * Makefile.in, configure, doc/Makefile.in: Regenerated.
742 2006-05-30 Nick Clifton <nickc@redhat.com>
744 * po/es.po: Updated Spanish translation.
746 2006-05-06 Denis Chertykov <denisc@overta.ru>
748 * doc/c-avr.texi: New file.
749 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
750 * doc/all.texi: Set AVR
751 * doc/as.texinfo: Include c-avr.texi
753 2006-05-28 Jie Zhang <jie.zhang@analog.com>
755 * config/bfin-parse.y (check_macfunc): Loose the condition of
756 calling check_multiply_halfregs ().
758 2006-05-25 Jie Zhang <jie.zhang@analog.com>
760 * config/bfin-parse.y (asm_1): Better check and deal with
761 vector and scalar Multiply 16-Bit Operands instructions.
763 2006-05-24 Nick Clifton <nickc@redhat.com>
765 * config/tc-hppa.c: Convert to ISO C90 format.
766 * config/tc-hppa.h: Likewise.
768 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
769 Randolph Chung <randolph@tausq.org>
771 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
772 is_tls_ieoff, is_tls_leoff): Define.
773 (fix_new_hppa): Handle TLS.
774 (cons_fix_new_hppa): Likewise.
775 (pa_ip): Likewise.
776 (md_apply_fix): Handle TLS relocs.
777 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
779 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
781 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
783 2006-05-23 Thiemo Seufer <ths@mips.com>
784 David Ung <davidu@mips.com>
785 Nigel Stephens <nigel@mips.com>
787 [ gas/ChangeLog ]
788 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
789 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
790 ISA_HAS_MXHC1): New macros.
791 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
792 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
793 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
794 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
795 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
796 (mips_after_parse_args): Change default handling of float register
797 size to account for 32bit code with 64bit FP. Better sanity checking
798 of ISA/ASE/ABI option combinations.
799 (s_mipsset): Support switching of GPR and FPR sizes via
800 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
801 options.
802 (mips_elf_final_processing): We should record the use of 64bit FP
803 registers in 32bit code but we don't, because ELF header flags are
804 a scarce ressource.
805 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
806 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
807 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
808 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
809 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
810 missing -march options. Document .set arch=CPU. Move .set smartmips
811 to ASE page. Use @code for .set FOO examples.
813 2006-05-23 Jie Zhang <jie.zhang@analog.com>
815 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
816 if needed.
818 2006-05-23 Jie Zhang <jie.zhang@analog.com>
820 * config/bfin-defs.h (bfin_equals): Remove declaration.
821 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
822 * config/tc-bfin.c (bfin_name_is_register): Remove.
823 (bfin_equals): Remove.
824 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
825 (bfin_name_is_register): Remove declaration.
827 2006-05-19 Thiemo Seufer <ths@mips.com>
828 Nigel Stephens <nigel@mips.com>
830 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
831 (mips_oddfpreg_ok): New function.
832 (mips_ip): Use it.
834 2006-05-19 Thiemo Seufer <ths@mips.com>
835 David Ung <davidu@mips.com>
837 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
838 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
839 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
840 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
841 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
842 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
843 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
844 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
845 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
846 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
847 reg_names_o32, reg_names_n32n64): Define register classes.
848 (reg_lookup): New function, use register classes.
849 (md_begin): Reserve register names in the symbol table. Simplify
850 OBJ_ELF defines.
851 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
852 Use reg_lookup.
853 (mips16_ip): Use reg_lookup.
854 (tc_get_register): Likewise.
855 (tc_mips_regname_to_dw2regnum): New function.
857 2006-05-19 Thiemo Seufer <ths@mips.com>
859 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
860 Un-constify string argument.
861 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
862 Likewise.
863 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
864 Likewise.
865 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
866 Likewise.
867 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
868 Likewise.
869 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
870 Likewise.
871 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
872 Likewise.
874 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
876 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
877 cfloat/m68881 to correct architecture before using it.
879 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
881 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
882 constant values.
884 2006-05-15 Paul Brook <paul@codesourcery.com>
886 * config/tc-arm.c (arm_adjust_symtab): Use
887 bfd_is_arm_special_symbol_name.
889 2006-05-15 Bob Wilson <bob.wilson@acm.org>
891 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
892 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
893 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
894 Handle errors from calls to xtensa_opcode_is_* functions.
896 2006-05-14 Thiemo Seufer <ths@mips.com>
898 * config/tc-mips.c (macro_build): Test for currently active
899 mips16 option.
900 (mips16_ip): Reject invalid opcodes.
902 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
904 * doc/as.texinfo: Rename "Index" to "AS Index",
905 and "ABORT" to "ABORT (COFF)".
907 2006-05-11 Paul Brook <paul@codesourcery.com>
909 * config/tc-arm.c (parse_half): New function.
910 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
911 (parse_operands): Ditto.
912 (do_mov16): Reject invalid relocations.
913 (do_t_mov16): Ditto. Use Thumb reloc numbers.
914 (insns): Replace Iffff with HALF.
915 (md_apply_fix): Add MOVW and MOVT relocs.
916 (tc_gen_reloc): Ditto.
917 * doc/c-arm.texi: Document relocation operators
919 2006-05-11 Paul Brook <paul@codesourcery.com>
921 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
923 2006-05-11 Thiemo Seufer <ths@mips.com>
925 * config/tc-mips.c (append_insn): Don't check the range of j or
926 jal addresses.
928 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
930 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
931 relocs against external symbols for WinCE targets.
932 (md_apply_fix): Likewise.
934 2006-05-09 David Ung <davidu@mips.com>
936 * config/tc-mips.c (append_insn): Only warn about an out-of-range
937 j or jal address.
939 2006-05-09 Nick Clifton <nickc@redhat.com>
941 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
942 against symbols which are not going to be placed into the symbol
943 table.
945 2006-05-09 Ben Elliston <bje@au.ibm.com>
947 * expr.c (operand): Remove `if (0 && ..)' statement and
948 subsequently unused target_op label. Collapse `if (1 || ..)'
949 statement.
950 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
951 separately above the switch.
953 2006-05-08 Nick Clifton <nickc@redhat.com>
955 PR gas/2623
956 * config/tc-msp430.c (line_separator_character): Define as |.
958 2006-05-08 Thiemo Seufer <ths@mips.com>
959 Nigel Stephens <nigel@mips.com>
960 David Ung <davidu@mips.com>
962 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
963 (mips_opts): Likewise.
964 (file_ase_smartmips): New variable.
965 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
966 (macro_build): Handle SmartMIPS instructions.
967 (mips_ip): Likewise.
968 (md_longopts): Add argument handling for smartmips.
969 (md_parse_options, mips_after_parse_args): Likewise.
970 (s_mipsset): Add .set smartmips support.
971 (md_show_usage): Document -msmartmips/-mno-smartmips.
972 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
973 .set smartmips.
974 * doc/c-mips.texi: Likewise.
976 2006-05-08 Alan Modra <amodra@bigpond.net.au>
978 * write.c (relax_segment): Add pass count arg. Don't error on
979 negative org/space on first two passes.
980 (relax_seg_info): New struct.
981 (relax_seg, write_object_file): Adjust.
982 * write.h (relax_segment): Update prototype.
984 2006-05-05 Julian Brown <julian@codesourcery.com>
986 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
987 checking.
988 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
989 architecture version checks.
990 (insns): Allow overlapping instructions to be used in VFP mode.
992 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
994 PR gas/2598
995 * config/obj-elf.c (obj_elf_change_section): Allow user
996 specified SHF_ALPHA_GPREL.
998 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1000 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1001 for PMEM related expressions.
1003 2006-05-05 Nick Clifton <nickc@redhat.com>
1005 PR gas/2582
1006 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1007 insertion of a directory separator character into a string at a
1008 given offset. Uses heuristics to decide when to use a backslash
1009 character rather than a forward-slash character.
1010 (dwarf2_directive_loc): Use the macro.
1011 (out_debug_info): Likewise.
1013 2006-05-05 Thiemo Seufer <ths@mips.com>
1014 David Ung <davidu@mips.com>
1016 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1017 instruction.
1018 (macro): Add new case M_CACHE_AB.
1020 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1022 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1023 (opcode_lookup): Issue a warning for opcode with
1024 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1025 identical to OT_cinfix3.
1026 (TxC3w, TC3w, tC3w): New.
1027 (insns): Use tC3w and TC3w for comparison instructions with
1028 's' suffix.
1030 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1032 * subsegs.h (struct frchain): Delete frch_seg.
1033 (frchain_root): Delete.
1034 (seg_info): Define as macro.
1035 * subsegs.c (frchain_root): Delete.
1036 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1037 (subsegs_begin, subseg_change): Adjust for above.
1038 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1039 rather than to one big list.
1040 (subseg_get): Don't special case abs, und sections.
1041 (subseg_new, subseg_force_new): Don't set frchainP here.
1042 (seg_info): Delete.
1043 (subsegs_print_statistics): Adjust frag chain control list traversal.
1044 * debug.c (dmp_frags): Likewise.
1045 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1046 at frchain_root. Make use of known frchain ordering.
1047 (last_frag_for_seg): Likewise.
1048 (get_frag_fix): Likewise. Add seg param.
1049 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1050 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1051 (SUB_SEGMENT_ALIGN): Likewise.
1052 (subsegs_finish): Adjust frchain list traversal.
1053 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1054 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1055 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1056 (xtensa_fix_b_j_loop_end_frags): Likewise.
1057 (xtensa_fix_close_loop_end_frags): Likewise.
1058 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1059 (retrieve_segment_info): Delete frch_seg initialisation.
1061 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1063 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1064 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1065 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1066 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1068 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1070 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1071 here.
1072 (md_apply_fix3): Multiply offset by 4 here for
1073 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1075 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1076 Jan Beulich <jbeulich@novell.com>
1078 * config/tc-i386.c (output_invalid_buf): Change size for
1079 unsigned char.
1080 * config/tc-tic30.c (output_invalid_buf): Likewise.
1082 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1083 unsigned char.
1084 * config/tc-tic30.c (output_invalid): Likewise.
1086 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1088 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1089 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1090 (asconfig.texi): Don't set top_srcdir.
1091 * doc/as.texinfo: Don't use top_srcdir.
1092 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1094 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1096 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1097 * config/tc-tic30.c (output_invalid_buf): Likewise.
1099 * config/tc-i386.c (output_invalid): Use snprintf instead of
1100 sprintf.
1101 * config/tc-ia64.c (declare_register_set): Likewise.
1102 (emit_one_bundle): Likewise.
1103 (check_dependencies): Likewise.
1104 * config/tc-tic30.c (output_invalid): Likewise.
1106 2006-05-02 Paul Brook <paul@codesourcery.com>
1108 * config/tc-arm.c (arm_optimize_expr): New function.
1109 * config/tc-arm.h (md_optimize_expr): Define
1110 (arm_optimize_expr): Add prototype.
1111 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1113 2006-05-02 Ben Elliston <bje@au.ibm.com>
1115 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1116 field unsigned.
1118 * sb.h (sb_list_vector): Move to sb.c.
1119 * sb.c (free_list): Use type of sb_list_vector directly.
1120 (sb_build): Fix off-by-one error in assertion about `size'.
1122 2006-05-01 Ben Elliston <bje@au.ibm.com>
1124 * listing.c (listing_listing): Remove useless loop.
1125 * macro.c (macro_expand): Remove is_positional local variable.
1126 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1127 and simplify surrounding expressions, where possible.
1128 (assign_symbol): Likewise.
1129 (s_weakref): Likewise.
1130 * symbols.c (colon): Likewise.
1132 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1134 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1136 2006-04-30 Thiemo Seufer <ths@mips.com>
1137 David Ung <davidu@mips.com>
1139 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1140 (mips_immed): New table that records various handling of udi
1141 instruction patterns.
1142 (mips_ip): Adds udi handling.
1144 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1146 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1147 of list rather than beginning.
1149 2006-04-26 Julian Brown <julian@codesourcery.com>
1151 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1152 (is_quarter_float): Rename from above. Simplify slightly.
1153 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1154 number.
1155 (parse_neon_mov): Parse floating-point constants.
1156 (neon_qfloat_bits): Fix encoding.
1157 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1158 preference to integer encoding when using the F32 type.
1160 2006-04-26 Julian Brown <julian@codesourcery.com>
1162 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1163 zero-initialising structures containing it will lead to invalid types).
1164 (arm_it): Add vectype to each operand.
1165 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1166 defined field.
1167 (neon_typed_alias): New structure. Extra information for typed
1168 register aliases.
1169 (reg_entry): Add neon type info field.
1170 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1171 Break out alternative syntax for coprocessor registers, etc. into...
1172 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1173 out from arm_reg_parse.
1174 (parse_neon_type): Move. Return SUCCESS/FAIL.
1175 (first_error): New function. Call to ensure first error which occurs is
1176 reported.
1177 (parse_neon_operand_type): Parse exactly one type.
1178 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1179 (parse_typed_reg_or_scalar): New function. Handle core of both
1180 arm_typed_reg_parse and parse_scalar.
1181 (arm_typed_reg_parse): Parse a register with an optional type.
1182 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1183 result.
1184 (parse_scalar): Parse a Neon scalar with optional type.
1185 (parse_reg_list): Use first_error.
1186 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1187 (neon_alias_types_same): New function. Return true if two (alias) types
1188 are the same.
1189 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1190 of elements.
1191 (insert_reg_alias): Return new reg_entry not void.
1192 (insert_neon_reg_alias): New function. Insert type/index information as
1193 well as register for alias.
1194 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1195 make typed register aliases accordingly.
1196 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1197 of line.
1198 (s_unreq): Delete type information if present.
1199 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1200 (s_arm_unwind_save_mmxwcg): Likewise.
1201 (s_arm_unwind_movsp): Likewise.
1202 (s_arm_unwind_setfp): Likewise.
1203 (parse_shift): Likewise.
1204 (parse_shifter_operand): Likewise.
1205 (parse_address): Likewise.
1206 (parse_tb): Likewise.
1207 (tc_arm_regname_to_dw2regnum): Likewise.
1208 (md_pseudo_table): Add dn, qn.
1209 (parse_neon_mov): Handle typed operands.
1210 (parse_operands): Likewise.
1211 (neon_type_mask): Add N_SIZ.
1212 (N_ALLMODS): New macro.
1213 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1214 (el_type_of_type_chk): Add some safeguards.
1215 (modify_types_allowed): Fix logic bug.
1216 (neon_check_type): Handle operands with types.
1217 (neon_three_same): Remove redundant optional arg handling.
1218 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1219 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1220 (do_neon_step): Adjust accordingly.
1221 (neon_cmode_for_logic_imm): Use first_error.
1222 (do_neon_bitfield): Call neon_check_type.
1223 (neon_dyadic): Rename to...
1224 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1225 to allow modification of type of the destination.
1226 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1227 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1228 (do_neon_compare): Make destination be an untyped bitfield.
1229 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1230 (neon_mul_mac): Return early in case of errors.
1231 (neon_move_immediate): Use first_error.
1232 (neon_mac_reg_scalar_long): Fix type to include scalar.
1233 (do_neon_dup): Likewise.
1234 (do_neon_mov): Likewise (in several places).
1235 (do_neon_tbl_tbx): Fix type.
1236 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1237 (do_neon_ld_dup): Exit early in case of errors and/or use
1238 first_error.
1239 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1240 Handle .dn/.qn directives.
1241 (REGDEF): Add zero for reg_entry neon field.
1243 2006-04-26 Julian Brown <julian@codesourcery.com>
1245 * config/tc-arm.c (limits.h): Include.
1246 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1247 (fpu_vfp_v3_or_neon_ext): Declare constants.
1248 (neon_el_type): New enumeration of types for Neon vector elements.
1249 (neon_type_el): New struct. Define type and size of a vector element.
1250 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1251 instruction.
1252 (neon_type): Define struct. The type of an instruction.
1253 (arm_it): Add 'vectype' for the current instruction.
1254 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1255 (vfp_sp_reg_pos): Rename to...
1256 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1257 tags.
1258 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1259 (Neon D or Q register).
1260 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1261 register.
1262 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1263 (my_get_expression): Allow above constant as argument to accept
1264 64-bit constants with optional prefix.
1265 (arm_reg_parse): Add extra argument to return the specific type of
1266 register in when either a D or Q register (REG_TYPE_NDQ) is
1267 requested. Can be NULL.
1268 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1269 (parse_reg_list): Update for new arm_reg_parse args.
1270 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1271 (parse_neon_el_struct_list): New function. Parse element/structure
1272 register lists for VLD<n>/VST<n> instructions.
1273 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1274 (s_arm_unwind_save_mmxwr): Likewise.
1275 (s_arm_unwind_save_mmxwcg): Likewise.
1276 (s_arm_unwind_movsp): Likewise.
1277 (s_arm_unwind_setfp): Likewise.
1278 (parse_big_immediate): New function. Parse an immediate, which may be
1279 64 bits wide. Put results in inst.operands[i].
1280 (parse_shift): Update for new arm_reg_parse args.
1281 (parse_address): Likewise. Add parsing of alignment specifiers.
1282 (parse_neon_mov): Parse the operands of a VMOV instruction.
1283 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1284 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1285 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1286 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1287 (parse_operands): Handle new codes above.
1288 (encode_arm_vfp_sp_reg): Rename to...
1289 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1290 selected VFP version only supports D0-D15.
1291 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1292 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1293 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1294 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1295 encode_arm_vfp_reg name, and allow 32 D regs.
1296 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1297 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1298 regs.
1299 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1300 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1301 constant-load and conversion insns introduced with VFPv3.
1302 (neon_tab_entry): New struct.
1303 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1304 those which are the targets of pseudo-instructions.
1305 (neon_opc): Enumerate opcodes, use as indices into...
1306 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1307 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1308 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1309 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1310 neon_enc_tab.
1311 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1312 Neon instructions.
1313 (neon_type_mask): New. Compact type representation for type checking.
1314 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1315 permitted type combinations.
1316 (N_IGNORE_TYPE): New macro.
1317 (neon_check_shape): New function. Check an instruction shape for
1318 multiple alternatives. Return the specific shape for the current
1319 instruction.
1320 (neon_modify_type_size): New function. Modify a vector type and size,
1321 depending on the bit mask in argument 1.
1322 (neon_type_promote): New function. Convert a given "key" type (of an
1323 operand) into the correct type for a different operand, based on a bit
1324 mask.
1325 (type_chk_of_el_type): New function. Convert a type and size into the
1326 compact representation used for type checking.
1327 (el_type_of_type_ckh): New function. Reverse of above (only when a
1328 single bit is set in the bit mask).
1329 (modify_types_allowed): New function. Alter a mask of allowed types
1330 based on a bit mask of modifications.
1331 (neon_check_type): New function. Check the type of the current
1332 instruction against the variable argument list. The "key" type of the
1333 instruction is returned.
1334 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1335 a Neon data-processing instruction depending on whether we're in ARM
1336 mode or Thumb-2 mode.
1337 (neon_logbits): New function.
1338 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1339 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1340 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1341 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1342 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1343 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1344 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1345 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1346 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1347 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1348 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1349 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1350 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1351 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1352 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1353 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1354 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1355 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1356 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1357 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1358 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1359 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1360 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1361 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1362 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1363 helpers.
1364 (parse_neon_type): New function. Parse Neon type specifier.
1365 (opcode_lookup): Allow parsing of Neon type specifiers.
1366 (REGNUM2, REGSETH, REGSET2): New macros.
1367 (reg_names): Add new VFPv3 and Neon registers.
1368 (NUF, nUF, NCE, nCE): New macros for opcode table.
1369 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1370 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1371 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1372 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1373 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1374 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1375 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1376 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1377 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1378 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1379 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1380 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1381 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1382 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1383 fto[us][lh][sd].
1384 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1385 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1386 (arm_option_cpu_value): Add vfp3 and neon.
1387 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1388 VFPv1 attribute.
1390 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1392 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1393 syntax instead of hardcoded opcodes with ".w18" suffixes.
1394 (wide_branch_opcode): New.
1395 (build_transition): Use it to check for wide branch opcodes with
1396 either ".w18" or ".w15" suffixes.
1398 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1400 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1401 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1402 frag's is_literal flag.
1404 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1406 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1408 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1410 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1411 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1412 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1413 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1414 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1416 2005-04-20 Paul Brook <paul@codesourcery.com>
1418 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1419 all targets.
1420 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1422 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1424 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1425 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1426 Make some cpus unsupported on ELF. Run "make dep-am".
1427 * Makefile.in: Regenerate.
1429 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1431 * configure.in (--enable-targets): Indent help message.
1432 * configure: Regenerate.
1434 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1436 PR gas/2533
1437 * config/tc-i386.c (i386_immediate): Check illegal immediate
1438 register operand.
1440 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1442 * config/tc-i386.c: Formatting.
1443 (output_disp, output_imm): ISO C90 params.
1445 * frags.c (frag_offset_fixed_p): Constify args.
1446 * frags.h (frag_offset_fixed_p): Ditto.
1448 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1449 (COFF_MAGIC): Delete.
1451 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1453 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1455 * po/POTFILES.in: Regenerated.
1457 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1459 * doc/as.texinfo: Mention that some .type syntaxes are not
1460 supported on all architectures.
1462 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1464 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1465 instructions when such transformations have been disabled.
1467 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1469 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1470 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1471 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1472 decoding the loop instructions. Remove current_offset variable.
1473 (xtensa_fix_short_loop_frags): Likewise.
1474 (min_bytes_to_other_loop_end): Remove current_offset argument.
1476 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1478 * config/tc-z80.c (z80_optimize_expr): Removed.
1479 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1481 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1483 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1484 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1485 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1486 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1487 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1488 at90can64, at90usb646, at90usb647, at90usb1286 and
1489 at90usb1287.
1490 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1492 2006-04-07 Paul Brook <paul@codesourcery.com>
1494 * config/tc-arm.c (parse_operands): Set default error message.
1496 2006-04-07 Paul Brook <paul@codesourcery.com>
1498 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1500 2006-04-07 Paul Brook <paul@codesourcery.com>
1502 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1504 2006-04-07 Paul Brook <paul@codesourcery.com>
1506 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1507 (move_or_literal_pool): Handle Thumb-2 instructions.
1508 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1510 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1512 PR 2512.
1513 * config/tc-i386.c (match_template): Move 64-bit operand tests
1514 inside loop.
1516 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1518 * po/Make-in: Add install-html target.
1519 * Makefile.am: Add install-html and install-html-recursive targets.
1520 * Makefile.in: Regenerate.
1521 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1522 * configure: Regenerate.
1523 * doc/Makefile.am: Add install-html and install-html-am targets.
1524 * doc/Makefile.in: Regenerate.
1526 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1528 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1529 second scan.
1531 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1532 Daniel Jacobowitz <dan@codesourcery.com>
1534 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1535 (GOTT_BASE, GOTT_INDEX): New.
1536 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1537 GOTT_INDEX when generating VxWorks PIC.
1538 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1539 use the generic *-*-vxworks* stanza instead.
1541 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1543 PR 997
1544 * frags.c (frag_offset_fixed_p): New function.
1545 * frags.h (frag_offset_fixed_p): Declare.
1546 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1547 (resolve_expression): Likewise.
1549 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1551 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1552 of the same length but different numbers of slots.
1554 2006-03-30 Andreas Schwab <schwab@suse.de>
1556 * configure.in: Fix help string for --enable-targets option.
1557 * configure: Regenerate.
1559 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1561 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1562 (m68k_ip): ... here. Use for all chips. Protect against buffer
1563 overrun and avoid excessive copying.
1565 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1566 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1567 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1568 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1569 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1570 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1571 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1572 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1573 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1574 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1575 (struct m68k_cpu): Change chip field to control_regs.
1576 (current_chip): Remove.
1577 (control_regs): New.
1578 (m68k_archs, m68k_extensions): Adjust.
1579 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1580 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1581 (find_cf_chip): Reimplement for new organization of cpu table.
1582 (select_control_regs): Remove.
1583 (mri_chip): Adjust.
1584 (struct save_opts): Save control regs, not chip.
1585 (s_save, s_restore): Adjust.
1586 (m68k_lookup_cpu): Give deprecated warning when necessary.
1587 (m68k_init_arch): Adjust.
1588 (md_show_usage): Adjust for new cpu table organization.
1590 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1592 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1593 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1594 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1595 "elf/bfin.h".
1596 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1597 (any_gotrel): New rule.
1598 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1599 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1600 "elf/bfin.h".
1601 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1602 (bfin_pic_ptr): New function.
1603 (md_pseudo_table): Add it for ".picptr".
1604 (OPTION_FDPIC): New macro.
1605 (md_longopts): Add -mfdpic.
1606 (md_parse_option): Handle it.
1607 (md_begin): Set BFD flags.
1608 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1609 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1610 us for GOT relocs.
1611 * Makefile.am (bfin-parse.o): Update dependencies.
1612 (DEPTC_bfin_elf): Likewise.
1613 * Makefile.in: Regenerate.
1615 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1617 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1618 mcfemac instead of mcfmac.
1620 2006-03-23 Michael Matz <matz@suse.de>
1622 * config/tc-i386.c (type_names): Correct placement of 'static'.
1623 (reloc): Map some more relocs to their 64 bit counterpart when
1624 size is 8.
1625 (output_insn): Work around breakage if DEBUG386 is defined.
1626 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1627 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1628 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1629 different from i386.
1630 (output_imm): Ditto.
1631 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1632 Imm64.
1633 (md_convert_frag): Jumps can now be larger than 2GB away, error
1634 out in that case.
1635 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1636 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1638 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1639 Daniel Jacobowitz <dan@codesourcery.com>
1640 Phil Edwards <phil@codesourcery.com>
1641 Zack Weinberg <zack@codesourcery.com>
1642 Mark Mitchell <mark@codesourcery.com>
1643 Nathan Sidwell <nathan@codesourcery.com>
1645 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1646 (md_begin): Complain about -G being used for PIC. Don't change
1647 the text, data and bss alignments on VxWorks.
1648 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1649 generating VxWorks PIC.
1650 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1651 (macro): Likewise, but do not treat la $25 specially for
1652 VxWorks PIC, and do not handle jal.
1653 (OPTION_MVXWORKS_PIC): New macro.
1654 (md_longopts): Add -mvxworks-pic.
1655 (md_parse_option): Don't complain about using PIC and -G together here.
1656 Handle OPTION_MVXWORKS_PIC.
1657 (md_estimate_size_before_relax): Always use the first relaxation
1658 sequence on VxWorks.
1659 * config/tc-mips.h (VXWORKS_PIC): New.
1661 2006-03-21 Paul Brook <paul@codesourcery.com>
1663 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1665 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1667 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1668 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1669 (get_loop_align_size): New.
1670 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1671 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1672 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1673 (get_noop_aligned_address): Use get_loop_align_size.
1674 (get_aligned_diff): Likewise.
1676 2006-03-21 Paul Brook <paul@codesourcery.com>
1678 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1680 2006-03-20 Paul Brook <paul@codesourcery.com>
1682 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1683 (do_t_branch): Encode branches inside IT blocks as unconditional.
1684 (do_t_cps): New function.
1685 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1686 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1687 (opcode_lookup): Allow conditional suffixes on all instructions in
1688 Thumb mode.
1689 (md_assemble): Advance condexec state before checking for errors.
1690 (insns): Use do_t_cps.
1692 2006-03-20 Paul Brook <paul@codesourcery.com>
1694 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1695 outputting the insn.
1697 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1699 * config/tc-vax.c: Update copyright year.
1700 * config/tc-vax.h: Likewise.
1702 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1704 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1705 make it static.
1706 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1708 2006-03-17 Paul Brook <paul@codesourcery.com>
1710 * config/tc-arm.c (insns): Add ldm and stm.
1712 2006-03-17 Ben Elliston <bje@au.ibm.com>
1714 PR gas/2446
1715 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1717 2006-03-16 Paul Brook <paul@codesourcery.com>
1719 * config/tc-arm.c (insns): Add "svc".
1721 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1723 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1724 flag and avoid double underscore prefixes.
1726 2006-03-10 Paul Brook <paul@codesourcery.com>
1728 * config/tc-arm.c (md_begin): Handle EABIv5.
1729 (arm_eabis): Add EF_ARM_EABI_VER5.
1730 * doc/c-arm.texi: Document -meabi=5.
1732 2006-03-10 Ben Elliston <bje@au.ibm.com>
1734 * app.c (do_scrub_chars): Simplify string handling.
1736 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1737 Daniel Jacobowitz <dan@codesourcery.com>
1738 Zack Weinberg <zack@codesourcery.com>
1739 Nathan Sidwell <nathan@codesourcery.com>
1740 Paul Brook <paul@codesourcery.com>
1741 Ricardo Anguiano <anguiano@codesourcery.com>
1742 Phil Edwards <phil@codesourcery.com>
1744 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1745 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1746 R_ARM_ABS12 reloc.
1747 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1748 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1749 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1751 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1753 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1754 even when using the text-section-literals option.
1756 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1758 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1759 and cf.
1760 (m68k_ip): <case 'J'> Check we have some control regs.
1761 (md_parse_option): Allow raw arch switch.
1762 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1763 whether 68881 or cfloat was meant by -mfloat.
1764 (md_show_usage): Adjust extension display.
1765 (m68k_elf_final_processing): Adjust.
1767 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1769 * config/tc-avr.c (avr_mod_hash_value): New function.
1770 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1771 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1772 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1773 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1774 of (int).
1775 (tc_gen_reloc): Handle substractions of symbols, if possible do
1776 fixups, abort otherwise.
1777 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1778 tc_fix_adjustable): Define.
1780 2006-03-02 James E Wilson <wilson@specifix.com>
1782 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1783 change the template, then clear md.slot[curr].end_of_insn_group.
1785 2006-02-28 Jan Beulich <jbeulich@novell.com>
1787 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1789 2006-02-28 Jan Beulich <jbeulich@novell.com>
1791 PR/1070
1792 * macro.c (getstring): Don't treat parentheses special anymore.
1793 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1794 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1795 characters.
1797 2006-02-28 Mat <mat@csail.mit.edu>
1799 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1801 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1803 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1804 field.
1805 (CFI_signal_frame): Define.
1806 (cfi_pseudo_table): Add .cfi_signal_frame.
1807 (dot_cfi): Handle CFI_signal_frame.
1808 (output_cie): Handle cie->signal_frame.
1809 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1810 different. Copy signal_frame from FDE to newly created CIE.
1811 * doc/as.texinfo: Document .cfi_signal_frame.
1813 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1815 * doc/Makefile.am: Add html target.
1816 * doc/Makefile.in: Regenerate.
1817 * po/Make-in: Add html target.
1819 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1821 * config/tc-i386.c (output_insn): Support Intel Merom New
1822 Instructions.
1824 * config/tc-i386.h (CpuMNI): New.
1825 (CpuUnknownFlags): Add CpuMNI.
1827 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1829 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1830 (hpriv_reg_table): New table for hyperprivileged registers.
1831 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1832 register encoding.
1834 2006-02-24 DJ Delorie <dj@redhat.com>
1836 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1837 (tc_gen_reloc): Don't define.
1838 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1839 (OPTION_LINKRELAX): New.
1840 (md_longopts): Add it.
1841 (m32c_relax): New.
1842 (md_parse_options): Set it.
1843 (md_assemble): Emit relaxation relocs as needed.
1844 (md_convert_frag): Emit relaxation relocs as needed.
1845 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1846 (m32c_apply_fix): New.
1847 (tc_gen_reloc): New.
1848 (m32c_force_relocation): Force out jump relocs when relaxing.
1849 (m32c_fix_adjustable): Return false if relaxing.
1851 2006-02-24 Paul Brook <paul@codesourcery.com>
1853 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1854 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1855 (struct asm_barrier_opt): Define.
1856 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1857 (parse_psr): Accept V7M psr names.
1858 (parse_barrier): New function.
1859 (enum operand_parse_code): Add OP_oBARRIER.
1860 (parse_operands): Implement OP_oBARRIER.
1861 (do_barrier): New function.
1862 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1863 (do_t_cpsi): Add V7M restrictions.
1864 (do_t_mrs, do_t_msr): Validate V7M variants.
1865 (md_assemble): Check for NULL variants.
1866 (v7m_psrs, barrier_opt_names): New tables.
1867 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1868 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1869 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1870 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1871 (struct cpu_arch_ver_table): Define.
1872 (cpu_arch_ver): New.
1873 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1874 Tag_CPU_arch_profile.
1875 * doc/c-arm.texi: Document new cpu and arch options.
1877 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1879 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1881 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1883 * config/tc-ia64.c: Update copyright years.
1885 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1887 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1888 SDM 2.2.
1890 2005-02-22 Paul Brook <paul@codesourcery.com>
1892 * config/tc-arm.c (do_pld): Remove incorrect write to
1893 inst.instruction.
1894 (encode_thumb32_addr_mode): Use correct operand.
1896 2006-02-21 Paul Brook <paul@codesourcery.com>
1898 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1900 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1901 Anil Paranjape <anilp1@kpitcummins.com>
1902 Shilin Shakti <shilins@kpitcummins.com>
1904 * Makefile.am: Add xc16x related entry.
1905 * Makefile.in: Regenerate.
1906 * configure.in: Added xc16x related entry.
1907 * configure: Regenerate.
1908 * config/tc-xc16x.h: New file
1909 * config/tc-xc16x.c: New file
1910 * doc/c-xc16x.texi: New file for xc16x
1911 * doc/all.texi: Entry for xc16x
1912 * doc/Makefile.texi: Added c-xc16x.texi
1913 * NEWS: Announce the support for the new target.
1915 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1917 * configure.tgt: set emulation for mips-*-netbsd*
1919 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1921 * config.in: Rebuilt.
1923 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1925 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1926 from 1, not 0, in error messages.
1927 (md_assemble): Simplify special-case check for ENTRY instructions.
1928 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1929 operand in error message.
1931 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1933 * configure.tgt (arm-*-linux-gnueabi*): Change to
1934 arm-*-linux-*eabi*.
1936 2006-02-10 Nick Clifton <nickc@redhat.com>
1938 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1939 32-bit value is propagated into the upper bits of a 64-bit long.
1941 * config/tc-arc.c (init_opcode_tables): Fix cast.
1942 (arc_extoper, md_operand): Likewise.
1944 2006-02-09 David Heine <dlheine@tensilica.com>
1946 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1947 each relaxation step.
1949 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1951 * configure.in (CHECK_DECLS): Add vsnprintf.
1952 * configure: Regenerate.
1953 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1954 include/declare here, but...
1955 * as.h: Move code detecting VARARGS idiom to the top.
1956 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1957 (vsnprintf): Declare if not already declared.
1959 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1961 * as.c (close_output_file): New.
1962 (main): Register close_output_file with xatexit before
1963 dump_statistics. Don't call output_file_close.
1965 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1967 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1968 mcf5329_control_regs): New.
1969 (not_current_architecture, selected_arch, selected_cpu): New.
1970 (m68k_archs, m68k_extensions): New.
1971 (archs): Renamed to ...
1972 (m68k_cpus): ... here. Adjust.
1973 (n_arches): Remove.
1974 (md_pseudo_table): Add arch and cpu directives.
1975 (find_cf_chip, m68k_ip): Adjust table scanning.
1976 (no_68851, no_68881): Remove.
1977 (md_assemble): Lazily initialize.
1978 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1979 (md_init_after_args): Move functionality to m68k_init_arch.
1980 (mri_chip): Adjust table scanning.
1981 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1982 options with saner parsing.
1983 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1984 m68k_init_arch): New.
1985 (s_m68k_cpu, s_m68k_arch): New.
1986 (md_show_usage): Adjust.
1987 (m68k_elf_final_processing): Set CF EF flags.
1988 * config/tc-m68k.h (m68k_init_after_args): Remove.
1989 (tc_init_after_args): Remove.
1990 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1991 (M68k-Directives): Document .arch and .cpu directives.
1993 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1995 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1996 synonyms for equ and defl.
1997 (z80_cons_fix_new): New function.
1998 (emit_byte): Disallow relative jumps to absolute locations.
1999 (emit_data): Only handle defb, prototype changed, because defb is
2000 now handled as pseudo-op rather than an instruction.
2001 (instab): Entries for defb,defw,db,dw moved from here...
2002 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2003 Add entries for def24,def32,d24,d32.
2004 (md_assemble): Improved error handling.
2005 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2006 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2007 (z80_cons_fix_new): Declare.
2008 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2009 (def24,d24,def32,d32): New pseudo-ops.
2011 2006-02-02 Paul Brook <paul@codesourcery.com>
2013 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2015 2005-02-02 Paul Brook <paul@codesourcery.com>
2017 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2018 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2019 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2020 T2_OPCODE_RSB): Define.
2021 (thumb32_negate_data_op): New function.
2022 (md_apply_fix): Use it.
2024 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2026 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2027 fields.
2028 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2029 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2030 subtracted symbols.
2031 (relaxation_requirements): Add pfinish_frag argument and use it to
2032 replace setting tinsn->record_fix fields.
2033 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2034 and vinsn_to_insnbuf. Remove references to record_fix and
2035 slot_sub_symbols fields.
2036 (xtensa_mark_narrow_branches): Delete unused code.
2037 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2038 a symbol.
2039 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2040 record_fix fields.
2041 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2042 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2043 of the record_fix field. Simplify error messages for unexpected
2044 symbolic operands.
2045 (set_expr_symbol_offset_diff): Delete.
2047 2006-01-31 Paul Brook <paul@codesourcery.com>
2049 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2051 2006-01-31 Paul Brook <paul@codesourcery.com>
2052 Richard Earnshaw <rearnsha@arm.com>
2054 * config/tc-arm.c: Use arm_feature_set.
2055 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2056 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2057 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2058 New variables.
2059 (insns): Use them.
2060 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2061 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2062 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2063 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2064 feature flags.
2065 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2066 (arm_opts): Move old cpu/arch options from here...
2067 (arm_legacy_opts): ... to here.
2068 (md_parse_option): Search arm_legacy_opts.
2069 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2070 (arm_float_abis, arm_eabis): Make const.
2072 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2074 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2076 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2078 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2079 in load immediate intruction.
2081 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2083 * config/bfin-parse.y (value_match): Use correct conversion
2084 specifications in template string for __FILE__ and __LINE__.
2085 (binary): Ditto.
2086 (unary): Ditto.
2088 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2090 Introduce TLS descriptors for i386 and x86_64.
2091 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2092 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2093 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2094 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2095 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2096 displacement bits.
2097 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2098 (lex_got): Handle @tlsdesc and @tlscall.
2099 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2101 2006-01-11 Nick Clifton <nickc@redhat.com>
2103 Fixes for building on 64-bit hosts:
2104 * config/tc-avr.c (mod_index): New union to allow conversion
2105 between pointers and integers.
2106 (md_begin, avr_ldi_expression): Use it.
2107 * config/tc-i370.c (md_assemble): Add cast for argument to print
2108 statement.
2109 * config/tc-tic54x.c (subsym_substitute): Likewise.
2110 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2111 opindex field of fr_cgen structure into a pointer so that it can
2112 be stored in a frag.
2113 * config/tc-mn10300.c (md_assemble): Likewise.
2114 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2115 types.
2116 * config/tc-v850.c: Replace uses of (int) casts with correct
2117 types.
2119 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2121 PR gas/2117
2122 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2124 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2126 PR gas/2101
2127 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2128 a local-label reference.
2130 For older changes see ChangeLog-2005
2131 \f
2132 Local Variables:
2133 mode: change-log
2134 left-margin: 8
2135 fill-column: 74
2136 version-control: never
2137 End: