1 /* Print instructions for the Texas TMS320C[34]X, for GDB and GNU Binutils.
3 Copyright 2002 Free Software Foundation, Inc.
5 Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "libiberty.h"
24 #include "opcode/tic4x.h"
28 #define C4X_HASH_SIZE 11 /* 11 and above should give unique entries. */
49 static int c4x_version
= 0;
50 static int c4x_dp
= 0;
52 static int c4x_pc_offset
53 PARAMS ((unsigned int));
54 static int c4x_print_char
55 PARAMS ((struct disassemble_info
*, char));
56 static int c4x_print_str
57 PARAMS ((struct disassemble_info
*, char *));
58 static int c4x_print_register
59 PARAMS ((struct disassemble_info
*, unsigned long));
60 static int c4x_print_addr
61 PARAMS ((struct disassemble_info
*, unsigned long));
62 static int c4x_print_relative
63 PARAMS ((struct disassemble_info
*, unsigned long, long, unsigned long));
65 PARAMS ((unsigned int, FILE *, fprintf_ftype
));
66 static int c4x_print_direct
67 PARAMS ((struct disassemble_info
*, unsigned long));
68 static int c4x_print_immed
69 PARAMS ((struct disassemble_info
*, immed_t
, unsigned long));
70 static int c4x_print_cond
71 PARAMS ((struct disassemble_info
*, unsigned int));
72 static int c4x_print_indirect
73 PARAMS ((struct disassemble_info
*, indirect_t
, unsigned long));
74 static int c4x_print_op
75 PARAMS ((struct disassemble_info
*, unsigned long, c4x_inst_t
*, unsigned long));
76 static void c4x_hash_opcode
77 PARAMS ((c4x_inst_t
**, const c4x_inst_t
*));
78 static int c4x_disassemble
79 PARAMS ((unsigned long, unsigned long, struct disassemble_info
*));
81 PARAMS ((bfd_vma
, struct disassemble_info
*));
88 /* Determine the PC offset for a C[34]x instruction.
89 This could be simplified using some boolean algebra
90 but at the expense of readability. */
94 case 0x62: /* call (C4x) */
95 case 0x64: /* rptb (C4x) */
99 case 0x65: /* rptbd (C4x) */
108 switch ((op
& 0xffe00000) >> 20)
111 case 0x720: /* callB */
112 case 0x740: /* trapB */
115 case 0x6a2: /* bBd */
116 case 0x6a6: /* bBat */
117 case 0x6aa: /* bBaf */
118 case 0x722: /* lajB */
119 case 0x748: /* latB */
120 case 0x798: /* rptbd */
127 switch ((op
& 0xfe200000) >> 20)
129 case 0x6e0: /* dbB */
132 case 0x6e2: /* dbBd */
143 c4x_print_char (info
, ch
)
144 struct disassemble_info
* info
;
148 (*info
->fprintf_func
) (info
->stream
, "%c", ch
);
153 c4x_print_str (info
, str
)
154 struct disassemble_info
*info
;
158 (*info
->fprintf_func
) (info
->stream
, "%s", str
);
163 c4x_print_register (info
, regno
)
164 struct disassemble_info
*info
;
167 static c4x_register_t
**registertable
= NULL
;
170 if (registertable
== NULL
)
172 registertable
= (c4x_register_t
**)
173 xmalloc (sizeof (c4x_register_t
*) * REG_TABLE_SIZE
);
174 for (i
= 0; i
< c3x_num_registers
; i
++)
175 registertable
[c3x_registers
[i
].regno
] = (void *)&c3x_registers
[i
];
176 if (IS_CPU_C4X (c4x_version
))
178 /* Add C4x additional registers, overwriting
179 any C3x registers if necessary. */
180 for (i
= 0; i
< c4x_num_registers
; i
++)
181 registertable
[c4x_registers
[i
].regno
] = (void *)&c4x_registers
[i
];
184 if ((int) regno
> (IS_CPU_C4X (c4x_version
) ? C4X_REG_MAX
: C3X_REG_MAX
))
187 (*info
->fprintf_func
) (info
->stream
, "%s", registertable
[regno
]->name
);
192 c4x_print_addr (info
, addr
)
193 struct disassemble_info
*info
;
197 (*info
->print_address_func
)(addr
, info
);
202 c4x_print_relative (info
, pc
, offset
, opcode
)
203 struct disassemble_info
*info
;
206 unsigned long opcode
;
208 return c4x_print_addr (info
, pc
+ offset
+ c4x_pc_offset (opcode
));
212 c4x_print_direct (info
, arg
)
213 struct disassemble_info
*info
;
218 (*info
->fprintf_func
) (info
->stream
, "@");
219 c4x_print_addr (info
, arg
+ (c4x_dp
<< 16));
224 /* FIXME: make the floating point stuff not rely on host
225 floating point arithmetic. */
227 c4x_print_ftoa (val
, stream
, pfunc
)
237 e
= EXTRS (val
, 31, 24); /* exponent */
240 s
= EXTRU (val
, 23, 23); /* sign bit */
241 f
= EXTRU (val
, 22, 0); /* mantissa */
246 num
= f
/ (double)(1 << 23);
247 num
= ldexp (num
, e
);
249 (*pfunc
)(stream
, "%.9g", num
);
253 c4x_print_immed (info
, type
, arg
)
254 struct disassemble_info
*info
;
269 (*info
->fprintf_func
) (info
->stream
, "%d", (long)arg
);
274 (*info
->fprintf_func
) (info
->stream
, "%u", arg
);
278 e
= EXTRS (arg
, 15, 12);
281 s
= EXTRU (arg
, 11, 11);
282 f
= EXTRU (arg
, 10, 0);
287 num
= f
/ (double)(1 << 11);
288 num
= ldexp (num
, e
);
290 (*info
->fprintf_func
) (info
->stream
, "%f", num
);
293 e
= EXTRS (arg
, 31, 24);
296 s
= EXTRU (arg
, 23, 23);
297 f
= EXTRU (arg
, 22, 0);
302 num
= f
/ (double)(1 << 23);
303 num
= ldexp (num
, e
);
305 (*info
->fprintf_func
) (info
->stream
, "%f", num
);
312 c4x_print_cond (info
, cond
)
313 struct disassemble_info
*info
;
316 static c4x_cond_t
**condtable
= NULL
;
319 if (condtable
== NULL
)
321 condtable
= (c4x_cond_t
**)xmalloc (sizeof (c4x_cond_t
*) * 32);
322 for (i
= 0; i
< num_conds
; i
++)
323 condtable
[c4x_conds
[i
].cond
] = (void *)&c4x_conds
[i
];
325 if (cond
> 31 || condtable
[cond
] == NULL
)
328 (*info
->fprintf_func
) (info
->stream
, "%s", condtable
[cond
]->name
);
333 c4x_print_indirect (info
, type
, arg
)
334 struct disassemble_info
*info
;
348 case INDIRECT_C4X
: /* *+ARn(disp) */
349 disp
= EXTRU (arg
, 7, 3);
350 aregno
= EXTRU (arg
, 2, 0) + REG_AR0
;
355 aregno
= EXTRU (arg
, 2, 0) + REG_AR0
;
356 modn
= EXTRU (arg
, 7, 3);
359 disp
= EXTRU (arg
, 7, 0);
360 aregno
= EXTRU (arg
, 10, 8) + REG_AR0
;
361 modn
= EXTRU (arg
, 15, 11);
362 if (modn
> 7 && disp
!= 0)
368 if (modn
> C3X_MODN_MAX
)
370 a
= c4x_indirects
[modn
].name
;
376 c4x_print_register (info
, aregno
);
379 c4x_print_immed (info
, IMMED_UINT
, disp
);
382 c4x_print_str (info
, "ir0");
385 c4x_print_str (info
, "ir1");
388 c4x_print_char (info
, *a
);
397 c4x_print_op (info
, instruction
, p
, pc
)
398 struct disassemble_info
*info
;
399 unsigned long instruction
;
405 char *parallel
= NULL
;
407 /* Print instruction name. */
409 while (*s
&& parallel
== NULL
)
414 if (! c4x_print_cond (info
, EXTRU (instruction
, 20, 16)))
418 if (! c4x_print_cond (info
, EXTRU (instruction
, 27, 23)))
422 parallel
= s
+ 1; /* Skip past `_' in name */
425 c4x_print_char (info
, *s
);
431 /* Print arguments. */
434 c4x_print_char (info
, ' ');
440 case '*': /* indirect 0--15 */
441 if (! c4x_print_indirect (info
, INDIRECT_LONG
,
442 EXTRU (instruction
, 15, 0)))
446 case '#': /* only used for ldp, ldpk */
447 c4x_print_immed (info
, IMMED_UINT
, EXTRU (instruction
, 15, 0));
450 case '@': /* direct 0--15 */
451 c4x_print_direct (info
, EXTRU (instruction
, 15, 0));
454 case 'A': /* address register 24--22 */
455 if (! c4x_print_register (info
, EXTRU (instruction
, 24, 22) +
460 case 'B': /* 24-bit unsigned int immediate br(d)/call/rptb
462 if (IS_CPU_C4X (c4x_version
))
463 c4x_print_relative (info
, pc
, EXTRS (instruction
, 23, 0),
466 c4x_print_addr (info
, EXTRU (instruction
, 23, 0));
469 case 'C': /* indirect (short C4x) 0--7 */
470 if (! IS_CPU_C4X (c4x_version
))
472 if (! c4x_print_indirect (info
, INDIRECT_C4X
,
473 EXTRU (instruction
, 7, 0)))
478 /* Cockup if get here... */
481 case 'E': /* register 0--7 */
483 if (! c4x_print_register (info
, EXTRU (instruction
, 7, 0)))
487 case 'F': /* 16-bit float immediate 0--15 */
488 c4x_print_immed (info
, IMMED_SFLOAT
,
489 EXTRU (instruction
, 15, 0));
492 case 'I': /* indirect (short) 0--7 */
493 if (! c4x_print_indirect (info
, INDIRECT_SHORT
,
494 EXTRU (instruction
, 7, 0)))
498 case 'J': /* indirect (short) 8--15 */
499 if (! c4x_print_indirect (info
, INDIRECT_SHORT
,
500 EXTRU (instruction
, 15, 8)))
504 case 'G': /* register 8--15 */
506 if (! c4x_print_register (info
, EXTRU (instruction
, 15, 8)))
510 case 'H': /* register 16--18 */
511 if (! c4x_print_register (info
, EXTRU (instruction
, 18, 16)))
515 case 'K': /* register 19--21 */
516 if (! c4x_print_register (info
, EXTRU (instruction
, 21, 19)))
520 case 'L': /* register 22--24 */
521 if (! c4x_print_register (info
, EXTRU (instruction
, 24, 22)))
525 case 'M': /* register 22--22 */
526 c4x_print_register (info
, EXTRU (instruction
, 22, 22) + REG_R2
);
529 case 'N': /* register 23--23 */
530 c4x_print_register (info
, EXTRU (instruction
, 23, 23) + REG_R0
);
533 case 'O': /* indirect (short C4x) 8--15 */
534 if (! IS_CPU_C4X (c4x_version
))
536 if (! c4x_print_indirect (info
, INDIRECT_C4X
,
537 EXTRU (instruction
, 15, 8)))
541 case 'P': /* displacement 0--15 (used by Bcond and BcondD) */
542 c4x_print_relative (info
, pc
, EXTRS (instruction
, 15, 0),
546 case 'Q': /* register 0--15 */
548 if (! c4x_print_register (info
, EXTRU (instruction
, 15, 0)))
552 case 'R': /* register 16--20 */
554 if (! c4x_print_register (info
, EXTRU (instruction
, 20, 16)))
558 case 'S': /* 16-bit signed immediate 0--15 */
559 c4x_print_immed (info
, IMMED_SINT
,
560 EXTRS (instruction
, 15, 0));
563 case 'T': /* 5-bit signed immediate 16--20 (C4x stik) */
564 if (! IS_CPU_C4X (c4x_version
))
566 if (! c4x_print_immed (info
, IMMED_SUINT
,
567 EXTRU (instruction
, 20, 16)))
571 case 'U': /* 16-bit unsigned int immediate 0--15 */
572 c4x_print_immed (info
, IMMED_SUINT
, EXTRU (instruction
, 15, 0));
575 case 'V': /* 5/9-bit unsigned vector 0--4/8 */
576 c4x_print_immed (info
, IMMED_SUINT
,
577 IS_CPU_C4X (c4x_version
) ?
578 EXTRU (instruction
, 8, 0) :
579 EXTRU (instruction
, 4, 0) & ~0x20);
582 case 'W': /* 8-bit signed immediate 0--7 */
583 if (! IS_CPU_C4X (c4x_version
))
585 c4x_print_immed (info
, IMMED_SINT
, EXTRS (instruction
, 7, 0));
588 case 'X': /* expansion register 4--0 */
589 val
= EXTRU (instruction
, 4, 0) + REG_IVTP
;
590 if (val
< REG_IVTP
|| val
> REG_TVTP
)
592 if (! c4x_print_register (info
, val
))
596 case 'Y': /* address register 16--20 */
597 val
= EXTRU (instruction
, 20, 16);
598 if (val
< REG_AR0
|| val
> REG_SP
)
600 if (! c4x_print_register (info
, val
))
604 case 'Z': /* expansion register 16--20 */
605 val
= EXTRU (instruction
, 20, 16) + REG_IVTP
;
606 if (val
< REG_IVTP
|| val
> REG_TVTP
)
608 if (! c4x_print_register (info
, val
))
612 case '|': /* Parallel instruction */
613 c4x_print_str (info
, " || ");
614 c4x_print_str (info
, parallel
);
615 c4x_print_char (info
, ' ');
619 c4x_print_char (info
, ',');
623 c4x_print_char (info
, *s
);
632 c4x_hash_opcode (optable
, inst
)
633 c4x_inst_t
**optable
;
634 const c4x_inst_t
*inst
;
637 int opcode
= inst
->opcode
>> (32 - C4X_HASH_SIZE
);
638 int opmask
= inst
->opmask
>> (32 - C4X_HASH_SIZE
);
640 /* Use a C4X_HASH_SIZE bit index as a hash index. We should
641 have unique entries so there's no point having a linked list
643 for (j
= opcode
; j
< opmask
; j
++)
644 if ((j
& opmask
) == opcode
)
647 /* We should only have collisions for synonyms like
649 if (optable
[j
] != NULL
)
650 printf("Collision at index %d, %s and %s\n",
651 j
, optable
[j
]->name
, inst
->name
);
653 optable
[j
] = (void *)inst
;
657 /* Disassemble the instruction in 'instruction'.
658 'pc' should be the address of this instruction, it will
659 be used to print the target address if this is a relative jump or call
660 the disassembled instruction is written to 'info'.
661 The function returns the length of this instruction in words. */
664 c4x_disassemble (pc
, instruction
, info
)
666 unsigned long instruction
;
667 struct disassemble_info
*info
;
669 static c4x_inst_t
**optable
= NULL
;
673 c4x_version
= info
->mach
;
677 optable
= (c4x_inst_t
**)
678 xcalloc (sizeof (c4x_inst_t
*), (1 << C4X_HASH_SIZE
));
679 /* Install opcodes in reverse order so that preferred
680 forms overwrite synonyms. */
681 for (i
= c3x_num_insts
- 1; i
>= 0; i
--)
682 c4x_hash_opcode (optable
, &c3x_insts
[i
]);
683 if (IS_CPU_C4X (c4x_version
))
685 for (i
= c4x_num_insts
- 1; i
>= 0; i
--)
686 c4x_hash_opcode (optable
, &c4x_insts
[i
]);
690 /* See if we can pick up any loading of the DP register... */
691 if ((instruction
>> 16) == 0x5070 || (instruction
>> 16) == 0x1f70)
692 c4x_dp
= EXTRU (instruction
, 15, 0);
694 p
= optable
[instruction
>> (32 - C4X_HASH_SIZE
)];
695 if (p
!= NULL
&& ((instruction
& p
->opmask
) == p
->opcode
)
696 && c4x_print_op (NULL
, instruction
, p
, pc
))
697 c4x_print_op (info
, instruction
, p
, pc
);
699 (*info
->fprintf_func
) (info
->stream
, "%08x", instruction
);
701 /* Return size of insn in words. */
705 /* The entry point from objdump and gdb. */
707 print_insn_tic4x (memaddr
, info
)
709 struct disassemble_info
*info
;
716 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
719 (*info
->memory_error_func
) (status
, memaddr
, info
);
724 op
= bfd_getl32 (buffer
);
725 info
->bytes_per_line
= 4;
726 info
->bytes_per_chunk
= 4;
727 info
->octets_per_byte
= 4;
728 info
->display_endian
= BFD_ENDIAN_LITTLE
;
729 return c4x_disassemble (pc
, op
, info
) * 4;