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[binutils.git] / gas / config / tc-xtensa.h
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1 /* tc-xtensa.h -- Header file for tc-xtensa.c.
2 Copyright (C) 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
21 #ifndef TC_XTENSA
22 #define TC_XTENSA 1
24 struct fix;
26 #ifndef OBJ_ELF
27 #error Xtensa support requires ELF object format
28 #endif
30 #include "xtensa-isa.h"
31 #include "xtensa-config.h"
33 #define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
36 /* Maximum number of opcode slots in a VLIW instruction. */
37 #define MAX_SLOTS 15
40 /* For all xtensa relax states except RELAX_DESIRE_ALIGN and
41 RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
42 in the fr_var field. For the two exceptions, fr_var is a float value
43 that records the frequency with which the following instruction is
44 executed as a branch target. The aligner uses this information to
45 tell which targets are most important to be aligned. */
47 enum xtensa_relax_statesE
49 RELAX_XTENSA_NONE,
51 RELAX_ALIGN_NEXT_OPCODE,
52 /* Use the first opcode of the next fragment to determine the
53 alignment requirements. This is ONLY used for LOOPs currently. */
55 RELAX_CHECK_ALIGN_NEXT_OPCODE,
56 /* The next non-empty frag contains a loop instruction. Check to see
57 if it is correctly aligned, but do not align it. */
59 RELAX_DESIRE_ALIGN_IF_TARGET,
60 /* These are placed in front of labels and converted to either
61 RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
62 relaxation begins. */
64 RELAX_ADD_NOP_IF_A0_B_RETW,
65 /* These are placed in front of conditional branches. Before
66 relaxation begins, they are turned into either NOPs for branches
67 immediately followed by RETW or RETW.N or rs_fills of 0. This is
68 used to avoid a hardware bug in some early versions of the
69 processor. */
71 RELAX_ADD_NOP_IF_PRE_LOOP_END,
72 /* These are placed after JX instructions. Before relaxation begins,
73 they are turned into either NOPs, if the JX is one instruction
74 before a loop end label, or rs_fills of 0. This is used to avoid a
75 hardware interlock issue prior to Xtensa version T1040. */
77 RELAX_ADD_NOP_IF_SHORT_LOOP,
78 /* These are placed after LOOP instructions and turned into NOPs when:
79 (1) there are less than 3 instructions in the loop; we place 2 of
80 these in a row to add up to 2 NOPS in short loops; or (2) the
81 instructions in the loop do not include a branch or jump.
82 Otherwise they are turned into rs_fills of 0 before relaxation
83 begins. This is used to avoid hardware bug PR3830. */
85 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
86 /* These are placed after LOOP instructions and turned into NOPs if
87 there are less than 12 bytes to the end of some other loop's end.
88 Otherwise they are turned into rs_fills of 0 before relaxation
89 begins. This is used to avoid hardware bug PR3830. */
91 RELAX_DESIRE_ALIGN,
92 /* The next fragment would like its first instruction to NOT cross an
93 instruction fetch boundary. */
95 RELAX_MAYBE_DESIRE_ALIGN,
96 /* The next fragment might like its first instruction to NOT cross an
97 instruction fetch boundary. These are placed after a branch that
98 might be relaxed. If the branch is relaxed, then this frag will be
99 a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
100 frag. */
102 RELAX_LOOP_END,
103 /* This will be turned into a NOP or NOP.N if the previous instruction
104 is expanded to negate a loop. */
106 RELAX_LOOP_END_ADD_NOP,
107 /* When the code density option is available, this will generate a
108 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
109 fragment with a NOP in it. Once a frag has been converted to
110 RELAX_LOOP_END_ADD_NOP, it should never be changed back to
111 RELAX_LOOP_END. */
113 RELAX_LITERAL,
114 /* Another fragment could generate an expansion here but has not yet. */
116 RELAX_LITERAL_NR,
117 /* Expansion has been generated by an instruction that generates a
118 literal. However, the stretch has NOT been reported yet in this
119 fragment. */
121 RELAX_LITERAL_FINAL,
122 /* Expansion has been generated by an instruction that generates a
123 literal. */
125 RELAX_LITERAL_POOL_BEGIN,
126 RELAX_LITERAL_POOL_END,
127 /* Technically these are not relaxations at all but mark a location
128 to store literals later. Note that fr_var stores the frchain for
129 BEGIN frags and fr_var stores now_seg for END frags. */
131 RELAX_NARROW,
132 /* The last instruction in this fragment (at->fr_opcode) can be
133 freely replaced with a single wider instruction if a future
134 alignment desires or needs it. */
136 RELAX_IMMED,
137 /* The last instruction in this fragment (at->fr_opcode) contains
138 an immediate or symbol. If the value does not fit, relax the
139 opcode using expansions from the relax table. */
141 RELAX_IMMED_STEP1,
142 /* The last instruction in this fragment (at->fr_opcode) contains a
143 literal. It has already been expanded 1 step. */
145 RELAX_IMMED_STEP2,
146 /* The last instruction in this fragment (at->fr_opcode) contains a
147 literal. It has already been expanded 2 steps. */
149 RELAX_IMMED_STEP3,
150 /* The last instruction in this fragment (at->fr_opcode) contains a
151 literal. It has already been expanded 3 steps. */
153 RELAX_SLOTS,
154 /* There are instructions within the last VLIW instruction that need
155 relaxation. Find the relaxation based on the slot info in
156 xtensa_frag_type. Relaxations that deal with particular opcodes
157 are slot-based (e.g., converting a MOVI to an L32R). Relaxations
158 that deal with entire instructions, such as alignment, are not
159 slot-based. */
161 RELAX_FILL_NOP,
162 /* This marks the location of a pipeline stall. We can fill these guys
163 in for alignment of any size. */
165 RELAX_UNREACHABLE,
166 /* This marks the location as unreachable. The assembler may widen or
167 narrow this area to meet alignment requirements of nearby
168 instructions. */
170 RELAX_MAYBE_UNREACHABLE,
171 /* This marks the location as possibly unreachable. These are placed
172 after a branch that may be relaxed into a branch and jump. If the
173 branch is relaxed, then this frag will be converted to a
174 RELAX_UNREACHABLE frag. */
176 RELAX_ORG,
177 /* This marks the location as having previously been an rs_org frag.
178 rs_org frags are converted to fill-zero frags immediately after
179 relaxation. However, we need to remember where they were so we can
180 prevent the linker from changing the size of any frag between the
181 section start and the org frag. */
183 RELAX_NONE
186 /* This is used as a stopper to bound the number of steps that
187 can be taken. */
188 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
190 struct xtensa_frag_type
192 /* Info about the current state of assembly, e.g., transform,
193 absolute_literals, etc. These need to be passed to the backend and
194 then to the object file.
196 When is_assembly_state_set is false, the frag inherits some of the
197 state settings from the previous frag in this segment. Because it
198 is not possible to intercept all fragment closures (frag_more and
199 frag_append_1_char can close a frag), we use a pass after initial
200 assembly to fill in the assembly states. */
202 unsigned int is_assembly_state_set : 1;
203 unsigned int is_no_density : 1;
204 unsigned int is_no_transform : 1;
205 unsigned int use_longcalls : 1;
206 unsigned int use_absolute_literals : 1;
208 /* Inhibits relaxation of machine-dependent alignment frags the
209 first time through a relaxation.... */
210 unsigned int relax_seen : 1;
212 /* Information that is needed in the object file and set when known. */
213 unsigned int is_literal : 1;
214 unsigned int is_loop_target : 1;
215 unsigned int is_branch_target : 1;
216 unsigned int is_insn : 1;
217 unsigned int is_unreachable : 1;
219 unsigned int is_specific_opcode : 1; /* also implies no_transform */
221 unsigned int is_align : 1;
222 unsigned int is_text_align : 1;
223 unsigned int alignment : 5;
225 /* A frag with this bit set is the first in a loop that actually
226 contains an instruction. */
227 unsigned int is_first_loop_insn : 1;
229 /* A frag with this bit set is a branch that we are using to
230 align branch targets as if it were a normal narrow instruction. */
231 unsigned int is_aligning_branch : 1;
233 /* For text fragments that can generate literals at relax time, this
234 variable points to the frag where the literal will be stored. For
235 literal frags, this variable points to the nearest literal pool
236 location frag. This literal frag will be moved to after this
237 location. For RELAX_LITERAL_POOL_BEGIN frags, this field points
238 to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
239 frag, to make moving frags for this literal pool efficient. */
240 fragS *literal_frag;
242 /* The destination segment for literal frags. (Note that this is only
243 valid after xtensa_move_literals.) This field is also used for
244 LITERAL_POOL_END frags. */
245 segT lit_seg;
247 /* Frag chain for LITERAL_POOL_BEGIN frags. */
248 struct frchain *lit_frchain;
250 /* For the relaxation scheme, some literal fragments can have their
251 expansions modified by an instruction that relaxes. */
252 int text_expansion[MAX_SLOTS];
253 int literal_expansion[MAX_SLOTS];
254 int unreported_expansion;
256 /* For slots that have a free register for relaxation, record that
257 register. */
258 expressionS free_reg[MAX_SLOTS];
260 /* For text fragments that can generate literals at relax time: */
261 fragS *literal_frags[MAX_SLOTS];
262 enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
263 symbolS *slot_symbols[MAX_SLOTS];
264 offsetT slot_offsets[MAX_SLOTS];
266 /* The global aligner needs to walk backward through the list of
267 frags. This field is only valid after xtensa_end. */
268 fragS *fr_prev;
272 /* For VLIW support, we need to know what slot a fixup applies to. */
273 typedef struct xtensa_fix_data_struct
275 int slot;
276 symbolS *X_add_symbol;
277 offsetT X_add_number;
278 } xtensa_fix_data;
281 /* Structure to record xtensa-specific symbol information. */
282 typedef struct xtensa_symfield_type
284 unsigned int is_loop_target : 1;
285 unsigned int is_branch_target : 1;
286 symbolS *next_expr_symbol;
287 } xtensa_symfield_type;
290 /* Structure for saving information about a block of property data
291 for frags that have the same flags. The forward reference is
292 in this header file. The actual definition is in tc-xtensa.c. */
293 struct xtensa_block_info_struct;
294 typedef struct xtensa_block_info_struct xtensa_block_info;
297 /* Property section types. */
298 typedef enum
300 xt_literal_sec,
301 xt_prop_sec,
302 max_xt_sec
303 } xt_section_type;
305 typedef struct xtensa_segment_info_struct
307 fragS *literal_pool_loc;
308 xtensa_block_info *blocks[max_xt_sec];
309 } xtensa_segment_info;
312 extern const char *xtensa_target_format (void);
313 extern void xtensa_init_fix_data (struct fix *);
314 extern void xtensa_frag_init (fragS *);
315 extern int xtensa_force_relocation (struct fix *);
316 extern int xtensa_validate_fix_sub (struct fix *);
317 extern void xtensa_frob_label (struct symbol *);
318 extern void xtensa_end (void);
319 extern void xtensa_post_relax_hook (void);
320 extern void xtensa_file_arch_init (bfd *);
321 extern void xtensa_flush_pending_output (void);
322 extern bfd_boolean xtensa_fix_adjustable (struct fix *);
323 extern void xtensa_symbol_new_hook (symbolS *);
324 extern long xtensa_relax_frag (fragS *, long, int *);
325 extern void xtensa_elf_section_change_hook (void);
326 extern int xtensa_unrecognized_line (int);
327 extern bfd_boolean xtensa_check_inside_bundle (void);
328 extern void xtensa_handle_align (fragS *);
329 extern char *xtensa_section_rename (char *);
331 #define TARGET_FORMAT xtensa_target_format ()
332 #define TARGET_ARCH bfd_arch_xtensa
333 #define TC_SEGMENT_INFO_TYPE xtensa_segment_info
334 #define TC_SYMFIELD_TYPE struct xtensa_symfield_type
335 #define TC_FIX_TYPE xtensa_fix_data
336 #define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
337 #define TC_FRAG_TYPE struct xtensa_frag_type
338 #define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
339 #define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
340 #define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
341 (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
342 #define TC_VALIDATE_FIX_SUB(fix, seg) xtensa_validate_fix_sub (fix)
343 #define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
344 #define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
345 #define tc_canonicalize_section_name(s) xtensa_section_rename (s)
346 #define tc_init_after_args() xtensa_file_arch_init (stdoutput)
347 #define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
348 #define tc_frob_label(sym) xtensa_frob_label (sym)
349 #define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
350 #define tc_symbol_new_hook(sym) xtensa_symbol_new_hook (sym)
351 #define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
352 #define md_elf_section_change_hook xtensa_elf_section_change_hook
353 #define md_end xtensa_end
354 #define md_flush_pending_output() xtensa_flush_pending_output ()
355 #define md_operand(x)
356 #define TEXT_SECTION_NAME xtensa_section_rename (".text")
357 #define DATA_SECTION_NAME xtensa_section_rename (".data")
358 #define BSS_SECTION_NAME xtensa_section_rename (".bss")
359 #define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
360 #define MAX_MEM_FOR_RS_ALIGN_CODE 1
363 /* The renumber_section function must be mapped over all the sections
364 after calling xtensa_post_relax_hook. That function is static in
365 write.c so it cannot be called from xtensa_post_relax_hook itself. */
367 #define md_post_relax_hook \
368 do \
370 int i = 0; \
371 xtensa_post_relax_hook (); \
372 bfd_map_over_sections (stdoutput, renumber_sections, &i); \
374 while (0)
377 /* Because xtensa relaxation can insert a new literal into the middle of
378 fragment and thus require re-running the relaxation pass on the
379 section, we need an explicit flag here. We explicitly use the name
380 "stretched" here to avoid changing the source code in write.c. */
382 #define md_relax_frag(segment, fragP, stretch) \
383 xtensa_relax_frag (fragP, stretch, &stretched)
385 /* Only allow call frame debug info optimization when linker relaxation is
386 not enabled as otherwise we could generate the DWARF directives without
387 the relocs necessary to patch them up. */
388 #define md_allow_eh_opt (linkrelax == 0)
390 #define LOCAL_LABELS_FB 1
391 #define WORKING_DOT_WORD 1
392 #define DOUBLESLASH_LINE_COMMENTS
393 #define TC_HANDLES_FX_DONE
394 #define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
395 #define TC_LINKRELAX_FIXUP(SEG) 0
396 #define MD_APPLY_SYM_VALUE(FIX) 0
397 #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
399 /* Use line number format that is amenable to linker relaxation. */
400 #define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
403 /* Resource reservation info functions. */
405 /* Returns the number of copies of a particular unit. */
406 typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
408 /* Returns the number of units the opcode uses. */
409 typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
411 /* Given an opcode and an index into the opcode's funcUnit list,
412 returns the unit used for the index. */
413 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
415 /* Given an opcode and an index into the opcode's funcUnit list,
416 returns the cycle during which the unit is used. */
417 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
419 /* The above typedefs parameterize the resource_table so that the
420 optional scheduler doesn't need its own resource reservation system.
422 For simple resource checking, which is all that happens normally,
423 the functions will be as follows (with some wrapping to make the
424 interface more convenient):
426 unit_num_copies_func = xtensa_funcUnit_num_copies
427 opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
428 opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
429 opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
431 Of course the optional scheduler has its own reservation table
432 and functions. */
434 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
435 int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
437 typedef struct
439 void *data;
440 int cycles;
441 int allocated_cycles;
442 int num_units;
443 unit_num_copies_func unit_num_copies;
444 opcode_num_units_func opcode_num_units;
445 opcode_funcUnit_use_unit_func opcode_unit_use;
446 opcode_funcUnit_use_stage_func opcode_unit_stage;
447 unsigned char **units;
448 } resource_table;
450 resource_table *new_resource_table
451 (void *, int, int, unit_num_copies_func, opcode_num_units_func,
452 opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
453 void resize_resource_table (resource_table *, int);
454 void clear_resource_table (resource_table *);
455 bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
456 void reserve_resources (resource_table *, xtensa_opcode, int);
457 void release_resources (resource_table *, xtensa_opcode, int);
459 #endif /* TC_XTENSA */