1 2001-08-08 Alan Modra <amodra@one.net.au>
3 1999-10-25 Torbjorn Granlund <tege@swox.com>
4 * ppc.h (struct powerpc_operand): New field `reloc'.
6 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
8 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
9 (cgen_cpu_desc): Ditto.
11 2001-07-07 Ben Elliston <bje@redhat.com>
13 * m88k.h: Clean up and reformat. Remove unused code.
15 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
17 * cgen.h (cgen_keyword): Add nonalpha_chars field.
19 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
21 * mips.h (CPU_R12000): Define.
23 2001-05-23 John Healy <jhealy@redhat.com>
25 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
27 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
29 * mips.h (INSN_ISA_MASK): Define.
31 2001-05-12 Alan Modra <amodra@one.net.au>
33 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
34 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
35 and use InvMem as these insns must have register operands.
37 2001-05-04 Alan Modra <amodra@one.net.au>
39 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
40 and pextrw to swap reg/rm assignments.
42 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
44 * cris.h (enum cris_insn_version_usage): Correct comment for
47 2001-03-24 Alan Modra <alan@linuxcare.com.au>
49 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
50 Add InvMem to first operand of "maskmovdqu".
52 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
54 * cris.h (ADD_PC_INCR_OPCODE): New macro.
56 2001-03-21 Kazu Hirata <kazu@hxi.com>
58 * h8300.h: Fix formatting.
60 2001-03-22 Alan Modra <alan@linuxcare.com.au>
62 * i386.h (i386_optab): Add paddq, psubq.
64 2001-03-19 Alan Modra <alan@linuxcare.com.au>
66 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
68 2001-02-28 Igor Shevlyakov <igor@windriver.com>
70 * m68k.h: new defines for Coldfire V4. Update mcf to know
73 2001-02-18 lars brinkhoff <lars@nocrew.org>
77 2001-02-12 Jan Hubicka <jh@suse.cz>
79 * i386.h (i386_optab): SSE integer converison instructions have
80 64bit versions on x86-64.
82 2001-02-10 Nick Clifton <nickc@redhat.com>
84 * mips.h: Remove extraneous whitespace. Formating change to allow
85 for future contribution.
87 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
91 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
93 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
94 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
95 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
97 2001-01-24 Karsten Keil <kkeil@suse.de>
99 * i386.h (i386_optab): Fix swapgs
101 2001-01-14 Alan Modra <alan@linuxcare.com.au>
103 * hppa.h: Describe new '<' and '>' operand types, and tidy
105 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
106 Remove duplicate "ldw j(s,b),x". Sort some entries.
108 2001-01-13 Jan Hubicka <jh@suse.cz>
110 * i386.h (i386_optab): Fix pusha and ret templates.
112 2001-01-11 Peter Targett <peter.targett@arccores.com>
114 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
115 definitions for masking cpu type.
116 (arc_ext_operand_value) New structure for storing extended
118 (ARC_OPERAND_*) Flags for operand values.
120 2001-01-10 Jan Hubicka <jh@suse.cz>
122 * i386.h (pinsrw): Add.
124 (cvttpd2dq): Fix operands.
125 (cvttps2dq): Likewise.
126 (movq2q): Rename to movdq2q.
128 2001-01-10 Richard Schaal <richard.schaal@intel.com>
130 * i386.h: Correct movnti instruction.
132 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
134 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
135 of operands (unsigned char or unsigned short).
136 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
137 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
139 2001-01-05 Jan Hubicka <jh@suse.cz>
141 * i386.h (i386_optab): Make [sml]fence template to use immext field.
143 2001-01-03 Jan Hubicka <jh@suse.cz>
145 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
146 introduced by Pentium4
148 2000-12-30 Jan Hubicka <jh@suse.cz>
150 * i386.h (i386_optab): Add "rex*" instructions;
151 add swapgs; disable jmp/call far direct instructions for
152 64bit mode; add syscall and sysret; disable registers for 0xc6
153 template. Add 'q' suffixes to extendable instructions, disable
154 obsolete instructions, add new sign/zero extension ones.
155 (i386_regtab): Add extended registers.
157 (q_Suf, wlq_Suf, bwlq_Suf): New.
159 2000-12-20 Jan Hubicka <jh@suse.cz>
161 * i386.h (i386_optab): Replace "Imm" with "EncImm".
162 (i386_regtab): Add flags field.
164 2000-12-12 Nick Clifton <nickc@redhat.com>
166 * mips.h: Fix formatting.
168 2000-12-01 Chris Demetriou <cgd@sibyte.com>
170 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
171 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
172 OP_*_SYSCALL definitions.
173 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
175 (MIPS operand specifier comments): Remove 'm', add 'U' and
176 'J', and update the meaning of 'B' so that it's more general.
178 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
179 INSN_ISA5): Renumber, redefine to mean the ISA at which the
180 instruction was added.
181 (INSN_ISA32): New constant.
182 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
183 Renumber to avoid new and/or renumbered INSN_* constants.
184 (INSN_MIPS32): Delete.
185 (ISA_UNKNOWN): New constant to indicate unknown ISA.
186 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
187 ISA_MIPS32): New constants, defined to be the mask of INSN_*
188 constants available at that ISA level.
189 (CPU_UNKNOWN): New constant to indicate unknown CPU.
190 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
191 define it with a unique value.
192 (OPCODE_IS_MEMBER): Update for new ISA membership-related
195 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
198 * mips.h (CPU_SB1): New constant.
200 2000-10-20 Jakub Jelinek <jakub@redhat.com>
202 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
203 Note that '3' is used for siam operand.
205 2000-09-22 Jim Wilson <wilson@cygnus.com>
207 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
209 2000-09-13 Anders Norlander <anorland@acc.umu.se>
211 * mips.h: Use defines instead of hard-coded processor numbers.
212 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
213 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
214 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
215 CPU_4KC, CPU_4KM, CPU_4KP): Define..
216 (OPCODE_IS_MEMBER): Use new defines.
217 (OP_MASK_SEL, OP_SH_SEL): Define.
218 (OP_MASK_CODE20, OP_SH_CODE20): Define.
219 Add 'P' to used characters.
220 Use 'H' for coprocessor select field.
221 Use 'm' for 20 bit breakpoint code.
222 Document new arg characters and add to used characters.
223 (INSN_MIPS32): New define for MIPS32 extensions.
224 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
226 2000-09-05 Alan Modra <alan@linuxcare.com.au>
228 * hppa.h: Mention cz completer.
230 2000-08-16 Jim Wilson <wilson@cygnus.com>
232 * ia64.h (IA64_OPCODE_POSTINC): New.
234 2000-08-15 H.J. Lu <hjl@gnu.org>
236 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
239 2000-08-08 Jason Eckhardt <jle@cygnus.com>
241 * i860.h: Small formatting adjustments.
243 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
245 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
246 Move related opcodes closer to each other.
247 Minor changes in comments, list undefined opcodes.
249 2000-07-26 Dave Brolley <brolley@redhat.com>
251 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
253 2000-07-22 Jason Eckhardt <jle@cygnus.com>
255 * i860.h (btne, bte, bla): Changed these opcodes
256 to use sbroff ('r') instead of split16 ('s').
257 (J, K, L, M): New operand types for 16-bit aligned fields.
258 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
259 use I, J, K, L, M instead of just I.
260 (T, U): New operand types for split 16-bit aligned fields.
261 (st.x): Changed these opcodes to use S, T, U instead of just S.
262 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
264 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
265 (pfeq.ss, pfeq.dd): New opcodes.
266 (st.s): Fixed incorrect mask bits.
267 (fmlow): Fixed incorrect mask bits.
268 (fzchkl, pfzchkl): Fixed incorrect mask bits.
269 (faddz, pfaddz): Fixed incorrect mask bits.
270 (form, pform): Fixed incorrect mask bits.
271 (pfld.l): Fixed incorrect mask bits.
272 (fst.q): Fixed incorrect mask bits.
273 (all floating point opcodes): Fixed incorrect mask bits for
274 handling of dual bit.
276 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
280 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
282 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
283 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
284 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
285 (AVR_ISA_M83): Define for ATmega83, ATmega85.
286 (espm): Remove, because ESPM removed in databook update.
287 (eicall, eijmp): Move to the end of opcode table.
289 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
291 * m68hc11.h: New file for support of Motorola 68hc11.
293 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
295 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
297 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
299 * avr.h: New file with AVR opcodes.
301 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
303 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
305 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
307 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
309 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
311 * i386.h: Use sl_FP, not sl_Suf for fild.
313 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
315 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
316 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
317 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
318 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
320 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
322 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
324 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
325 Alexander Sokolov <robocop@netlink.ru>
327 * i386.h (i386_optab): Add cpu_flags for all instructions.
329 2000-05-13 Alan Modra <alan@linuxcare.com.au>
331 From Gavin Romig-Koch <gavin@cygnus.com>
332 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
334 2000-05-04 Timothy Wall <twall@cygnus.com>
338 2000-05-03 J.T. Conklin <jtc@redback.com>
340 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
341 (PPC_OPERAND_VR): New operand flag for vector registers.
343 2000-05-01 Kazu Hirata <kazu@hxi.com>
345 * h8300.h (EOP): Add missing initializer.
347 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
349 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
350 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
351 New operand types l,y,&,fe,fE,fx added to support above forms.
352 (pa_opcodes): Replaced usage of 'x' as source/target for
353 floating point double-word loads/stores with 'fx'.
355 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
356 David Mosberger <davidm@hpl.hp.com>
357 Timothy Wall <twall@cygnus.com>
358 Jim Wilson <wilson@cygnus.com>
362 2000-03-27 Nick Clifton <nickc@cygnus.com>
364 * d30v.h (SHORT_A1): Fix value.
365 (SHORT_AR): Renumber so that it is at the end of the list of short
366 instructions, not the end of the list of long instructions.
368 2000-03-26 Alan Modra <alan@linuxcare.com>
370 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
371 problem isn't really specific to Unixware.
372 (OLDGCC_COMPAT): Define.
373 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
375 Fix lots of comments.
377 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
380 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
381 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
382 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
383 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
384 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
385 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
386 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
388 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
390 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
391 fistpd without suffix.
393 2000-02-24 Nick Clifton <nickc@cygnus.com>
395 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
396 'signed_overflow_ok_p'.
397 Delete prototypes for cgen_set_flags() and cgen_get_flags().
399 2000-02-24 Andrew Haley <aph@cygnus.com>
401 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
402 (CGEN_CPU_TABLE): flags: new field.
403 Add prototypes for new functions.
405 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
407 * i386.h: Add some more UNIXWARE_COMPAT comments.
409 2000-02-23 Linas Vepstas <linas@linas.org>
413 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
415 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
416 cannot be combined in parallel with ADD/SUBppp.
418 2000-02-22 Andrew Haley <aph@cygnus.com>
420 * mips.h: (OPCODE_IS_MEMBER): Add comment.
422 1999-12-30 Andrew Haley <aph@cygnus.com>
424 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
425 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
428 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
430 * i386.h: Qualify intel mode far call and jmp with x_Suf.
432 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
434 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
435 indirect jumps and calls. Add FF/3 call for intel mode.
437 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
439 * mn10300.h: Add new operand types. Add new instruction formats.
441 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
443 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
446 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
448 * mips.h (INSN_ISA5): New.
450 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
452 * mips.h (OPCODE_IS_MEMBER): New.
454 1999-10-29 Nick Clifton <nickc@cygnus.com>
456 * d30v.h (SHORT_AR): Define.
458 1999-10-18 Michael Meissner <meissner@cygnus.com>
460 * alpha.h (alpha_num_opcodes): Convert to unsigned.
461 (alpha_num_operands): Ditto.
463 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
465 * hppa.h (pa_opcodes): Add load and store cache control to
466 instructions. Add ordered access load and store.
468 * hppa.h (pa_opcode): Add new entries for addb and addib.
470 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
472 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
474 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
476 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
478 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
480 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
481 and "be" using completer prefixes.
483 * hppa.h (pa_opcodes): Add initializers to silence compiler.
485 * hppa.h: Update comments about character usage.
487 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
489 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
490 up the new fstw & bve instructions.
492 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
494 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
497 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
499 * hppa.h (pa_opcodes): Add long offset double word load/store
502 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
505 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
507 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
509 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
511 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
513 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
515 * hppa.h (pa_opcodes): Add support for "b,l".
517 * hppa.h (pa_opcodes): Add support for "b,gate".
519 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
521 * hppa.h (pa_opcodes): Use 'fX' for first register operand
524 * hppa.h (pa_opcodes): Fix mask for probe and probei.
526 * hppa.h (pa_opcodes): Fix mask for depwi.
528 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
530 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
531 an explicit output argument.
533 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
535 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
536 Add a few PA2.0 loads and store variants.
538 1999-09-04 Steve Chamberlain <sac@pobox.com>
542 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
544 * i386.h (i386_regtab): Move %st to top of table, and split off
545 other fp reg entries.
546 (i386_float_regtab): To here.
548 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
550 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
553 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
556 * hppa.h: Document new completers and args.
557 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
558 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
559 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
562 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
563 hshr, hsub, mixh, mixw, permh.
565 * hppa.h (pa_opcodes): Change completers in instructions to
568 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
569 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
571 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
572 fnegabs to use 'I' instead of 'F'.
574 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
576 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
577 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
578 Alphabetically sort PIII insns.
580 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
582 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
584 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
586 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
587 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
589 * hppa.h: Document 64 bit condition completers.
591 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
593 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
595 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
597 * i386.h (i386_optab): Add DefaultSize modifier to all insns
598 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
599 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
601 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
602 Jeff Law <law@cygnus.com>
604 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
606 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
608 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
609 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
611 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
613 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
615 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
617 * hppa.h (struct pa_opcode): Add new field "flags".
618 (FLAGS_STRICT): Define.
620 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
621 Jeff Law <law@cygnus.com>
623 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
625 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
627 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
629 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
630 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
631 flag to fcomi and friends.
633 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
635 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
636 integer logical instructions.
638 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
640 * m68k.h: Document new formats `E', `G', `H' and new places `N',
643 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
644 and new places `m', `M', `h'.
646 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
648 * hppa.h (pa_opcodes): Add several processor specific system
651 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
653 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
654 "addb", and "addib" to be used by the disassembler.
656 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
658 * i386.h (ReverseModrm): Remove all occurences.
659 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
660 movmskps, pextrw, pmovmskb, maskmovq.
661 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
662 ignore the data size prefix.
664 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
665 Mostly stolen from Doug Ledford <dledford@redhat.com>
667 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
669 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
671 1999-04-14 Doug Evans <devans@casey.cygnus.com>
673 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
674 (CGEN_ATTR_TYPE): Update.
675 (CGEN_ATTR_MASK): Number booleans starting at 0.
676 (CGEN_ATTR_VALUE): Update.
677 (CGEN_INSN_ATTR): Update.
679 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
681 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
684 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
686 * hppa.h (bb, bvb): Tweak opcode/mask.
689 1999-03-22 Doug Evans <devans@casey.cygnus.com>
691 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
692 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
693 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
694 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
695 Delete member max_insn_size.
696 (enum cgen_cpu_open_arg): New enum.
697 (cpu_open): Update prototype.
698 (cpu_open_1): Declare.
699 (cgen_set_cpu): Delete.
701 1999-03-11 Doug Evans <devans@casey.cygnus.com>
703 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
704 (CGEN_OPERAND_NIL): New macro.
705 (CGEN_OPERAND): New member `type'.
706 (@arch@_cgen_operand_table): Delete decl.
707 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
708 (CGEN_OPERAND_TABLE): New struct.
709 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
710 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
711 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
712 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
713 {get,set}_{int,vma}_operand.
714 (@arch@_cgen_cpu_open): New arg `isa'.
715 (cgen_set_cpu): Ditto.
717 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
719 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
721 1999-02-25 Doug Evans <devans@casey.cygnus.com>
723 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
724 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
726 (CGEN_HW_TABLE): New struct.
727 (hw_table): Delete declaration.
728 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
729 to table entry to enum.
730 (CGEN_OPINST): Ditto.
731 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
733 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
735 * alpha.h (AXP_OPCODE_EV6): New.
736 (AXP_OPCODE_NOPAL): Include it.
738 1999-02-09 Doug Evans <devans@casey.cygnus.com>
740 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
741 All uses updated. New members int_insn_p, max_insn_size,
742 parse_operand,insert_operand,extract_operand,print_operand,
743 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
744 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
745 extract_handlers,print_handlers.
746 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
747 (CGEN_ATTR_BOOL_OFFSET): New macro.
748 (CGEN_ATTR_MASK): Subtract it to compute bit number.
749 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
750 (cgen_opcode_handler): Renamed from cgen_base.
751 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
752 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
754 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
755 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
756 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
757 (CGEN_OPCODE,CGEN_IBASE): New types.
758 (CGEN_INSN): Rewrite.
759 (CGEN_{ASM,DIS}_HASH*): Delete.
760 (init_opcode_table,init_ibld_table): Declare.
761 (CGEN_INSN_ATTR): New type.
763 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
765 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
766 (x_FP, d_FP, dls_FP, sldx_FP): Define.
767 Change *Suf definitions to include x and d suffixes.
768 (movsx): Use w_Suf and b_Suf.
770 (movs): Use bwld_Suf.
771 (fld): Change ordering. Use sld_FP.
772 (fild): Add Intel Syntax equivalent of fildq.
775 (fstp): Use sld_FP. Add x_FP version.
776 (fistp): LLongMem version for Intel Syntax.
777 (fcom, fcomp): Use sld_FP.
778 (fadd, fiadd, fsub): Use sld_FP.
780 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
782 1999-01-27 Doug Evans <devans@casey.cygnus.com>
784 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
787 1999-01-16 Jeffrey A Law (law@cygnus.com)
789 * hppa.h (bv): Fix mask.
791 1999-01-05 Doug Evans <devans@casey.cygnus.com>
793 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
795 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
796 (CGEN_ATTR_TABLE): New member dfault.
798 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
800 * mips.h (MIPS16_INSN_BRANCH): New.
802 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
804 The following is part of a change made by Edith Epstein
805 <eepstein@sophia.cygnus.com> as part of a project to merge in
806 changes by HP; HP did not create ChangeLog entries.
808 * hppa.h (completer_chars): list of chars to not put a space
811 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
813 * i386.h (i386_optab): Permit w suffix on processor control and
814 status word instructions.
816 1998-11-30 Doug Evans <devans@casey.cygnus.com>
818 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
819 (struct cgen_keyword_entry): Ditto.
820 (struct cgen_operand): Ditto.
821 (CGEN_IFLD): New typedef, with associated access macros.
822 (CGEN_IFMT): New typedef, with associated access macros.
823 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
824 (CGEN_IVALUE): New typedef.
825 (struct cgen_insn): Delete const on syntax,attrs members.
826 `format' now points to format data. Type of `value' is now
828 (struct cgen_opcode_table): New member ifld_table.
830 1998-11-18 Doug Evans <devans@casey.cygnus.com>
832 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
833 (CGEN_OPERAND_INSTANCE): New member `attrs'.
834 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
835 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
836 (cgen_opcode_table): Update type of dis_hash fn.
837 (extract_operand): Update type of `insn_value' arg.
839 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
841 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
843 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
845 * mips.h (INSN_MULT): Added.
847 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
849 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
851 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
853 * cgen.h (CGEN_INSN_INT): New typedef.
854 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
855 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
856 (CGEN_INSN_BYTES_PTR): New typedef.
857 (CGEN_EXTRACT_INFO): New typedef.
858 (cgen_insert_fn,cgen_extract_fn): Update.
859 (cgen_opcode_table): New member `insn_endian'.
860 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
861 (insert_operand,extract_operand): Update.
862 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
864 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
866 * cgen.h (CGEN_ATTR_BOOLS): New macro.
867 (struct CGEN_HW_ENTRY): New member `attrs'.
868 (CGEN_HW_ATTR): New macro.
869 (struct CGEN_OPERAND_INSTANCE): New member `name'.
870 (CGEN_INSN_INVALID_P): New macro.
872 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
876 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
878 From Robert Andrew Dale <rob@nb.net>
879 * i386.h (i386_optab): Add AMD 3DNow! instructions.
880 (AMD_3DNOW_OPCODE): Define.
882 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
884 * d30v.h (EITHER_BUT_PREFER_MU): Define.
886 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
888 * cgen.h (cgen_insn): #if 0 out element `cdx'.
890 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
892 Move all global state data into opcode table struct, and treat
893 opcode table as something that is "opened/closed".
894 * cgen.h (CGEN_OPCODE_DESC): New type.
895 (all fns): New first arg of opcode table descriptor.
896 (cgen_set_parse_operand_fn): Add prototype.
897 (cgen_current_machine,cgen_current_endian): Delete.
898 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
899 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
900 dis_hash_table,dis_hash_table_entries.
901 (opcode_open,opcode_close): Add prototypes.
903 * cgen.h (cgen_insn): New element `cdx'.
905 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
907 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
909 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
911 * mn10300.h: Add "no_match_operands" field for instructions.
912 (MN10300_MAX_OPERANDS): Define.
914 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
916 * cgen.h (cgen_macro_insn_count): Declare.
918 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
920 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
921 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
922 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
923 set_{int,vma}_operand.
925 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
927 * mn10300.h: Add "machine" field for instructions.
928 (MN103, AM30): Define machine types.
930 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
932 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
934 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
936 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
938 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
940 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
942 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
943 those that happen to be implemented on pentiums.
945 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
947 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
948 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
949 with Size16|IgnoreSize or Size32|IgnoreSize.
951 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
953 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
954 (REPE): Rename to REPE_PREFIX_OPCODE.
955 (i386_regtab_end): Remove.
956 (i386_prefixtab, i386_prefixtab_end): Remove.
957 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
959 (MAX_OPCODE_SIZE): Define.
960 (i386_optab_end): Remove.
964 * i386.h (i386_optab): Allow 16 bit displacement for `mov
965 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
966 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
967 data32, dword, and adword prefixes.
968 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
971 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
973 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
975 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
976 register operands, because this is a common idiom. Flag them with
977 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
978 fdivrp because gcc erroneously generates them. Also flag with a
981 * i386.h: Add suffix modifiers to most insns, and tighter operand
982 checks in some cases. Fix a number of UnixWare compatibility
983 issues with float insns. Merge some floating point opcodes, using
984 new FloatMF modifier.
985 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
988 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
989 IgnoreDataSize where appropriate.
991 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
993 * i386.h: (one_byte_segment_defaults): Remove.
994 (two_byte_segment_defaults): Remove.
995 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
997 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
999 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1000 (cgen_hw_lookup_by_num): Declare.
1002 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1004 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1005 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1007 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1009 * cgen.h (cgen_asm_init_parse): Delete.
1010 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1011 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1013 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1015 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1016 (cgen_asm_finish_insn): Update prototype.
1017 (cgen_insn): New members num, data.
1018 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1019 dis_hash, dis_hash_table_size moved to ...
1020 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1021 All uses updated. New members asm_hash_p, dis_hash_p.
1022 (CGEN_MINSN_EXPANSION): New struct.
1023 (cgen_expand_macro_insn): Declare.
1024 (cgen_macro_insn_count): Declare.
1025 (get_insn_operands): Update prototype.
1026 (lookup_get_insn_operands): Declare.
1028 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1030 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1031 regKludge. Add operands types for string instructions.
1033 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1035 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1038 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1040 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1043 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1045 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1046 Add IsString flag to string instructions.
1047 (IS_STRING): Don't define.
1048 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1049 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1050 (SS_PREFIX_OPCODE): Define.
1052 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1054 * i386.h: Revert March 24 patch; no more LinearAddress.
1056 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1058 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1059 instructions, and instead add FWait opcode modifier. Add short
1060 form of fldenv and fstenv.
1061 (FWAIT_OPCODE): Define.
1063 * i386.h (i386_optab): Change second operand constraint of `mov
1064 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1065 allow legal instructions such as `movl %gs,%esi'
1067 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1069 * h8300.h: Various changes to fully bracket initializers.
1071 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1073 * i386.h: Set LinearAddress for lidt and lgdt.
1075 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1077 * cgen.h (CGEN_BOOL_ATTR): New macro.
1079 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1081 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1083 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1085 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1086 (cgen_insn): Record syntax and format entries here, rather than
1089 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1091 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1093 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1095 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1096 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1097 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1099 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1101 * cgen.h (lookup_insn): New argument alias_p.
1103 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1105 Fix rac to accept only a0:
1106 * d10v.h (OPERAND_ACC): Split into:
1107 (OPERAND_ACC0, OPERAND_ACC1) .
1108 (OPERAND_GPR): Define.
1110 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1112 * cgen.h (CGEN_FIELDS): Define here.
1113 (CGEN_HW_ENTRY): New member `type'.
1114 (hw_list): Delete decl.
1115 (enum cgen_mode): Declare.
1116 (CGEN_OPERAND): New member `hw'.
1117 (enum cgen_operand_instance_type): Declare.
1118 (CGEN_OPERAND_INSTANCE): New type.
1119 (CGEN_INSN): New member `operands'.
1120 (CGEN_OPCODE_DATA): Make hw_list const.
1121 (get_insn_operands,lookup_insn): Add prototypes for.
1123 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1125 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1126 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1127 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1128 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1130 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1132 * cgen.h: Correct typo in comment end marker.
1134 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1136 * tic30.h: New file.
1138 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1140 * cgen.h: Add prototypes for cgen_save_fixups(),
1141 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1142 of cgen_asm_finish_insn() to return a char *.
1144 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1146 * cgen.h: Formatting changes to improve readability.
1148 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1150 * cgen.h (*): Clean up pass over `struct foo' usage.
1151 (CGEN_ATTR): Make unsigned char.
1152 (CGEN_ATTR_TYPE): Update.
1153 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1154 (cgen_base): Move member `attrs' to cgen_insn.
1155 (CGEN_KEYWORD): New member `null_entry'.
1156 (CGEN_{SYNTAX,FORMAT}): New types.
1157 (cgen_insn): Format and syntax separated from each other.
1159 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1161 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1162 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1163 flags_{used,set} long.
1164 (d30v_operand): Make flags field long.
1166 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1168 * m68k.h: Fix comment describing operand types.
1170 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1172 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1173 everything else after down.
1175 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1177 * d10v.h (OPERAND_FLAG): Split into:
1178 (OPERAND_FFLAG, OPERAND_CFLAG) .
1180 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1182 * mips.h (struct mips_opcode): Changed comments to reflect new
1185 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1187 * mips.h: Added to comments a quick-ref list of all assigned
1188 operand type characters.
1189 (OP_{MASK,SH}_PERFREG): New macros.
1191 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1193 * sparc.h: Add '_' and '/' for v9a asr's.
1194 Patch from David Miller <davem@vger.rutgers.edu>
1196 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1198 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1199 area are not available in the base model (H8/300).
1201 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1203 * m68k.h: Remove documentation of ` operand specifier.
1205 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1207 * m68k.h: Document q and v operand specifiers.
1209 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1211 * v850.h (struct v850_opcode): Add processors field.
1212 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1213 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1214 (PROCESSOR_V850EA): New bit constants.
1216 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1218 Merge changes from Martin Hunt:
1220 * d30v.h: Allow up to 64 control registers. Add
1223 * d30v.h (LONG_Db): New form for delayed branches.
1225 * d30v.h: (LONG_Db): New form for repeati.
1227 * d30v.h (SHORT_D2B): New form.
1229 * d30v.h (SHORT_A2): New form.
1231 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1232 registers are used. Needed for VLIW optimization.
1234 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1236 * cgen.h: Move assembler interface section
1237 up so cgen_parse_operand_result is defined for cgen_parse_address.
1238 (cgen_parse_address): Update prototype.
1240 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1242 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1244 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1246 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1247 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1250 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1253 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1256 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1257 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1259 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1261 * v850.h (V850_NOT_R0): New flag.
1263 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1265 * v850.h (struct v850_opcode): Remove flags field.
1267 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1269 * v850.h (struct v850_opcode): Add flags field.
1270 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1272 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1273 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1275 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1279 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1281 * sparc.h (sparc_opcodes): Declare as const.
1283 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1285 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1286 uses single or double precision floating point resources.
1287 (INSN_NO_ISA, INSN_ISA1): Define.
1288 (cpu specific INSN macros): Tweak into bitmasks outside the range
1291 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1293 * i386.h: Fix pand opcode.
1295 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1297 * mips.h: Widen INSN_ISA and move it to a more convenient
1298 bit position. Add INSN_3900.
1300 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1302 * mips.h (struct mips_opcode): added new field membership.
1304 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1306 * i386.h (movd): only Reg32 is allowed.
1308 * i386.h: add fcomp and ud2. From Wayne Scott
1309 <wscott@ichips.intel.com>.
1311 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1313 * i386.h: Add MMX instructions.
1315 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1317 * i386.h: Remove W modifier from conditional move instructions.
1319 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1321 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1322 with no arguments to match that generated by the UnixWare
1325 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1327 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1328 (cgen_parse_operand_fn): Declare.
1329 (cgen_init_parse_operand): Declare.
1330 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1331 new argument `want'.
1332 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1333 (enum cgen_parse_operand_type): New enum.
1335 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1337 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1339 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1343 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1345 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1348 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1350 * v850.h (extract): Make unsigned.
1352 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1356 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1358 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1359 take a direction bit.
1361 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1363 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1365 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1367 * sparc.h: Include <ansidecl.h>. Update function declarations to
1368 use prototypes, and to use const when appropriate.
1370 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1372 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1374 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1376 * d10v.h: Change pre_defined_registers to
1377 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1379 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1381 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1382 Change mips_opcodes from const array to a pointer,
1383 and change bfd_mips_num_opcodes from const int to int,
1384 so that we can increase the size of the mips opcodes table
1387 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1389 * d30v.h (FLAG_X): Remove unused flag.
1391 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1395 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1397 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1398 (PDS_VALUE): Macro to access value field of predefined symbols.
1399 (tic80_next_predefined_symbol): Add prototype.
1401 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1403 * tic80.h (tic80_symbol_to_value): Change prototype to match
1404 change in function, added class parameter.
1406 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1408 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1409 endmask fields, which are somewhat weird in that 0 and 32 are
1410 treated exactly the same.
1412 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1414 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1415 rather than a constant that is 2**X. Reorder them to put bits for
1416 operands that have symbolic names in the upper bits, so they can
1417 be packed into an int where the lower bits contain the value that
1418 corresponds to that symbolic name.
1419 (predefined_symbo): Add struct.
1420 (tic80_predefined_symbols): Declare array of translations.
1421 (tic80_num_predefined_symbols): Declare size of that array.
1422 (tic80_value_to_symbol): Declare function.
1423 (tic80_symbol_to_value): Declare function.
1425 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1427 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1429 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1431 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1432 be the destination register.
1434 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1436 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1437 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1438 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1439 that the opcode can have two vector instructions in a single
1440 32 bit word and we have to encode/decode both.
1442 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1444 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1445 TIC80_OPERAND_RELATIVE for PC relative.
1446 (TIC80_OPERAND_BASEREL): New flag bit for register
1449 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1451 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1453 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1455 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1456 ":s" modifier for scaling.
1458 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1460 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1461 (TIC80_OPERAND_M_LI): Ditto
1463 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1465 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1466 (TIC80_OPERAND_CC): New define for condition code operand.
1467 (TIC80_OPERAND_CR): New define for control register operand.
1469 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1471 * tic80.h (struct tic80_opcode): Name changed.
1472 (struct tic80_opcode): Remove format field.
1473 (struct tic80_operand): Add insertion and extraction functions.
1474 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1478 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1480 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1481 type IV instruction offsets.
1483 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1485 * tic80.h: New file.
1487 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1489 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1491 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1493 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1494 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1495 * v850.h: Fix comment, v850_operand not powerpc_operand.
1497 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1499 * mn10200.h: Flesh out structures and definitions needed by
1500 the mn10200 assembler & disassembler.
1502 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1504 * mips.h: Add mips16 definitions.
1506 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1508 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1510 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1512 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1513 (MN10300_OPERAND_MEMADDR): Define.
1515 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1517 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1519 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1521 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1523 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1525 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1527 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1529 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1531 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1533 * alpha.h: Don't include "bfd.h"; private relocation types are now
1534 negative to minimize problems with shared libraries. Organize
1535 instruction subsets by AMASK extensions and PALcode
1537 (struct alpha_operand): Move flags slot for better packing.
1539 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1541 * v850.h (V850_OPERAND_RELAX): New operand flag.
1543 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1545 * mn10300.h (FMT_*): Move operand format definitions
1548 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1550 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1552 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1554 * mn10300.h (mn10300_opcode): Add "format" field.
1555 (MN10300_OPERAND_*): Define.
1557 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1559 * mn10x00.h: Delete.
1560 * mn10200.h, mn10300.h: New files.
1562 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1564 * mn10x00.h: New file.
1566 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1568 * v850.h: Add new flag to indicate this instruction uses a PC
1571 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1573 * h8300.h (stmac): Add missing instruction.
1575 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1577 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1580 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1582 * v850.h (V850_OPERAND_EP): Define.
1584 * v850.h (v850_opcode): Add size field.
1586 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1588 * v850.h (v850_operands): Add insert and extract fields, pointers
1589 to functions used to handle unusual operand encoding.
1590 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1591 V850_OPERAND_SIGNED): Defined.
1593 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1595 * v850.h (v850_operands): Add flags field.
1596 (OPERAND_REG, OPERAND_NUM): Defined.
1598 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1602 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1604 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1605 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1606 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1607 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1608 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1611 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1613 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1614 a 3 bit space id instead of a 2 bit space id.
1616 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1618 * d10v.h: Add some additional defines to support the
1619 assembler in determining which operations can be done in parallel.
1621 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1623 * h8300.h (SN): Define.
1624 (eepmov.b): Renamed from "eepmov"
1625 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1628 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1630 * d10v.h (OPERAND_SHIFT): New operand flag.
1632 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1634 * d10v.h: Changes for divs, parallel-only instructions, and
1637 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1639 * d10v.h (pd_reg): Define. Putting the definition here allows
1640 the assembler and disassembler to share the same struct.
1642 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1644 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1645 Williams <steve@icarus.com>.
1647 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1651 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1653 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1655 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1657 * m68k.h (mcf5200): New macro.
1658 Document names of coldfire control registers.
1660 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1662 * h8300.h (SRC_IN_DST): Define.
1664 * h8300.h (UNOP3): Mark the register operand in this insn
1665 as a source operand, not a destination operand.
1666 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1667 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1668 register operand with SRC_IN_DST.
1670 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1672 * alpha.h: New file.
1674 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1676 * rs6k.h: Remove obsolete file.
1678 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1680 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1681 fdivp, and fdivrp. Add ffreep.
1683 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1685 * h8300.h: Reorder various #defines for readability.
1686 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1687 (BITOP): Accept additional (unused) argument. All callers changed.
1690 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1692 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1693 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1694 (BITOP, EBITOP): Handle new H8/S addressing modes for
1696 (UNOP3): Handle new shift/rotate insns on the H8/S.
1697 (insns using exr): New instructions.
1698 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1700 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1702 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1705 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1707 * h8300.h (START): Remove.
1708 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1709 and mov.l insns that can be relaxed.
1711 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1713 * i386.h: Remove Abs32 from lcall.
1715 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1717 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1718 (SLCPOP): New macro.
1719 Mark X,Y opcode letters as in use.
1721 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1723 * sparc.h (F_FLOAT, F_FBR): Define.
1725 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1727 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1729 (ABS8SRC,ABS8DST): Add ABS8MEM.
1730 (add.l): Fix reg+reg variant.
1731 (eepmov.w): Renamed from eepmovw.
1732 (ldc,stc): Fix many cases.
1734 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1736 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1738 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1740 * sparc.h (O): Mark operand letter as in use.
1742 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1744 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1745 Mark operand letters uU as in use.
1747 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1749 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1750 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1751 (SPARC_OPCODE_SUPPORTED): New macro.
1752 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1755 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1757 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1758 declaration consistent with return type in definition.
1760 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1762 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1764 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1766 * i386.h (i386_regtab): Add 80486 test registers.
1768 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1770 * i960.h (I_HX): Define.
1771 (i960_opcodes): Add HX instruction.
1773 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1775 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1778 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1780 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1781 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1782 (bfd_* defines): Delete.
1783 (sparc_opcode_archs): Replaces architecture_pname.
1784 (sparc_opcode_lookup_arch): Declare.
1785 (NUMOPCODES): Delete.
1787 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1789 * sparc.h (enum sparc_architecture): Add v9a.
1790 (ARCHITECTURES_CONFLICT_P): Update.
1792 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1794 * i386.h: Added Pentium Pro instructions.
1796 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1798 * m68k.h: Document new 'W' operand place.
1800 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1802 * hppa.h: Add lci and syncdma instructions.
1804 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1806 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1809 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1811 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1812 assembler's -mcom and -many switches.
1814 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1816 * i386.h: Fix cmpxchg8b extension opcode description.
1818 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1820 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1823 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1825 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1827 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1829 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1831 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1833 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1835 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1837 * m68kmri.h: Remove.
1839 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1840 declarations. Remove F_ALIAS and flag field of struct
1841 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1842 int. Make name and args fields of struct m68k_opcode const.
1844 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1846 * sparc.h (F_NOTV9): Define.
1848 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1850 * mips.h (INSN_4010): Define.
1852 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1854 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1856 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1857 * m68k.h: Fix argument descriptions of coprocessor
1858 instructions to allow only alterable operands where appropriate.
1859 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1860 (m68k_opcode_aliases): Add more aliases.
1862 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1864 * m68k.h: Added explcitly short-sized conditional branches, and a
1865 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1866 svr4-based configurations.
1868 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1870 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1871 * i386.h: added missing Data16/Data32 flags to a few instructions.
1873 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1875 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1876 (OP_MASK_BCC, OP_SH_BCC): Define.
1877 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1878 (OP_MASK_CCC, OP_SH_CCC): Define.
1879 (INSN_READ_FPR_R): Define.
1882 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1884 * m68k.h (enum m68k_architecture): Deleted.
1885 (struct m68k_opcode_alias): New type.
1886 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1887 matching constraints, values and flags. As a side effect of this,
1888 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1889 as I know were never used, now may need re-examining.
1890 (numopcodes): Now const.
1891 (m68k_opcode_aliases, numaliases): New variables.
1893 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1894 m68k_opcode_aliases; update declaration of m68k_opcodes.
1896 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1898 * hppa.h (delay_type): Delete unused enumeration.
1899 (pa_opcode): Replace unused delayed field with an architecture
1901 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1903 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1905 * mips.h (INSN_ISA4): Define.
1907 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1909 * mips.h (M_DLA_AB, M_DLI): Define.
1911 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1913 * hppa.h (fstwx): Fix single-bit error.
1915 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1917 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1919 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1921 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1922 debug registers. From Charles Hannum (mycroft@netbsd.org).
1924 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1926 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1928 * i386.h (MOV_AX_DISP32): New macro.
1929 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1930 of several call/return instructions.
1931 (ADDR_PREFIX_OPCODE): New macro.
1933 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1935 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1937 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1939 (struct vot, field `name'): ditto.
1941 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1943 * vax.h: Supply and properly group all values in end sentinel.
1945 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1947 * mips.h (INSN_ISA, INSN_4650): Define.
1949 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1951 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1952 systems with a separate instruction and data cache, such as the
1953 29040, these instructions take an optional argument.
1955 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1957 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1960 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1962 * mips.h (INSN_STORE_MEMORY): Define.
1964 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1966 * sparc.h: Document new operand type 'x'.
1968 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1970 * i960.h (I_CX2): New instruction category. It includes
1971 instructions available on Cx and Jx processors.
1972 (I_JX): New instruction category, for JX-only instructions.
1973 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1974 Jx-only instructions, in I_JX category.
1976 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1978 * ns32k.h (endop): Made pointer const too.
1980 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1982 * ns32k.h: Drop Q operand type as there is no correct use
1983 for it. Add I and Z operand types which allow better checking.
1985 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1987 * h8300.h (xor.l) :fix bit pattern.
1988 (L_2): New size of operand.
1991 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1993 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1995 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1997 * sparc.h: Include v9 definitions.
1999 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2001 * m68k.h (m68060): Defined.
2002 (m68040up, mfloat, mmmu): Include it.
2003 (struct m68k_opcode): Widen `arch' field.
2004 (m68k_opcodes): Updated for M68060. Removed comments that were
2005 instructions commented out by "JF" years ago.
2007 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2009 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2010 add a one-bit `flags' field.
2011 (F_ALIAS): New macro.
2013 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2015 * h8300.h (dec, inc): Get encoding right.
2017 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2019 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2021 (PPC_OPERAND_SIGNED): Define.
2022 (PPC_OPERAND_SIGNOPT): Define.
2024 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2026 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2027 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2029 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2031 * i386.h: Reverse last change. It'll be handled in gas instead.
2033 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2035 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2036 slower on the 486 and used the implicit shift count despite the
2037 explicit operand. The one-operand form is still available to get
2038 the shorter form with the implicit shift count.
2040 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2042 * hppa.h: Fix typo in fstws arg string.
2044 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2046 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2048 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2050 * ppc.h (PPC_OPCODE_601): Define.
2052 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2054 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2055 (so we can determine valid completers for both addb and addb[tf].)
2057 * hppa.h (xmpyu): No floating point format specifier for the
2060 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2062 * ppc.h (PPC_OPERAND_NEXT): Define.
2063 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2064 (struct powerpc_macro): Define.
2065 (powerpc_macros, powerpc_num_macros): Declare.
2067 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2069 * ppc.h: New file. Header file for PowerPC opcode table.
2071 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2073 * hppa.h: More minor template fixes for sfu and copr (to allow
2074 for easier disassembly).
2076 * hppa.h: Fix templates for all the sfu and copr instructions.
2078 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2080 * i386.h (push): Permit Imm16 operand too.
2082 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2084 * h8300.h (andc): Exists in base arch.
2086 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2088 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2089 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2091 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2093 * hppa.h: Add FP quadword store instructions.
2095 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2097 * mips.h: (M_J_A): Added.
2100 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2102 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2103 <mellon@pepper.ncd.com>.
2105 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2107 * hppa.h: Immediate field in probei instructions is unsigned,
2108 not low-sign extended.
2110 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2112 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2114 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2116 * i386.h: Add "fxch" without operand.
2118 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2120 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2122 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2124 * hppa.h: Add gfw and gfr to the opcode table.
2126 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2128 * m88k.h: extended to handle m88110.
2130 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2132 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2135 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2137 * i960.h (i960_opcodes): Properly bracket initializers.
2139 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2141 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2143 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2145 * m68k.h (two): Protect second argument with parentheses.
2147 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2149 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2150 Deleted old in/out instructions in "#if 0" section.
2152 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2154 * i386.h (i386_optab): Properly bracket initializers.
2156 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2158 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2159 Jeff Law, law@cs.utah.edu).
2161 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2163 * i386.h (lcall): Accept Imm32 operand also.
2165 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2167 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2170 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2172 * mips.h (INSN_*): Changed values. Removed unused definitions.
2173 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2174 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2175 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2176 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2177 (M_*): Added new values for r6000 and r4000 macros.
2178 (ANY_DELAY): Removed.
2180 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2182 * mips.h: Added M_LI_S and M_LI_SS.
2184 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2186 * h8300.h: Get some rare mov.bs correct.
2188 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2190 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2193 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2195 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2196 jump instructions, for use in disassemblers.
2198 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2200 * m88k.h: Make bitfields just unsigned, not unsigned long or
2203 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2205 * hppa.h: New argument type 'y'. Use in various float instructions.
2207 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2209 * hppa.h (break): First immediate field is unsigned.
2211 * hppa.h: Add rfir instruction.
2213 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2215 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2217 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2219 * mips.h: Reworked the hazard information somewhat, and fixed some
2220 bugs in the instruction hazard descriptions.
2222 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2224 * m88k.h: Corrected a couple of opcodes.
2226 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2228 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2229 new version includes instruction hazard information, but is
2230 otherwise reasonably similar.
2232 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2234 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2236 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2238 Patches from Jeff Law, law@cs.utah.edu:
2239 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2240 Make the tables be the same for the following instructions:
2241 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2242 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2243 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2244 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2245 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2246 "fcmp", and "ftest".
2248 * hppa.h: Make new and old tables the same for "break", "mtctl",
2249 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2250 Fix typo in last patch. Collapse several #ifdefs into a
2253 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2254 of the comments up-to-date.
2256 * hppa.h: Update "free list" of letters and update
2257 comments describing each letter's function.
2259 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2261 * h8300.h: Lots of little fixes for the h8/300h.
2263 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2265 Support for H8/300-H
2266 * h8300.h: Lots of new opcodes.
2268 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2270 * h8300.h: checkpoint, includes H8/300-H opcodes.
2272 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2274 * Patches from Jeffrey Law <law@cs.utah.edu>.
2275 * hppa.h: Rework single precision FP
2276 instructions so that they correctly disassemble code
2279 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2281 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2282 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2284 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2286 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2287 gdb will define it for now.
2289 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2291 * sparc.h: Don't end enumerator list with comma.
2293 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2295 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2296 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2297 ("bc2t"): Correct typo.
2298 ("[ls]wc[023]"): Use T rather than t.
2299 ("c[0123]"): Define general coprocessor instructions.
2301 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2303 * m68k.h: Move split point for gcc compilation more towards
2306 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2308 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2309 simply wrong, ics, rfi, & rfsvc were missing).
2310 Add "a" to opr_ext for "bb". Doc fix.
2312 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2314 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2315 * mips.h: Add casts, to suppress warnings about shifting too much.
2316 * m68k.h: Document the placement code '9'.
2318 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2320 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2321 allows callers to break up the large initialized struct full of
2322 opcodes into two half-sized ones. This permits GCC to compile
2323 this module, since it takes exponential space for initializers.
2324 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2326 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2328 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2329 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2330 initialized structs in it.
2332 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2334 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2335 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2336 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2338 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2340 * mips.h: document "i" and "j" operands correctly.
2342 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344 * mips.h: Removed endianness dependency.
2346 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2348 * h8300.h: include info on number of cycles per instruction.
2350 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2352 * hppa.h: Move handy aliases to the front. Fix masks for extract
2353 and deposit instructions.
2355 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2357 * i386.h: accept shld and shrd both with and without the shift
2358 count argument, which is always %cl.
2360 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2362 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2363 (one_byte_segment_defaults, two_byte_segment_defaults,
2364 i386_prefixtab_end): Ditto.
2366 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2368 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2369 for operand 2; from John Carr, jfc@dsg.dec.com.
2371 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2373 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2374 always use 16-bit offsets. Makes calculated-size jump tables
2377 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2379 * i386.h: Fix one-operand forms of in* and out* patterns.
2381 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2383 * m68k.h: Added CPU32 support.
2385 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2387 * mips.h (break): Disassemble the argument. Patch from
2388 jonathan@cs.stanford.edu (Jonathan Stone).
2390 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2392 * m68k.h: merged Motorola and MIT syntax.
2394 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2396 * m68k.h (pmove): make the tests less strict, the 68k book is
2399 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2401 * m68k.h (m68ec030): Defined as alias for 68030.
2402 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2403 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2404 them. Tightened description of "fmovex" to distinguish it from
2405 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2406 up descriptions that claimed versions were available for chips not
2407 supporting them. Added "pmovefd".
2409 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2411 * m68k.h: fix where the . goes in divull
2413 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2415 * m68k.h: the cas2 instruction is supposed to be written with
2416 indirection on the last two operands, which can be either data or
2417 address registers. Added a new operand type 'r' which accepts
2418 either register type. Added new cases for cas2l and cas2w which
2419 use them. Corrected masks for cas2 which failed to recognize use
2420 of address register.
2422 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2424 * m68k.h: Merged in patches (mostly m68040-specific) from
2425 Colin Smith <colin@wrs.com>.
2427 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2428 base). Also cleaned up duplicates, re-ordered instructions for
2429 the sake of dis-assembling (so aliases come after standard names).
2430 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2432 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2434 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2437 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2439 * sparc.h: Moved tables to BFD library.
2441 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2443 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2445 * h8300.h: Finish filling in all the holes in the opcode table,
2446 so that the Lucid C compiler can digest this as well...
2448 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2450 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2451 Fix opcodes on various sizes of fild/fist instructions
2452 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2453 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2455 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2457 * h8300.h: Fill in all the holes in the opcode table so that the
2458 losing HPUX C compiler can digest this...
2460 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2462 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2463 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2465 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2467 * sparc.h: Add new architecture variant sparclite; add its scan
2468 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2470 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2472 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2475 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2477 * rs6k.h: New version from IBM (Metin).
2479 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2481 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2482 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2484 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2486 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2488 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2490 * m68k.h (one, two): Cast macro args to unsigned to suppress
2491 complaints from compiler and lint about integer overflow during
2494 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2496 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2498 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2500 * mips.h: Make bitfield layout depend on the HOST compiler,
2501 not on the TARGET system.
2503 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2505 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2506 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2507 <TRANLE@INTELLICORP.COM>.
2509 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2511 * h8300.h: turned op_type enum into #define list
2513 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2515 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2516 similar instructions -- they've been renamed to "fitoq", etc.
2517 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2518 number of arguments.
2519 * h8300.h: Remove extra ; which produces compiler warning.
2521 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2523 * sparc.h: fix opcode for tsubcctv.
2525 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2527 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2529 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2531 * sparc.h (nop): Made the 'lose' field be even tighter,
2532 so only a standard 'nop' is disassembled as a nop.
2534 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2536 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2537 disassembled as a nop.
2539 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2541 * m68k.h, sparc.h: ANSIfy enums.
2543 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2545 * sparc.h: fix a typo.
2547 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2549 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2550 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2551 vax.h: Renamed from ../<foo>-opcode.h.
2555 version-control: never