2000-06-06 Michael Snyder <msnyder@seadog.cygnus.com>
[binutils.git] / gas / config / tc-sh.c
blob2138c5a110ad9880abab20cbfb20a6a88b127795
1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
23 sac@cygnus.com
26 #include <stdio.h>
27 #include "as.h"
28 #include "bfd.h"
29 #include "subsegs.h"
30 #define DEFINE_TABLE
31 #include "opcodes/sh-opc.h"
32 #include <ctype.h>
33 #include "struc-symbol.h"
35 #ifdef OBJ_ELF
36 #include "elf/sh.h"
37 #endif
39 const char comment_chars[] = "!";
40 const char line_separator_chars[] = ";";
41 const char line_comment_chars[] = "!#";
43 static void s_uses PARAMS ((int));
45 static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
46 static void sh_frob_section PARAMS ((bfd *, segT, PTR));
48 void cons ();
49 void s_align_bytes ();
50 static void s_uacons PARAMS ((int));
51 static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
52 static void assemble_ppi PARAMS ((char *, sh_opcode_info *));
54 int shl = 0;
56 static void
57 little (ignore)
58 int ignore ATTRIBUTE_UNUSED;
60 shl = 1;
61 target_big_endian = 0;
64 /* This table describes all the machine specific pseudo-ops the assembler
65 has to support. The fields are:
66 pseudo-op name without dot
67 function to call to execute this pseudo-op
68 Integer arg to pass to the function
71 const pseudo_typeS md_pseudo_table[] =
73 {"int", cons, 4},
74 {"word", cons, 2},
75 {"form", listing_psize, 0},
76 {"little", little, 0},
77 {"heading", listing_title, 0},
78 {"import", s_ignore, 0},
79 {"page", listing_eject, 0},
80 {"program", s_ignore, 0},
81 {"uses", s_uses, 0},
82 {"uaword", s_uacons, 2},
83 {"ualong", s_uacons, 4},
84 {0, 0, 0}
87 /*int md_reloc_size; */
89 int sh_relax; /* set if -relax seen */
91 /* Whether -small was seen. */
93 int sh_small;
95 /* Whether -dsp was seen. */
97 static int sh_dsp;
99 /* The bit mask of architectures that could
100 accomodate the insns seen so far. */
101 static int valid_arch;
103 const char EXP_CHARS[] = "eE";
105 /* Chars that mean this number is a floating point constant */
106 /* As in 0f12.456 */
107 /* or 0d1.2345e12 */
108 const char FLT_CHARS[] = "rRsSfFdDxXpP";
110 #define C(a,b) ENCODE_RELAX(a,b)
112 #define JREG 14 /* Register used as a temp when relaxing */
113 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
114 #define GET_WHAT(x) ((x>>4))
116 /* These are the three types of relaxable instrction */
117 #define COND_JUMP 1
118 #define COND_JUMP_DELAY 2
119 #define UNCOND_JUMP 3
120 #define END 4
122 #define UNDEF_DISP 0
123 #define COND8 1
124 #define COND12 2
125 #define COND32 3
126 #define UNCOND12 1
127 #define UNCOND32 2
128 #define UNDEF_WORD_DISP 4
130 #define UNCOND12 1
131 #define UNCOND32 2
133 /* Branch displacements are from the address of the branch plus
134 four, thus all minimum and maximum values have 4 added to them. */
135 #define COND8_F 258
136 #define COND8_M -252
137 #define COND8_LENGTH 2
139 /* There is one extra instruction before the branch, so we must add
140 two more bytes to account for it. */
141 #define COND12_F 4100
142 #define COND12_M -4090
143 #define COND12_LENGTH 6
145 #define COND12_DELAY_LENGTH 4
147 /* ??? The minimum and maximum values are wrong, but this does not matter
148 since this relocation type is not supported yet. */
149 #define COND32_F (1<<30)
150 #define COND32_M -(1<<30)
151 #define COND32_LENGTH 14
153 #define UNCOND12_F 4098
154 #define UNCOND12_M -4092
155 #define UNCOND12_LENGTH 2
157 /* ??? The minimum and maximum values are wrong, but this does not matter
158 since this relocation type is not supported yet. */
159 #define UNCOND32_F (1<<30)
160 #define UNCOND32_M -(1<<30)
161 #define UNCOND32_LENGTH 14
163 #define EMPTY { 0, 0, 0, 0 }
165 const relax_typeS md_relax_table[C (END, 0)] = {
166 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
167 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
169 EMPTY,
170 /* C (COND_JUMP, COND8) */
171 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
172 /* C (COND_JUMP, COND12) */
173 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
174 /* C (COND_JUMP, COND32) */
175 { COND32_F, COND32_M, COND32_LENGTH, 0, },
176 EMPTY, EMPTY, EMPTY, EMPTY,
177 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
179 EMPTY,
180 /* C (COND_JUMP_DELAY, COND8) */
181 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
182 /* C (COND_JUMP_DELAY, COND12) */
183 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
184 /* C (COND_JUMP_DELAY, COND32) */
185 { COND32_F, COND32_M, COND32_LENGTH, 0, },
186 EMPTY, EMPTY, EMPTY, EMPTY,
187 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
189 EMPTY,
190 /* C (UNCOND_JUMP, UNCOND12) */
191 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
192 /* C (UNCOND_JUMP, UNCOND32) */
193 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
194 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
195 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
198 #undef EMPTY
200 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
203 This function is called once, at assembler startup time. This should
204 set up all the tables, etc that the MD part of the assembler needs
207 void
208 md_begin ()
210 sh_opcode_info *opcode;
211 char *prev_name = "";
212 int target_arch;
214 #ifdef TE_PE
215 /* The WinCE OS only supports little endian executables. */
216 target_big_endian = 0;
217 #else
218 if (! shl)
219 target_big_endian = 1;
220 #endif
222 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
223 valid_arch = target_arch;
225 opcode_hash_control = hash_new ();
227 /* Insert unique names into hash table */
228 for (opcode = sh_table; opcode->name; opcode++)
230 if (strcmp (prev_name, opcode->name))
232 if (! (opcode->arch & target_arch))
233 continue;
234 prev_name = opcode->name;
235 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
237 else
239 /* Make all the opcodes with the same name point to the same
240 string */
241 opcode->name = prev_name;
246 static int reg_m;
247 static int reg_n;
248 static int reg_x, reg_y;
249 static int reg_efg;
250 static int reg_b;
252 typedef struct
254 sh_arg_type type;
255 int reg;
256 expressionS immediate;
258 sh_operand_info;
260 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
262 /* try and parse a reg name, returns number of chars consumed */
263 static int
264 parse_reg (src, mode, reg)
265 char *src;
266 int *mode;
267 int *reg;
269 /* We use ! IDENT_CHAR for the next character after the register name, to
270 make sure that we won't accidentally recognize a symbol name such as
271 'sram' or sr_ram as being a reference to the register 'sr'. */
273 if (src[0] == 'r')
275 if (src[1] == '1')
277 if (src[2] >= '0' && src[2] <= '5'
278 && ! IDENT_CHAR ((unsigned char) src[3]))
280 *mode = A_REG_N;
281 *reg = 10 + src[2] - '0';
282 return 3;
285 if (src[1] >= '0' && src[1] <= '9'
286 && ! IDENT_CHAR ((unsigned char) src[2]))
288 *mode = A_REG_N;
289 *reg = (src[1] - '0');
290 return 2;
292 if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0
293 && ! IDENT_CHAR ((unsigned char) src[7]))
295 *mode = A_REG_B;
296 *reg = (src[1] - '0');
297 return 7;
300 if (src[1] == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
302 *mode = A_RE;
303 return 2;
305 if (src[1] == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
307 *mode = A_RS;
308 return 2;
312 if (src[0] == 'a')
314 if (src[1] == '0')
316 if (! IDENT_CHAR ((unsigned char) src[2]))
318 *mode = DSP_REG_N;
319 *reg = A_A0_NUM;
320 return 2;
322 if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
324 *mode = DSP_REG_N;
325 *reg = A_A0G_NUM;
326 return 3;
329 if (src[1] == '1')
331 if (! IDENT_CHAR ((unsigned char) src[2]))
333 *mode = DSP_REG_N;
334 *reg = A_A1_NUM;
335 return 2;
337 if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
339 *mode = DSP_REG_N;
340 *reg = A_A1G_NUM;
341 return 3;
345 if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1'
346 && ! IDENT_CHAR ((unsigned char) src[3]))
348 *mode = A_REG_N;
349 *reg = 4 + (src[1] - '0');
350 return 3;
352 if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1'
353 && ! IDENT_CHAR ((unsigned char) src[3]))
355 *mode = A_REG_N;
356 *reg = 6 + (src[1] - '0');
357 return 3;
359 if (src[1] == 's' && src[2] >= '0' && src[2] <= '3'
360 && ! IDENT_CHAR ((unsigned char) src[3]))
362 int n = src[1] - '0';
364 *mode = A_REG_N;
365 *reg = n | ((~n & 2) << 1);
366 return 3;
370 if (src[0] == 'i' && src[1] && ! IDENT_CHAR ((unsigned char) src[3]))
372 if (src[1] == 's')
374 *mode = A_REG_N;
375 *reg = 8;
376 return 2;
378 if (src[1] == 'x')
380 *mode = A_REG_N;
381 *reg = 8;
382 return 2;
384 if (src[1] == 'y')
386 *mode = A_REG_N;
387 *reg = 9;
388 return 2;
392 if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1'
393 && ! IDENT_CHAR ((unsigned char) src[2]))
395 *mode = DSP_REG_N;
396 *reg = A_X0_NUM + src[1] - '0';
397 return 2;
400 if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1'
401 && ! IDENT_CHAR ((unsigned char) src[2]))
403 *mode = DSP_REG_N;
404 *reg = A_Y0_NUM + src[1] - '0';
405 return 2;
408 if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1'
409 && ! IDENT_CHAR ((unsigned char) src[2]))
411 *mode = DSP_REG_N;
412 *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM;
413 return 2;
416 if (src[0] == 's'
417 && src[1] == 's'
418 && src[2] == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
420 *mode = A_SSR;
421 return 3;
424 if (src[0] == 's' && src[1] == 'p' && src[2] == 'c'
425 && ! IDENT_CHAR ((unsigned char) src[3]))
427 *mode = A_SPC;
428 return 3;
431 if (src[0] == 's' && src[1] == 'g' && src[2] == 'r'
432 && ! IDENT_CHAR ((unsigned char) src[3]))
434 *mode = A_SGR;
435 return 3;
438 if (src[0] == 'd' && src[1] == 's' && src[2] == 'r'
439 && ! IDENT_CHAR ((unsigned char) src[3]))
441 *mode = A_DSR;
442 return 3;
445 if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r'
446 && ! IDENT_CHAR ((unsigned char) src[3]))
448 *mode = A_DBR;
449 return 3;
452 if (src[0] == 's' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
454 *mode = A_SR;
455 return 2;
458 if (src[0] == 's' && src[1] == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
460 *mode = A_REG_N;
461 *reg = 15;
462 return 2;
465 if (src[0] == 'p' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
467 *mode = A_PR;
468 return 2;
470 if (src[0] == 'p' && src[1] == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
472 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
473 and use an uninitialized immediate. */
474 *mode = A_PC;
475 return 2;
477 if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r'
478 && ! IDENT_CHAR ((unsigned char) src[3]))
480 *mode = A_GBR;
481 return 3;
483 if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r'
484 && ! IDENT_CHAR ((unsigned char) src[3]))
486 *mode = A_VBR;
487 return 3;
490 if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c'
491 && ! IDENT_CHAR ((unsigned char) src[4]))
493 if (src[3] == 'l')
495 *mode = A_MACL;
496 return 4;
498 if (src[3] == 'h')
500 *mode = A_MACH;
501 return 4;
504 if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd'
505 && ! IDENT_CHAR ((unsigned char) src[4]))
507 *mode = A_MOD;
508 return 3;
510 if (src[0] == 'f' && src[1] == 'r')
512 if (src[2] == '1')
514 if (src[3] >= '0' && src[3] <= '5'
515 && ! IDENT_CHAR ((unsigned char) src[4]))
517 *mode = F_REG_N;
518 *reg = 10 + src[3] - '0';
519 return 4;
522 if (src[2] >= '0' && src[2] <= '9'
523 && ! IDENT_CHAR ((unsigned char) src[3]))
525 *mode = F_REG_N;
526 *reg = (src[2] - '0');
527 return 3;
530 if (src[0] == 'd' && src[1] == 'r')
532 if (src[2] == '1')
534 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
535 && ! IDENT_CHAR ((unsigned char) src[4]))
537 *mode = D_REG_N;
538 *reg = 10 + src[3] - '0';
539 return 4;
542 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
543 && ! IDENT_CHAR ((unsigned char) src[3]))
545 *mode = D_REG_N;
546 *reg = (src[2] - '0');
547 return 3;
550 if (src[0] == 'x' && src[1] == 'd')
552 if (src[2] == '1')
554 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
555 && ! IDENT_CHAR ((unsigned char) src[4]))
557 *mode = X_REG_N;
558 *reg = 11 + src[3] - '0';
559 return 4;
562 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
563 && ! IDENT_CHAR ((unsigned char) src[3]))
565 *mode = X_REG_N;
566 *reg = (src[2] - '0') + 1;
567 return 3;
570 if (src[0] == 'f' && src[1] == 'v')
572 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
574 *mode = V_REG_N;
575 *reg = 12;
576 return 4;
578 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
579 && ! IDENT_CHAR ((unsigned char) src[3]))
581 *mode = V_REG_N;
582 *reg = (src[2] - '0');
583 return 3;
586 if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l'
587 && ! IDENT_CHAR ((unsigned char) src[4]))
589 *mode = FPUL_N;
590 return 4;
593 if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c'
594 && src[4] == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
596 *mode = FPSCR_N;
597 return 5;
600 if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r'
601 && src[4] == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
603 *mode = XMTRX_M4;
604 return 5;
607 return 0;
610 static symbolS *dot()
612 const char *fake;
614 /* JF: '.' is pseudo symbol with value of current location
615 in current segment. */
616 fake = FAKE_LABEL_NAME;
617 return symbol_new (fake,
618 now_seg,
619 (valueT) frag_now_fix (),
620 frag_now);
625 static
626 char *
627 parse_exp (s, op)
628 char *s;
629 sh_operand_info *op;
631 char *save;
632 char *new;
634 save = input_line_pointer;
635 input_line_pointer = s;
636 expression (&op->immediate);
637 if (op->immediate.X_op == O_absent)
638 as_bad (_("missing operand"));
639 new = input_line_pointer;
640 input_line_pointer = save;
641 return new;
645 /* The many forms of operand:
647 Rn Register direct
648 @Rn Register indirect
649 @Rn+ Autoincrement
650 @-Rn Autodecrement
651 @(disp:4,Rn)
652 @(disp:8,GBR)
653 @(disp:8,PC)
655 @(R0,Rn)
656 @(R0,GBR)
658 disp:8
659 disp:12
660 #imm8
661 pr, gbr, vbr, macl, mach
665 static
666 char *
667 parse_at (src, op)
668 char *src;
669 sh_operand_info *op;
671 int len;
672 int mode;
673 src++;
674 if (src[0] == '-')
676 /* Must be predecrement */
677 src++;
679 len = parse_reg (src, &mode, &(op->reg));
680 if (mode != A_REG_N)
681 as_bad (_("illegal register after @-"));
683 op->type = A_DEC_N;
684 src += len;
686 else if (src[0] == '(')
688 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
689 @(r0, rn) */
690 src++;
691 len = parse_reg (src, &mode, &(op->reg));
692 if (len && mode == A_REG_N)
694 src += len;
695 if (op->reg != 0)
697 as_bad (_("must be @(r0,...)"));
699 if (src[0] == ',')
700 src++;
701 /* Now can be rn or gbr */
702 len = parse_reg (src, &mode, &(op->reg));
703 if (mode == A_GBR)
705 op->type = A_R0_GBR;
707 else if (mode == A_REG_N)
709 op->type = A_IND_R0_REG_N;
711 else
713 as_bad (_("syntax error in @(r0,...)"));
716 else
718 /* Must be an @(disp,.. thing) */
719 src = parse_exp (src, op);
720 if (src[0] == ',')
721 src++;
722 /* Now can be rn, gbr or pc */
723 len = parse_reg (src, &mode, &op->reg);
724 if (len)
726 if (mode == A_REG_N)
728 op->type = A_DISP_REG_N;
730 else if (mode == A_GBR)
732 op->type = A_DISP_GBR;
734 else if (mode == A_PC)
736 /* Turn a plain @(4,pc) into @(.+4,pc) */
737 if (op->immediate.X_op == O_constant) {
738 op->immediate.X_add_symbol = dot();
739 op->immediate.X_op = O_symbol;
741 op->type = A_DISP_PC;
743 else
745 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
748 else
750 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
753 src += len;
754 if (src[0] != ')')
755 as_bad (_("expecting )"));
756 else
757 src++;
759 else
761 src += parse_reg (src, &mode, &(op->reg));
762 if (mode != A_REG_N)
764 as_bad (_("illegal register after @"));
766 if (src[0] == '+')
768 src++;
769 if ((src[0] == 'r' && src[1] == '8')
770 || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's')))
772 src += 2;
773 op->type = A_PMOD_N;
775 if ((src[0] == 'r' && src[1] == '9')
776 || (src[0] == 'i' && src[1] == 'y'))
778 src += 2;
779 op->type = A_PMODY_N;
781 else
782 op->type = A_INC_N;
784 else
786 op->type = A_IND_N;
789 return src;
792 static void
793 get_operand (ptr, op)
794 char **ptr;
795 sh_operand_info *op;
797 char *src = *ptr;
798 int mode = -1;
799 unsigned int len;
801 if (src[0] == '#')
803 src++;
804 *ptr = parse_exp (src, op);
805 op->type = A_IMM;
806 return;
809 else if (src[0] == '@')
811 *ptr = parse_at (src, op);
812 return;
814 len = parse_reg (src, &mode, &(op->reg));
815 if (len)
817 *ptr = src + len;
818 op->type = mode;
819 return;
821 else
823 /* Not a reg, the only thing left is a displacement */
824 *ptr = parse_exp (src, op);
825 op->type = A_DISP_PC;
826 return;
830 static
831 char *
832 get_operands (info, args, operand)
833 sh_opcode_info *info;
834 char *args;
835 sh_operand_info *operand;
837 char *ptr = args;
838 if (info->arg[0])
840 /* The pre-processor will eliminate whitespace in front of '@'
841 after the first argument; we may be called multiple times
842 from assemble_ppi, so don't insist on finding whitespace here. */
843 if (*ptr == ' ')
844 ptr++;
846 get_operand (&ptr, operand + 0);
847 if (info->arg[1])
849 if (*ptr == ',')
851 ptr++;
853 get_operand (&ptr, operand + 1);
854 /* ??? Hack: psha/pshl have a varying operand number depending on
855 the type of the first operand. We handle this by having the
856 three-operand version first and reducing the number of operands
857 parsed to two if we see that the first operand is an immediate.
858 This works because no insn with three operands has an immediate
859 as first operand. */
860 if (info->arg[2] && operand[0].type != A_IMM)
862 if (*ptr == ',')
864 ptr++;
866 get_operand (&ptr, operand + 2);
868 else
870 operand[2].type = 0;
873 else
875 operand[1].type = 0;
876 operand[2].type = 0;
879 else
881 operand[0].type = 0;
882 operand[1].type = 0;
883 operand[2].type = 0;
885 return ptr;
888 /* Passed a pointer to a list of opcodes which use different
889 addressing modes, return the opcode which matches the opcodes
890 provided
893 static
894 sh_opcode_info *
895 get_specific (opcode, operands)
896 sh_opcode_info *opcode;
897 sh_operand_info *operands;
899 sh_opcode_info *this_try = opcode;
900 char *name = opcode->name;
901 int n = 0;
902 while (opcode->name)
904 this_try = opcode++;
905 if (this_try->name != name)
907 /* We've looked so far down the table that we've run out of
908 opcodes with the same name */
909 return 0;
911 /* look at both operands needed by the opcodes and provided by
912 the user - since an arg test will often fail on the same arg
913 again and again, we'll try and test the last failing arg the
914 first on each opcode try */
916 for (n = 0; this_try->arg[n]; n++)
918 sh_operand_info *user = operands + n;
919 sh_arg_type arg = this_try->arg[n];
920 switch (arg)
922 case A_IMM:
923 case A_BDISP12:
924 case A_BDISP8:
925 case A_DISP_GBR:
926 case A_DISP_PC:
927 case A_MACH:
928 case A_PR:
929 case A_MACL:
930 if (user->type != arg)
931 goto fail;
932 break;
933 case A_R0:
934 /* opcode needs r0 */
935 if (user->type != A_REG_N || user->reg != 0)
936 goto fail;
937 break;
938 case A_R0_GBR:
939 if (user->type != A_R0_GBR || user->reg != 0)
940 goto fail;
941 break;
942 case F_FR0:
943 if (user->type != F_REG_N || user->reg != 0)
944 goto fail;
945 break;
947 case A_REG_N:
948 case A_INC_N:
949 case A_DEC_N:
950 case A_IND_N:
951 case A_IND_R0_REG_N:
952 case A_DISP_REG_N:
953 case F_REG_N:
954 case D_REG_N:
955 case X_REG_N:
956 case V_REG_N:
957 case FPUL_N:
958 case FPSCR_N:
959 case A_PMOD_N:
960 case A_PMODY_N:
961 case DSP_REG_N:
962 /* Opcode needs rn */
963 if (user->type != arg)
964 goto fail;
965 reg_n = user->reg;
966 break;
967 case DX_REG_N:
968 if (user->type != D_REG_N && user->type != X_REG_N)
969 goto fail;
970 reg_n = user->reg;
971 break;
972 case A_GBR:
973 case A_SR:
974 case A_VBR:
975 case A_DSR:
976 case A_MOD:
977 case A_RE:
978 case A_RS:
979 case A_SSR:
980 case A_SPC:
981 case A_SGR:
982 case A_DBR:
983 if (user->type != arg)
984 goto fail;
985 break;
987 case A_REG_B:
988 if (user->type != arg)
989 goto fail;
990 reg_b = user->reg;
991 break;
993 case A_REG_M:
994 case A_INC_M:
995 case A_DEC_M:
996 case A_IND_M:
997 case A_IND_R0_REG_M:
998 case A_DISP_REG_M:
999 case DSP_REG_M:
1000 /* Opcode needs rn */
1001 if (user->type != arg - A_REG_M + A_REG_N)
1002 goto fail;
1003 reg_m = user->reg;
1004 break;
1006 case DSP_REG_X:
1007 if (user->type != DSP_REG_N)
1008 goto fail;
1009 switch (user->reg)
1011 case A_X0_NUM:
1012 reg_x = 0;
1013 break;
1014 case A_X1_NUM:
1015 reg_x = 1;
1016 break;
1017 case A_A0_NUM:
1018 reg_x = 2;
1019 break;
1020 case A_A1_NUM:
1021 reg_x = 3;
1022 break;
1023 default:
1024 goto fail;
1026 break;
1028 case DSP_REG_Y:
1029 if (user->type != DSP_REG_N)
1030 goto fail;
1031 switch (user->reg)
1033 case A_Y0_NUM:
1034 reg_y = 0;
1035 break;
1036 case A_Y1_NUM:
1037 reg_y = 1;
1038 break;
1039 case A_M0_NUM:
1040 reg_y = 2;
1041 break;
1042 case A_M1_NUM:
1043 reg_y = 3;
1044 break;
1045 default:
1046 goto fail;
1048 break;
1050 case DSP_REG_E:
1051 if (user->type != DSP_REG_N)
1052 goto fail;
1053 switch (user->reg)
1055 case A_X0_NUM:
1056 reg_efg = 0 << 10;
1057 break;
1058 case A_X1_NUM:
1059 reg_efg = 1 << 10;
1060 break;
1061 case A_Y0_NUM:
1062 reg_efg = 2 << 10;
1063 break;
1064 case A_A1_NUM:
1065 reg_efg = 3 << 10;
1066 break;
1067 default:
1068 goto fail;
1070 break;
1072 case DSP_REG_F:
1073 if (user->type != DSP_REG_N)
1074 goto fail;
1075 switch (user->reg)
1077 case A_Y0_NUM:
1078 reg_efg |= 0 << 8;
1079 break;
1080 case A_Y1_NUM:
1081 reg_efg |= 1 << 8;
1082 break;
1083 case A_X0_NUM:
1084 reg_efg |= 2 << 8;
1085 break;
1086 case A_A1_NUM:
1087 reg_efg |= 3 << 8;
1088 break;
1089 default:
1090 goto fail;
1092 break;
1094 case DSP_REG_G:
1095 if (user->type != DSP_REG_N)
1096 goto fail;
1097 switch (user->reg)
1099 case A_M0_NUM:
1100 reg_efg |= 0 << 2;
1101 break;
1102 case A_M1_NUM:
1103 reg_efg |= 1 << 2;
1104 break;
1105 case A_A0_NUM:
1106 reg_efg |= 2 << 2;
1107 break;
1108 case A_A1_NUM:
1109 reg_efg |= 3 << 2;
1110 break;
1111 default:
1112 goto fail;
1114 break;
1116 case A_A0:
1117 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1118 goto fail;
1119 break;
1120 case A_X0:
1121 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1122 goto fail;
1123 break;
1124 case A_X1:
1125 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1126 goto fail;
1127 break;
1128 case A_Y0:
1129 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1130 goto fail;
1131 break;
1132 case A_Y1:
1133 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1134 goto fail;
1135 break;
1137 case F_REG_M:
1138 case D_REG_M:
1139 case X_REG_M:
1140 case V_REG_M:
1141 case FPUL_M:
1142 case FPSCR_M:
1143 /* Opcode needs rn */
1144 if (user->type != arg - F_REG_M + F_REG_N)
1145 goto fail;
1146 reg_m = user->reg;
1147 break;
1148 case DX_REG_M:
1149 if (user->type != D_REG_N && user->type != X_REG_N)
1150 goto fail;
1151 reg_m = user->reg;
1152 break;
1153 case XMTRX_M4:
1154 if (user->type != XMTRX_M4)
1155 goto fail;
1156 reg_m = 4;
1157 break;
1159 default:
1160 printf (_("unhandled %d\n"), arg);
1161 goto fail;
1164 if ( !(valid_arch & this_try->arch))
1165 goto fail;
1166 valid_arch &= this_try->arch;
1167 return this_try;
1168 fail:;
1171 return 0;
1175 check (operand, low, high)
1176 expressionS *operand;
1177 int low;
1178 int high;
1180 if (operand->X_op != O_constant
1181 || operand->X_add_number < low
1182 || operand->X_add_number > high)
1184 as_bad (_("operand must be absolute in range %d..%d"), low, high);
1186 return operand->X_add_number;
1190 static void
1191 insert (where, how, pcrel, op)
1192 char *where;
1193 int how;
1194 int pcrel;
1195 sh_operand_info *op;
1197 fix_new_exp (frag_now,
1198 where - frag_now->fr_literal,
1200 &op->immediate,
1201 pcrel,
1202 how);
1205 static void
1206 build_relax (opcode, op)
1207 sh_opcode_info *opcode;
1208 sh_operand_info *op;
1210 int high_byte = target_big_endian ? 0 : 1;
1211 char *p;
1213 if (opcode->arg[0] == A_BDISP8)
1215 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1216 p = frag_var (rs_machine_dependent,
1217 md_relax_table[C (what, COND32)].rlx_length,
1218 md_relax_table[C (what, COND8)].rlx_length,
1219 C (what, 0),
1220 op->immediate.X_add_symbol,
1221 op->immediate.X_add_number,
1223 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1225 else if (opcode->arg[0] == A_BDISP12)
1227 p = frag_var (rs_machine_dependent,
1228 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1229 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1230 C (UNCOND_JUMP, 0),
1231 op->immediate.X_add_symbol,
1232 op->immediate.X_add_number,
1234 p[high_byte] = (opcode->nibbles[0] << 4);
1239 /* insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1240 static char *
1241 insert_loop_bounds (output, operand)
1242 char *output;
1243 sh_operand_info *operand;
1245 char *name;
1246 symbolS *end_sym;
1248 /* Since the low byte of the opcode will be overwritten by the reloc, we
1249 can just stash the high byte into both bytes and ignore endianness. */
1250 output[0] = 0x8c;
1251 output[1] = 0x8c;
1252 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1253 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1255 if (sh_relax)
1257 static int count = 0;
1259 /* If the last loop insn is a two-byte-insn, it is in danger of being
1260 swapped with the insn after it. To prevent this, create a new
1261 symbol - complete with SH_LABEL reloc - after the last loop insn.
1262 If the last loop insn is four bytes long, the symbol will be
1263 right in the middle, but four byte insns are not swapped anyways. */
1264 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1265 Hence a 9 digit number should be enough to count all REPEATs. */
1266 name = alloca (11);
1267 sprintf (name, "_R%x", count++ & 0x3fffffff);
1268 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
1269 /* Make this a local symbol. */
1270 #ifdef OBJ_COFF
1271 SF_SET_LOCAL (end_sym);
1272 #endif /* OBJ_COFF */
1273 symbol_table_insert (end_sym);
1274 end_sym->sy_value = operand[1].immediate;
1275 end_sym->sy_value.X_add_number += 2;
1276 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1279 output = frag_more (2);
1280 output[0] = 0x8e;
1281 output[1] = 0x8e;
1282 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1283 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1285 return frag_more (2);
1288 /* Now we know what sort of opcodes it is, lets build the bytes -
1290 static void
1291 build_Mytes (opcode, operand)
1292 sh_opcode_info *opcode;
1293 sh_operand_info *operand;
1296 int index;
1297 char nbuf[4];
1298 char *output = frag_more (2);
1299 int low_byte = target_big_endian ? 1 : 0;
1300 nbuf[0] = 0;
1301 nbuf[1] = 0;
1302 nbuf[2] = 0;
1303 nbuf[3] = 0;
1305 for (index = 0; index < 4; index++)
1307 sh_nibble_type i = opcode->nibbles[index];
1308 if (i < 16)
1310 nbuf[index] = i;
1312 else
1314 switch (i)
1316 case REG_N:
1317 nbuf[index] = reg_n;
1318 break;
1319 case REG_M:
1320 nbuf[index] = reg_m;
1321 break;
1322 case SDT_REG_N:
1323 if (reg_n < 2 || reg_n > 5)
1324 as_bad (_("Invalid register: 'r%d'"), reg_n);
1325 nbuf[index] = (reg_n & 3) | 4;
1326 break;
1327 case REG_NM:
1328 nbuf[index] = reg_n | (reg_m >> 2);
1329 break;
1330 case REG_B:
1331 nbuf[index] = reg_b | 0x08;
1332 break;
1333 case IMM0_4BY4:
1334 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
1335 break;
1336 case IMM0_4BY2:
1337 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
1338 break;
1339 case IMM0_4:
1340 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
1341 break;
1342 case IMM1_4BY4:
1343 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
1344 break;
1345 case IMM1_4BY2:
1346 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
1347 break;
1348 case IMM1_4:
1349 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
1350 break;
1351 case IMM0_8BY4:
1352 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
1353 break;
1354 case IMM0_8BY2:
1355 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
1356 break;
1357 case IMM0_8:
1358 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
1359 break;
1360 case IMM1_8BY4:
1361 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
1362 break;
1363 case IMM1_8BY2:
1364 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
1365 break;
1366 case IMM1_8:
1367 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
1368 break;
1369 case PCRELIMM_8BY4:
1370 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand);
1371 break;
1372 case PCRELIMM_8BY2:
1373 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand);
1374 break;
1375 case REPEAT:
1376 output = insert_loop_bounds (output, operand);
1377 nbuf[index] = opcode->nibbles[3];
1378 operand += 2;
1379 break;
1380 default:
1381 printf (_("failed for %d\n"), i);
1385 if (! target_big_endian) {
1386 output[1] = (nbuf[0] << 4) | (nbuf[1]);
1387 output[0] = (nbuf[2] << 4) | (nbuf[3]);
1389 else {
1390 output[0] = (nbuf[0] << 4) | (nbuf[1]);
1391 output[1] = (nbuf[2] << 4) | (nbuf[3]);
1395 /* Find an opcode at the start of *STR_P in the hash table, and set
1396 *STR_P to the first character after the last one read. */
1398 static sh_opcode_info *
1399 find_cooked_opcode (str_p)
1400 char **str_p;
1402 char *str = *str_p;
1403 unsigned char *op_start;
1404 unsigned char *op_end;
1405 char name[20];
1406 int nlen = 0;
1407 /* Drop leading whitespace */
1408 while (*str == ' ')
1409 str++;
1411 /* Find the op code end.
1412 The pre-processor will eliminate whitespace in front of
1413 any '@' after the first argument; we may be called from
1414 assemble_ppi, so the opcode might be terminated by an '@'. */
1415 for (op_start = op_end = (unsigned char *) (str);
1416 *op_end
1417 && nlen < 20
1418 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
1419 op_end++)
1421 unsigned char c = op_start[nlen];
1423 /* The machine independent code will convert CMP/EQ into cmp/EQ
1424 because it thinks the '/' is the end of the symbol. Moreover,
1425 all but the first sub-insn is a parallel processing insn won't
1426 be capitailzed. Instead of hacking up the machine independent
1427 code, we just deal with it here. */
1428 c = isupper (c) ? tolower (c) : c;
1429 name[nlen] = c;
1430 nlen++;
1432 name[nlen] = 0;
1433 *str_p = op_end;
1435 if (nlen == 0)
1437 as_bad (_("can't find opcode "));
1440 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
1443 /* Assemble a parallel processing insn. */
1444 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1445 static void
1446 assemble_ppi (op_end, opcode)
1447 char *op_end;
1448 sh_opcode_info *opcode;
1450 int movx = 0;
1451 int movy = 0;
1452 int cond = 0;
1453 int field_b = 0;
1454 char *output;
1455 int move_code;
1457 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1458 Make sure we encode a defined insn pattern. */
1459 reg_x = 0;
1460 reg_y = 0;
1462 for (;;)
1464 sh_operand_info operand[3];
1466 if (opcode->arg[0] != A_END)
1467 op_end = get_operands (opcode, op_end, operand);
1468 opcode = get_specific (opcode, operand);
1469 if (opcode == 0)
1471 /* Couldn't find an opcode which matched the operands */
1472 char *where = frag_more (2);
1474 where[0] = 0x0;
1475 where[1] = 0x0;
1476 as_bad (_("invalid operands for opcode"));
1477 return;
1479 if (opcode->nibbles[0] != PPI)
1480 as_bad (_("insn can't be combined with parallel processing insn"));
1482 switch (opcode->nibbles[1])
1485 case NOPX:
1486 if (movx)
1487 as_bad (_("multiple movx specifications"));
1488 movx = DDT_BASE;
1489 break;
1490 case NOPY:
1491 if (movy)
1492 as_bad (_("multiple movy specifications"));
1493 movy = DDT_BASE;
1494 break;
1496 case MOVX:
1497 if (movx)
1498 as_bad (_("multiple movx specifications"));
1499 if (reg_n < 4 || reg_n > 5)
1500 as_bad (_("invalid movx address register"));
1501 if (opcode->nibbles[2] & 8)
1503 if (reg_m == A_A1_NUM)
1504 movx = 1 << 7;
1505 else if (reg_m != A_A0_NUM)
1506 as_bad (_("invalid movx dsp register"));
1508 else
1510 if (reg_x > 1)
1511 as_bad (_("invalid movx dsp register"));
1512 movx = reg_x << 7;
1514 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
1515 break;
1517 case MOVY:
1518 if (movy)
1519 as_bad (_("multiple movy specifications"));
1520 if (opcode->nibbles[2] & 8)
1522 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1523 so add 8 more. */
1524 movy = 8;
1525 if (reg_m == A_A1_NUM)
1526 movy += 1 << 6;
1527 else if (reg_m != A_A0_NUM)
1528 as_bad (_("invalid movy dsp register"));
1530 else
1532 if (reg_y > 1)
1533 as_bad (_("invalid movy dsp register"));
1534 movy = reg_y << 6;
1536 if (reg_n < 6 || reg_n > 7)
1537 as_bad (_("invalid movy address register"));
1538 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
1539 break;
1541 case PSH:
1542 if (operand[0].immediate.X_op != O_constant)
1543 as_bad (_("dsp immediate shift value not constant"));
1544 field_b = ((opcode->nibbles[2] << 12)
1545 | (operand[0].immediate.X_add_number & 127) << 4
1546 | reg_n);
1547 break;
1548 case PPI3:
1549 if (field_b)
1550 as_bad (_("multiple parallel processing specifications"));
1551 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1552 + (reg_x << 6) + (reg_y << 4) + reg_n);
1553 break;
1554 case PDC:
1555 if (cond)
1556 as_bad (_("multiple condition specifications"));
1557 cond = opcode->nibbles[2] << 8;
1558 if (*op_end)
1559 goto skip_cond_check;
1560 break;
1561 case PPIC:
1562 if (field_b)
1563 as_bad (_("multiple parallel processing specifications"));
1564 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1565 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
1566 cond = 0;
1567 break;
1568 case PMUL:
1569 if (field_b)
1571 if ((field_b & 0xef00) != 0xa100)
1572 as_bad (_("insn cannot be combined with pmuls"));
1573 field_b -= 0x8100;
1574 switch (field_b & 0xf)
1576 case A_X0_NUM:
1577 field_b += 0 - A_X0_NUM;
1578 break;
1579 case A_Y0_NUM:
1580 field_b += 1 - A_Y0_NUM;
1581 break;
1582 case A_A0_NUM:
1583 field_b += 2 - A_A0_NUM;
1584 break;
1585 case A_A1_NUM:
1586 field_b += 3 - A_A1_NUM;
1587 break;
1588 default:
1589 as_bad (_("bad padd / psub pmuls output operand"));
1592 field_b += 0x4000 + reg_efg;
1593 break;
1594 default:
1595 abort ();
1597 if (cond)
1599 as_bad (_("condition not followed by conditionalizable insn"));
1600 cond = 0;
1602 if (! *op_end)
1603 break;
1604 skip_cond_check:
1605 opcode = find_cooked_opcode (&op_end);
1606 if (opcode == NULL)
1608 (as_bad
1609 (_("unrecognized characters at end of parallel processing insn")));
1610 break;
1614 move_code = movx | movy;
1615 if (field_b)
1617 /* Parallel processing insn. */
1618 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
1620 output = frag_more (4);
1621 if (! target_big_endian)
1623 output[3] = ppi_code >> 8;
1624 output[2] = ppi_code;
1626 else
1628 output[2] = ppi_code >> 8;
1629 output[3] = ppi_code;
1631 move_code |= 0xf800;
1633 else
1634 /* Just a double data transfer. */
1635 output = frag_more (2);
1636 if (! target_big_endian)
1638 output[1] = move_code >> 8;
1639 output[0] = move_code;
1641 else
1643 output[0] = move_code >> 8;
1644 output[1] = move_code;
1648 /* This is the guts of the machine-dependent assembler. STR points to a
1649 machine dependent instruction. This function is supposed to emit
1650 the frags/bytes it assembles to.
1653 void
1654 md_assemble (str)
1655 char *str;
1657 unsigned char *op_end;
1658 sh_operand_info operand[3];
1659 sh_opcode_info *opcode;
1661 opcode = find_cooked_opcode (&str);
1662 op_end = str;
1664 if (opcode == NULL)
1666 as_bad (_("unknown opcode"));
1667 return;
1670 if (sh_relax
1671 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
1673 /* Output a CODE reloc to tell the linker that the following
1674 bytes are instructions, not data. */
1675 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1676 BFD_RELOC_SH_CODE);
1677 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
1680 if (opcode->nibbles[0] == PPI)
1682 assemble_ppi (op_end, opcode);
1683 return;
1686 if (opcode->arg[0] == A_BDISP12
1687 || opcode->arg[0] == A_BDISP8)
1689 parse_exp (op_end + 1, &operand[0]);
1690 build_relax (opcode, &operand[0]);
1692 else
1694 if (opcode->arg[0] == A_END)
1696 /* Ignore trailing whitespace. If there is any, it has already
1697 been compressed to a single space. */
1698 if (*op_end == ' ')
1699 op_end++;
1701 else
1703 op_end = get_operands (opcode, op_end, operand);
1705 opcode = get_specific (opcode, operand);
1707 if (opcode == 0)
1709 /* Couldn't find an opcode which matched the operands */
1710 char *where = frag_more (2);
1712 where[0] = 0x0;
1713 where[1] = 0x0;
1714 as_bad (_("invalid operands for opcode"));
1715 return;
1718 if (*op_end)
1719 as_bad (_("excess operands: '%s'"), op_end);
1721 build_Mytes (opcode, operand);
1726 /* This routine is called each time a label definition is seen. It
1727 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1729 void
1730 sh_frob_label ()
1732 static fragS *last_label_frag;
1733 static int last_label_offset;
1735 if (sh_relax
1736 && seg_info (now_seg)->tc_segment_info_data.in_code)
1738 int offset;
1740 offset = frag_now_fix ();
1741 if (frag_now != last_label_frag
1742 || offset != last_label_offset)
1744 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
1745 last_label_frag = frag_now;
1746 last_label_offset = offset;
1751 /* This routine is called when the assembler is about to output some
1752 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1754 void
1755 sh_flush_pending_output ()
1757 if (sh_relax
1758 && seg_info (now_seg)->tc_segment_info_data.in_code)
1760 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1761 BFD_RELOC_SH_DATA);
1762 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
1766 symbolS *
1767 DEFUN (md_undefined_symbol, (name),
1768 char *name)
1770 return 0;
1773 #ifdef OBJ_COFF
1774 #ifndef BFD_ASSEMBLER
1776 void
1777 DEFUN (tc_crawl_symbol_chain, (headers),
1778 object_headers * headers)
1780 printf (_("call to tc_crawl_symbol_chain \n"));
1783 void
1784 DEFUN (tc_headers_hook, (headers),
1785 object_headers * headers)
1787 printf (_("call to tc_headers_hook \n"));
1790 #endif
1791 #endif
1793 /* Various routines to kill one day */
1794 /* Equal to MAX_PRECISION in atof-ieee.c */
1795 #define MAX_LITTLENUMS 6
1797 /* Turn a string in input_line_pointer into a floating point constant of type
1798 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1799 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1801 char *
1802 md_atof (type, litP, sizeP)
1803 int type;
1804 char *litP;
1805 int *sizeP;
1807 int prec;
1808 LITTLENUM_TYPE words[4];
1809 char *t;
1810 int i;
1812 switch (type)
1814 case 'f':
1815 prec = 2;
1816 break;
1818 case 'd':
1819 prec = 4;
1820 break;
1822 default:
1823 *sizeP = 0;
1824 return _("bad call to md_atof");
1827 t = atof_ieee (input_line_pointer, type, words);
1828 if (t)
1829 input_line_pointer = t;
1831 *sizeP = prec * 2;
1833 if (! target_big_endian)
1835 for (i = prec - 1; i >= 0; i--)
1837 md_number_to_chars (litP, (valueT) words[i], 2);
1838 litP += 2;
1841 else
1843 for (i = 0; i < prec; i++)
1845 md_number_to_chars (litP, (valueT) words[i], 2);
1846 litP += 2;
1850 return NULL;
1853 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1854 call instruction. It refers to a label of the instruction which
1855 loads the register which the call uses. We use it to generate a
1856 special reloc for the linker. */
1858 static void
1859 s_uses (ignore)
1860 int ignore ATTRIBUTE_UNUSED;
1862 expressionS ex;
1864 if (! sh_relax)
1865 as_warn (_(".uses pseudo-op seen when not relaxing"));
1867 expression (&ex);
1869 if (ex.X_op != O_symbol || ex.X_add_number != 0)
1871 as_bad (_("bad .uses format"));
1872 ignore_rest_of_line ();
1873 return;
1876 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
1878 demand_empty_rest_of_line ();
1881 CONST char *md_shortopts = "";
1882 struct option md_longopts[] = {
1884 #define OPTION_RELAX (OPTION_MD_BASE)
1885 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1886 #define OPTION_SMALL (OPTION_LITTLE + 1)
1887 #define OPTION_DSP (OPTION_SMALL + 1)
1889 {"relax", no_argument, NULL, OPTION_RELAX},
1890 {"little", no_argument, NULL, OPTION_LITTLE},
1891 {"small", no_argument, NULL, OPTION_SMALL},
1892 {"dsp", no_argument, NULL, OPTION_DSP},
1893 {NULL, no_argument, NULL, 0}
1895 size_t md_longopts_size = sizeof(md_longopts);
1898 md_parse_option (c, arg)
1899 int c;
1900 char *arg ATTRIBUTE_UNUSED;
1902 switch (c)
1904 case OPTION_RELAX:
1905 sh_relax = 1;
1906 break;
1908 case OPTION_LITTLE:
1909 shl = 1;
1910 target_big_endian = 0;
1911 break;
1913 case OPTION_SMALL:
1914 sh_small = 1;
1915 break;
1917 case OPTION_DSP:
1918 sh_dsp = 1;
1919 break;
1921 default:
1922 return 0;
1925 return 1;
1928 void
1929 md_show_usage (stream)
1930 FILE *stream;
1932 fprintf(stream, _("\
1933 SH options:\n\
1934 -little generate little endian code\n\
1935 -relax alter jump instructions for long displacements\n\
1936 -small align sections to 4 byte boundaries, not 16\n\
1937 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1940 void
1941 tc_Nout_fix_to_chars ()
1943 printf (_("call to tc_Nout_fix_to_chars \n"));
1944 abort ();
1947 /* This struct is used to pass arguments to sh_count_relocs through
1948 bfd_map_over_sections. */
1950 struct sh_count_relocs
1952 /* Symbol we are looking for. */
1953 symbolS *sym;
1954 /* Count of relocs found. */
1955 int count;
1958 /* Count the number of fixups in a section which refer to a particular
1959 symbol. When using BFD_ASSEMBLER, this is called via
1960 bfd_map_over_sections. */
1962 /*ARGSUSED*/
1963 static void
1964 sh_count_relocs (abfd, sec, data)
1965 bfd *abfd ATTRIBUTE_UNUSED;
1966 segT sec;
1967 PTR data;
1969 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
1970 segment_info_type *seginfo;
1971 symbolS *sym;
1972 fixS *fix;
1974 seginfo = seg_info (sec);
1975 if (seginfo == NULL)
1976 return;
1978 sym = info->sym;
1979 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
1981 if (fix->fx_addsy == sym)
1983 ++info->count;
1984 fix->fx_tcbit = 1;
1989 /* Handle the count relocs for a particular section. When using
1990 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1992 /*ARGSUSED*/
1993 static void
1994 sh_frob_section (abfd, sec, ignore)
1995 bfd *abfd ATTRIBUTE_UNUSED;
1996 segT sec;
1997 PTR ignore ATTRIBUTE_UNUSED;
1999 segment_info_type *seginfo;
2000 fixS *fix;
2002 seginfo = seg_info (sec);
2003 if (seginfo == NULL)
2004 return;
2006 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2008 symbolS *sym;
2009 bfd_vma val;
2010 fixS *fscan;
2011 struct sh_count_relocs info;
2013 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2014 continue;
2016 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2017 symbol in the same section. */
2018 sym = fix->fx_addsy;
2019 if (sym == NULL
2020 || fix->fx_subsy != NULL
2021 || fix->fx_addnumber != 0
2022 || S_GET_SEGMENT (sym) != sec
2023 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2024 || S_GET_STORAGE_CLASS (sym) == C_EXT
2025 #endif
2026 || S_IS_EXTERNAL (sym))
2028 as_warn_where (fix->fx_file, fix->fx_line,
2029 _(".uses does not refer to a local symbol in the same section"));
2030 continue;
2033 /* Look through the fixups again, this time looking for one
2034 at the same location as sym. */
2035 val = S_GET_VALUE (sym);
2036 for (fscan = seginfo->fix_root;
2037 fscan != NULL;
2038 fscan = fscan->fx_next)
2039 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2040 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2041 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2042 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2043 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2044 break;
2045 if (fscan == NULL)
2047 as_warn_where (fix->fx_file, fix->fx_line,
2048 _("can't find fixup pointed to by .uses"));
2049 continue;
2052 if (fscan->fx_tcbit)
2054 /* We've already done this one. */
2055 continue;
2058 /* fscan should also be a fixup to a local symbol in the same
2059 section. */
2060 sym = fscan->fx_addsy;
2061 if (sym == NULL
2062 || fscan->fx_subsy != NULL
2063 || fscan->fx_addnumber != 0
2064 || S_GET_SEGMENT (sym) != sec
2065 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2066 || S_GET_STORAGE_CLASS (sym) == C_EXT
2067 #endif
2068 || S_IS_EXTERNAL (sym))
2070 as_warn_where (fix->fx_file, fix->fx_line,
2071 _(".uses target does not refer to a local symbol in the same section"));
2072 continue;
2075 /* Now we look through all the fixups of all the sections,
2076 counting the number of times we find a reference to sym. */
2077 info.sym = sym;
2078 info.count = 0;
2079 #ifdef BFD_ASSEMBLER
2080 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
2081 #else
2083 int iscan;
2085 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2086 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2088 #endif
2090 if (info.count < 1)
2091 abort ();
2093 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2094 We have already adjusted the value of sym to include the
2095 fragment address, so we undo that adjustment here. */
2096 subseg_change (sec, 0);
2097 fix_new (symbol_get_frag (sym),
2098 S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address,
2099 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2103 /* This function is called after the symbol table has been completed,
2104 but before the relocs or section contents have been written out.
2105 If we have seen any .uses pseudo-ops, they point to an instruction
2106 which loads a register with the address of a function. We look
2107 through the fixups to find where the function address is being
2108 loaded from. We then generate a COUNT reloc giving the number of
2109 times that function address is referred to. The linker uses this
2110 information when doing relaxing, to decide when it can eliminate
2111 the stored function address entirely. */
2113 void
2114 sh_frob_file ()
2116 if (! sh_relax)
2117 return;
2119 #ifdef BFD_ASSEMBLER
2120 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2121 #else
2123 int iseg;
2125 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2126 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2128 #endif
2131 /* Called after relaxing. Set the correct sizes of the fragments, and
2132 create relocs so that md_apply_fix will fill in the correct values. */
2134 void
2135 md_convert_frag (headers, seg, fragP)
2136 #ifdef BFD_ASSEMBLER
2137 bfd *headers ATTRIBUTE_UNUSED;
2138 #else
2139 object_headers *headers;
2140 #endif
2141 segT seg;
2142 fragS *fragP;
2144 int donerelax = 0;
2146 switch (fragP->fr_subtype)
2148 case C (COND_JUMP, COND8):
2149 case C (COND_JUMP_DELAY, COND8):
2150 subseg_change (seg, 0);
2151 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2152 1, BFD_RELOC_SH_PCDISP8BY2);
2153 fragP->fr_fix += 2;
2154 fragP->fr_var = 0;
2155 break;
2157 case C (UNCOND_JUMP, UNCOND12):
2158 subseg_change (seg, 0);
2159 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2160 1, BFD_RELOC_SH_PCDISP12BY2);
2161 fragP->fr_fix += 2;
2162 fragP->fr_var = 0;
2163 break;
2165 case C (UNCOND_JUMP, UNCOND32):
2166 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2167 if (fragP->fr_symbol == NULL)
2168 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2169 (unsigned long) fragP->fr_address);
2170 else if (S_IS_DEFINED (fragP->fr_symbol))
2171 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2172 (unsigned long) fragP->fr_address,
2173 S_GET_NAME (fragP->fr_symbol));
2174 else
2175 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2176 (unsigned long) fragP->fr_address,
2177 S_GET_NAME (fragP->fr_symbol));
2179 #if 0 /* This code works, but generates poor code and the compiler
2180 should never produce a sequence that requires it to be used. */
2182 /* A jump wont fit in 12 bits, make code which looks like
2183 bra foo
2184 mov.w @(0, PC), r14
2185 .long disp
2186 foo: bra @r14
2188 int t = buffer[0] & 0x10;
2190 buffer[highbyte] = 0xa0; /* branch over move and disp */
2191 buffer[lowbyte] = 3;
2192 buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */
2193 buffer[lowbyte+2] = 0x00;
2195 buffer[highbyte+4] = 0; /* space for 32 bit jump disp */
2196 buffer[lowbyte+4] = 0;
2197 buffer[highbyte+6] = 0;
2198 buffer[lowbyte+6] = 0;
2200 buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */
2201 buffer[lowbyte+8] = t ? 0xb : 0x2b;
2203 buffer[highbyte+10] = 0x20; /* build nop */
2204 buffer[lowbyte+10] = 0x0b;
2206 /* Make reloc for the long disp */
2207 fix_new (fragP,
2208 fragP->fr_fix + 4,
2210 fragP->fr_symbol,
2211 fragP->fr_offset,
2213 BFD_RELOC_32);
2214 fragP->fr_fix += UNCOND32_LENGTH;
2215 fragP->fr_var = 0;
2216 donerelax = 1;
2217 #endif
2219 break;
2221 case C (COND_JUMP, COND12):
2222 case C (COND_JUMP_DELAY, COND12):
2223 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
2224 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2225 was due to gas incorrectly relaxing an out-of-range conditional
2226 branch with delay slot. It turned:
2227 bf.s L6 (slot mov.l r12,@(44,r0))
2228 into:
2230 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2231 30: 00 09 nop
2232 32: 10 cb mov.l r12,@(44,r0)
2233 Therefore, branches with delay slots have to be handled
2234 differently from ones without delay slots. */
2236 unsigned char *buffer =
2237 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
2238 int highbyte = target_big_endian ? 0 : 1;
2239 int lowbyte = target_big_endian ? 1 : 0;
2240 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
2242 /* Toggle the true/false bit of the bcond. */
2243 buffer[highbyte] ^= 0x2;
2245 /* If this is a dalayed branch, we may not put the the bra in the
2246 slot. So we change it to a non-delayed branch, like that:
2247 b! cond slot_label; bra disp; slot_label: slot_insn
2248 ??? We should try if swapping the conditional branch and
2249 its delay-slot insn already makes the branch reach. */
2251 /* Build a relocation to six / four bytes farther on. */
2252 subseg_change (seg, 0);
2253 fix_new (fragP, fragP->fr_fix, 2,
2254 #ifdef BFD_ASSEMBLER
2255 section_symbol (seg),
2256 #else
2257 seg_info (seg)->dot,
2258 #endif
2259 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
2260 1, BFD_RELOC_SH_PCDISP8BY2);
2262 /* Set up a jump instruction. */
2263 buffer[highbyte + 2] = 0xa0;
2264 buffer[lowbyte + 2] = 0;
2265 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
2266 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
2268 if (delay)
2270 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
2271 fragP->fr_fix += 4;
2273 else
2275 /* Fill in a NOP instruction. */
2276 buffer[highbyte + 4] = 0x0;
2277 buffer[lowbyte + 4] = 0x9;
2279 fragP->fr_fix += 6;
2281 fragP->fr_var = 0;
2282 donerelax = 1;
2284 break;
2286 case C (COND_JUMP, COND32):
2287 case C (COND_JUMP_DELAY, COND32):
2288 case C (COND_JUMP, UNDEF_WORD_DISP):
2289 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
2290 if (fragP->fr_symbol == NULL)
2291 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2292 (unsigned long) fragP->fr_address);
2293 else if (S_IS_DEFINED (fragP->fr_symbol))
2294 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2295 (unsigned long) fragP->fr_address,
2296 S_GET_NAME (fragP->fr_symbol));
2297 else
2298 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2299 (unsigned long) fragP->fr_address,
2300 S_GET_NAME (fragP->fr_symbol));
2302 #if 0 /* This code works, but generates poor code, and the compiler
2303 should never produce a sequence that requires it to be used. */
2305 /* A bcond won't fit and it won't go into a 12 bit
2306 displacement either, the code sequence looks like:
2307 b!cond foop
2308 mov.w @(n, PC), r14
2309 jmp @r14
2311 .long where
2312 foop:
2315 buffer[0] ^= 0x2; /* Toggle T/F bit */
2316 #define JREG 14
2317 buffer[1] = 5; /* branch over mov, jump, nop and ptr */
2318 buffer[2] = 0xd0 | JREG; /* Build mov insn */
2319 buffer[3] = 0x2;
2320 buffer[4] = 0x40 | JREG; /* Build jmp @JREG */
2321 buffer[5] = 0x0b;
2322 buffer[6] = 0x20; /* build nop */
2323 buffer[7] = 0x0b;
2324 buffer[8] = 0; /* space for 32 bit jump disp */
2325 buffer[9] = 0;
2326 buffer[10] = 0;
2327 buffer[11] = 0;
2328 buffer[12] = 0;
2329 buffer[13] = 0;
2330 /* Make reloc for the long disp */
2331 fix_new (fragP,
2332 fragP->fr_fix + 8,
2334 fragP->fr_symbol,
2335 fragP->fr_offset,
2337 BFD_RELOC_32);
2338 fragP->fr_fix += COND32_LENGTH;
2339 fragP->fr_var = 0;
2340 donerelax = 1;
2341 #endif
2343 break;
2345 default:
2346 abort ();
2349 if (donerelax && !sh_relax)
2350 as_warn_where (fragP->fr_file, fragP->fr_line,
2351 _("overflow in branch to %s; converted into longer instruction sequence"),
2352 (fragP->fr_symbol != NULL
2353 ? S_GET_NAME (fragP->fr_symbol)
2354 : ""));
2357 valueT
2358 DEFUN (md_section_align, (seg, size),
2359 segT seg AND
2360 valueT size)
2362 #ifdef BFD_ASSEMBLER
2363 #ifdef OBJ_ELF
2364 return size;
2365 #else /* ! OBJ_ELF */
2366 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
2367 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
2368 #endif /* ! OBJ_ELF */
2369 #else /* ! BFD_ASSEMBLER */
2370 return ((size + (1 << section_alignment[(int) seg]) - 1)
2371 & (-1 << section_alignment[(int) seg]));
2372 #endif /* ! BFD_ASSEMBLER */
2375 /* This static variable is set by s_uacons to tell sh_cons_align that
2376 the expession does not need to be aligned. */
2378 static int sh_no_align_cons = 0;
2380 /* This handles the unaligned space allocation pseudo-ops, such as
2381 .uaword. .uaword is just like .word, but the value does not need
2382 to be aligned. */
2384 static void
2385 s_uacons (bytes)
2386 int bytes;
2388 /* Tell sh_cons_align not to align this value. */
2389 sh_no_align_cons = 1;
2390 cons (bytes);
2393 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2394 aligned correctly. Note that this can cause warnings to be issued
2395 when assembling initialized structured which were declared with the
2396 packed attribute. FIXME: Perhaps we should require an option to
2397 enable this warning? */
2399 void
2400 sh_cons_align (nbytes)
2401 int nbytes;
2403 int nalign;
2404 char *p;
2406 if (sh_no_align_cons)
2408 /* This is an unaligned pseudo-op. */
2409 sh_no_align_cons = 0;
2410 return;
2413 nalign = 0;
2414 while ((nbytes & 1) == 0)
2416 ++nalign;
2417 nbytes >>= 1;
2420 if (nalign == 0)
2421 return;
2423 if (now_seg == absolute_section)
2425 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
2426 as_warn (_("misaligned data"));
2427 return;
2430 p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
2431 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
2433 record_alignment (now_seg, nalign);
2436 /* When relaxing, we need to output a reloc for any .align directive
2437 that requests alignment to a four byte boundary or larger. This is
2438 also where we check for misaligned data. */
2440 void
2441 sh_handle_align (frag)
2442 fragS *frag;
2444 if (sh_relax
2445 && frag->fr_type == rs_align
2446 && frag->fr_address + frag->fr_fix > 0
2447 && frag->fr_offset > 1
2448 && now_seg != bss_section)
2449 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
2450 BFD_RELOC_SH_ALIGN);
2452 if (frag->fr_type == rs_align_code
2453 && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0)
2454 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
2457 /* This macro decides whether a particular reloc is an entry in a
2458 switch table. It is used when relaxing, because the linker needs
2459 to know about all such entries so that it can adjust them if
2460 necessary. */
2462 #ifdef BFD_ASSEMBLER
2463 #define SWITCH_TABLE_CONS(fix) (0)
2464 #else
2465 #define SWITCH_TABLE_CONS(fix) \
2466 ((fix)->fx_r_type == 0 \
2467 && ((fix)->fx_size == 2 \
2468 || (fix)->fx_size == 1 \
2469 || (fix)->fx_size == 4))
2470 #endif
2472 #define SWITCH_TABLE(fix) \
2473 ((fix)->fx_addsy != NULL \
2474 && (fix)->fx_subsy != NULL \
2475 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2476 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2477 && ((fix)->fx_r_type == BFD_RELOC_32 \
2478 || (fix)->fx_r_type == BFD_RELOC_16 \
2479 || (fix)->fx_r_type == BFD_RELOC_8 \
2480 || SWITCH_TABLE_CONS (fix)))
2482 /* See whether we need to force a relocation into the output file.
2483 This is used to force out switch and PC relative relocations when
2484 relaxing. */
2487 sh_force_relocation (fix)
2488 fixS *fix;
2491 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2492 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2493 || fix->fx_r_type == BFD_RELOC_SH_LOOP_START
2494 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END)
2495 return 1;
2497 if (! sh_relax)
2498 return 0;
2500 return (fix->fx_pcrel
2501 || SWITCH_TABLE (fix)
2502 || fix->fx_r_type == BFD_RELOC_SH_COUNT
2503 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
2504 || fix->fx_r_type == BFD_RELOC_SH_CODE
2505 || fix->fx_r_type == BFD_RELOC_SH_DATA
2506 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
2509 #ifdef OBJ_ELF
2510 boolean
2511 sh_fix_adjustable (fixP)
2512 fixS *fixP;
2515 if (fixP->fx_addsy == NULL)
2516 return 1;
2518 /* We need the symbol name for the VTABLE entries */
2519 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2520 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2521 return 0;
2523 return 1;
2526 void sh_elf_final_processing()
2528 int val;
2530 /* Set file-specific flags to indicate if this code needs
2531 a processor with the sh-dsp / sh3e ISA to execute. */
2532 if (valid_arch & arch_sh1)
2533 val = EF_SH1;
2534 else if (valid_arch & arch_sh2)
2535 val = EF_SH2;
2536 else if (valid_arch & arch_sh_dsp)
2537 val = EF_SH_DSP;
2538 else if (valid_arch & arch_sh3)
2539 val = EF_SH3;
2540 else if (valid_arch & arch_sh3_dsp)
2541 val = EF_SH_DSP;
2542 else if (valid_arch & arch_sh3e)
2543 val = EF_SH3E;
2544 else if (valid_arch & arch_sh4)
2545 val = EF_SH4;
2546 else
2547 abort ();
2549 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
2550 elf_elfheader (stdoutput)->e_flags |= val;
2552 #endif
2554 /* Apply a fixup to the object file. */
2556 #ifdef BFD_ASSEMBLER
2558 md_apply_fix (fixP, valp)
2559 fixS *fixP;
2560 valueT *valp;
2561 #else
2562 void
2563 md_apply_fix (fixP, val)
2564 fixS *fixP;
2565 long val;
2566 #endif
2568 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2569 int lowbyte = target_big_endian ? 1 : 0;
2570 int highbyte = target_big_endian ? 0 : 1;
2571 #ifdef BFD_ASSEMBLER
2572 long val = *valp;
2573 #endif
2574 long max, min;
2575 int shift;
2577 #ifdef BFD_ASSEMBLER
2578 /* adjust_reloc_syms won't convert a reloc against a weak symbol
2579 into a reloc against a section, but bfd_install_relocation will
2580 screw up if the symbol is defined, so we have to adjust val here
2581 to avoid the screw up later. */
2582 if (fixP->fx_addsy != NULL
2583 && S_IS_WEAK (fixP->fx_addsy))
2584 val -= S_GET_VALUE (fixP->fx_addsy);
2585 #endif
2587 #ifndef BFD_ASSEMBLER
2588 if (fixP->fx_r_type == 0)
2590 if (fixP->fx_size == 2)
2591 fixP->fx_r_type = BFD_RELOC_16;
2592 else if (fixP->fx_size == 4)
2593 fixP->fx_r_type = BFD_RELOC_32;
2594 else if (fixP->fx_size == 1)
2595 fixP->fx_r_type = BFD_RELOC_8;
2596 else
2597 abort ();
2599 #endif
2601 max = min = 0;
2602 shift = 0;
2603 switch (fixP->fx_r_type)
2605 case BFD_RELOC_SH_IMM4:
2606 max = 0xf;
2607 *buf = (*buf & 0xf0) | (val & 0xf);
2608 break;
2610 case BFD_RELOC_SH_IMM4BY2:
2611 max = 0xf;
2612 shift = 1;
2613 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
2614 break;
2616 case BFD_RELOC_SH_IMM4BY4:
2617 max = 0xf;
2618 shift = 2;
2619 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
2620 break;
2622 case BFD_RELOC_SH_IMM8BY2:
2623 max = 0xff;
2624 shift = 1;
2625 *buf = val >> 1;
2626 break;
2628 case BFD_RELOC_SH_IMM8BY4:
2629 max = 0xff;
2630 shift = 2;
2631 *buf = val >> 2;
2632 break;
2634 case BFD_RELOC_8:
2635 case BFD_RELOC_SH_IMM8:
2636 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2637 sometimes it is not (e.g., and). We permit any 8 bit value.
2638 Note that adding further restrictions may invalidate
2639 reasonable looking assembly code, such as ``and -0x1,r0''. */
2640 max = 0xff;
2641 min = - 0xff;
2642 *buf++ = val;
2643 break;
2645 case BFD_RELOC_SH_PCRELIMM8BY4:
2646 /* The lower two bits of the PC are cleared before the
2647 displacement is added in. We can assume that the destination
2648 is on a 4 byte bounday. If this instruction is also on a 4
2649 byte boundary, then we want
2650 (target - here) / 4
2651 and target - here is a multiple of 4.
2652 Otherwise, we are on a 2 byte boundary, and we want
2653 (target - (here - 2)) / 4
2654 and target - here is not a multiple of 4. Computing
2655 (target - (here - 2)) / 4 == (target - here + 2) / 4
2656 works for both cases, since in the first case the addition of
2657 2 will be removed by the division. target - here is in the
2658 variable val. */
2659 val = (val + 2) / 4;
2660 if (val & ~0xff)
2661 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2662 buf[lowbyte] = val;
2663 break;
2665 case BFD_RELOC_SH_PCRELIMM8BY2:
2666 val /= 2;
2667 if (val & ~0xff)
2668 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2669 buf[lowbyte] = val;
2670 break;
2672 case BFD_RELOC_SH_PCDISP8BY2:
2673 val /= 2;
2674 if (val < -0x80 || val > 0x7f)
2675 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2676 buf[lowbyte] = val;
2677 break;
2679 case BFD_RELOC_SH_PCDISP12BY2:
2680 val /= 2;
2681 if (val < -0x800 || val >= 0x7ff)
2682 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2683 buf[lowbyte] = val & 0xff;
2684 buf[highbyte] |= (val >> 8) & 0xf;
2685 break;
2687 case BFD_RELOC_32:
2688 if (! target_big_endian)
2690 *buf++ = val >> 0;
2691 *buf++ = val >> 8;
2692 *buf++ = val >> 16;
2693 *buf++ = val >> 24;
2695 else
2697 *buf++ = val >> 24;
2698 *buf++ = val >> 16;
2699 *buf++ = val >> 8;
2700 *buf++ = val >> 0;
2702 break;
2704 case BFD_RELOC_16:
2705 if (! target_big_endian)
2707 *buf++ = val >> 0;
2708 *buf++ = val >> 8;
2710 else
2712 *buf++ = val >> 8;
2713 *buf++ = val >> 0;
2715 break;
2717 case BFD_RELOC_SH_USES:
2718 /* Pass the value into sh_coff_reloc_mangle. */
2719 fixP->fx_addnumber = val;
2720 break;
2722 case BFD_RELOC_SH_COUNT:
2723 case BFD_RELOC_SH_ALIGN:
2724 case BFD_RELOC_SH_CODE:
2725 case BFD_RELOC_SH_DATA:
2726 case BFD_RELOC_SH_LABEL:
2727 /* Nothing to do here. */
2728 break;
2730 case BFD_RELOC_SH_LOOP_START:
2731 case BFD_RELOC_SH_LOOP_END:
2733 case BFD_RELOC_VTABLE_INHERIT:
2734 case BFD_RELOC_VTABLE_ENTRY:
2735 fixP->fx_done = 0;
2736 #ifdef BFD_ASSEMBLER
2737 return 0;
2738 #else
2739 return;
2740 #endif
2742 default:
2743 abort ();
2746 if (shift != 0)
2748 if ((val & ((1 << shift) - 1)) != 0)
2749 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
2750 if (val >= 0)
2751 val >>= shift;
2752 else
2753 val = ((val >> shift)
2754 | ((long) -1 & ~ ((long) -1 >> shift)));
2756 if (max != 0 && (val < min || val > max))
2757 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
2759 #ifdef BFD_ASSEMBLER
2760 return 0;
2761 #endif
2764 /* Called just before address relaxation. Return the length
2765 by which a fragment must grow to reach it's destination. */
2768 md_estimate_size_before_relax (fragP, segment_type)
2769 register fragS *fragP;
2770 register segT segment_type;
2772 switch (fragP->fr_subtype)
2774 case C (UNCOND_JUMP, UNDEF_DISP):
2775 /* used to be a branch to somewhere which was unknown */
2776 if (!fragP->fr_symbol)
2778 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
2779 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length;
2781 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2783 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
2784 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length;
2786 else
2788 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
2789 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length;
2790 return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length;
2792 break;
2794 default:
2795 abort ();
2796 case C (COND_JUMP, UNDEF_DISP):
2797 case C (COND_JUMP_DELAY, UNDEF_DISP):
2798 /* used to be a branch to somewhere which was unknown */
2799 if (fragP->fr_symbol
2800 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2802 int what = GET_WHAT (fragP->fr_subtype);
2803 /* Got a symbol and it's defined in this segment, become byte
2804 sized - maybe it will fix up */
2805 fragP->fr_subtype = C (what, COND8);
2806 fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length;
2808 else if (fragP->fr_symbol)
2810 int what = GET_WHAT (fragP->fr_subtype);
2811 /* Its got a segment, but its not ours, so it will always be long */
2812 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
2813 fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length;
2814 return md_relax_table[C (what, COND32)].rlx_length;
2816 else
2818 int what = GET_WHAT (fragP->fr_subtype);
2819 /* We know the abs value */
2820 fragP->fr_subtype = C (what, COND8);
2821 fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length;
2824 break;
2826 return fragP->fr_var;
2829 /* Put number into target byte order */
2831 void
2832 md_number_to_chars (ptr, use, nbytes)
2833 char *ptr;
2834 valueT use;
2835 int nbytes;
2837 if (! target_big_endian)
2838 number_to_chars_littleendian (ptr, use, nbytes);
2839 else
2840 number_to_chars_bigendian (ptr, use, nbytes);
2843 long
2844 md_pcrel_from (fixP)
2845 fixS *fixP;
2847 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
2850 #ifdef OBJ_COFF
2853 tc_coff_sizemachdep (frag)
2854 fragS *frag;
2856 return md_relax_table[frag->fr_subtype].rlx_length;
2859 #endif /* OBJ_COFF */
2861 /* When we align the .text section, insert the correct NOP pattern. */
2864 sh_do_align (n, fill, len, max)
2865 int n;
2866 const char *fill;
2867 int len ATTRIBUTE_UNUSED;
2868 int max;
2870 if (fill == NULL
2871 && subseg_text_p (now_seg)
2872 && n > 1)
2874 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
2875 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
2877 /* First align to a 2 byte boundary, in case there is an odd
2878 .byte. */
2879 frag_align (1, 0, 0);
2880 if (target_big_endian)
2881 frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max);
2882 else
2883 frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern,
2884 max);
2885 return 1;
2888 return 0;
2891 #ifndef BFD_ASSEMBLER
2892 #ifdef OBJ_COFF
2894 /* Map BFD relocs to SH COFF relocs. */
2896 struct reloc_map
2898 bfd_reloc_code_real_type bfd_reloc;
2899 int sh_reloc;
2902 static const struct reloc_map coff_reloc_map[] =
2904 { BFD_RELOC_32, R_SH_IMM32 },
2905 { BFD_RELOC_16, R_SH_IMM16 },
2906 { BFD_RELOC_8, R_SH_IMM8 },
2907 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
2908 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
2909 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
2910 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
2911 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
2912 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
2913 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
2914 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
2915 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
2916 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
2917 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
2918 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
2919 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
2920 { BFD_RELOC_SH_USES, R_SH_USES },
2921 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
2922 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
2923 { BFD_RELOC_SH_CODE, R_SH_CODE },
2924 { BFD_RELOC_SH_DATA, R_SH_DATA },
2925 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
2926 { BFD_RELOC_UNUSED, 0 }
2929 /* Adjust a reloc for the SH. This is similar to the generic code,
2930 but does some minor tweaking. */
2932 void
2933 sh_coff_reloc_mangle (seg, fix, intr, paddr)
2934 segment_info_type *seg;
2935 fixS *fix;
2936 struct internal_reloc *intr;
2937 unsigned int paddr;
2939 symbolS *symbol_ptr = fix->fx_addsy;
2940 symbolS *dot;
2942 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
2944 if (! SWITCH_TABLE (fix))
2946 const struct reloc_map *rm;
2948 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
2949 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
2950 break;
2951 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
2952 as_bad_where (fix->fx_file, fix->fx_line,
2953 _("Can not represent %s relocation in this object file format"),
2954 bfd_get_reloc_code_name (fix->fx_r_type));
2955 intr->r_type = rm->sh_reloc;
2956 intr->r_offset = 0;
2958 else
2960 know (sh_relax);
2962 if (fix->fx_r_type == BFD_RELOC_16)
2963 intr->r_type = R_SH_SWITCH16;
2964 else if (fix->fx_r_type == BFD_RELOC_8)
2965 intr->r_type = R_SH_SWITCH8;
2966 else if (fix->fx_r_type == BFD_RELOC_32)
2967 intr->r_type = R_SH_SWITCH32;
2968 else
2969 abort ();
2971 /* For a switch reloc, we set r_offset to the difference between
2972 the reloc address and the subtrahend. When the linker is
2973 doing relaxing, it can use the determine the starting and
2974 ending points of the switch difference expression. */
2975 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
2978 /* PC relative relocs are always against the current section. */
2979 if (symbol_ptr == NULL)
2981 switch (fix->fx_r_type)
2983 case BFD_RELOC_SH_PCRELIMM8BY2:
2984 case BFD_RELOC_SH_PCRELIMM8BY4:
2985 case BFD_RELOC_SH_PCDISP8BY2:
2986 case BFD_RELOC_SH_PCDISP12BY2:
2987 case BFD_RELOC_SH_USES:
2988 symbol_ptr = seg->dot;
2989 break;
2990 default:
2991 break;
2995 if (fix->fx_r_type == BFD_RELOC_SH_USES)
2997 /* We can't store the offset in the object file, since this
2998 reloc does not take up any space, so we store it in r_offset.
2999 The fx_addnumber field was set in md_apply_fix. */
3000 intr->r_offset = fix->fx_addnumber;
3002 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
3004 /* We can't store the count in the object file, since this reloc
3005 does not take up any space, so we store it in r_offset. The
3006 fx_offset field was set when the fixup was created in
3007 sh_coff_frob_file. */
3008 intr->r_offset = fix->fx_offset;
3009 /* This reloc is always absolute. */
3010 symbol_ptr = NULL;
3012 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
3014 /* Store the alignment in the r_offset field. */
3015 intr->r_offset = fix->fx_offset;
3016 /* This reloc is always absolute. */
3017 symbol_ptr = NULL;
3019 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
3020 || fix->fx_r_type == BFD_RELOC_SH_DATA
3021 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
3023 /* These relocs are always absolute. */
3024 symbol_ptr = NULL;
3027 /* Turn the segment of the symbol into an offset. */
3028 if (symbol_ptr != NULL)
3030 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
3031 if (dot != NULL)
3032 intr->r_symndx = dot->sy_number;
3033 else
3034 intr->r_symndx = symbol_ptr->sy_number;
3036 else
3037 intr->r_symndx = -1;
3040 #endif /* OBJ_COFF */
3041 #endif /* ! BFD_ASSEMBLER */
3043 #ifdef BFD_ASSEMBLER
3045 /* Create a reloc. */
3047 arelent *
3048 tc_gen_reloc (section, fixp)
3049 asection *section ATTRIBUTE_UNUSED;
3050 fixS *fixp;
3052 arelent *rel;
3053 bfd_reloc_code_real_type r_type;
3055 rel = (arelent *) xmalloc (sizeof (arelent));
3056 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3057 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3058 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3060 r_type = fixp->fx_r_type;
3062 if (SWITCH_TABLE (fixp))
3064 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
3065 if (r_type == BFD_RELOC_16)
3066 r_type = BFD_RELOC_SH_SWITCH16;
3067 else if (r_type == BFD_RELOC_8)
3068 r_type = BFD_RELOC_8_PCREL;
3069 else if (r_type == BFD_RELOC_32)
3070 r_type = BFD_RELOC_SH_SWITCH32;
3071 else
3072 abort ();
3074 else if (r_type == BFD_RELOC_SH_USES)
3075 rel->addend = fixp->fx_addnumber;
3076 else if (r_type == BFD_RELOC_SH_COUNT)
3077 rel->addend = fixp->fx_offset;
3078 else if (r_type == BFD_RELOC_SH_ALIGN)
3079 rel->addend = fixp->fx_offset;
3080 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3081 || r_type == BFD_RELOC_VTABLE_ENTRY)
3082 rel->addend = fixp->fx_offset;
3083 else if (r_type == BFD_RELOC_SH_LOOP_START
3084 || r_type == BFD_RELOC_SH_LOOP_END)
3085 rel->addend = fixp->fx_offset;
3086 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3088 rel->addend = 0;
3089 rel->address = rel->addend = fixp->fx_offset;
3091 else if (fixp->fx_pcrel)
3092 rel->addend = fixp->fx_addnumber;
3093 else
3094 rel->addend = 0;
3096 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3097 if (rel->howto == NULL)
3099 as_bad_where (fixp->fx_file, fixp->fx_line,
3100 _("Cannot represent relocation type %s"),
3101 bfd_get_reloc_code_name (r_type));
3102 /* Set howto to a garbage value so that we can keep going. */
3103 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3104 assert (rel->howto != NULL);
3107 return rel;
3110 #endif /* BFD_ASSEMBLER */