bfd
[binutils.git] / include / opcode / rx.h
blob7081ccce53e5b2d6cc78a767cfcaf1eca7e184ca
1 /* Opcode decoder for the Renesas RX
2 Copyright 2008, 2009
3 Free Software Foundation, Inc.
4 Written by DJ Delorie <dj@redhat.com>
6 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
23 /* The RX decoder in libopcodes is used by the simulator, gdb's
24 analyzer, and the disassembler. Given an opcode data source,
25 it decodes the next opcode into the following structures. */
27 typedef enum
29 RX_AnySize = 0,
30 RX_Byte, /* undefined extension */
31 RX_UByte,
32 RX_SByte,
33 RX_Word, /* undefined extension */
34 RX_UWord,
35 RX_SWord,
36 RX_3Byte,
37 RX_Long,
38 } RX_Size;
40 typedef enum
42 RX_Operand_None,
43 RX_Operand_Immediate, /* #addend */
44 RX_Operand_Register, /* Rn */
45 RX_Operand_Indirect, /* [Rn + addend] */
46 RX_Operand_Postinc, /* [Rn+] */
47 RX_Operand_Predec, /* [-Rn] */
48 RX_Operand_Condition, /* eq, gtu, etc */
49 RX_Operand_Flag, /* [UIOSZC] */
50 } RX_Operand_Type;
52 typedef enum
54 RXO_unknown,
55 RXO_mov, /* d = s (signed) */
56 RXO_movbi, /* d = [s,s2] (signed) */
57 RXO_movbir, /* [s,s2] = d (signed) */
58 RXO_pushm, /* s..s2 */
59 RXO_popm, /* s..s2 */
60 RXO_pusha, /* &s */
61 RXO_xchg, /* s <-> d */
62 RXO_stcc, /* d = s if cond(s2) */
63 RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */
65 /* These are all either d OP= s or, if s2 is set, d = s OP s2. Note
66 that d may be "None". */
67 RXO_and,
68 RXO_or,
69 RXO_xor,
70 RXO_add,
71 RXO_sub,
72 RXO_mul,
73 RXO_div,
74 RXO_divu,
75 RXO_shll,
76 RXO_shar,
77 RXO_shlr,
79 RXO_adc, /* d = d + s + carry */
80 RXO_sbb, /* d = d - s - ~carry */
81 RXO_abs, /* d = |s| */
82 RXO_max, /* d = max(d,s) */
83 RXO_min, /* d = min(d,s) */
84 RXO_emul, /* d:64 = d:32 * s */
85 RXO_emulu, /* d:64 = d:32 * s (unsigned) */
86 RXO_ediv, /* d:64 / s; d = quot, d+1 = rem */
87 RXO_edivu, /* d:64 / s; d = quot, d+1 = rem */
89 RXO_rolc, /* d <<= 1 through carry */
90 RXO_rorc, /* d >>= 1 through carry*/
91 RXO_rotl, /* d <<= #s without carry */
92 RXO_rotr, /* d >>= #s without carry*/
93 RXO_revw, /* d = revw(s) */
94 RXO_revl, /* d = revl(s) */
95 RXO_branch, /* pc = d if cond(s) */
96 RXO_branchrel,/* pc += d if cond(s) */
97 RXO_jsr, /* pc = d */
98 RXO_jsrrel, /* pc += d */
99 RXO_rts,
100 RXO_nop,
102 RXO_scmpu,
103 RXO_smovu,
104 RXO_smovb,
105 RXO_suntil,
106 RXO_swhile,
107 RXO_smovf,
108 RXO_sstr,
110 RXO_rmpa,
111 RXO_mulhi,
112 RXO_mullo,
113 RXO_machi,
114 RXO_maclo,
115 RXO_mvtachi,
116 RXO_mvtaclo,
117 RXO_mvfachi,
118 RXO_mvfacmi,
119 RXO_mvfaclo,
120 RXO_racw,
122 RXO_sat, /* sat(d) */
123 RXO_satr,
125 RXO_fadd, /* d op= s */
126 RXO_fcmp,
127 RXO_fsub,
128 RXO_ftoi,
129 RXO_fmul,
130 RXO_fdiv,
131 RXO_round,
132 RXO_itof,
134 RXO_bset, /* d |= (1<<s) */
135 RXO_bclr, /* d &= ~(1<<s) */
136 RXO_btst, /* s & (1<<s2) */
137 RXO_bnot, /* d ^= (1<<s) */
138 RXO_bmcc, /* d<s> = cond(s2) */
140 RXO_clrpsw, /* flag index in d */
141 RXO_setpsw, /* flag index in d */
143 RXO_mvtcp, /* cop# in s2, cop[d] = s */
144 RXO_mvfcp, /* cop# in s2, d = cop[s] */
145 RXO_opecp, /* cop# in s2, do cop[s] */
147 RXO_rtfi,
148 RXO_rte,
149 RXO_rtd, /* undocumented */
150 RXO_brk,
151 RXO_dbt, /* undocumented */
152 RXO_int, /* vector id in s */
153 RXO_stop,
154 RXO_wait,
156 RXO_sccnd, /* d = cond(s) ? 1 : 0 */
157 } RX_Opcode_ID;
159 /* Condition bitpatterns, as registers. */
160 #define RXC_eq 0
161 #define RXC_z 0
162 #define RXC_ne 1
163 #define RXC_nz 1
164 #define RXC_c 2
165 #define RXC_nc 3
166 #define RXC_gtu 4
167 #define RXC_leu 5
168 #define RXC_pz 6
169 #define RXC_n 7
170 #define RXC_ge 8
171 #define RXC_lt 9
172 #define RXC_gt 10
173 #define RXC_le 11
174 #define RXC_o 12
175 #define RXC_no 13
176 #define RXC_always 14
177 #define RXC_never 15
179 typedef struct
181 RX_Operand_Type type;
182 int reg;
183 int addend;
184 RX_Size size;
185 } RX_Opcode_Operand;
187 typedef struct
189 RX_Opcode_ID id;
190 int n_bytes;
191 int prefix;
192 char * syntax;
193 RX_Size size;
194 /* By convention, these are destination, source1, source2. */
195 RX_Opcode_Operand op[3];
197 /* The logic here is:
198 newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s)
199 Only the O, S, Z, and C flags are affected. */
200 char flags_0; /* This also clears out flags-to-be-set. */
201 char flags_1;
202 char flags_s;
203 } RX_Opcode_Decoded;
205 /* Within the syntax, %c-style format specifiers are as follows:
207 %% = '%' character
208 %0 = operand[0] (destination)
209 %1 = operand[1] (source)
210 %2 = operand[2] (2nd source)
211 %s = operation size (b/w/l)
212 %SN = operand size [N] (N=0,1,2)
213 %aN = op[N] as an address (N=0,1,2)
215 Register numbers 0..15 are general registers. 16..31 are control
216 registers. 32..47 are condition codes. */
218 int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *);