1 2005-11-10 Andreas Schwab <schwab@suse.de>
3 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
6 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
8 * m32c-desc.c: Regenerated.
10 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
13 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
14 ms1-opc.c, ms1-opc.h: Regenerated.
16 2005-11-07 Steve Ellcey <sje@cup.hp.com>
18 * configure: Regenerate after modifying bfd/warning.m4.
20 2005-11-07 Alan Modra <amodra@bigpond.net.au>
22 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
23 ignored rex prefixes here.
24 (print_insn): Instead, handle them similarly to fwait followed
27 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
29 * iq2000-desc.c: Regenerated.
30 * iq2000-desc.h: Likewise.
31 * iq2000-dis.c: Likewise.
32 * iq2000-opc.c: Likewise.
34 2005-11-02 Paul Brook <paul@codesourcery.com>
36 * arm-dis.c (print_insn_thumb32): Word align blx target address.
38 2005-10-31 Alan Modra <amodra@bigpond.net.au>
40 * arm-dis.c (print_insn): Warning fix.
42 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
44 * Makefile.am: Run "make dep-am".
45 * Makefile.in: Regenerated.
47 * dep-in.sed: Replace " ./" with " ".
49 2005-10-28 Dave Brolley <brolley@redhat.com>
51 * All CGEN-generated sources: Regenerate.
53 Contribute the following changes:
54 2005-09-19 Dave Brolley <brolley@redhat.com>
56 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
57 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
60 2005-02-16 Dave Brolley <brolley@redhat.com>
62 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
63 cgen_isa_mask_* to cgen_bitset_*.
64 * cgen-opc.c: Likewise.
66 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
68 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
69 * *-dis.c: Regenerate.
71 2003-06-05 DJ Delorie <dj@redhat.com>
73 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
74 it, as it may point to a reused buffer. Set prev_isas when we
77 2002-12-13 Dave Brolley <brolley@redhat.com>
79 * cgen-opc.c (cgen_isa_mask_create): New support function for
81 (cgen_isa_mask_init): Ditto.
82 (cgen_isa_mask_clear): Ditto.
83 (cgen_isa_mask_add): Ditto.
84 (cgen_isa_mask_set): Ditto.
85 (cgen_isa_supported): Ditto.
86 (cgen_isa_mask_compare): Ditto.
87 (cgen_isa_mask_intersection): Ditto.
88 (cgen_isa_mask_copy): Ditto.
89 (cgen_isa_mask_combine): Ditto.
90 * cgen-dis.in (libiberty.h): #include it.
91 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
92 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
93 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
94 * Makefile.in: Regenerated.
96 2005-10-27 DJ Delorie <dj@redhat.com>
98 * m32c-asm.c: Regenerate.
99 * m32c-desc.c: Regenerate.
100 * m32c-desc.h: Regenerate.
101 * m32c-dis.c: Regenerate.
102 * m32c-ibld.c: Regenerate.
103 * m32c-opc.c: Regenerate.
104 * m32c-opc.h: Regenerate.
106 2005-10-26 DJ Delorie <dj@redhat.com>
108 * m32c-asm.c: Regenerate.
109 * m32c-desc.c: Regenerate.
110 * m32c-desc.h: Regenerate.
111 * m32c-dis.c: Regenerate.
112 * m32c-ibld.c: Regenerate.
113 * m32c-opc.c: Regenerate.
114 * m32c-opc.h: Regenerate.
116 2005-10-26 Paul Brook <paul@codesourcery.com>
118 * arm-dis.c (arm_opcodes): Correct "sel" entry.
120 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
122 * m32r-asm.c: Regenerate.
124 2005-10-25 DJ Delorie <dj@redhat.com>
126 * m32c-asm.c: Regenerate.
127 * m32c-desc.c: Regenerate.
128 * m32c-desc.h: Regenerate.
129 * m32c-dis.c: Regenerate.
130 * m32c-ibld.c: Regenerate.
131 * m32c-opc.c: Regenerate.
132 * m32c-opc.h: Regenerate.
134 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
136 * configure.in: Add target architecture bfd_arch_z80.
137 * configure: Regenerated.
138 * disassemble.c (disassembler)<ARCH_z80>: Add case
140 * z80-dis.c: New file.
142 2005-10-25 Alan Modra <amodra@bigpond.net.au>
144 * po/POTFILES.in: Regenerate.
145 * po/opcodes.pot: Regenerate.
147 2005-10-24 Jan Beulich <jbeulich@novell.com>
149 * ia64-asmtab.c: Regenerate.
151 2005-10-21 DJ Delorie <dj@redhat.com>
153 * m32c-asm.c: Regenerate.
154 * m32c-desc.c: Regenerate.
155 * m32c-desc.h: Regenerate.
156 * m32c-dis.c: Regenerate.
157 * m32c-ibld.c: Regenerate.
158 * m32c-opc.c: Regenerate.
159 * m32c-opc.h: Regenerate.
161 2005-10-21 Nick Clifton <nickc@redhat.com>
163 * bfin-dis.c: Tidy up code, removing redundant constructs.
165 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
167 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
170 2005-10-18 Nick Clifton <nickc@redhat.com>
172 * m32r-asm.c: Regenerate after updating m32r.opc.
174 2005-10-18 Jie Zhang <jie.zhang@analog.com>
176 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
177 reading instruction from memory.
179 2005-10-18 Nick Clifton <nickc@redhat.com>
181 * m32r-asm.c: Regenerate after updating m32r.opc.
183 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
185 * m32r-asm.c: Regenerate after updating m32r.opc.
187 2005-10-08 James Lemke <jim@wasabisystems.com>
189 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
192 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
194 * ppc-dis.c (struct dis_private): Remove.
195 (powerpc_dialect): Avoid aliasing warnings.
196 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
198 2005-09-30 Nick Clifton <nickc@redhat.com>
200 * po/ga.po: New Irish translation.
201 * configure.in (ALL_LINGUAS): Add "ga".
202 * configure: Regenerate.
204 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
206 * Makefile.am: Run "make dep-am".
207 * Makefile.in: Regenerated.
208 * aclocal.m4: Likewise.
209 * configure: Likewise.
211 2005-09-30 Catherine Moore <clm@cm00re.com>
213 * Makefile.am: Bfin support.
214 * Makefile.in: Regenerated.
215 * aclocal.m4: Regenerated.
216 * bfin-dis.c: New file.
217 * configure.in: Bfin support.
218 * configure: Regenerated.
219 * disassemble.c (ARCH_bfin): Define.
220 (disassembler): Add case for bfd_arch_bfin.
222 2005-09-28 Jan Beulich <jbeulich@novell.com>
224 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
227 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
228 (dis386): Document and use new 'V' meta character. Use it for
229 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
230 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
231 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
232 data prefix as used whenever DFLAG was examined. Handle 'V'.
233 (intel_operand_size): Use stack_v_mode.
234 (OP_E): Use stack_v_mode, but handle only the special case of
235 64-bit mode without operand size override here; fall through to
236 v_mode case otherwise.
237 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
238 and no operand size override is present.
239 (OP_J): Use get32s for obtaining the displacement also when rex64
242 2005-09-08 Paul Brook <paul@codesourcery.com>
244 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
246 2005-09-06 Chao-ying Fu <fu@mips.com>
248 * mips-opc.c (MT32): New define.
249 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
250 bottom to avoid opcode collision with "mftr" and "mttr".
252 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
253 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
256 2005-09-02 Paul Brook <paul@codesourcery.com>
258 * arm-dis.c (coprocessor_opcodes): Add null terminator.
260 2005-09-02 Paul Brook <paul@codesourcery.com>
262 * arm-dis.c (coprocessor_opcodes): New.
263 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
264 (print_insn_coprocessor): New function.
265 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
267 (print_insn_thumb32): Use print_insn_coprocessor.
269 2005-08-30 Paul Brook <paul@codesourcery.com>
271 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
273 2005-08-26 Jan Beulich <jbeulich@novell.com>
275 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
277 (OP_E): Call intel_operand_size, move call site out of mode
279 (OP_OFF): Call intel_operand_size if suffix_always. Remove
280 ATTRIBUTE_UNUSED from parameters.
281 (OP_OFF64): Likewise.
282 (OP_ESreg): Call intel_operand_size.
283 (OP_DSreg): Likewise.
284 (OP_DIR): Use colon rather than semicolon as separator of far
287 2005-08-25 Chao-ying Fu <fu@mips.com>
289 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
290 (mips_builtin_opcodes): Add DSP instructions.
291 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
293 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
296 2005-08-23 David Ung <davidu@mips.com>
298 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
299 instructions to the table.
301 2005-08-18 Alan Modra <amodra@bigpond.net.au>
303 * a29k-dis.c: Delete.
304 * Makefile.am: Remove a29k support.
305 * configure.in: Likewise.
306 * disassemble.c: Likewise.
307 * Makefile.in: Regenerate.
308 * configure: Regenerate.
309 * po/POTFILES.in: Regenerate.
311 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
313 * ppc-dis.c (powerpc_dialect): Handle e300.
314 (print_ppc_disassembler_options): Likewise.
315 * ppc-opc.c (PPCE300): Define.
316 (powerpc_opcodes): Mark icbt as available for the e300.
318 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
320 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
321 Use "rp" instead of "%r2" in "b,l" insns.
323 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
325 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
326 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
328 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
329 and 4 bit optional masks.
330 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
331 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
332 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
333 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
334 (s390_opformats): Likewise.
335 * s390-opc.txt: Add new instructions for cpu type z9-109.
337 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
339 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
341 2005-07-29 Paul Brook <paul@codesourcery.com>
343 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
345 2005-07-29 Paul Brook <paul@codesourcery.com>
347 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
348 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
350 2005-07-25 DJ Delorie <dj@redhat.com>
352 * m32c-asm.c Regenerate.
353 * m32c-dis.c Regenerate.
355 2005-07-20 DJ Delorie <dj@redhat.com>
357 * disassemble.c (disassemble_init_for_target): M32C ISAs are
358 enums, so convert them to bit masks, which attributes are.
360 2005-07-18 Nick Clifton <nickc@redhat.com>
362 * configure.in: Restore alpha ordering to list of arches.
363 * configure: Regenerate.
364 * disassemble.c: Restore alpha ordering to list of arches.
366 2005-07-18 Nick Clifton <nickc@redhat.com>
368 * m32c-asm.c: Regenerate.
369 * m32c-desc.c: Regenerate.
370 * m32c-desc.h: Regenerate.
371 * m32c-dis.c: Regenerate.
372 * m32c-ibld.h: Regenerate.
373 * m32c-opc.c: Regenerate.
374 * m32c-opc.h: Regenerate.
376 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
378 * i386-dis.c (PNI_Fixup): Update comment.
379 (VMX_Fixup): Properly handle the suffix check.
381 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
383 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
386 2005-07-16 Alan Modra <amodra@bigpond.net.au>
388 * Makefile.am: Run "make dep-am".
389 (stamp-m32c): Fix cpu dependencies.
390 * Makefile.in: Regenerate.
391 * ip2k-dis.c: Regenerate.
393 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
395 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
396 (VMX_Fixup): New. Fix up Intel VMX Instructions.
400 (dis386_twobyte): Updated entries 0x78 and 0x79.
401 (twobyte_has_modrm): Likewise.
402 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
403 (OP_G): Handle m_mode.
405 2005-07-14 Jim Blandy <jimb@redhat.com>
407 Add support for the Renesas M32C and M16C.
408 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
409 * m32c-desc.h, m32c-opc.h: New.
410 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
411 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
413 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
414 m32c-ibld.lo, m32c-opc.lo.
415 (CLEANFILES): List stamp-m32c.
416 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
417 (CGEN_CPUS): Add m32c.
418 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
419 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
420 (m32c_opc_h): New variable.
421 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
422 (m32c-opc.lo): New rules.
423 * Makefile.in: Regenerated.
424 * configure.in: Add case for bfd_m32c_arch.
425 * configure: Regenerated.
426 * disassemble.c (ARCH_m32c): New.
427 [ARCH_m32c]: #include "m32c-desc.h".
428 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
429 (disassemble_init_for_target) [ARCH_m32c]: Same.
431 * cgen-ops.h, cgen-types.h: New files.
432 * Makefile.am (HFILES): List them.
433 * Makefile.in: Regenerated.
435 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
437 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
438 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
439 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
440 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
441 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
442 v850-dis.c: Fix format bugs.
443 * ia64-gen.c (fail, warn): Add format attribute.
444 * or32-opc.c (debug): Likewise.
446 2005-07-07 Khem Raj <kraj@mvista.com>
448 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
451 2005-07-06 Alan Modra <amodra@bigpond.net.au>
453 * Makefile.am (stamp-m32r): Fix path to cpu files.
454 (stamp-m32r, stamp-iq2000): Likewise.
455 * Makefile.in: Regenerate.
456 * m32r-asm.c: Regenerate.
457 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
458 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
460 2005-07-05 Nick Clifton <nickc@redhat.com>
462 * iq2000-asm.c: Regenerate.
463 * ms1-asm.c: Regenerate.
465 2005-07-05 Jan Beulich <jbeulich@novell.com>
467 * i386-dis.c (SVME_Fixup): New.
468 (grps): Use it for the lidt entry.
469 (PNI_Fixup): Call OP_M rather than OP_E.
470 (INVLPG_Fixup): Likewise.
472 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
474 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
476 2005-07-01 Nick Clifton <nickc@redhat.com>
478 * a29k-dis.c: Update to ISO C90 style function declarations and
480 * alpha-opc.c: Likewise.
481 * arc-dis.c: Likewise.
482 * arc-opc.c: Likewise.
483 * avr-dis.c: Likewise.
484 * cgen-asm.in: Likewise.
485 * cgen-dis.in: Likewise.
486 * cgen-ibld.in: Likewise.
487 * cgen-opc.c: Likewise.
488 * cris-dis.c: Likewise.
489 * d10v-dis.c: Likewise.
490 * d30v-dis.c: Likewise.
491 * d30v-opc.c: Likewise.
492 * dis-buf.c: Likewise.
493 * dlx-dis.c: Likewise.
494 * h8300-dis.c: Likewise.
495 * h8500-dis.c: Likewise.
496 * hppa-dis.c: Likewise.
497 * i370-dis.c: Likewise.
498 * i370-opc.c: Likewise.
499 * m10200-dis.c: Likewise.
500 * m10300-dis.c: Likewise.
501 * m68k-dis.c: Likewise.
502 * m88k-dis.c: Likewise.
503 * mips-dis.c: Likewise.
504 * mmix-dis.c: Likewise.
505 * msp430-dis.c: Likewise.
506 * ns32k-dis.c: Likewise.
507 * or32-dis.c: Likewise.
508 * or32-opc.c: Likewise.
509 * pdp11-dis.c: Likewise.
510 * pj-dis.c: Likewise.
511 * s390-dis.c: Likewise.
512 * sh-dis.c: Likewise.
513 * sh64-dis.c: Likewise.
514 * sparc-dis.c: Likewise.
515 * sparc-opc.c: Likewise.
516 * sysdep.h: Likewise.
517 * tic30-dis.c: Likewise.
518 * tic4x-dis.c: Likewise.
519 * tic80-dis.c: Likewise.
520 * v850-dis.c: Likewise.
521 * v850-opc.c: Likewise.
522 * vax-dis.c: Likewise.
523 * w65-dis.c: Likewise.
524 * z8kgen.c: Likewise.
526 * fr30-*: Regenerate.
528 * ip2k-*: Regenerate.
529 * iq2000-*: Regenerate.
530 * m32r-*: Regenerate.
532 * openrisc-*: Regenerate.
533 * xstormy16-*: Regenerate.
535 2005-06-23 Ben Elliston <bje@gnu.org>
537 * m68k-dis.c: Use ISC C90.
538 * m68k-opc.c: Formatting fixes.
540 2005-06-16 David Ung <davidu@mips.com>
542 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
543 instructions to the table; seb/seh/sew/zeb/zeh/zew.
545 2005-06-15 Dave Brolley <brolley@redhat.com>
547 Contribute Morpho ms1 on behalf of Red Hat
548 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
549 ms1-opc.h: New files, Morpho ms1 target.
551 2004-05-14 Stan Cox <scox@redhat.com>
553 * disassemble.c (ARCH_ms1): Define.
554 (disassembler): Handle bfd_arch_ms1
556 2004-05-13 Michael Snyder <msnyder@redhat.com>
558 * Makefile.am, Makefile.in: Add ms1 target.
559 * configure.in: Ditto.
561 2005-06-08 Zack Weinberg <zack@codesourcery.com>
563 * arm-opc.h: Delete; fold contents into ...
564 * arm-dis.c: ... here. Move includes of internal COFF headers
565 next to includes of internal ELF headers.
566 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
567 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
568 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
569 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
570 (iwmmxt_wwnames, iwmmxt_wwssnames):
572 (regnames): Remove iWMMXt coprocessor register sets.
573 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
574 (get_arm_regnames): Adjust fourth argument to match above changes.
575 (set_iwmmxt_regnames): Delete.
576 (print_insn_arm): Constify 'c'. Use ISO syntax for function
577 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
578 and iwmmxt_cregnames, not set_iwmmxt_regnames.
579 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
580 ISO syntax for function pointer calls.
582 2005-06-07 Zack Weinberg <zack@codesourcery.com>
584 * arm-dis.c: Split up the comments describing the format codes, so
585 that the ARM and 16-bit Thumb opcode tables each have comments
586 preceding them that describe all the codes, and only the codes,
587 valid in those tables. (32-bit Thumb table is already like this.)
588 Reorder the lists in all three comments to match the order in
589 which the codes are implemented.
590 Remove all forward declarations of static functions. Convert all
591 function definitions to ISO C format.
592 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
594 (print_insn_thumb16): Remove unused case 'I'.
595 (print_insn): Update for changed calling convention of subroutines.
597 2005-05-25 Jan Beulich <jbeulich@novell.com>
599 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
600 hex (but retain it being displayed as signed). Remove redundant
601 checks. Add handling of displacements for 16-bit addressing in Intel
604 2005-05-25 Jan Beulich <jbeulich@novell.com>
606 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
607 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
608 masking of 'rm' in 16-bit memory address handling.
610 2005-05-19 Anton Blanchard <anton@samba.org>
612 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
613 (print_ppc_disassembler_options): Document it.
614 * ppc-opc.c (SVC_LEV): Define.
615 (LEV): Allow optional operand.
617 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
618 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
620 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
622 * Makefile.in: Regenerate.
624 2005-05-17 Zack Weinberg <zack@codesourcery.com>
626 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
627 instructions. Adjust disassembly of some opcodes to match
629 (thumb32_opcodes): New table.
630 (print_insn_thumb): Rename print_insn_thumb16; don't handle
631 two-halfword branches here.
632 (print_insn_thumb32): New function.
633 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
634 and print_insn_thumb32. Be consistent about order of
635 halfwords when printing 32-bit instructions.
637 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
640 * i386-dis.c (branch_v_mode): New.
641 (indirEv): Use branch_v_mode instead of v_mode.
642 (OP_E): Handle branch_v_mode.
644 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
646 * d10v-dis.c (dis_2_short): Support 64bit host.
648 2005-05-07 Nick Clifton <nickc@redhat.com>
650 * po/nl.po: Updated translation.
652 2005-05-07 Nick Clifton <nickc@redhat.com>
654 * Update the address and phone number of the FSF organization in
655 the GPL notices in the following files:
656 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
657 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
658 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
659 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
660 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
661 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
662 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
663 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
664 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
665 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
666 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
667 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
668 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
669 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
670 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
671 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
672 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
673 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
674 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
675 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
676 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
677 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
678 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
679 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
680 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
681 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
682 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
683 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
684 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
685 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
686 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
687 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
688 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
690 2005-05-05 James E Wilson <wilson@specifixinc.com>
692 * ia64-opc.c: Include sysdep.h before libiberty.h.
694 2005-05-05 Nick Clifton <nickc@redhat.com>
696 * configure.in (ALL_LINGUAS): Add vi.
697 * configure: Regenerate.
700 2005-04-26 Jerome Guitton <guitton@gnat.com>
702 * configure.in: Fix the check for basename declaration.
703 * configure: Regenerate.
705 2005-04-19 Alan Modra <amodra@bigpond.net.au>
707 * ppc-opc.c (RTO): Define.
708 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
709 entries to suit PPC440.
711 2005-04-18 Mark Kettenis <kettenis@gnu.org>
713 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
716 2005-04-14 Nick Clifton <nickc@redhat.com>
718 * po/fi.po: New translation: Finnish.
719 * configure.in (ALL_LINGUAS): Add fi.
720 * configure: Regenerate.
722 2005-04-14 Alan Modra <amodra@bigpond.net.au>
724 * Makefile.am (NO_WERROR): Define.
725 * configure.in: Invoke AM_BINUTILS_WARNINGS.
726 * Makefile.in: Regenerate.
727 * aclocal.m4: Regenerate.
728 * configure: Regenerate.
730 2005-04-04 Nick Clifton <nickc@redhat.com>
732 * fr30-asm.c: Regenerate.
733 * frv-asm.c: Regenerate.
734 * iq2000-asm.c: Regenerate.
735 * m32r-asm.c: Regenerate.
736 * openrisc-asm.c: Regenerate.
738 2005-04-01 Jan Beulich <jbeulich@novell.com>
740 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
741 visible operands in Intel mode. The first operand of monitor is
744 2005-04-01 Jan Beulich <jbeulich@novell.com>
746 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
747 easier future additions.
749 2005-03-31 Jerome Guitton <guitton@gnat.com>
751 * configure.in: Check for basename.
752 * configure: Regenerate.
755 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
757 * i386-dis.c (SEG_Fixup): New.
759 (dis386): Use "Sv" for 0x8c and 0x8e.
761 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
762 Nick Clifton <nickc@redhat.com>
764 * vax-dis.c: (entry_addr): New varible: An array of user supplied
765 function entry mask addresses.
766 (entry_addr_occupied_slots): New variable: The number of occupied
767 elements in entry_addr.
768 (entry_addr_total_slots): New variable: The total number of
769 elements in entry_addr.
770 (parse_disassembler_options): New function. Fills in the entry_addr
772 (free_entry_array): New function. Release the memory used by the
773 entry addr array. Suppressed because there is no way to call it.
774 (is_function_entry): Check if a given address is a function's
775 start address by looking at supplied entry mask addresses and
776 symbol information, if available.
777 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
779 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
781 * cris-dis.c (print_with_operands): Use ~31L for long instead
784 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
786 * mmix-opc.c (O): Revert the last change.
789 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
791 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
794 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
796 * mmix-opc.c (O, Z): Force expression as unsigned long.
798 2005-03-18 Nick Clifton <nickc@redhat.com>
800 * ip2k-asm.c: Regenerate.
801 * op/opcodes.pot: Regenerate.
803 2005-03-16 Nick Clifton <nickc@redhat.com>
804 Ben Elliston <bje@au.ibm.com>
806 * configure.in (werror): New switch: Add -Werror to the
807 compiler command line. Enabled by default. Disable via
809 * configure: Regenerate.
811 2005-03-16 Alan Modra <amodra@bigpond.net.au>
813 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
816 2005-03-15 Alan Modra <amodra@bigpond.net.au>
818 * po/es.po: Commit new Spanish translation.
820 * po/fr.po: Commit new French translation.
822 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
824 * vax-dis.c: Fix spelling error
825 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
826 of just "Entry mask: < r1 ... >"
828 2005-03-12 Zack Weinberg <zack@codesourcery.com>
830 * arm-dis.c (arm_opcodes): Document %E and %V.
831 Add entries for v6T2 ARM instructions:
832 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
833 (print_insn_arm): Add support for %E and %V.
834 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
836 2005-03-10 Jeff Baker <jbaker@qnx.com>
837 Alan Modra <amodra@bigpond.net.au>
839 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
840 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
842 (XSPRG_MASK): Mask off extra bits now part of sprg field.
843 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
844 mfsprg4..7 after msprg and consolidate.
846 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
848 * vax-dis.c (entry_mask_bit): New array.
849 (print_insn_vax): Decode function entry mask.
851 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
853 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
855 2005-03-05 Alan Modra <amodra@bigpond.net.au>
857 * po/opcodes.pot: Regenerate.
859 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
861 * arc-dis.c (a4_decoding_class): New enum.
862 (dsmOneArcInst): Use the enum values for the decoding class.
863 Remove redundant case in the switch for decodingClass value 11.
865 2005-03-02 Jan Beulich <jbeulich@novell.com>
867 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
869 (OP_C): Consider lock prefix in non-64-bit modes.
871 2005-02-24 Alan Modra <amodra@bigpond.net.au>
873 * cris-dis.c (format_hex): Remove ineffective warning fix.
874 * crx-dis.c (make_instruction): Warning fix.
875 * frv-asm.c: Regenerate.
877 2005-02-23 Nick Clifton <nickc@redhat.com>
879 * cgen-dis.in: Use bfd_byte for buffers that are passed to
882 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
884 * crx-dis.c (make_instruction): Move argument structure into inner
885 scope and ensure that all of its fields are initialised before
888 * fr30-asm.c: Regenerate.
889 * fr30-dis.c: Regenerate.
890 * frv-asm.c: Regenerate.
891 * frv-dis.c: Regenerate.
892 * ip2k-asm.c: Regenerate.
893 * ip2k-dis.c: Regenerate.
894 * iq2000-asm.c: Regenerate.
895 * iq2000-dis.c: Regenerate.
896 * m32r-asm.c: Regenerate.
897 * m32r-dis.c: Regenerate.
898 * openrisc-asm.c: Regenerate.
899 * openrisc-dis.c: Regenerate.
900 * xstormy16-asm.c: Regenerate.
901 * xstormy16-dis.c: Regenerate.
903 2005-02-22 Alan Modra <amodra@bigpond.net.au>
905 * arc-ext.c: Warning fixes.
906 * arc-ext.h: Likewise.
907 * cgen-opc.c: Likewise.
908 * ia64-gen.c: Likewise.
909 * maxq-dis.c: Likewise.
910 * ns32k-dis.c: Likewise.
911 * w65-dis.c: Likewise.
912 * ia64-asmtab.c: Regenerate.
914 2005-02-22 Alan Modra <amodra@bigpond.net.au>
916 * fr30-desc.c: Regenerate.
917 * fr30-desc.h: Regenerate.
918 * fr30-opc.c: Regenerate.
919 * fr30-opc.h: Regenerate.
920 * frv-desc.c: Regenerate.
921 * frv-desc.h: Regenerate.
922 * frv-opc.c: Regenerate.
923 * frv-opc.h: Regenerate.
924 * ip2k-desc.c: Regenerate.
925 * ip2k-desc.h: Regenerate.
926 * ip2k-opc.c: Regenerate.
927 * ip2k-opc.h: Regenerate.
928 * iq2000-desc.c: Regenerate.
929 * iq2000-desc.h: Regenerate.
930 * iq2000-opc.c: Regenerate.
931 * iq2000-opc.h: Regenerate.
932 * m32r-desc.c: Regenerate.
933 * m32r-desc.h: Regenerate.
934 * m32r-opc.c: Regenerate.
935 * m32r-opc.h: Regenerate.
936 * m32r-opinst.c: Regenerate.
937 * openrisc-desc.c: Regenerate.
938 * openrisc-desc.h: Regenerate.
939 * openrisc-opc.c: Regenerate.
940 * openrisc-opc.h: Regenerate.
941 * xstormy16-desc.c: Regenerate.
942 * xstormy16-desc.h: Regenerate.
943 * xstormy16-opc.c: Regenerate.
944 * xstormy16-opc.h: Regenerate.
946 2005-02-21 Alan Modra <amodra@bigpond.net.au>
948 * Makefile.am: Run "make dep-am"
949 * Makefile.in: Regenerate.
951 2005-02-15 Nick Clifton <nickc@redhat.com>
953 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
954 compile time warnings.
955 (print_keyword): Likewise.
956 (default_print_insn): Likewise.
958 * fr30-desc.c: Regenerated.
959 * fr30-desc.h: Regenerated.
960 * fr30-dis.c: Regenerated.
961 * fr30-opc.c: Regenerated.
962 * fr30-opc.h: Regenerated.
963 * frv-desc.c: Regenerated.
964 * frv-dis.c: Regenerated.
965 * frv-opc.c: Regenerated.
966 * ip2k-asm.c: Regenerated.
967 * ip2k-desc.c: Regenerated.
968 * ip2k-desc.h: Regenerated.
969 * ip2k-dis.c: Regenerated.
970 * ip2k-opc.c: Regenerated.
971 * ip2k-opc.h: Regenerated.
972 * iq2000-desc.c: Regenerated.
973 * iq2000-dis.c: Regenerated.
974 * iq2000-opc.c: Regenerated.
975 * m32r-asm.c: Regenerated.
976 * m32r-desc.c: Regenerated.
977 * m32r-desc.h: Regenerated.
978 * m32r-dis.c: Regenerated.
979 * m32r-opc.c: Regenerated.
980 * m32r-opc.h: Regenerated.
981 * m32r-opinst.c: Regenerated.
982 * openrisc-desc.c: Regenerated.
983 * openrisc-desc.h: Regenerated.
984 * openrisc-dis.c: Regenerated.
985 * openrisc-opc.c: Regenerated.
986 * openrisc-opc.h: Regenerated.
987 * xstormy16-desc.c: Regenerated.
988 * xstormy16-desc.h: Regenerated.
989 * xstormy16-dis.c: Regenerated.
990 * xstormy16-opc.c: Regenerated.
991 * xstormy16-opc.h: Regenerated.
993 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
995 * dis-buf.c (perror_memory): Use sprintf_vma to print out
998 2005-02-11 Nick Clifton <nickc@redhat.com>
1000 * iq2000-asm.c: Regenerate.
1002 * frv-dis.c: Regenerate.
1004 2005-02-07 Jim Blandy <jimb@redhat.com>
1006 * Makefile.am (CGEN): Load guile.scm before calling the main
1008 * Makefile.in: Regenerated.
1009 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1010 Simply pass the cgen-opc.scm path to ${cgen} as its first
1011 argument; ${cgen} itself now contains the '-s', or whatever is
1012 appropriate for the Scheme being used.
1014 2005-01-31 Andrew Cagney <cagney@gnu.org>
1016 * configure: Regenerate to track ../gettext.m4.
1018 2005-01-31 Jan Beulich <jbeulich@novell.com>
1020 * ia64-gen.c (NELEMS): Define.
1021 (shrink): Generate alias with missing second predicate register when
1022 opcode has two outputs and these are both predicates.
1023 * ia64-opc-i.c (FULL17): Define.
1024 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1025 here to generate output template.
1026 (TBITCM, TNATCM): Undefine after use.
1027 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1028 first input. Add ld16 aliases without ar.csd as second output. Add
1029 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1030 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1031 ar.ccv as third/fourth inputs. Consolidate through...
1032 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1033 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1034 * ia64-asmtab.c: Regenerate.
1036 2005-01-27 Andrew Cagney <cagney@gnu.org>
1038 * configure: Regenerate to track ../gettext.m4 change.
1040 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1042 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1043 * frv-asm.c: Rebuilt.
1044 * frv-desc.c: Rebuilt.
1045 * frv-desc.h: Rebuilt.
1046 * frv-dis.c: Rebuilt.
1047 * frv-ibld.c: Rebuilt.
1048 * frv-opc.c: Rebuilt.
1049 * frv-opc.h: Rebuilt.
1051 2005-01-24 Andrew Cagney <cagney@gnu.org>
1053 * configure: Regenerate, ../gettext.m4 was updated.
1055 2005-01-21 Fred Fish <fnf@specifixinc.com>
1057 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1058 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1059 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1060 * mips-dis.c: Ditto.
1062 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1064 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1066 2005-01-19 Fred Fish <fnf@specifixinc.com>
1068 * mips-dis.c (no_aliases): New disassembly option flag.
1069 (set_default_mips_dis_options): Init no_aliases to zero.
1070 (parse_mips_dis_option): Handle no-aliases option.
1071 (print_insn_mips): Ignore table entries that are aliases
1072 if no_aliases is set.
1073 (print_insn_mips16): Ditto.
1074 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1075 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1076 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1077 * mips16-opc.c (mips16_opcodes): Ditto.
1079 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1081 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1082 (inheritance diagram): Add missing edge.
1083 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1084 easier for the testsuite.
1085 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1086 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1087 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1088 arch_sh2a_or_sh4_up child.
1089 (sh_table): Do renaming as above.
1090 Correct comment for ldc.l for gas testsuite to read.
1091 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1092 Correct comments for movy.w and movy.l for gas testsuite to read.
1093 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1095 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1097 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1099 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1101 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1103 2005-01-10 Andreas Schwab <schwab@suse.de>
1105 * disassemble.c (disassemble_init_for_target) <case
1106 bfd_arch_ia64>: Set skip_zeroes to 16.
1107 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1109 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1111 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1113 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1115 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1116 memory references. Convert avr_operand() to C90 formatting.
1118 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1120 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1122 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1124 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1125 (no_op_insn): Initialize array with instructions that have no
1127 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1129 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1131 * arm-dis.c: Correct top-level comment.
1133 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1135 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1136 architecuture defining the insn.
1137 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1138 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1140 Also include opcode/arm.h.
1141 * Makefile.am (arm-dis.lo): Update dependency list.
1142 * Makefile.in: Regenerate.
1144 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1146 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1147 reflect the change to the short immediate syntax.
1149 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1151 * or32-opc.c (debug): Warning fix.
1152 * po/POTFILES.in: Regenerate.
1154 * maxq-dis.c: Formatting.
1155 (print_insn): Warning fix.
1157 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1159 * arm-dis.c (WORD_ADDRESS): Define.
1160 (print_insn): Use it. Correct big-endian end-of-section handling.
1162 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1163 Vineet Sharma <vineets@noida.hcltech.com>
1165 * maxq-dis.c: New file.
1166 * disassemble.c (ARCH_maxq): Define.
1167 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1169 * configure.in: Add case for bfd_maxq_arch.
1170 * configure: Regenerate.
1171 * Makefile.am: Add support for maxq-dis.c
1172 * Makefile.in: Regenerate.
1173 * aclocal.m4: Regenerate.
1175 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1177 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1179 * crx-dis.c: Likewise.
1181 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1183 Generally, handle CRISv32.
1184 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1185 (struct cris_disasm_data): New type.
1186 (format_reg, format_hex, cris_constraint, print_flags)
1187 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1189 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1190 (print_insn_crisv32_without_register_prefix)
1191 (print_insn_crisv10_v32_with_register_prefix)
1192 (print_insn_crisv10_v32_without_register_prefix)
1193 (cris_parse_disassembler_options): New functions.
1194 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1195 parameter. All callers changed.
1196 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1198 (cris_constraint) <case 'Y', 'U'>: New cases.
1199 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1201 (print_with_operands) <case 'Y'>: New case.
1202 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1203 <case 'N', 'Y', 'Q'>: New cases.
1204 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1205 (print_insn_cris_with_register_prefix)
1206 (print_insn_cris_without_register_prefix): Call
1207 cris_parse_disassembler_options.
1208 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1209 for CRISv32 and the size of immediate operands. New v32-only
1210 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1211 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1212 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1213 Change brp to be v3..v10.
1214 (cris_support_regs): New vector.
1215 (cris_opcodes): Update head comment. New format characters '[',
1216 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1217 Add new opcodes for v32 and adjust existing opcodes to accommodate
1218 differences to earlier variants.
1219 (cris_cond15s): New vector.
1221 2004-11-04 Jan Beulich <jbeulich@novell.com>
1223 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1225 (Mp): Use f_mode rather than none at all.
1226 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1227 replaces what previously was x_mode; x_mode now means 128-bit SSE
1229 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1230 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1231 pinsrw's second operand is Edqw.
1232 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1233 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1234 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1235 mode when an operand size override is present or always suffixing.
1236 More instructions will need to be added to this group.
1237 (putop): Handle new macro chars 'C' (short/long suffix selector),
1238 'I' (Intel mode override for following macro char), and 'J' (for
1239 adding the 'l' prefix to far branches in AT&T mode). When an
1240 alternative was specified in the template, honor macro character when
1241 specified for Intel mode.
1242 (OP_E): Handle new *_mode values. Correct pointer specifications for
1243 memory operands. Consolidate output of index register.
1244 (OP_G): Handle new *_mode values.
1245 (OP_I): Handle const_1_mode.
1246 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1247 respective opcode prefix bits have been consumed.
1248 (OP_EM, OP_EX): Provide some default handling for generating pointer
1251 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1253 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1256 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1258 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1259 (getregliststring): Support HI/LO and user registers.
1260 * crx-opc.c (crx_instruction): Update data structure according to the
1261 rearrangement done in CRX opcode header file.
1262 (crx_regtab): Likewise.
1263 (crx_optab): Likewise.
1264 (crx_instruction): Reorder load/stor instructions, remove unsupported
1266 support new Co-Processor instruction 'cpi'.
1268 2004-10-27 Nick Clifton <nickc@redhat.com>
1270 * opcodes/iq2000-asm.c: Regenerate.
1271 * opcodes/iq2000-desc.c: Regenerate.
1272 * opcodes/iq2000-desc.h: Regenerate.
1273 * opcodes/iq2000-dis.c: Regenerate.
1274 * opcodes/iq2000-ibld.c: Regenerate.
1275 * opcodes/iq2000-opc.c: Regenerate.
1276 * opcodes/iq2000-opc.h: Regenerate.
1278 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1280 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1281 us4, us5 (respectively).
1282 Remove unsupported 'popa' instruction.
1283 Reverse operands order in store co-processor instructions.
1285 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1287 * Makefile.am: Run "make dep-am"
1288 * Makefile.in: Regenerate.
1290 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1292 * xtensa-dis.c: Use ISO C90 formatting.
1294 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1296 * ppc-opc.c: Revert 2004-09-09 change.
1298 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1300 * xtensa-dis.c (state_names): Delete.
1301 (fetch_data): Use xtensa_isa_maxlength.
1302 (print_xtensa_operand): Replace operand parameter with opcode/operand
1303 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1304 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1305 instruction bundles. Use xmalloc instead of malloc.
1307 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1309 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1312 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1314 * crx-opc.c (crx_instruction): Support Co-processor insns.
1315 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1316 (getregliststring): Change function to use the above enum.
1317 (print_arg): Handle CO-Processor insns.
1318 (crx_cinvs): Add 'b' option to invalidate the branch-target
1321 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1323 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1324 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1325 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1326 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1327 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1329 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1331 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1334 2004-09-30 Paul Brook <paul@codesourcery.com>
1336 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1337 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1339 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1341 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1342 (CONFIG_STATUS_DEPENDENCIES): New.
1343 (Makefile): Removed.
1344 (config.status): Likewise.
1345 * Makefile.in: Regenerated.
1347 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1349 * Makefile.am: Run "make dep-am".
1350 * Makefile.in: Regenerate.
1351 * aclocal.m4: Regenerate.
1352 * configure: Regenerate.
1353 * po/POTFILES.in: Regenerate.
1354 * po/opcodes.pot: Regenerate.
1356 2004-09-11 Andreas Schwab <schwab@suse.de>
1358 * configure: Rebuild.
1360 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1362 * ppc-opc.c (L): Make this field not optional.
1364 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1366 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1367 Fix parameter to 'm[t|f]csr' insns.
1369 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1371 * configure.in: Autoupdate to autoconf 2.59.
1372 * aclocal.m4: Rebuild with aclocal 1.4p6.
1373 * configure: Rebuild with autoconf 2.59.
1374 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1375 bfd changes for autoconf 2.59 on the way).
1376 * config.in: Rebuild with autoheader 2.59.
1378 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1380 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1382 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1384 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1385 (GRPPADLCK2): New define.
1386 (twobyte_has_modrm): True for 0xA6.
1387 (grps): GRPPADLCK2 for opcode 0xA6.
1389 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1391 Introduce SH2a support.
1392 * sh-opc.h (arch_sh2a_base): Renumber.
1393 (arch_sh2a_nofpu_base): Remove.
1394 (arch_sh_base_mask): Adjust.
1395 (arch_opann_mask): New.
1396 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1397 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1398 (sh_table): Adjust whitespace.
1399 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1400 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1401 instruction list throughout.
1402 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1403 of arch_sh2a in instruction list throughout.
1404 (arch_sh2e_up): Accomodate above changes.
1405 (arch_sh2_up): Ditto.
1406 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1407 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1408 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1409 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1410 * sh-opc.h (arch_sh2a_nofpu): New.
1411 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1412 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1414 2004-01-20 DJ Delorie <dj@redhat.com>
1415 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1416 2003-12-29 DJ Delorie <dj@redhat.com>
1417 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1418 sh_opcode_info, sh_table): Add sh2a support.
1419 (arch_op32): New, to tag 32-bit opcodes.
1420 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1421 2003-12-02 Michael Snyder <msnyder@redhat.com>
1422 * sh-opc.h (arch_sh2a): Add.
1423 * sh-dis.c (arch_sh2a): Handle.
1424 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1426 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1428 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1430 2004-07-22 Nick Clifton <nickc@redhat.com>
1433 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1434 insns - this is done by objdump itself.
1435 * h8500-dis.c (print_insn_h8500): Likewise.
1437 2004-07-21 Jan Beulich <jbeulich@novell.com>
1439 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1440 regardless of address size prefix in effect.
1441 (ptr_reg): Size or address registers does not depend on rex64, but
1442 on the presence of an address size override.
1443 (OP_MMX): Use rex.x only for xmm registers.
1444 (OP_EM): Use rex.z only for xmm registers.
1446 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1448 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1449 move/branch operations to the bottom so that VR5400 multimedia
1450 instructions take precedence in disassembly.
1452 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1454 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1455 ISA-specific "break" encoding.
1457 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1459 * arm-opc.h: Fix typo in comment.
1461 2004-07-11 Andreas Schwab <schwab@suse.de>
1463 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1465 2004-07-09 Andreas Schwab <schwab@suse.de>
1467 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1469 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1471 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1472 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1473 (crx-dis.lo): New target.
1474 (crx-opc.lo): Likewise.
1475 * Makefile.in: Regenerate.
1476 * configure.in: Handle bfd_crx_arch.
1477 * configure: Regenerate.
1478 * crx-dis.c: New file.
1479 * crx-opc.c: New file.
1480 * disassemble.c (ARCH_crx): Define.
1481 (disassembler): Handle ARCH_crx.
1483 2004-06-29 James E Wilson <wilson@specifixinc.com>
1485 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1486 * ia64-asmtab.c: Regnerate.
1488 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1490 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1491 (extract_fxm): Don't test dialect.
1492 (XFXFXM_MASK): Include the power4 bit.
1493 (XFXM): Add p4 param.
1494 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1496 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1498 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1499 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1501 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1503 * ppc-opc.c (BH, XLBH_MASK): Define.
1504 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1506 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1508 * i386-dis.c (x_mode): Comment.
1509 (two_source_ops): File scope.
1510 (float_mem): Correct fisttpll and fistpll.
1511 (float_mem_mode): New table.
1513 (OP_E): Correct intel mode PTR output.
1514 (ptr_reg): Use open_char and close_char.
1515 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1516 operands. Set two_source_ops.
1518 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1520 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1521 instead of _raw_size.
1523 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1525 * ia64-gen.c (in_iclass): Handle more postinc st
1527 * ia64-asmtab.c: Rebuilt.
1529 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1531 * s390-opc.txt: Correct architecture mask for some opcodes.
1532 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1533 in the esa mode as well.
1535 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1537 * sh-dis.c (target_arch): Make unsigned.
1538 (print_insn_sh): Replace (most of) switch with a call to
1539 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1540 * sh-opc.h: Redefine architecture flags values.
1541 Add sh3-nommu architecture.
1542 Reorganise <arch>_up macros so they make more visual sense.
1543 (SH_MERGE_ARCH_SET): Define new macro.
1544 (SH_VALID_BASE_ARCH_SET): Likewise.
1545 (SH_VALID_MMU_ARCH_SET): Likewise.
1546 (SH_VALID_CO_ARCH_SET): Likewise.
1547 (SH_VALID_ARCH_SET): Likewise.
1548 (SH_MERGE_ARCH_SET_VALID): Likewise.
1549 (SH_ARCH_SET_HAS_FPU): Likewise.
1550 (SH_ARCH_SET_HAS_DSP): Likewise.
1551 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1552 (sh_get_arch_from_bfd_mach): Add prototype.
1553 (sh_get_arch_up_from_bfd_mach): Likewise.
1554 (sh_get_bfd_mach_from_arch_set): Likewise.
1555 (sh_merge_bfd_arc): Likewise.
1557 2004-05-24 Peter Barada <peter@the-baradas.com>
1559 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1560 into new match_insn_m68k function. Loop over canidate
1561 matches and select first that completely matches.
1562 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1563 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1564 to verify addressing for MAC/EMAC.
1565 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1566 reigster halves since 'fpu' and 'spl' look misleading.
1567 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1568 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1569 first, tighten up match masks.
1570 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1571 'size' from special case code in print_insn_m68k to
1572 determine decode size of insns.
1574 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1576 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1577 well as when -mpower4.
1579 2004-05-13 Nick Clifton <nickc@redhat.com>
1581 * po/fr.po: Updated French translation.
1583 2004-05-05 Peter Barada <peter@the-baradas.com>
1585 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1586 variants in arch_mask. Only set m68881/68851 for 68k chips.
1587 * m68k-op.c: Switch from ColdFire chips to core variants.
1589 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1592 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1594 2004-04-29 Ben Elliston <bje@au.ibm.com>
1596 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1597 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1599 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1601 * sh-dis.c (print_insn_sh): Print the value in constant pool
1602 as a symbol if it looks like a symbol.
1604 2004-04-22 Peter Barada <peter@the-baradas.com>
1606 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1607 appropriate ColdFire architectures.
1608 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1610 Add EMAC instructions, fix MAC instructions. Remove
1611 macmw/macml/msacmw/msacml instructions since mask addressing now
1614 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1616 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1617 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1618 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1619 macro. Adjust all users.
1621 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1623 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1626 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1628 * m32r-asm.c: Regenerate.
1630 2004-03-29 Stan Shebs <shebs@apple.com>
1632 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1635 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1637 * aclocal.m4: Regenerate.
1638 * config.in: Regenerate.
1639 * configure: Regenerate.
1640 * po/POTFILES.in: Regenerate.
1641 * po/opcodes.pot: Regenerate.
1643 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1645 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1647 * ppc-opc.c (RA0): Define.
1648 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1649 (RAOPT): Rename from RAO. Update all uses.
1650 (powerpc_opcodes): Use RA0 as appropriate.
1652 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1654 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1656 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1658 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1660 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1662 * i386-dis.c (GRPPLOCK): Delete.
1663 (grps): Delete GRPPLOCK entry.
1665 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1667 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1669 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1670 (GRPPADLCK): Define.
1671 (dis386): Use NOP_Fixup on "nop".
1672 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1673 (twobyte_has_modrm): Set for 0xa7.
1674 (padlock_table): Delete. Move to..
1675 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1677 (print_insn): Revert PADLOCK_SPECIAL code.
1678 (OP_E): Delete sfence, lfence, mfence checks.
1680 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1682 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1683 (INVLPG_Fixup): New function.
1684 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1686 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1688 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1689 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1690 (padlock_table): New struct with PadLock instructions.
1691 (print_insn): Handle PADLOCK_SPECIAL.
1693 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1695 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1696 (OP_E): Twiddle clflush to sfence here.
1698 2004-03-08 Nick Clifton <nickc@redhat.com>
1700 * po/de.po: Updated German translation.
1702 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1704 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1705 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1706 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1709 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1711 * frv-asm.c: Regenerate.
1712 * frv-desc.c: Regenerate.
1713 * frv-desc.h: Regenerate.
1714 * frv-dis.c: Regenerate.
1715 * frv-ibld.c: Regenerate.
1716 * frv-opc.c: Regenerate.
1717 * frv-opc.h: Regenerate.
1719 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1721 * frv-desc.c, frv-opc.c: Regenerate.
1723 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1725 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1727 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1729 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1730 Also correct mistake in the comment.
1732 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1734 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1735 ensure that double registers have even numbers.
1736 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1737 that reserved instruction 0xfffd does not decode the same
1739 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1740 REG_N refers to a double register.
1741 Add REG_N_B01 nibble type and use it instead of REG_NM
1743 Adjust the bit patterns in a few comments.
1745 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1747 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1749 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1751 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1753 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1755 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1757 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1759 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1760 mtivor32, mtivor33, mtivor34.
1762 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1764 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1766 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1768 * arm-opc.h Maverick accumulator register opcode fixes.
1770 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1772 * m32r-dis.c: Regenerate.
1774 2004-01-27 Michael Snyder <msnyder@redhat.com>
1776 * sh-opc.h (sh_table): "fsrra", not "fssra".
1778 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1780 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1783 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1785 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1787 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1789 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1790 1. Don't print scale factor on AT&T mode when index missing.
1792 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1794 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1795 when loaded into XR registers.
1797 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1799 * frv-desc.h: Regenerate.
1800 * frv-desc.c: Regenerate.
1801 * frv-opc.c: Regenerate.
1803 2004-01-13 Michael Snyder <msnyder@redhat.com>
1805 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1807 2004-01-09 Paul Brook <paul@codesourcery.com>
1809 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1812 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1814 * Makefile.am (libopcodes_la_DEPENDENCIES)
1815 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1816 comment about the problem.
1817 * Makefile.in: Regenerate.
1819 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1821 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1822 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1823 cut&paste errors in shifting/truncating numerical operands.
1824 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1825 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1826 (parse_uslo16): Likewise.
1827 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1828 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1829 (parse_s12): Likewise.
1830 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1831 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1832 (parse_uslo16): Likewise.
1833 (parse_uhi16): Parse gothi and gotfuncdeschi.
1834 (parse_d12): Parse got12 and gotfuncdesc12.
1835 (parse_s12): Likewise.
1837 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1839 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1840 instruction which looks similar to an 'rla' instruction.
1842 For older changes see ChangeLog-0203
1848 version-control: never