1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
29 #include "coff/h8300.h"
30 #include "coff/internal.h"
32 #include "libiberty.h"
34 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
36 /* We derive a hash table from the basic BFD hash table to
37 hold entries in the function vector. Aside from the
38 info stored by the basic hash table, we need the offset
39 of a particular entry within the hash table as well as
40 the offset where we'll add the next entry. */
42 struct funcvec_hash_entry
44 /* The basic hash table entry. */
45 struct bfd_hash_entry root
;
47 /* The offset within the vectors section where
52 struct funcvec_hash_table
54 /* The basic hash table. */
55 struct bfd_hash_table root
;
59 /* Offset at which we'll add the next entry. */
63 static struct bfd_hash_entry
*
65 (struct bfd_hash_entry
*, struct bfd_hash_table
*, const char *);
67 static bfd_reloc_status_type special
68 (bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **);
69 static int select_reloc
71 static void rtype2howto
72 (arelent
*, struct internal_reloc
*);
73 static void reloc_processing
74 (arelent
*, struct internal_reloc
*, asymbol
**, bfd
*, asection
*);
75 static bfd_boolean h8300_symbol_address_p
76 (bfd
*, asection
*, bfd_vma
);
77 static int h8300_reloc16_estimate
78 (bfd
*, asection
*, arelent
*, unsigned int,
79 struct bfd_link_info
*);
80 static void h8300_reloc16_extra_cases
81 (bfd
*, struct bfd_link_info
*, struct bfd_link_order
*, arelent
*,
82 bfd_byte
*, unsigned int *, unsigned int *);
83 static bfd_boolean h8300_bfd_link_add_symbols
84 (bfd
*, struct bfd_link_info
*);
86 /* To lookup a value in the function vector hash table. */
87 #define funcvec_hash_lookup(table, string, create, copy) \
88 ((struct funcvec_hash_entry *) \
89 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
91 /* The derived h8300 COFF linker table. Note it's derived from
92 the generic linker hash table, not the COFF backend linker hash
93 table! We use this to attach additional data structures we
94 need while linking on the h8300. */
95 struct h8300_coff_link_hash_table
{
96 /* The main hash table. */
97 struct generic_link_hash_table root
;
99 /* Section for the vectors table. This gets attached to a
100 random input bfd, we keep it here for easy access. */
101 asection
*vectors_sec
;
103 /* Hash table of the functions we need to enter into the function
105 struct funcvec_hash_table
*funcvec_hash_table
;
108 static struct bfd_link_hash_table
*h8300_coff_link_hash_table_create (bfd
*);
110 /* Get the H8/300 COFF linker hash table from a link_info structure. */
112 #define h8300_coff_hash_table(p) \
113 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
115 /* Initialize fields within a funcvec hash table entry. Called whenever
116 a new entry is added to the funcvec hash table. */
118 static struct bfd_hash_entry
*
119 funcvec_hash_newfunc (struct bfd_hash_entry
*entry
,
120 struct bfd_hash_table
*gen_table
,
123 struct funcvec_hash_entry
*ret
;
124 struct funcvec_hash_table
*table
;
126 ret
= (struct funcvec_hash_entry
*) entry
;
127 table
= (struct funcvec_hash_table
*) gen_table
;
129 /* Allocate the structure if it has not already been allocated by a
132 ret
= ((struct funcvec_hash_entry
*)
133 bfd_hash_allocate (gen_table
,
134 sizeof (struct funcvec_hash_entry
)));
138 /* Call the allocation method of the superclass. */
139 ret
= ((struct funcvec_hash_entry
*)
140 bfd_hash_newfunc ((struct bfd_hash_entry
*) ret
, gen_table
, string
));
145 /* Note where this entry will reside in the function vector table. */
146 ret
->offset
= table
->offset
;
148 /* Bump the offset at which we store entries in the function
149 vector. We'd like to bump up the size of the vectors section,
150 but it's not easily available here. */
151 switch (bfd_get_mach (table
->abfd
))
154 case bfd_mach_h8300hn
:
155 case bfd_mach_h8300sn
:
158 case bfd_mach_h8300h
:
159 case bfd_mach_h8300s
:
166 /* Everything went OK. */
167 return (struct bfd_hash_entry
*) ret
;
170 /* Initialize the function vector hash table. */
173 funcvec_hash_table_init (struct funcvec_hash_table
*table
,
175 struct bfd_hash_entry
*(*newfunc
)
176 (struct bfd_hash_entry
*,
177 struct bfd_hash_table
*,
179 unsigned int entsize
)
181 /* Initialize our local fields, then call the generic initialization
185 return (bfd_hash_table_init (&table
->root
, newfunc
, entsize
));
188 /* Create the derived linker hash table. We use a derived hash table
189 basically to hold "static" information during an H8/300 coff link
190 without using static variables. */
192 static struct bfd_link_hash_table
*
193 h8300_coff_link_hash_table_create (bfd
*abfd
)
195 struct h8300_coff_link_hash_table
*ret
;
196 bfd_size_type amt
= sizeof (struct h8300_coff_link_hash_table
);
198 ret
= (struct h8300_coff_link_hash_table
*) bfd_malloc (amt
);
201 if (!_bfd_link_hash_table_init (&ret
->root
.root
, abfd
,
202 _bfd_generic_link_hash_newfunc
,
203 sizeof (struct generic_link_hash_entry
)))
209 /* Initialize our data. */
210 ret
->vectors_sec
= NULL
;
211 ret
->funcvec_hash_table
= NULL
;
213 /* OK. Everything's initialized, return the base pointer. */
214 return &ret
->root
.root
;
217 /* Special handling for H8/300 relocs.
218 We only come here for pcrel stuff and return normally if not an -r link.
219 When doing -r, we can't do any arithmetic for the pcrel stuff, because
220 the code in reloc.c assumes that we can manipulate the targets of
221 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
222 which means that the gap after the instruction may not be enough to
223 contain the offset required for the branch, so we have to use only
224 the addend until the final link. */
226 static bfd_reloc_status_type
227 special (bfd
*abfd ATTRIBUTE_UNUSED
,
228 arelent
*reloc_entry ATTRIBUTE_UNUSED
,
229 asymbol
*symbol ATTRIBUTE_UNUSED
,
230 PTR data ATTRIBUTE_UNUSED
,
231 asection
*input_section ATTRIBUTE_UNUSED
,
233 char **error_message ATTRIBUTE_UNUSED
)
235 if (output_bfd
== (bfd
*) NULL
)
236 return bfd_reloc_continue
;
238 /* Adjust the reloc address to that in the output section. */
239 reloc_entry
->address
+= input_section
->output_offset
;
243 static reloc_howto_type howto_table
[] = {
244 HOWTO (R_RELBYTE
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "8", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
245 HOWTO (R_RELWORD
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "16", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
246 HOWTO (R_RELLONG
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "32", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
247 HOWTO (R_PCRBYTE
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "DISP8", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
248 HOWTO (R_PCRWORD
, 0, 1, 16, TRUE
, 0, complain_overflow_signed
, special
, "DISP16", FALSE
, 0x0000ffff, 0x0000ffff, TRUE
),
249 HOWTO (R_PCRLONG
, 0, 2, 32, TRUE
, 0, complain_overflow_signed
, special
, "DISP32", FALSE
, 0xffffffff, 0xffffffff, TRUE
),
250 HOWTO (R_MOV16B1
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxable mov.b:16", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
251 HOWTO (R_MOV16B2
, 0, 1, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxed mov.b:16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
252 HOWTO (R_JMP1
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "16/pcrel", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
253 HOWTO (R_JMP2
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "pcrecl/16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
254 HOWTO (R_JMPL1
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "24/pcrell", FALSE
, 0x00ffffff, 0x00ffffff, FALSE
),
255 HOWTO (R_JMPL2
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "pc8/24", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
256 HOWTO (R_MOV24B1
, 0, 1, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxable mov.b:24", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
257 HOWTO (R_MOV24B2
, 0, 1, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxed mov.b:24", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
259 /* An indirect reference to a function. This causes the function's address
260 to be added to the function vector in lo-mem and puts the address of
261 the function vector's entry in the jsr instruction. */
262 HOWTO (R_MEM_INDIRECT
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "8/indirect", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
264 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative
265 branch is turned into an 8-bit pc-relative branch. */
266 HOWTO (R_PCRWORD_B
, 0, 0, 8, TRUE
, 0, complain_overflow_bitfield
, special
, "relaxed bCC:16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
268 HOWTO (R_MOVL1
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
,special
, "32/24 relaxable move", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
270 HOWTO (R_MOVL2
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "32/24 relaxed move", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
272 HOWTO (R_BCC_INV
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "DISP8 inverted", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
274 HOWTO (R_JMP_DEL
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "Deleted jump", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
277 /* Turn a howto into a reloc number. */
279 #define SELECT_RELOC(x,howto) \
280 { x.r_type = select_reloc (howto); }
282 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
283 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
284 #define H8300 1 /* Customize coffcode.h */
285 #define __A_MAGIC_SET__
287 /* Code to swap in the reloc. */
288 #define SWAP_IN_RELOC_OFFSET H_GET_32
289 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
290 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
291 dst->r_stuff[0] = 'S'; \
292 dst->r_stuff[1] = 'C';
295 select_reloc (reloc_howto_type
*howto
)
300 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
303 rtype2howto (arelent
*internal
, struct internal_reloc
*dst
)
308 internal
->howto
= howto_table
+ 0;
311 internal
->howto
= howto_table
+ 1;
314 internal
->howto
= howto_table
+ 2;
317 internal
->howto
= howto_table
+ 3;
320 internal
->howto
= howto_table
+ 4;
323 internal
->howto
= howto_table
+ 5;
326 internal
->howto
= howto_table
+ 6;
329 internal
->howto
= howto_table
+ 7;
332 internal
->howto
= howto_table
+ 8;
335 internal
->howto
= howto_table
+ 9;
338 internal
->howto
= howto_table
+ 10;
341 internal
->howto
= howto_table
+ 11;
344 internal
->howto
= howto_table
+ 12;
347 internal
->howto
= howto_table
+ 13;
350 internal
->howto
= howto_table
+ 14;
353 internal
->howto
= howto_table
+ 15;
356 internal
->howto
= howto_table
+ 16;
359 internal
->howto
= howto_table
+ 17;
362 internal
->howto
= howto_table
+ 18;
365 internal
->howto
= howto_table
+ 19;
373 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
375 /* Perform any necessary magic to the addend in a reloc entry. */
377 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
378 cache_ptr->addend = ext_reloc.r_offset;
380 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
381 reloc_processing (relent, reloc, symbols, abfd, section)
384 reloc_processing (arelent
*relent
, struct internal_reloc
*reloc
,
385 asymbol
**symbols
, bfd
*abfd
, asection
*section
)
387 relent
->address
= reloc
->r_vaddr
;
388 rtype2howto (relent
, reloc
);
390 if (((int) reloc
->r_symndx
) > 0)
391 relent
->sym_ptr_ptr
= symbols
+ obj_convert (abfd
)[reloc
->r_symndx
];
393 relent
->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
395 relent
->addend
= reloc
->r_offset
;
396 relent
->address
-= section
->vma
;
400 h8300_symbol_address_p (bfd
*abfd
, asection
*input_section
, bfd_vma address
)
404 s
= _bfd_generic_link_get_symbols (abfd
);
405 BFD_ASSERT (s
!= (asymbol
**) NULL
);
407 /* Search all the symbols for one in INPUT_SECTION with
413 if (p
->section
== input_section
414 && (input_section
->output_section
->vma
415 + input_section
->output_offset
416 + p
->value
) == address
)
423 /* If RELOC represents a relaxable instruction/reloc, change it into
424 the relaxed reloc, notify the linker that symbol addresses
425 have changed (bfd_perform_slip) and return how much the current
426 section has shrunk by.
428 FIXME: Much of this code has knowledge of the ordering of entries
429 in the howto table. This needs to be fixed. */
432 h8300_reloc16_estimate (bfd
*abfd
, asection
*input_section
, arelent
*reloc
,
433 unsigned int shrink
, struct bfd_link_info
*link_info
)
438 static asection
*last_input_section
= NULL
;
439 static arelent
*last_reloc
= NULL
;
441 /* The address of the thing to be relocated will have moved back by
442 the size of the shrink - but we don't change reloc->address here,
443 since we need it to know where the relocation lives in the source
445 bfd_vma address
= reloc
->address
- shrink
;
447 if (input_section
!= last_input_section
)
450 /* Only examine the relocs which might be relaxable. */
451 switch (reloc
->howto
->type
)
453 /* This is the 16-/24-bit absolute branch which could become an
454 8-bit pc-relative branch. */
457 /* Get the address of the target of this branch. */
458 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
460 /* Get the address of the next instruction (not the reloc). */
461 dot
= (input_section
->output_section
->vma
462 + input_section
->output_offset
+ address
);
464 /* Adjust for R_JMP1 vs R_JMPL1. */
465 dot
+= (reloc
->howto
->type
== R_JMP1
? 1 : 2);
467 /* Compute the distance from this insn to the branch target. */
470 /* If the distance is within -128..+128 inclusive, then we can relax
471 this jump. +128 is valid since the target will move two bytes
472 closer if we do relax this branch. */
473 if ((int) gap
>= -128 && (int) gap
<= 128)
477 if (!bfd_get_section_contents (abfd
, input_section
, & code
,
480 code
= bfd_get_8 (abfd
, & code
);
482 /* It's possible we may be able to eliminate this branch entirely;
483 if the previous instruction is a branch around this instruction,
484 and there's no label at this instruction, then we can reverse
485 the condition on the previous branch and eliminate this jump.
492 This saves 4 bytes instead of two, and should be relatively
495 Only perform this optimisation for jumps (code 0x5a) not
496 subroutine calls, as otherwise it could transform:
509 which changes the call (jsr) into a branch (bne). */
513 && last_reloc
->howto
->type
== R_PCRBYTE
)
516 last_value
= bfd_coff_reloc16_get_value (last_reloc
, link_info
,
519 if (last_value
== dot
+ 2
520 && last_reloc
->address
+ 1 == reloc
->address
521 && !h8300_symbol_address_p (abfd
, input_section
, dot
- 2))
523 reloc
->howto
= howto_table
+ 19;
524 last_reloc
->howto
= howto_table
+ 18;
525 last_reloc
->sym_ptr_ptr
= reloc
->sym_ptr_ptr
;
526 last_reloc
->addend
= reloc
->addend
;
528 bfd_perform_slip (abfd
, 4, input_section
, address
);
533 /* Change the reloc type. */
534 reloc
->howto
= reloc
->howto
+ 1;
536 /* This shrinks this section by two bytes. */
538 bfd_perform_slip (abfd
, 2, input_section
, address
);
542 /* This is the 16-bit pc-relative branch which could become an 8-bit
543 pc-relative branch. */
545 /* Get the address of the target of this branch, add one to the value
546 because the addend field in PCrel jumps is off by -1. */
547 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
) + 1;
549 /* Get the address of the next instruction if we were to relax. */
550 dot
= input_section
->output_section
->vma
+
551 input_section
->output_offset
+ address
;
553 /* Compute the distance from this insn to the branch target. */
556 /* If the distance is within -128..+128 inclusive, then we can relax
557 this jump. +128 is valid since the target will move two bytes
558 closer if we do relax this branch. */
559 if ((int) gap
>= -128 && (int) gap
<= 128)
561 /* Change the reloc type. */
562 reloc
->howto
= howto_table
+ 15;
564 /* This shrinks this section by two bytes. */
566 bfd_perform_slip (abfd
, 2, input_section
, address
);
570 /* This is a 16-bit absolute address in a mov.b insn, which can
571 become an 8-bit absolute address if it's in the right range. */
573 /* Get the address of the data referenced by this mov.b insn. */
574 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
575 value
= bfd_h8300_pad_address (abfd
, value
);
577 /* If the address is in the top 256 bytes of the address space
578 then we can relax this instruction. */
579 if (value
>= 0xffffff00u
)
581 /* Change the reloc type. */
582 reloc
->howto
= reloc
->howto
+ 1;
584 /* This shrinks this section by two bytes. */
586 bfd_perform_slip (abfd
, 2, input_section
, address
);
590 /* Similarly for a 24-bit absolute address in a mov.b. Note that
591 if we can't relax this into an 8-bit absolute, we'll fall through
592 and try to relax it into a 16-bit absolute. */
594 /* Get the address of the data referenced by this mov.b insn. */
595 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
596 value
= bfd_h8300_pad_address (abfd
, value
);
598 if (value
>= 0xffffff00u
)
600 /* Change the reloc type. */
601 reloc
->howto
= reloc
->howto
+ 1;
603 /* This shrinks this section by four bytes. */
605 bfd_perform_slip (abfd
, 4, input_section
, address
);
607 /* Done with this reloc. */
611 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
614 /* This is a 24-/32-bit absolute address in a mov insn, which can
615 become an 16-bit absolute address if it's in the right range. */
617 /* Get the address of the data referenced by this mov insn. */
618 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
619 value
= bfd_h8300_pad_address (abfd
, value
);
621 /* If the address is a sign-extended 16-bit value then we can
622 relax this instruction. */
623 if (value
<= 0x7fff || value
>= 0xffff8000u
)
625 /* Change the reloc type. */
626 reloc
->howto
= howto_table
+ 17;
628 /* This shrinks this section by two bytes. */
630 bfd_perform_slip (abfd
, 2, input_section
, address
);
634 /* No other reloc types represent relaxing opportunities. */
640 last_input_section
= input_section
;
644 /* Handle relocations for the H8/300, including relocs for relaxed
647 FIXME: Not all relocations check for overflow! */
650 h8300_reloc16_extra_cases (bfd
*abfd
, struct bfd_link_info
*link_info
,
651 struct bfd_link_order
*link_order
, arelent
*reloc
,
652 bfd_byte
*data
, unsigned int *src_ptr
,
653 unsigned int *dst_ptr
)
655 unsigned int src_address
= *src_ptr
;
656 unsigned int dst_address
= *dst_ptr
;
657 asection
*input_section
= link_order
->u
.indirect
.section
;
661 unsigned char temp_code
;
663 switch (reloc
->howto
->type
)
665 /* Generic 8-bit pc-relative relocation. */
667 /* Get the address of the target of this branch. */
668 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
670 dot
= (input_section
->output_offset
672 + link_order
->u
.indirect
.section
->output_section
->vma
);
677 if (gap
< -128 || gap
> 126)
679 if (! ((*link_info
->callbacks
->reloc_overflow
)
681 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
682 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
683 input_section
, reloc
->address
)))
687 /* Everything looks OK. Apply the relocation and update the
688 src/dst address appropriately. */
689 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
696 /* Generic 16-bit pc-relative relocation. */
698 /* Get the address of the target of this branch. */
699 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
701 /* Get the address of the instruction (not the reloc). */
702 dot
= (input_section
->output_offset
704 + link_order
->u
.indirect
.section
->output_section
->vma
+ 1);
709 if (gap
> 32766 || gap
< -32768)
711 if (! ((*link_info
->callbacks
->reloc_overflow
)
713 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
714 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
715 input_section
, reloc
->address
)))
719 /* Everything looks OK. Apply the relocation and update the
720 src/dst address appropriately. */
721 bfd_put_16 (abfd
, (bfd_vma
) gap
, data
+ dst_address
);
728 /* Generic 8-bit absolute relocation. */
730 /* Get the address of the object referenced by this insn. */
731 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
733 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
);
740 /* Various simple 16-bit absolute relocations. */
744 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
745 bfd_put_16 (abfd
, value
, data
+ dst_address
);
750 /* Various simple 24-/32-bit absolute relocations. */
754 /* Get the address of the target of this branch. */
755 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
756 bfd_put_32 (abfd
, value
, data
+ dst_address
);
761 /* Another 24-/32-bit absolute relocation. */
763 /* Get the address of the target of this branch. */
764 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
766 value
= ((value
& 0x00ffffff)
767 | (bfd_get_32 (abfd
, data
+ src_address
) & 0xff000000));
768 bfd_put_32 (abfd
, value
, data
+ dst_address
);
773 /* This is a 24-/32-bit absolute address in one of the following
776 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
777 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w",
778 "stc.w" and "mov.[bwl]"
780 We may relax this into an 16-bit absolute address if it's in
783 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
784 value
= bfd_h8300_pad_address (abfd
, value
);
787 if (value
<= 0x7fff || value
>= 0xffff8000u
)
789 /* Insert the 16-bit value into the proper location. */
790 bfd_put_16 (abfd
, value
, data
+ dst_address
);
792 /* Fix the opcode. For all the instructions that belong to
793 this relaxation, we simply need to turn off bit 0x20 in
794 the previous byte. */
795 data
[dst_address
- 1] &= ~0x20;
801 if (! ((*link_info
->callbacks
->reloc_overflow
)
803 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
804 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
805 input_section
, reloc
->address
)))
810 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */
812 /* Get the address of the target of this branch. */
813 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
815 /* Get the address of the next instruction. */
816 dot
= (input_section
->output_offset
818 + link_order
->u
.indirect
.section
->output_section
->vma
+ 1);
823 if (gap
< -128 || gap
> 126)
825 if (! ((*link_info
->callbacks
->reloc_overflow
)
827 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
828 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
829 input_section
, reloc
->address
)))
833 /* Now fix the instruction itself. */
834 switch (data
[dst_address
- 1])
838 bfd_put_8 (abfd
, 0x55, data
+ dst_address
- 1);
842 bfd_put_8 (abfd
, 0x40, data
+ dst_address
- 1);
849 /* Write out the 8-bit value. */
850 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
857 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */
859 /* Get the address of the target of this branch. */
860 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
862 /* Get the address of the instruction (not the reloc). */
863 dot
= (input_section
->output_offset
865 + link_order
->u
.indirect
.section
->output_section
->vma
- 1);
870 if (gap
< -128 || gap
> 126)
872 if (! ((*link_info
->callbacks
->reloc_overflow
)
874 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
875 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
876 input_section
, reloc
->address
)))
880 /* Now fix the instruction. */
881 switch (data
[dst_address
- 2])
884 /* bCC:16 -> bCC:8 */
885 /* Get the second byte of the original insn, which contains
886 the condition code. */
887 tmp
= data
[dst_address
- 1];
889 /* Compute the fisrt byte of the relaxed instruction. The
890 original sequence 0x58 0xX0 is relaxed to 0x4X, where X
891 represents the condition code. */
897 bfd_put_8 (abfd
, tmp
, data
+ dst_address
- 2);
901 /* bsr:16 -> bsr:8 */
902 bfd_put_8 (abfd
, 0x55, data
+ dst_address
- 2);
909 /* Output the target. */
910 bfd_put_8 (abfd
, gap
, data
+ dst_address
- 1);
912 /* We don't advance dst_address -- the 8-bit reloc is applied at
913 dst_address - 1, so the next insn should begin at dst_address. */
918 /* Similarly for a 24-bit absolute that is now 8 bits. */
920 /* Get the address of the target of this branch. */
921 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
923 /* Get the address of the instruction (not the reloc). */
924 dot
= (input_section
->output_offset
926 + link_order
->u
.indirect
.section
->output_section
->vma
+ 2);
930 /* Fix the instruction. */
931 switch (data
[src_address
])
935 bfd_put_8 (abfd
, 0x55, data
+ dst_address
);
939 bfd_put_8 (abfd
, 0x40, data
+ dst_address
);
945 bfd_put_8 (abfd
, gap
, data
+ dst_address
+ 1);
951 /* This is a 16-bit absolute address in one of the following
954 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
955 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
958 We may relax this into an 8-bit absolute address if it's in
961 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
963 /* All instructions with R_H8_DIR16B2 start with 0x6a. */
964 if (data
[dst_address
- 2] != 0x6a)
967 temp_code
= data
[src_address
- 1];
969 /* If this is a mov.b instruction, clear the lower nibble, which
970 contains the source/destination register number. */
971 if ((temp_code
& 0x10) != 0x10)
974 /* Fix up the opcode. */
978 /* This is mov.b @aa:16,Rd. */
979 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x20;
982 /* This is mov.b Rs,@aa:16. */
983 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x30;
986 /* This is a bit-maniputation instruction that stores one
987 bit into memory, one of "bclr", "bist", "bnot", "bset",
989 data
[dst_address
- 2] = 0x7f;
992 /* This is a bit-maniputation instruction that loads one bit
993 from memory, one of "band", "biand", "bild", "bior",
994 "bixor", "bld", "bor", "btst", and "bxor". */
995 data
[dst_address
- 2] = 0x7e;
1001 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
- 1);
1005 /* This is a 24-bit absolute address in one of the following
1008 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1009 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1012 We may relax this into an 8-bit absolute address if it's in
1015 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1017 /* All instructions with R_MOV24B2 start with 0x6a. */
1018 if (data
[dst_address
- 2] != 0x6a)
1021 temp_code
= data
[src_address
- 1];
1023 /* If this is a mov.b instruction, clear the lower nibble, which
1024 contains the source/destination register number. */
1025 if ((temp_code
& 0x30) != 0x30)
1028 /* Fix up the opcode. */
1032 /* This is mov.b @aa:24/32,Rd. */
1033 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x20;
1036 /* This is mov.b Rs,@aa:24/32. */
1037 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x30;
1040 /* This is a bit-maniputation instruction that stores one
1041 bit into memory, one of "bclr", "bist", "bnot", "bset",
1043 data
[dst_address
- 2] = 0x7f;
1046 /* This is a bit-maniputation instruction that loads one bit
1047 from memory, one of "band", "biand", "bild", "bior",
1048 "bixor", "bld", "bor", "btst", and "bxor". */
1049 data
[dst_address
- 2] = 0x7e;
1055 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
- 1);
1060 /* Get the address of the target of this branch. */
1061 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1063 dot
= (input_section
->output_offset
1065 + link_order
->u
.indirect
.section
->output_section
->vma
) + 1;
1070 if (gap
< -128 || gap
> 126)
1072 if (! ((*link_info
->callbacks
->reloc_overflow
)
1074 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
1075 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
1076 input_section
, reloc
->address
)))
1080 /* Everything looks OK. Fix the condition in the instruction, apply
1081 the relocation, and update the src/dst address appropriately. */
1083 bfd_put_8 (abfd
, bfd_get_8 (abfd
, data
+ dst_address
- 1) ^ 1,
1084 data
+ dst_address
- 1);
1085 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
1096 /* An 8-bit memory indirect instruction (jmp/jsr).
1098 There's several things that need to be done to handle
1101 If this is a reloc against the absolute symbol, then
1102 we should handle it just R_RELBYTE. Likewise if it's
1103 for a symbol with a value ge 0 and le 0xff.
1105 Otherwise it's a jump/call through the function vector,
1106 and the linker is expected to set up the function vector
1107 and put the right value into the jump/call instruction. */
1108 case R_MEM_INDIRECT
:
1110 /* We need to find the symbol so we can determine it's
1111 address in the function vector table. */
1114 struct funcvec_hash_table
*ftab
;
1115 struct funcvec_hash_entry
*h
;
1116 struct h8300_coff_link_hash_table
*htab
;
1117 asection
*vectors_sec
;
1119 if (link_info
->hash
->creator
!= abfd
->xvec
)
1121 (*_bfd_error_handler
)
1122 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1123 link_info
->hash
->creator
->name
);
1125 /* What else can we do? This function doesn't allow return
1126 of an error, and we don't want to call abort as that
1127 indicates an internal error. */
1128 #ifndef EXIT_FAILURE
1129 #define EXIT_FAILURE 1
1131 xexit (EXIT_FAILURE
);
1133 htab
= h8300_coff_hash_table (link_info
);
1134 vectors_sec
= htab
->vectors_sec
;
1136 /* First see if this is a reloc against the absolute symbol
1137 or against a symbol with a nonnegative value <= 0xff. */
1138 symbol
= *(reloc
->sym_ptr_ptr
);
1139 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1140 if (symbol
== bfd_abs_section_ptr
->symbol
1143 /* This should be handled in a manner very similar to
1144 R_RELBYTES. If the value is in range, then just slam
1145 the value into the right location. Else trigger a
1146 reloc overflow callback. */
1149 bfd_put_8 (abfd
, value
, data
+ dst_address
);
1155 if (! ((*link_info
->callbacks
->reloc_overflow
)
1157 bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
1158 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
1159 input_section
, reloc
->address
)))
1165 /* This is a jump/call through a function vector, and we're
1166 expected to create the function vector ourselves.
1168 First look up this symbol in the linker hash table -- we need
1169 the derived linker symbol which holds this symbol's index
1170 in the function vector. */
1171 name
= symbol
->name
;
1172 if (symbol
->flags
& BSF_LOCAL
)
1174 char *new_name
= bfd_malloc ((bfd_size_type
) strlen (name
) + 10);
1176 if (new_name
== NULL
)
1179 sprintf (new_name
, "%s_%08x", name
, symbol
->section
->id
);
1183 ftab
= htab
->funcvec_hash_table
;
1184 h
= funcvec_hash_lookup (ftab
, name
, FALSE
, FALSE
);
1186 /* This shouldn't ever happen. If it does that means we've got
1187 data corruption of some kind. Aborting seems like a reasonable
1188 thing to do here. */
1189 if (h
== NULL
|| vectors_sec
== NULL
)
1192 /* Place the address of the function vector entry into the
1195 vectors_sec
->output_offset
+ h
->offset
,
1196 data
+ dst_address
);
1201 /* Now create an entry in the function vector itself. */
1202 switch (bfd_get_mach (input_section
->owner
))
1204 case bfd_mach_h8300
:
1205 case bfd_mach_h8300hn
:
1206 case bfd_mach_h8300sn
:
1208 bfd_coff_reloc16_get_value (reloc
,
1211 vectors_sec
->contents
+ h
->offset
);
1213 case bfd_mach_h8300h
:
1214 case bfd_mach_h8300s
:
1216 bfd_coff_reloc16_get_value (reloc
,
1219 vectors_sec
->contents
+ h
->offset
);
1225 /* Gross. We've already written the contents of the vector section
1226 before we get here... So we write it again with the new data. */
1227 bfd_set_section_contents (vectors_sec
->output_section
->owner
,
1228 vectors_sec
->output_section
,
1229 vectors_sec
->contents
,
1230 (file_ptr
) vectors_sec
->output_offset
,
1241 *src_ptr
= src_address
;
1242 *dst_ptr
= dst_address
;
1245 /* Routine for the h8300 linker.
1247 This routine is necessary to handle the special R_MEM_INDIRECT
1248 relocs on the h8300. It's responsible for generating a vectors
1249 section and attaching it to an input bfd as well as sizing
1250 the vectors section. It also creates our vectors hash table.
1252 It uses the generic linker routines to actually add the symbols.
1253 from this BFD to the bfd linker hash table. It may add a few
1254 selected static symbols to the bfd linker hash table. */
1257 h8300_bfd_link_add_symbols (bfd
*abfd
, struct bfd_link_info
*info
)
1260 struct funcvec_hash_table
*funcvec_hash_table
;
1262 struct h8300_coff_link_hash_table
*htab
;
1264 /* Add the symbols using the generic code. */
1265 _bfd_generic_link_add_symbols (abfd
, info
);
1267 if (info
->hash
->creator
!= abfd
->xvec
)
1270 htab
= h8300_coff_hash_table (info
);
1272 /* If we haven't created a vectors section, do so now. */
1273 if (!htab
->vectors_sec
)
1277 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1278 flags
= (SEC_ALLOC
| SEC_LOAD
1279 | SEC_HAS_CONTENTS
| SEC_IN_MEMORY
| SEC_READONLY
);
1280 htab
->vectors_sec
= bfd_make_section_with_flags (abfd
, ".vectors",
1283 /* If the section wasn't created, or we couldn't set the flags,
1284 quit quickly now, rather than dying a painful death later. */
1285 if (!htab
->vectors_sec
)
1288 /* Also create the vector hash table. */
1289 amt
= sizeof (struct funcvec_hash_table
);
1290 funcvec_hash_table
= (struct funcvec_hash_table
*) bfd_alloc (abfd
, amt
);
1292 if (!funcvec_hash_table
)
1295 /* And initialize the funcvec hash table. */
1296 if (!funcvec_hash_table_init (funcvec_hash_table
, abfd
,
1297 funcvec_hash_newfunc
,
1298 sizeof (struct funcvec_hash_entry
)))
1300 bfd_release (abfd
, funcvec_hash_table
);
1304 /* Store away a pointer to the funcvec hash table. */
1305 htab
->funcvec_hash_table
= funcvec_hash_table
;
1308 /* Load up the function vector hash table. */
1309 funcvec_hash_table
= htab
->funcvec_hash_table
;
1311 /* Now scan the relocs for all the sections in this bfd; create
1312 additional space in the .vectors section as needed. */
1313 for (sec
= abfd
->sections
; sec
; sec
= sec
->next
)
1315 long reloc_size
, reloc_count
, i
;
1319 /* Suck in the relocs, symbols & canonicalize them. */
1320 reloc_size
= bfd_get_reloc_upper_bound (abfd
, sec
);
1321 if (reloc_size
<= 0)
1324 relocs
= (arelent
**) bfd_malloc ((bfd_size_type
) reloc_size
);
1328 /* The symbols should have been read in by _bfd_generic link_add_symbols
1329 call abovec, so we can cheat and use the pointer to them that was
1330 saved in the above call. */
1331 symbols
= _bfd_generic_link_get_symbols(abfd
);
1332 reloc_count
= bfd_canonicalize_reloc (abfd
, sec
, relocs
, symbols
);
1333 if (reloc_count
<= 0)
1339 /* Now walk through all the relocations in this section. */
1340 for (i
= 0; i
< reloc_count
; i
++)
1342 arelent
*reloc
= relocs
[i
];
1343 asymbol
*symbol
= *(reloc
->sym_ptr_ptr
);
1346 /* We've got an indirect reloc. See if we need to add it
1347 to the function vector table. At this point, we have
1348 to add a new entry for each unique symbol referenced
1349 by an R_MEM_INDIRECT relocation except for a reloc
1350 against the absolute section symbol. */
1351 if (reloc
->howto
->type
== R_MEM_INDIRECT
1352 && symbol
!= bfd_abs_section_ptr
->symbol
)
1355 struct funcvec_hash_table
*ftab
;
1356 struct funcvec_hash_entry
*h
;
1358 name
= symbol
->name
;
1359 if (symbol
->flags
& BSF_LOCAL
)
1363 new_name
= bfd_malloc ((bfd_size_type
) strlen (name
) + 10);
1364 if (new_name
== NULL
)
1367 sprintf (new_name
, "%s_%08x", name
, symbol
->section
->id
);
1371 /* Look this symbol up in the function vector hash table. */
1372 ftab
= htab
->funcvec_hash_table
;
1373 h
= funcvec_hash_lookup (ftab
, name
, FALSE
, FALSE
);
1375 /* If this symbol isn't already in the hash table, add
1376 it and bump up the size of the hash table. */
1379 h
= funcvec_hash_lookup (ftab
, name
, TRUE
, TRUE
);
1386 /* Bump the size of the vectors section. Each vector
1387 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1388 switch (bfd_get_mach (abfd
))
1390 case bfd_mach_h8300
:
1391 case bfd_mach_h8300hn
:
1392 case bfd_mach_h8300sn
:
1393 htab
->vectors_sec
->size
+= 2;
1395 case bfd_mach_h8300h
:
1396 case bfd_mach_h8300s
:
1397 htab
->vectors_sec
->size
+= 4;
1406 /* We're done with the relocations, release them. */
1410 /* Now actually allocate some space for the function vector. It's
1411 wasteful to do this more than once, but this is easier. */
1412 sec
= htab
->vectors_sec
;
1415 /* Free the old contents. */
1417 free (sec
->contents
);
1419 /* Allocate new contents. */
1420 sec
->contents
= bfd_malloc (sec
->size
);
1426 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1427 #define coff_reloc16_estimate h8300_reloc16_estimate
1428 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1429 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1431 #define COFF_LONG_FILENAMES
1432 #include "coffcode.h"
1434 #undef coff_bfd_get_relocated_section_contents
1435 #undef coff_bfd_relax_section
1436 #define coff_bfd_get_relocated_section_contents \
1437 bfd_coff_reloc16_get_relocated_section_contents
1438 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1440 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec
, "coff-h8300", BFD_IS_RELAXABLE
, 0, '_', NULL
, COFF_SWAP_TABLE
)