opcodes/fr30-asm.c

   1 /* Assembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-asm.in isn't
   6
   7 Copyright (C) 1996, 1997, 1998, 1999, 2001 Free Software Foundation, Inc.
   8
   9 This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2, or (at your option)
  14 any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software Foundation, Inc.,
  23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <ctype.h>
  30 #include <stdio.h>
  31 #include "ansidecl.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "fr30-desc.h"
  35 #include "fr30-opc.h"
  36 #include "opintl.h"
  37
  38 #undef min
  39 #define min(a,b) ((a) < (b) ? (a) : (b))
  40 #undef max
  41 #define max(a,b) ((a) > (b) ? (a) : (b))
  42
  43 static const char * parse_insn_normal
  44      PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
  45 \f
  46 /* -- assembler routines inserted here */
  47
  48 /* -- asm.c */
  49 /* Handle register lists for LDMx and STMx  */
  50
  51 static int
  52 parse_register_number (strp)
  53      const char **strp;
  54 {
  55   int regno;
  56   if (**strp < '0' || **strp > '9')
  57     return -1; /* error */
  58   regno = **strp - '0';
  59   ++*strp;
  60
  61   if (**strp >= '0' && **strp <= '9')
  62     {
  63       regno = regno * 10 + (**strp - '0');
  64       ++*strp;
  65     }
  66
  67   return regno;
  68 }
  69
  70 static const char *
  71 parse_register_list (cd, strp, opindex, valuep, high_low, load_store)
  72      CGEN_CPU_DESC cd;
  73      const char **strp;
  74      int opindex;
  75      unsigned long *valuep;
  76      int high_low;   /* 0 == high, 1 == low */
  77      int load_store; /* 0 == load, 1 == store */
  78 {
  79   int regno;
  80   *valuep = 0;
  81   while (**strp && **strp != ')')
  82     {
  83       if (**strp != 'R' && **strp != 'r')
  84         break;
  85       ++*strp;
  86
  87       regno = parse_register_number (strp);
  88       if (regno == -1)
  89         return "Register number is not valid";
  90       if (regno > 7 && !high_low)
  91         return "Register must be between r0 and r7";
  92       if (regno < 8 && high_low)
  93         return "Register must be between r8 and r15";
  94
  95       if (high_low)
  96         regno -= 8;
  97
  98       if (load_store) /* mask is reversed for store */
  99         *valuep |= 0x80 >> regno;
 100       else
 101         *valuep |= 1 << regno;
 102
 103       if (**strp == ',')
 104         {
 105           if (*(*strp + 1) == ')')
 106             break;
 107           ++*strp;
 108         }
 109     }
 110
 111   if (!*strp || **strp != ')')
 112     return "Register list is not valid";
 113
 114   return NULL;
 115 }
 116
 117 static const char *
 118 parse_low_register_list_ld (cd, strp, opindex, valuep)
 119      CGEN_CPU_DESC cd;
 120      const char **strp;
 121      int opindex;
 122      unsigned long *valuep;
 123 {
 124   return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 0/*load*/);
 125 }
 126
 127 static const char *
 128 parse_hi_register_list_ld (cd, strp, opindex, valuep)
 129      CGEN_CPU_DESC cd;
 130      const char **strp;
 131      int opindex;
 132      unsigned long *valuep;
 133 {
 134   return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 0/*load*/);
 135 }
 136
 137 static const char *
 138 parse_low_register_list_st (cd, strp, opindex, valuep)
 139      CGEN_CPU_DESC cd;
 140      const char **strp;
 141      int opindex;
 142      unsigned long *valuep;
 143 {
 144   return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 1/*store*/);
 145 }
 146
 147 static const char *
 148 parse_hi_register_list_st (cd, strp, opindex, valuep)
 149      CGEN_CPU_DESC cd;
 150      const char **strp;
 151      int opindex;
 152      unsigned long *valuep;
 153 {
 154   return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 1/*store*/);
 155 }
 156
 157 /* -- */
 158
 159 /* Main entry point for operand parsing.
 160
 161    This function is basically just a big switch statement.  Earlier versions
 162    used tables to look up the function to use, but
 163    - if the table contains both assembler and disassembler functions then
 164      the disassembler contains much of the assembler and vice-versa,
 165    - there's a lot of inlining possibilities as things grow,
 166    - using a switch statement avoids the function call overhead.
 167
 168    This function could be moved into `parse_insn_normal', but keeping it
 169    separate makes clear the interface between `parse_insn_normal' and each of
 170    the handlers.
 171 */
 172
 173 const char *
 174 fr30_cgen_parse_operand (cd, opindex, strp, fields)
 175      CGEN_CPU_DESC cd;
 176      int opindex;
 177      const char ** strp;
 178      CGEN_FIELDS * fields;
 179 {
 180   const char * errmsg = NULL;
 181   /* Used by scalar operands that still need to be parsed.  */
 182   long junk;
 183
 184   switch (opindex)
 185     {
 186     case FR30_OPERAND_CRI :
 187       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRi);
 188       break;
 189     case FR30_OPERAND_CRJ :
 190       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRj);
 191       break;
 192     case FR30_OPERAND_R13 :
 193       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r13, & junk);
 194       break;
 195     case FR30_OPERAND_R14 :
 196       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r14, & junk);
 197       break;
 198     case FR30_OPERAND_R15 :
 199       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r15, & junk);
 200       break;
 201     case FR30_OPERAND_RI :
 202       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ri);
 203       break;
 204     case FR30_OPERAND_RIC :
 205       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ric);
 206       break;
 207     case FR30_OPERAND_RJ :
 208       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rj);
 209       break;
 210     case FR30_OPERAND_RJC :
 211       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rjc);
 212       break;
 213     case FR30_OPERAND_RS1 :
 214       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs1);
 215       break;
 216     case FR30_OPERAND_RS2 :
 217       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2);
 218       break;
 219     case FR30_OPERAND_CC :
 220       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc);
 221       break;
 222     case FR30_OPERAND_CCC :
 223       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc);
 224       break;
 225     case FR30_OPERAND_DIR10 :
 226       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10);
 227       break;
 228     case FR30_OPERAND_DIR8 :
 229       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8);
 230       break;
 231     case FR30_OPERAND_DIR9 :
 232       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9);
 233       break;
 234     case FR30_OPERAND_DISP10 :
 235       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10);
 236       break;
 237     case FR30_OPERAND_DISP8 :
 238       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8);
 239       break;
 240     case FR30_OPERAND_DISP9 :
 241       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9);
 242       break;
 243     case FR30_OPERAND_I20 :
 244       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20);
 245       break;
 246     case FR30_OPERAND_I32 :
 247       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32);
 248       break;
 249     case FR30_OPERAND_I8 :
 250       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8);
 251       break;
 252     case FR30_OPERAND_LABEL12 :
 253       {
 254         bfd_vma value;
 255         errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL,  & value);
 256         fields->f_rel12 = value;
 257       }
 258       break;
 259     case FR30_OPERAND_LABEL9 :
 260       {
 261         bfd_vma value;
 262         errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL,  & value);
 263         fields->f_rel9 = value;
 264       }
 265       break;
 266     case FR30_OPERAND_M4 :
 267       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4);
 268       break;
 269     case FR30_OPERAND_PS :
 270       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & junk);
 271       break;
 272     case FR30_OPERAND_REGLIST_HI_LD :
 273       errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld);
 274       break;
 275     case FR30_OPERAND_REGLIST_HI_ST :
 276       errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st);
 277       break;
 278     case FR30_OPERAND_REGLIST_LOW_LD :
 279       errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld);
 280       break;
 281     case FR30_OPERAND_REGLIST_LOW_ST :
 282       errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st);
 283       break;
 284     case FR30_OPERAND_S10 :
 285       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10);
 286       break;
 287     case FR30_OPERAND_U10 :
 288       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10);
 289       break;
 290     case FR30_OPERAND_U4 :
 291       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4);
 292       break;
 293     case FR30_OPERAND_U4C :
 294       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c);
 295       break;
 296     case FR30_OPERAND_U8 :
 297       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8);
 298       break;
 299     case FR30_OPERAND_UDISP6 :
 300       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6);
 301       break;
 302
 303     default :
 304       /* xgettext:c-format */
 305       fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
 306       abort ();
 307   }
 308
 309   return errmsg;
 310 }
 311
 312 cgen_parse_fn * const fr30_cgen_parse_handlers[] =
 313 {
 314   parse_insn_normal,
 315 };
 316
 317 void
 318 fr30_cgen_init_asm (cd)
 319      CGEN_CPU_DESC cd;
 320 {
 321   fr30_cgen_init_opcode_table (cd);
 322   fr30_cgen_init_ibld_table (cd);
 323   cd->parse_handlers = & fr30_cgen_parse_handlers[0];
 324   cd->parse_operand = fr30_cgen_parse_operand;
 325 }
 326
 327 \f
 328 /* Default insn parser.
 329
 330    The syntax string is scanned and operands are parsed and stored in FIELDS.
 331    Relocs are queued as we go via other callbacks.
 332
 333    ??? Note that this is currently an all-or-nothing parser.  If we fail to
 334    parse the instruction, we return 0 and the caller will start over from
 335    the beginning.  Backtracking will be necessary in parsing subexpressions,
 336    but that can be handled there.  Not handling backtracking here may get
 337    expensive in the case of the m68k.  Deal with later.
 338
 339    Returns NULL for success, an error message for failure.
 340 */
 341
 342 static const char *
 343 parse_insn_normal (cd, insn, strp, fields)
 344      CGEN_CPU_DESC cd;
 345      const CGEN_INSN *insn;
 346      const char **strp;
 347      CGEN_FIELDS *fields;
 348 {
 349   /* ??? Runtime added insns not handled yet.  */
 350   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 351   const char *str = *strp;
 352   const char *errmsg;
 353   const char *p;
 354   const CGEN_SYNTAX_CHAR_TYPE * syn;
 355 #ifdef CGEN_MNEMONIC_OPERANDS
 356   /* FIXME: wip */
 357   int past_opcode_p;
 358 #endif
 359
 360   /* For now we assume the mnemonic is first (there are no leading operands).
 361      We can parse it without needing to set up operand parsing.
 362      GAS's input scrubber will ensure mnemonics are lowercase, but we may
 363      not be called from GAS.  */
 364   p = CGEN_INSN_MNEMONIC (insn);
 365   while (*p && tolower (*p) == tolower (*str))
 366     ++p, ++str;
 367
 368   if (* p)
 369     return _("unrecognized instruction");
 370
 371 #ifndef CGEN_MNEMONIC_OPERANDS
 372   if (* str && !isspace (* str))
 373     return _("unrecognized instruction");
 374 #endif
 375
 376   CGEN_INIT_PARSE (cd);
 377   cgen_init_parse_operand (cd);
 378 #ifdef CGEN_MNEMONIC_OPERANDS
 379   past_opcode_p = 0;
 380 #endif
 381
 382   /* We don't check for (*str != '\0') here because we want to parse
 383      any trailing fake arguments in the syntax string.  */
 384   syn = CGEN_SYNTAX_STRING (syntax);
 385
 386   /* Mnemonics come first for now, ensure valid string.  */
 387   if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
 388     abort ();
 389
 390   ++syn;
 391
 392   while (* syn != 0)
 393     {
 394       /* Non operand chars must match exactly.  */
 395       if (CGEN_SYNTAX_CHAR_P (* syn))
 396         {
 397           /* FIXME: While we allow for non-GAS callers above, we assume the
 398              first char after the mnemonic part is a space.  */
 399           /* FIXME: We also take inappropriate advantage of the fact that
 400              GAS's input scrubber will remove extraneous blanks.  */
 401           if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn)))
 402             {
 403 #ifdef CGEN_MNEMONIC_OPERANDS
 404               if (CGEN_SYNTAX_CHAR(* syn) == ' ')
 405                 past_opcode_p = 1;
 406 #endif
 407               ++ syn;
 408               ++ str;
 409             }
 410           else if (*str)
 411             {
 412               /* Syntax char didn't match.  Can't be this insn.  */
 413               static char msg [80];
 414               /* xgettext:c-format */
 415               sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
 416                        CGEN_SYNTAX_CHAR(*syn), *str);
 417               return msg;
 418             }
 419           else
 420             {
 421               /* Ran out of input.  */
 422               static char msg [80];
 423               /* xgettext:c-format */
 424               sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
 425                        CGEN_SYNTAX_CHAR(*syn));
 426               return msg;
 427             }
 428           continue;
 429         }
 430
 431       /* We have an operand of some sort.  */
 432       errmsg = fr30_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
 433                                           &str, fields);
 434       if (errmsg)
 435         return errmsg;
 436
 437       /* Done with this operand, continue with next one.  */
 438       ++ syn;
 439     }
 440
 441   /* If we're at the end of the syntax string, we're done.  */
 442   if (* syn == 0)
 443     {
 444       /* FIXME: For the moment we assume a valid `str' can only contain
 445          blanks now.  IE: We needn't try again with a longer version of
 446          the insn and it is assumed that longer versions of insns appear
 447          before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
 448       while (isspace (* str))
 449         ++ str;
 450
 451       if (* str != '\0')
 452         return _("junk at end of line"); /* FIXME: would like to include `str' */
 453
 454       return NULL;
 455     }
 456
 457   /* We couldn't parse it.  */
 458   return _("unrecognized instruction");
 459 }
 460 \f
 461 /* Main entry point.
 462    This routine is called for each instruction to be assembled.
 463    STR points to the insn to be assembled.
 464    We assume all necessary tables have been initialized.
 465    The assembled instruction, less any fixups, is stored in BUF.
 466    Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
 467    still needs to be converted to target byte order, otherwise BUF is an array
 468    of bytes in target byte order.
 469    The result is a pointer to the insn's entry in the opcode table,
 470    or NULL if an error occured (an error message will have already been
 471    printed).
 472
 473    Note that when processing (non-alias) macro-insns,
 474    this function recurses.
 475
 476    ??? It's possible to make this cpu-independent.
 477    One would have to deal with a few minor things.
 478    At this point in time doing so would be more of a curiosity than useful
 479    [for example this file isn't _that_ big], but keeping the possibility in
 480    mind helps keep the design clean.  */
 481
 482 const CGEN_INSN *
 483 fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg)
 484      CGEN_CPU_DESC cd;
 485      const char *str;
 486      CGEN_FIELDS *fields;
 487      CGEN_INSN_BYTES_PTR buf;
 488      char **errmsg;
 489 {
 490   const char *start;
 491   CGEN_INSN_LIST *ilist;
 492   const char *parse_errmsg = NULL;
 493   const char *insert_errmsg = NULL;
 494
 495   /* Skip leading white space.  */
 496   while (isspace (* str))
 497     ++ str;
 498
 499   /* The instructions are stored in hashed lists.
 500      Get the first in the list.  */
 501   ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
 502
 503   /* Keep looking until we find a match.  */
 504
 505   start = str;
 506   for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
 507     {
 508       const CGEN_INSN *insn = ilist->insn;
 509
 510 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 511       /* not usually needed as unsupported opcodes shouldn't be in the hash lists */
 512       /* Is this insn supported by the selected cpu?  */
 513       if (! fr30_cgen_insn_supported (cd, insn))
 514         continue;
 515 #endif
 516
 517       /* If the RELAX attribute is set, this is an insn that shouldn't be
 518          chosen immediately.  Instead, it is used during assembler/linker
 519          relaxation if possible.  */
 520       if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
 521         continue;
 522
 523       str = start;
 524
 525       /* Allow parse/insert handlers to obtain length of insn.  */
 526       CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 527
 528       parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
 529       if (parse_errmsg != NULL)
 530         continue;
 531
 532       /* ??? 0 is passed for `pc' */
 533       insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
 534                                                  (bfd_vma) 0);
 535       if (insert_errmsg != NULL)
 536         continue;
 537
 538       /* It is up to the caller to actually output the insn and any
 539          queued relocs.  */
 540       return insn;
 541     }
 542
 543   {
 544     static char errbuf[150];
 545     const char *tmp_errmsg;
 546
 547 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
 548     /* If requesting verbose error messages, use insert_errmsg.
 549        Failing that, use parse_errmsg */
 550     tmp_errmsg = (insert_errmsg ? insert_errmsg :
 551                   parse_errmsg ? parse_errmsg :
 552                   _("unrecognized instruction"));
 553
 554     if (strlen (start) > 50)
 555       /* xgettext:c-format */
 556       sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
 557     else
 558       /* xgettext:c-format */
 559       sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
 560 #else
 561     if (strlen (start) > 50)
 562       /* xgettext:c-format */
 563       sprintf (errbuf, _("bad instruction `%.50s...'"), start);
 564     else
 565       /* xgettext:c-format */
 566       sprintf (errbuf, _("bad instruction `%.50s'"), start);
 567 #endif
 568
 569     *errmsg = errbuf;
 570     return NULL;
 571   }
 572 }
 573 \f
 574 #if 0 /* This calls back to GAS which we can't do without care.  */
 575
 576 /* Record each member of OPVALS in the assembler's symbol table.
 577    This lets GAS parse registers for us.
 578    ??? Interesting idea but not currently used.  */
 579
 580 /* Record each member of OPVALS in the assembler's symbol table.
 581    FIXME: Not currently used.  */
 582
 583 void
 584 fr30_cgen_asm_hash_keywords (cd, opvals)
 585      CGEN_CPU_DESC cd;
 586      CGEN_KEYWORD *opvals;
 587 {
 588   CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
 589   const CGEN_KEYWORD_ENTRY * ke;
 590
 591   while ((ke = cgen_keyword_search_next (& search)) != NULL)
 592     {
 593 #if 0 /* Unnecessary, should be done in the search routine.  */
 594       if (! fr30_cgen_opval_supported (ke))
 595         continue;
 596 #endif
 597       cgen_asm_record_register (cd, ke->name, ke->value);
 598     }
 599 }
 600
 601 #endif /* 0 */