* elf64-alpha.c (elf64_alpha_relocate_section): Soft fail
[binutils.git] / gas / config / tc-openrisc.c
blob1aae4b4bf8283845fd172c2a5766bff69b762d4c
1 /* tc-openrisc.c -- Assembler for the OpenRISC family.
2 Copyright (C) 2001 Free Software Foundation.
3 Contributed by Johan Rydberg, jrydberg@opencores.org
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <stdio.h>
23 #include <ctype.h>
24 #include "as.h"
25 #include "subsegs.h"
26 #include "symcat.h"
27 #include "opcodes/openrisc-desc.h"
28 #include "opcodes/openrisc-opc.h"
29 #include "cgen.h"
31 /* Structure to hold all of the different components describing
32 an individual instruction. */
33 typedef struct openrisc_insn openrisc_insn;
35 struct openrisc_insn
37 const CGEN_INSN * insn;
38 const CGEN_INSN * orig_insn;
39 CGEN_FIELDS fields;
40 #if CGEN_INT_INSN_P
41 CGEN_INSN_INT buffer [1];
42 #define INSN_VALUE(buf) (*(buf))
43 #else
44 unsigned char buffer [CGEN_MAX_INSN_SIZE];
45 #define INSN_VALUE(buf) (buf)
46 #endif
47 char * addr;
48 fragS * frag;
49 int num_fixups;
50 fixS * fixups [GAS_CGEN_MAX_FIXUPS];
51 int indices [MAX_OPERAND_INSTANCES];
55 const char comment_chars[] = "#";
56 const char line_comment_chars[] = "#";
57 const char line_separator_chars[] = ";";
58 const char EXP_CHARS[] = "eE";
59 const char FLT_CHARS[] = "dD";
62 #define OPENRISC_SHORTOPTS "m:"
63 const char * md_shortopts = OPENRISC_SHORTOPTS;
65 struct option md_longopts[] =
67 {NULL, no_argument, NULL, 0}
69 size_t md_longopts_size = sizeof (md_longopts);
71 unsigned long openrisc_machine = 0; /* default */
73 int
74 md_parse_option (c, arg)
75 int c ATTRIBUTE_UNUSED;
76 char * arg ATTRIBUTE_UNUSED;
78 return 0;
81 void
82 md_show_usage (stream)
83 FILE * stream ATTRIBUTE_UNUSED;
87 static void
88 ignore_pseudo (val)
89 int val ATTRIBUTE_UNUSED;
91 discard_rest_of_line ();
94 const char openrisc_comment_chars [] = ";#";
96 /* The target specific pseudo-ops which we support. */
97 const pseudo_typeS md_pseudo_table[] =
99 { "word", cons, 4 },
100 { "proc", ignore_pseudo, 0 },
101 { "endproc", ignore_pseudo, 0 },
102 { NULL, NULL, 0 }
107 void
108 md_begin ()
110 /* Initialize the `cgen' interface. */
112 /* Set the machine number and endian. */
113 gas_cgen_cpu_desc = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
114 CGEN_CPU_OPEN_ENDIAN,
115 CGEN_ENDIAN_BIG,
116 CGEN_CPU_OPEN_END);
117 openrisc_cgen_init_asm (gas_cgen_cpu_desc);
119 /* This is a callback from cgen to gas to parse operands. */
120 cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
123 void
124 md_assemble (str)
125 char * str;
127 static int last_insn_had_delay_slot = 0;
128 openrisc_insn insn;
129 char * errmsg;
131 /* Initialize GAS's cgen interface for a new instruction. */
132 gas_cgen_init_parse ();
134 insn.insn = openrisc_cgen_assemble_insn
135 (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
137 if (!insn.insn)
139 as_bad (errmsg);
140 return;
143 /* Doesn't really matter what we pass for RELAX_P here. */
144 gas_cgen_finish_insn (insn.insn, insn.buffer,
145 CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
147 #if 0 /* Currently disabled */
148 /* Warn about invalid insns in delay slots. */
149 if (last_insn_had_delay_slot
150 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_NOT_IN_DELAY_SLOT))
151 as_warn (_("Instruction %s not allowed in a delay slot."),
152 CGEN_INSN_NAME (insn.insn));
153 #endif
155 last_insn_had_delay_slot
156 = CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
160 /* The syntax in the manual says constants begin with '#'.
161 We just ignore it. */
163 void
164 md_operand (expressionP)
165 expressionS * expressionP;
167 if (* input_line_pointer == '#')
169 input_line_pointer ++;
170 expression (expressionP);
174 valueT
175 md_section_align (segment, size)
176 segT segment;
177 valueT size;
179 int align = bfd_get_section_alignment (stdoutput, segment);
180 return ((size + (1 << align) - 1) & (-1 << align));
183 symbolS *
184 md_undefined_symbol (name)
185 char * name ATTRIBUTE_UNUSED;
187 return 0;
191 /* Interface to relax_segment. */
193 /* FIXME: Look through this. */
195 const relax_typeS md_relax_table[] =
197 /* The fields are:
198 1) most positive reach of this state,
199 2) most negative reach of this state,
200 3) how many bytes this mode will add to the size of the current frag
201 4) which index into the table to try if we can't fit into this one. */
203 /* The first entry must be unused because an `rlx_more' value of zero ends
204 each list. */
205 {1, 1, 0, 0},
207 /* The displacement used by GAS is from the end of the 2 byte insn,
208 so we subtract 2 from the following. */
209 /* 16 bit insn, 8 bit disp -> 10 bit range.
210 This doesn't handle a branch in the right slot at the border:
211 the "& -4" isn't taken into account. It's not important enough to
212 complicate things over it, so we subtract an extra 2 (or + 2 in -ve
213 case). */
214 {511 - 2 - 2, -512 - 2 + 2, 0, 2 },
215 /* 32 bit insn, 24 bit disp -> 26 bit range. */
216 {0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
217 /* Same thing, but with leading nop for alignment. */
218 {0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
221 long
222 openrisc_relax_frag (segment, fragP, stretch)
223 segT segment;
224 fragS * fragP;
225 long stretch;
227 /* Address of branch insn. */
228 long address = fragP->fr_address + fragP->fr_fix - 2;
229 long growth = 0;
231 /* Keep 32 bit insns aligned on 32 bit boundaries. */
232 if (fragP->fr_subtype == 2)
234 if ((address & 3) != 0)
236 fragP->fr_subtype = 3;
237 growth = 2;
240 else if (fragP->fr_subtype == 3)
242 if ((address & 3) == 0)
244 fragP->fr_subtype = 2;
245 growth = -2;
248 else
250 growth = relax_frag (segment, fragP, stretch);
252 /* Long jump on odd halfword boundary? */
253 if (fragP->fr_subtype == 2 && (address & 3) != 0)
255 fragP->fr_subtype = 3;
256 growth += 2;
260 return growth;
264 /* Return an initial guess of the length by which a fragment must grow to
265 hold a branch to reach its destination.
266 Also updates fr_type/fr_subtype as necessary.
268 Called just before doing relaxation.
269 Any symbol that is now undefined will not become defined.
270 The guess for fr_var is ACTUALLY the growth beyond fr_fix.
271 Whatever we do to grow fr_fix or fr_var contributes to our returned value.
272 Although it may not be explicit in the frag, pretend fr_var starts with a
273 0 value. */
276 md_estimate_size_before_relax (fragP, segment)
277 fragS * fragP;
278 segT segment;
280 /* The only thing we have to handle here are symbols outside of the
281 current segment. They may be undefined or in a different segment in
282 which case linker scripts may place them anywhere.
283 However, we can't finish the fragment here and emit the reloc as insn
284 alignment requirements may move the insn about. */
286 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
288 /* The symbol is undefined in this segment.
289 Change the relaxation subtype to the max allowable and leave
290 all further handling to md_convert_frag. */
291 fragP->fr_subtype = 2;
294 const CGEN_INSN * insn;
295 int i;
297 /* Update the recorded insn.
298 Fortunately we don't have to look very far.
299 FIXME: Change this to record in the instruction the next higher
300 relaxable insn to use. */
301 for (i = 0, insn = fragP->fr_cgen.insn; i < 4; i++, insn++)
303 if ((strcmp (CGEN_INSN_MNEMONIC (insn),
304 CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
305 == 0)
306 && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
307 break;
309 if (i == 4)
310 abort ();
312 fragP->fr_cgen.insn = insn;
313 return 2;
317 return md_relax_table[fragP->fr_subtype].rlx_length;
320 /* *fragP has been relaxed to its final size, and now needs to have
321 the bytes inside it modified to conform to the new size.
323 Called after relaxation is finished.
324 fragP->fr_type == rs_machine_dependent.
325 fragP->fr_subtype is the subtype of what the address relaxed to. */
327 void
328 md_convert_frag (abfd, sec, fragP)
329 bfd * abfd ATTRIBUTE_UNUSED;
330 segT sec ATTRIBUTE_UNUSED;
331 fragS * fragP ATTRIBUTE_UNUSED;
333 /* FIXME */
337 /* Functions concerning relocs. */
339 /* The location from which a PC relative jump should be calculated,
340 given a PC relative reloc. */
342 long
343 md_pcrel_from_section (fixP, sec)
344 fixS * fixP;
345 segT sec;
347 if (fixP->fx_addsy != (symbolS *) NULL
348 && (! S_IS_DEFINED (fixP->fx_addsy)
349 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
351 /* The symbol is undefined (or is defined but not in this section).
352 Let the linker figure it out. */
353 return 0;
356 return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
360 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
361 Returns BFD_RELOC_NONE if no reloc type can be found.
362 *FIXP may be modified if desired. */
364 bfd_reloc_code_real_type
365 md_cgen_lookup_reloc (insn, operand, fixP)
366 const CGEN_INSN * insn ATTRIBUTE_UNUSED;
367 const CGEN_OPERAND * operand;
368 fixS * fixP;
370 bfd_reloc_code_real_type type;
372 switch (operand->type)
374 case OPENRISC_OPERAND_ABS_26:
375 fixP->fx_pcrel = 0;
376 type = BFD_RELOC_OPENRISC_ABS_26;
377 goto emit;
378 case OPENRISC_OPERAND_DISP_26:
379 fixP->fx_pcrel = 1;
380 type = BFD_RELOC_OPENRISC_REL_26;
381 goto emit;
383 case OPENRISC_OPERAND_HI16:
384 type = BFD_RELOC_HI16;
385 goto emit;
387 case OPENRISC_OPERAND_LO16:
388 type = BFD_RELOC_LO16;
389 goto emit;
391 emit:
392 return type;
394 default : /* avoid -Wall warning */
395 break;
398 return BFD_RELOC_NONE;
401 /* See whether we need to force a relocation into the output file.
402 This is used to force out switch and PC relative relocations when
403 relaxing. */
406 openrisc_force_relocation (fix)
407 fixS * fix ATTRIBUTE_UNUSED;
409 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
410 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
411 return 1;
413 return 0;
418 /* Write a value out to the object file, using the appropriate endianness. */
420 void
421 md_number_to_chars (buf, val, n)
422 char * buf;
423 valueT val;
424 int n;
426 number_to_chars_bigendian (buf, val, n);
429 /* Turn a string in input_line_pointer into a floating point constant of type
430 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
431 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
434 /* Equal to MAX_PRECISION in atof-ieee.c */
435 #define MAX_LITTLENUMS 6
437 char *
438 md_atof (type, litP, sizeP)
439 char type;
440 char * litP;
441 int * sizeP;
443 int i;
444 int prec;
445 LITTLENUM_TYPE words [MAX_LITTLENUMS];
446 char * t;
447 char * atof_ieee ();
449 switch (type)
451 case 'f':
452 case 'F':
453 case 's':
454 case 'S':
455 prec = 2;
456 break;
458 case 'd':
459 case 'D':
460 case 'r':
461 case 'R':
462 prec = 4;
463 break;
465 /* FIXME: Some targets allow other format chars for bigger sizes here. */
467 default:
468 * sizeP = 0;
469 return _("Bad call to md_atof()");
472 t = atof_ieee (input_line_pointer, type, words);
473 if (t)
474 input_line_pointer = t;
475 * sizeP = prec * sizeof (LITTLENUM_TYPE);
477 for (i = 0; i < prec; i++)
479 md_number_to_chars (litP, (valueT) words[i],
480 sizeof (LITTLENUM_TYPE));
481 litP += sizeof (LITTLENUM_TYPE);
484 return 0;
487 boolean
488 openrisc_fix_adjustable (fixP)
489 fixS * fixP;
491 if (fixP->fx_addsy == NULL)
492 return 1;
494 /* We need the symbol name for the VTABLE entries */
495 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
496 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
497 return 0;
499 return 1;