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* config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
[binutils.git] / gas / config / tc-avr.c
blob41eb6acf7440da5fa384522c3e5f633b9915862a
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27
28 struct avr_opcodes_s
29 {
30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
35 };
36
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
39
40 struct avr_opcodes_s avr_opcodes[] =
41 {
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44 };
45
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
49
50 const char *md_shortopts = "m:";
51 struct mcu_type_s
52 {
53 char *name;
54 int isa;
55 int mach;
56 };
57
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
62 static struct mcu_type_s mcu_types[] =
63 {
64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
72 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
83 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
85 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
89 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
101 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
102 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
103 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
104 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
105 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
106 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
107 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
108 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
109 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
110 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
111 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
112 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
113 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
114 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
115 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
116 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
117 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
118 {"atmega164p", AVR_ISA_M323, bfd_mach_avr5},
119 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
120 {"atmega165p", AVR_ISA_M323, bfd_mach_avr5},
121 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
122 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
123 {"atmega169p", AVR_ISA_M323, bfd_mach_avr5},
124 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
125 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
126 {"atmega324p", AVR_ISA_M323, bfd_mach_avr5},
127 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
129 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
132 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
134 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
135 {"atmega644p", AVR_ISA_M323, bfd_mach_avr5},
136 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
137 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
138 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
139 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
140 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
141 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
142 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
143 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
144 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
145 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
146 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
147 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
148 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
149 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
150 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
151 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
152 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
153 {NULL, 0, 0}
154 };
155
156 /* Current MCU type. */
157 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
158 static struct mcu_type_s * avr_mcu = & default_mcu;
159
160 /* AVR target-specific switches. */
161 struct avr_opt_s
162 {
163 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
164 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
165 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
166 };
167
168 static struct avr_opt_s avr_opt = { 0, 0, 0 };
169
170 const char EXP_CHARS[] = "eE";
171 const char FLT_CHARS[] = "dD";
172
173 static void avr_set_arch (int);
174
175 /* The target specific pseudo-ops which we support. */
176 const pseudo_typeS md_pseudo_table[] =
177 {
178 {"arch", avr_set_arch, 0},
179 { NULL, NULL, 0}
180 };
181
182 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
183
184 #define EXP_MOD_NAME(i) exp_mod[i].name
185 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
186 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
187 #define HAVE_PM_P(i) exp_mod[i].have_pm
188
189 struct exp_mod_s
190 {
191 char * name;
192 bfd_reloc_code_real_type reloc;
193 bfd_reloc_code_real_type neg_reloc;
194 int have_pm;
195 };
196
197 static struct exp_mod_s exp_mod[] =
198 {
199 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
200 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
201 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
202 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
203 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
204 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
205 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
206 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
207 };
208
209 /* A union used to store indicies into the exp_mod[] array
210 in a hash table which expects void * data types. */
211 typedef union
212 {
213 void * ptr;
214 int index;
215 } mod_index;
216
217 /* Opcode hash table. */
218 static struct hash_control *avr_hash;
219
220 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
221 static struct hash_control *avr_mod_hash;
222
223 #define OPTION_MMCU 'm'
224 enum options
225 {
226 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
227 OPTION_NO_SKIP_BUG,
228 OPTION_NO_WRAP
229 };
230
231 struct option md_longopts[] =
232 {
233 { "mmcu", required_argument, NULL, OPTION_MMCU },
234 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
235 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
236 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
237 { NULL, no_argument, NULL, 0 }
238 };
239
240 size_t md_longopts_size = sizeof (md_longopts);
241
242 /* Display nicely formatted list of known MCU names. */
243
244 static void
245 show_mcu_list (FILE *stream)
246 {
247 int i, x;
248
249 fprintf (stream, _("Known MCU names:"));
250 x = 1000;
251
252 for (i = 0; mcu_types[i].name; i++)
253 {
254 int len = strlen (mcu_types[i].name);
255
256 x += len + 1;
257
258 if (x < 75)
259 fprintf (stream, " %s", mcu_types[i].name);
260 else
261 {
262 fprintf (stream, "\n %s", mcu_types[i].name);
263 x = len + 2;
264 }
265 }
266
267 fprintf (stream, "\n");
268 }
269
270 static inline char *
271 skip_space (char *s)
272 {
273 while (*s == ' ' || *s == '\t')
274 ++s;
275 return s;
276 }
277
278 /* Extract one word from FROM and copy it to TO. */
279
280 static char *
281 extract_word (char *from, char *to, int limit)
282 {
283 char *op_start;
284 char *op_end;
285 int size = 0;
286
287 /* Drop leading whitespace. */
288 from = skip_space (from);
289 *to = 0;
290
291 /* Find the op code end. */
292 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
293 {
294 to[size++] = *op_end++;
295 if (size + 1 >= limit)
296 break;
297 }
298
299 to[size] = 0;
300 return op_end;
301 }
302
303 int
304 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
305 asection *seg ATTRIBUTE_UNUSED)
306 {
307 abort ();
308 return 0;
309 }
310
311 void
312 md_show_usage (FILE *stream)
313 {
314 fprintf (stream,
315 _("AVR options:\n"
316 " -mmcu=[avr-name] select microcontroller variant\n"
317 " [avr-name] can be:\n"
318 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
319 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
320 " avr3 - ATmega103, ATmega603\n"
321 " avr4 - ATmega83, ATmega85\n"
322 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
323 " or immediate microcontroller name.\n"));
324 fprintf (stream,
325 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
326 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
327 " (default for avr4, avr5)\n"
328 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
329 " (default for avr3, avr5)\n"));
330 show_mcu_list (stream);
331 }
332
333 static void
334 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
335 {
336 char str[20];
337
338 input_line_pointer = extract_word (input_line_pointer, str, 20);
339 md_parse_option (OPTION_MMCU, str);
340 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
341 }
342
343 int
344 md_parse_option (int c, char *arg)
345 {
346 switch (c)
347 {
348 case OPTION_MMCU:
349 {
350 int i;
351 char *s = alloca (strlen (arg) + 1);
352
353 {
354 char *t = s;
355 char *arg1 = arg;
356
357 do
358 *t = TOLOWER (*arg1++);
359 while (*t++);
360 }
361
362 for (i = 0; mcu_types[i].name; ++i)
363 if (strcmp (mcu_types[i].name, s) == 0)
364 break;
365
366 if (!mcu_types[i].name)
367 {
368 show_mcu_list (stderr);
369 as_fatal (_("unknown MCU: %s\n"), arg);
370 }
371
372 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
373 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
374 as .arch ... in the asm output at the same time. */
375 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
376 avr_mcu = &mcu_types[i];
377 else
378 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
379 avr_mcu->name, mcu_types[i].name);
380 return 1;
381 }
382 case OPTION_ALL_OPCODES:
383 avr_opt.all_opcodes = 1;
384 return 1;
385 case OPTION_NO_SKIP_BUG:
386 avr_opt.no_skip_bug = 1;
387 return 1;
388 case OPTION_NO_WRAP:
389 avr_opt.no_wrap = 1;
390 return 1;
391 }
392
393 return 0;
394 }
395
396 symbolS *
397 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
398 {
399 return NULL;
400 }
401
402 /* Turn a string in input_line_pointer into a floating point constant
403 of type TYPE, and store the appropriate bytes in *LITP. The number
404 of LITTLENUMS emitted is stored in *SIZEP. An error message is
405 returned, or NULL on OK. */
406
407 char *
408 md_atof (int type, char *litP, int *sizeP)
409 {
410 int prec;
411 LITTLENUM_TYPE words[4];
412 LITTLENUM_TYPE *wordP;
413 char *t;
414
415 switch (type)
416 {
417 case 'f':
418 prec = 2;
419 break;
420 case 'd':
421 prec = 4;
422 break;
423 default:
424 *sizeP = 0;
425 return _("bad call to md_atof");
426 }
427
428 t = atof_ieee (input_line_pointer, type, words);
429 if (t)
430 input_line_pointer = t;
431
432 *sizeP = prec * sizeof (LITTLENUM_TYPE);
433
434 /* This loop outputs the LITTLENUMs in REVERSE order. */
435 for (wordP = words + prec - 1; prec--;)
436 {
437 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
438 litP += sizeof (LITTLENUM_TYPE);
439 }
440
441 return NULL;
442 }
443
444 void
445 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
446 asection *sec ATTRIBUTE_UNUSED,
447 fragS *fragP ATTRIBUTE_UNUSED)
448 {
449 abort ();
450 }
451
452 void
453 md_begin (void)
454 {
455 unsigned int i;
456 struct avr_opcodes_s *opcode;
457
458 avr_hash = hash_new ();
459
460 /* Insert unique names into hash table. This hash table then provides a
461 quick index to the first opcode with a particular name in the opcode
462 table. */
463 for (opcode = avr_opcodes; opcode->name; opcode++)
464 hash_insert (avr_hash, opcode->name, (char *) opcode);
465
466 avr_mod_hash = hash_new ();
467
468 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
469 {
470 mod_index m;
471
472 m.index = i + 10;
473 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
474 }
475
476 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
477 }
478
479 /* Resolve STR as a constant expression and return the result.
480 If result greater than MAX then error. */
481
482 static unsigned int
483 avr_get_constant (char *str, int max)
484 {
485 expressionS ex;
486
487 str = skip_space (str);
488 input_line_pointer = str;
489 expression (& ex);
490
491 if (ex.X_op != O_constant)
492 as_bad (_("constant value required"));
493
494 if (ex.X_add_number > max || ex.X_add_number < 0)
495 as_bad (_("number must be less than %d"), max + 1);
496
497 return ex.X_add_number;
498 }
499
500 /* Parse for ldd/std offset. */
501
502 static void
503 avr_offset_expression (expressionS *exp)
504 {
505 char *str = input_line_pointer;
506 char *tmp;
507 char op[8];
508
509 tmp = str;
510 str = extract_word (str, op, sizeof (op));
511
512 input_line_pointer = tmp;
513 expression (exp);
514
515 /* Warn about expressions that fail to use lo8 (). */
516 if (exp->X_op == O_constant)
517 {
518 int x = exp->X_add_number;
519
520 if (x < -255 || x > 255)
521 as_warn (_("constant out of 8-bit range: %d"), x);
522 }
523 }
524
525 /* Parse ordinary expression. */
526
527 static char *
528 parse_exp (char *s, expressionS *op)
529 {
530 input_line_pointer = s;
531 expression (op);
532 if (op->X_op == O_absent)
533 as_bad (_("missing operand"));
534 return input_line_pointer;
535 }
536
537 /* Parse special expressions (needed for LDI command):
538 xx8 (address)
539 xx8 (-address)
540 pm_xx8 (address)
541 pm_xx8 (-address)
542 where xx is: hh, hi, lo. */
543
544 static bfd_reloc_code_real_type
545 avr_ldi_expression (expressionS *exp)
546 {
547 char *str = input_line_pointer;
548 char *tmp;
549 char op[8];
550 int mod;
551 int linker_stubs_should_be_generated = 0;
552
553 tmp = str;
554
555 str = extract_word (str, op, sizeof (op));
556
557 if (op[0])
558 {
559 mod_index m;
560
561 m.ptr = hash_find (avr_mod_hash, op);
562 mod = m.index;
563
564 if (mod)
565 {
566 int closes = 0;
567
568 mod -= 10;
569 str = skip_space (str);
570
571 if (*str == '(')
572 {
573 bfd_reloc_code_real_type reloc_to_return;
574 int neg_p = 0;
575
576 ++str;
577
578 if (strncmp ("pm(", str, 3) == 0
579 || strncmp ("gs(",str,3) == 0
580 || strncmp ("-(gs(",str,5) == 0
581 || strncmp ("-(pm(", str, 5) == 0)
582 {
583 if (HAVE_PM_P (mod))
584 {
585 ++mod;
586 ++closes;
587 }
588 else
589 as_bad (_("illegal expression"));
590
591 if (str[0] == 'g' || str[2] == 'g')
592 linker_stubs_should_be_generated = 1;
593
594 if (*str == '-')
595 {
596 neg_p = 1;
597 ++closes;
598 str += 5;
599 }
600 else
601 str += 3;
602 }
603
604 if (*str == '-' && *(str + 1) == '(')
605 {
606 neg_p ^= 1;
607 ++closes;
608 str += 2;
609 }
610
611 input_line_pointer = str;
612 expression (exp);
613
614 do
615 {
616 if (*input_line_pointer != ')')
617 {
618 as_bad (_("`)' required"));
619 break;
620 }
621 input_line_pointer++;
622 }
623 while (closes--);
624
625 reloc_to_return =
626 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
627 if (linker_stubs_should_be_generated)
628 {
629 switch (reloc_to_return)
630 {
631 case BFD_RELOC_AVR_LO8_LDI_PM:
632 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
633 break;
634 case BFD_RELOC_AVR_HI8_LDI_PM:
635 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
636 break;
637
638 default:
639 as_warn (_("expression dangerous with linker stubs"));
640 }
641 }
642 return reloc_to_return;
643 }
644 }
645 }
646
647 input_line_pointer = tmp;
648 expression (exp);
649
650 /* Warn about expressions that fail to use lo8 (). */
651 if (exp->X_op == O_constant)
652 {
653 int x = exp->X_add_number;
654
655 if (x < -255 || x > 255)
656 as_warn (_("constant out of 8-bit range: %d"), x);
657 }
658
659 return BFD_RELOC_AVR_LDI;
660 }
661
662 /* Parse one instruction operand.
663 Return operand bitmask. Also fixups can be generated. */
664
665 static unsigned int
666 avr_operand (struct avr_opcodes_s *opcode,
667 int where,
668 char *op,
669 char **line)
670 {
671 expressionS op_expr;
672 unsigned int op_mask = 0;
673 char *str = skip_space (*line);
674
675 switch (*op)
676 {
677 /* Any register operand. */
678 case 'w':
679 case 'd':
680 case 'r':
681 case 'a':
682 case 'v':
683 if (*str == 'r' || *str == 'R')
684 {
685 char r_name[20];
686
687 str = extract_word (str, r_name, sizeof (r_name));
688 op_mask = 0xff;
689 if (ISDIGIT (r_name[1]))
690 {
691 if (r_name[2] == '\0')
692 op_mask = r_name[1] - '0';
693 else if (r_name[1] != '0'
694 && ISDIGIT (r_name[2])
695 && r_name[3] == '\0')
696 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
697 }
698 }
699 else
700 {
701 op_mask = avr_get_constant (str, 31);
702 str = input_line_pointer;
703 }
704
705 if (op_mask <= 31)
706 {
707 switch (*op)
708 {
709 case 'a':
710 if (op_mask < 16 || op_mask > 23)
711 as_bad (_("register r16-r23 required"));
712 op_mask -= 16;
713 break;
714
715 case 'd':
716 if (op_mask < 16)
717 as_bad (_("register number above 15 required"));
718 op_mask -= 16;
719 break;
720
721 case 'v':
722 if (op_mask & 1)
723 as_bad (_("even register number required"));
724 op_mask >>= 1;
725 break;
726
727 case 'w':
728 if ((op_mask & 1) || op_mask < 24)
729 as_bad (_("register r24, r26, r28 or r30 required"));
730 op_mask = (op_mask - 24) >> 1;
731 break;
732 }
733 break;
734 }
735 as_bad (_("register name or number from 0 to 31 required"));
736 break;
737
738 case 'e':
739 {
740 char c;
741
742 if (*str == '-')
743 {
744 str = skip_space (str + 1);
745 op_mask = 0x1002;
746 }
747 c = TOLOWER (*str);
748 if (c == 'x')
749 op_mask |= 0x100c;
750 else if (c == 'y')
751 op_mask |= 0x8;
752 else if (c != 'z')
753 as_bad (_("pointer register (X, Y or Z) required"));
754
755 str = skip_space (str + 1);
756 if (*str == '+')
757 {
758 ++str;
759 if (op_mask & 2)
760 as_bad (_("cannot both predecrement and postincrement"));
761 op_mask |= 0x1001;
762 }
763
764 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
765 registers, no predecrement, no postincrement. */
766 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
767 && !(avr_mcu->isa & AVR_ISA_SRAM))
768 as_bad (_("addressing mode not supported"));
769 }
770 break;
771
772 case 'z':
773 if (*str == '-')
774 as_bad (_("can't predecrement"));
775
776 if (! (*str == 'z' || *str == 'Z'))
777 as_bad (_("pointer register Z required"));
778
779 str = skip_space (str + 1);
780
781 if (*str == '+')
782 {
783 ++str;
784 op_mask |= 1;
785 }
786 break;
787
788 case 'b':
789 {
790 char c = TOLOWER (*str++);
791
792 if (c == 'y')
793 op_mask |= 0x8;
794 else if (c != 'z')
795 as_bad (_("pointer register (Y or Z) required"));
796 str = skip_space (str);
797 if (*str++ == '+')
798 {
799 input_line_pointer = str;
800 avr_offset_expression (& op_expr);
801 str = input_line_pointer;
802 fix_new_exp (frag_now, where, 3,
803 &op_expr, FALSE, BFD_RELOC_AVR_6);
804 }
805 }
806 break;
807
808 case 'h':
809 str = parse_exp (str, &op_expr);
810 fix_new_exp (frag_now, where, opcode->insn_size * 2,
811 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
812 break;
813
814 case 'L':
815 str = parse_exp (str, &op_expr);
816 fix_new_exp (frag_now, where, opcode->insn_size * 2,
817 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
818 break;
819
820 case 'l':
821 str = parse_exp (str, &op_expr);
822 fix_new_exp (frag_now, where, opcode->insn_size * 2,
823 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
824 break;
825
826 case 'i':
827 str = parse_exp (str, &op_expr);
828 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
829 &op_expr, FALSE, BFD_RELOC_16);
830 break;
831
832 case 'M':
833 {
834 bfd_reloc_code_real_type r_type;
835
836 input_line_pointer = str;
837 r_type = avr_ldi_expression (&op_expr);
838 str = input_line_pointer;
839 fix_new_exp (frag_now, where, 3,
840 &op_expr, FALSE, r_type);
841 }
842 break;
843
844 case 'n':
845 {
846 unsigned int x;
847
848 x = ~avr_get_constant (str, 255);
849 str = input_line_pointer;
850 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
851 }
852 break;
853
854 case 'K':
855 input_line_pointer = str;
856 avr_offset_expression (& op_expr);
857 str = input_line_pointer;
858 fix_new_exp (frag_now, where, 3,
859 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
860 break;
861
862 case 'S':
863 case 's':
864 {
865 unsigned int x;
866
867 x = avr_get_constant (str, 7);
868 str = input_line_pointer;
869 if (*op == 'S')
870 x <<= 4;
871 op_mask |= x;
872 }
873 break;
874
875 case 'P':
876 {
877 unsigned int x;
878
879 x = avr_get_constant (str, 63);
880 str = input_line_pointer;
881 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
882 }
883 break;
884
885 case 'p':
886 {
887 unsigned int x;
888
889 x = avr_get_constant (str, 31);
890 str = input_line_pointer;
891 op_mask |= x << 3;
892 }
893 break;
894
895 case '?':
896 break;
897
898 default:
899 as_bad (_("unknown constraint `%c'"), *op);
900 }
901
902 *line = str;
903 return op_mask;
904 }
905
906 /* Parse instruction operands.
907 Return binary opcode. */
908
909 static unsigned int
910 avr_operands (struct avr_opcodes_s *opcode, char **line)
911 {
912 char *op = opcode->constraints;
913 unsigned int bin = opcode->bin_opcode;
914 char *frag = frag_more (opcode->insn_size * 2);
915 char *str = *line;
916 int where = frag - frag_now->fr_literal;
917 static unsigned int prev = 0; /* Previous opcode. */
918
919 /* Opcode have operands. */
920 if (*op)
921 {
922 unsigned int reg1 = 0;
923 unsigned int reg2 = 0;
924 int reg1_present = 0;
925 int reg2_present = 0;
926
927 /* Parse first operand. */
928 if (REGISTER_P (*op))
929 reg1_present = 1;
930 reg1 = avr_operand (opcode, where, op, &str);
931 ++op;
932
933 /* Parse second operand. */
934 if (*op)
935 {
936 if (*op == ',')
937 ++op;
938
939 if (*op == '=')
940 {
941 reg2 = reg1;
942 reg2_present = 1;
943 }
944 else
945 {
946 if (REGISTER_P (*op))
947 reg2_present = 1;
948
949 str = skip_space (str);
950 if (*str++ != ',')
951 as_bad (_("`,' required"));
952 str = skip_space (str);
953
954 reg2 = avr_operand (opcode, where, op, &str);
955 }
956
957 if (reg1_present && reg2_present)
958 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
959 else if (reg2_present)
960 reg2 <<= 4;
961 }
962 if (reg1_present)
963 reg1 <<= 4;
964 bin |= reg1 | reg2;
965 }
966
967 /* Detect undefined combinations (like ld r31,Z+). */
968 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
969 as_warn (_("undefined combination of operands"));
970
971 if (opcode->insn_size == 2)
972 {
973 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
974 (AVR core bug, fixed in the newer devices). */
975 if (!(avr_opt.no_skip_bug ||
976 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
977 && AVR_SKIP_P (prev))
978 as_warn (_("skipping two-word instruction"));
979
980 bfd_putl32 ((bfd_vma) bin, frag);
981 }
982 else
983 bfd_putl16 ((bfd_vma) bin, frag);
984
985 prev = bin;
986 *line = str;
987 return bin;
988 }
989
990 /* GAS will call this function for each section at the end of the assembly,
991 to permit the CPU backend to adjust the alignment of a section. */
992
993 valueT
994 md_section_align (asection *seg, valueT addr)
995 {
996 int align = bfd_get_section_alignment (stdoutput, seg);
997 return ((addr + (1 << align) - 1) & (-1 << align));
998 }
999
1000 /* If you define this macro, it should return the offset between the
1001 address of a PC relative fixup and the position from which the PC
1002 relative adjustment should be made. On many processors, the base
1003 of a PC relative instruction is the next instruction, so this
1004 macro would return the length of an instruction. */
1005
1006 long
1007 md_pcrel_from_section (fixS *fixp, segT sec)
1008 {
1009 if (fixp->fx_addsy != (symbolS *) NULL
1010 && (!S_IS_DEFINED (fixp->fx_addsy)
1011 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1012 return 0;
1013
1014 return fixp->fx_frag->fr_address + fixp->fx_where;
1015 }
1016
1017 /* GAS will call this for each fixup. It should store the correct
1018 value in the object file. */
1019
1020 void
1021 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1022 {
1023 unsigned char *where;
1024 unsigned long insn;
1025 long value = *valP;
1026
1027 if (fixP->fx_addsy == (symbolS *) NULL)
1028 fixP->fx_done = 1;
1029
1030 else if (fixP->fx_pcrel)
1031 {
1032 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1033
1034 if (s == seg || s == absolute_section)
1035 {
1036 value += S_GET_VALUE (fixP->fx_addsy);
1037 fixP->fx_done = 1;
1038 }
1039 }
1040
1041 /* We don't actually support subtracting a symbol. */
1042 if (fixP->fx_subsy != (symbolS *) NULL)
1043 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1044
1045 switch (fixP->fx_r_type)
1046 {
1047 default:
1048 fixP->fx_no_overflow = 1;
1049 break;
1050 case BFD_RELOC_AVR_7_PCREL:
1051 case BFD_RELOC_AVR_13_PCREL:
1052 case BFD_RELOC_32:
1053 case BFD_RELOC_16:
1054 case BFD_RELOC_AVR_CALL:
1055 break;
1056 }
1057
1058 if (fixP->fx_done)
1059 {
1060 /* Fetch the instruction, insert the fully resolved operand
1061 value, and stuff the instruction back again. */
1062 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1063 insn = bfd_getl16 (where);
1064
1065 switch (fixP->fx_r_type)
1066 {
1067 case BFD_RELOC_AVR_7_PCREL:
1068 if (value & 1)
1069 as_bad_where (fixP->fx_file, fixP->fx_line,
1070 _("odd address operand: %ld"), value);
1071
1072 /* Instruction addresses are always right-shifted by 1. */
1073 value >>= 1;
1074 --value; /* Correct PC. */
1075
1076 if (value < -64 || value > 63)
1077 as_bad_where (fixP->fx_file, fixP->fx_line,
1078 _("operand out of range: %ld"), value);
1079 value = (value << 3) & 0x3f8;
1080 bfd_putl16 ((bfd_vma) (value | insn), where);
1081 break;
1082
1083 case BFD_RELOC_AVR_13_PCREL:
1084 if (value & 1)
1085 as_bad_where (fixP->fx_file, fixP->fx_line,
1086 _("odd address operand: %ld"), value);
1087
1088 /* Instruction addresses are always right-shifted by 1. */
1089 value >>= 1;
1090 --value; /* Correct PC. */
1091
1092 if (value < -2048 || value > 2047)
1093 {
1094 /* No wrap for devices with >8K of program memory. */
1095 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1096 as_bad_where (fixP->fx_file, fixP->fx_line,
1097 _("operand out of range: %ld"), value);
1098 }
1099
1100 value &= 0xfff;
1101 bfd_putl16 ((bfd_vma) (value | insn), where);
1102 break;
1103
1104 case BFD_RELOC_32:
1105 bfd_putl16 ((bfd_vma) value, where);
1106 break;
1107
1108 case BFD_RELOC_16:
1109 bfd_putl16 ((bfd_vma) value, where);
1110 break;
1111
1112 case BFD_RELOC_AVR_16_PM:
1113 bfd_putl16 ((bfd_vma) (value >> 1), where);
1114 break;
1115
1116 case BFD_RELOC_AVR_LDI:
1117 if (value > 255)
1118 as_bad_where (fixP->fx_file, fixP->fx_line,
1119 _("operand out of range: %ld"), value);
1120 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1121 break;
1122
1123 case BFD_RELOC_AVR_6:
1124 if ((value > 63) || (value < 0))
1125 as_bad_where (fixP->fx_file, fixP->fx_line,
1126 _("operand out of range: %ld"), value);
1127 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1128 break;
1129
1130 case BFD_RELOC_AVR_6_ADIW:
1131 if ((value > 63) || (value < 0))
1132 as_bad_where (fixP->fx_file, fixP->fx_line,
1133 _("operand out of range: %ld"), value);
1134 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1135 break;
1136
1137 case BFD_RELOC_AVR_LO8_LDI:
1138 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1139 break;
1140
1141 case BFD_RELOC_AVR_HI8_LDI:
1142 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1143 break;
1144
1145 case BFD_RELOC_AVR_MS8_LDI:
1146 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1147 break;
1148
1149 case BFD_RELOC_AVR_HH8_LDI:
1150 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1151 break;
1152
1153 case BFD_RELOC_AVR_LO8_LDI_NEG:
1154 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1155 break;
1156
1157 case BFD_RELOC_AVR_HI8_LDI_NEG:
1158 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1159 break;
1160
1161 case BFD_RELOC_AVR_MS8_LDI_NEG:
1162 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1163 break;
1164
1165 case BFD_RELOC_AVR_HH8_LDI_NEG:
1166 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1167 break;
1168
1169 case BFD_RELOC_AVR_LO8_LDI_PM:
1170 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1171 break;
1172
1173 case BFD_RELOC_AVR_HI8_LDI_PM:
1174 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1175 break;
1176
1177 case BFD_RELOC_AVR_HH8_LDI_PM:
1178 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1179 break;
1180
1181 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1182 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1183 break;
1184
1185 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1186 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1187 break;
1188
1189 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1190 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1191 break;
1192
1193 case BFD_RELOC_AVR_CALL:
1194 {
1195 unsigned long x;
1196
1197 x = bfd_getl16 (where);
1198 if (value & 1)
1199 as_bad_where (fixP->fx_file, fixP->fx_line,
1200 _("odd address operand: %ld"), value);
1201 value >>= 1;
1202 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1203 bfd_putl16 ((bfd_vma) x, where);
1204 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1205 }
1206 break;
1207
1208 default:
1209 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1210 fixP->fx_line, fixP->fx_r_type);
1211 break;
1212 }
1213 }
1214 else
1215 {
1216 switch (fixP->fx_r_type)
1217 {
1218 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1219 case -BFD_RELOC_AVR_HI8_LDI:
1220 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1221 case -BFD_RELOC_AVR_LO8_LDI:
1222 as_bad_where (fixP->fx_file, fixP->fx_line,
1223 _("only constant expression allowed"));
1224 fixP->fx_done = 1;
1225 break;
1226 default:
1227 break;
1228 }
1229 }
1230 }
1231
1232 /* GAS will call this to generate a reloc, passing the resulting reloc
1233 to `bfd_install_relocation'. This currently works poorly, as
1234 `bfd_install_relocation' often does the wrong thing, and instances of
1235 `tc_gen_reloc' have been written to work around the problems, which
1236 in turns makes it difficult to fix `bfd_install_relocation'. */
1237
1238 /* If while processing a fixup, a reloc really needs to be created
1239 then it is done here. */
1240
1241 arelent *
1242 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1243 fixS *fixp)
1244 {
1245 arelent *reloc;
1246
1247 if (fixp->fx_addsy && fixp->fx_subsy)
1248 {
1249 long value = 0;
1250
1251 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1252 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1253 {
1254 as_bad_where (fixp->fx_file, fixp->fx_line,
1255 "Difference of symbols in different sections is not supported");
1256 return NULL;
1257 }
1258
1259 /* We are dealing with two symbols defined in the same section.
1260 Let us fix-up them here. */
1261 value += S_GET_VALUE (fixp->fx_addsy);
1262 value -= S_GET_VALUE (fixp->fx_subsy);
1263
1264 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1265 only takes it's second operands for the fixup value. */
1266 fixp->fx_addsy = NULL;
1267 fixp->fx_subsy = NULL;
1268 md_apply_fix (fixp, (valueT *) &value, NULL);
1269
1270 return NULL;
1271 }
1272
1273 reloc = xmalloc (sizeof (arelent));
1274
1275 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1276 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1277
1278 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1279 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1280 if (reloc->howto == (reloc_howto_type *) NULL)
1281 {
1282 as_bad_where (fixp->fx_file, fixp->fx_line,
1283 _("reloc %d not supported by object file format"),
1284 (int) fixp->fx_r_type);
1285 return NULL;
1286 }
1287
1288 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1289 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1290 reloc->address = fixp->fx_offset;
1291
1292 reloc->addend = fixp->fx_offset;
1293
1294 return reloc;
1295 }
1296
1297 void
1298 md_assemble (char *str)
1299 {
1300 struct avr_opcodes_s *opcode;
1301 char op[11];
1302
1303 str = skip_space (extract_word (str, op, sizeof (op)));
1304
1305 if (!op[0])
1306 as_bad (_("can't find opcode "));
1307
1308 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1309
1310 if (opcode == NULL)
1311 {
1312 as_bad (_("unknown opcode `%s'"), op);
1313 return;
1314 }
1315
1316 /* Special case for opcodes with optional operands (lpm, elpm) -
1317 version with operands exists in avr_opcodes[] in the next entry. */
1318
1319 if (*str && *opcode->constraints == '?')
1320 ++opcode;
1321
1322 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1323 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1324
1325 /* We used to set input_line_pointer to the result of get_operands,
1326 but that is wrong. Our caller assumes we don't change it. */
1327 {
1328 char *t = input_line_pointer;
1329
1330 avr_operands (opcode, &str);
1331 if (*skip_space (str))
1332 as_bad (_("garbage at end of line"));
1333 input_line_pointer = t;
1334 }
1335 }
1336
1337 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1338 `avr_cons_fix_new'. */
1339 static int exp_mod_pm = 0;
1340
1341 /* Parse special CONS expression: pm (expression)
1342 or alternatively: gs (expression).
1343 These are used for addressing program memory.
1344 Relocation: BFD_RELOC_AVR_16_PM. */
1345
1346 void
1347 avr_parse_cons_expression (expressionS *exp, int nbytes)
1348 {
1349 char *tmp;
1350
1351 exp_mod_pm = 0;
1352
1353 tmp = input_line_pointer = skip_space (input_line_pointer);
1354
1355 if (nbytes == 2)
1356 {
1357 char *pm_name1 = "pm";
1358 char *pm_name2 = "gs";
1359 int len = strlen (pm_name1);
1360 /* len must be the same for both pm identifiers. */
1361
1362 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1363 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1364 {
1365 input_line_pointer = skip_space (input_line_pointer + len);
1366
1367 if (*input_line_pointer == '(')
1368 {
1369 input_line_pointer = skip_space (input_line_pointer + 1);
1370 exp_mod_pm = 1;
1371 expression (exp);
1372
1373 if (*input_line_pointer == ')')
1374 ++input_line_pointer;
1375 else
1376 {
1377 as_bad (_("`)' required"));
1378 exp_mod_pm = 0;
1379 }
1380
1381 return;
1382 }
1383
1384 input_line_pointer = tmp;
1385 }
1386 }
1387
1388 expression (exp);
1389 }
1390
1391 void
1392 avr_cons_fix_new (fragS *frag,
1393 int where,
1394 int nbytes,
1395 expressionS *exp)
1396 {
1397 if (exp_mod_pm == 0)
1398 {
1399 if (nbytes == 2)
1400 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1401 else if (nbytes == 4)
1402 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1403 else
1404 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1405 }
1406 else
1407 {
1408 if (nbytes == 2)
1409 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1410 else
1411 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1412 exp_mod_pm = 0;
1413 }
1414 }
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