1 /* Disassemble Xilinx microblaze instructions.
3 Copyright 2009 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
29 #include "microblaze-opc.h"
30 #include "microblaze-dis.h"
32 #define get_field_rd(instr) get_field (instr, RD_MASK, RD_LOW)
33 #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW)
34 #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW)
35 #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW)
36 #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW)
41 get_field (long instr
, long mask
, unsigned short low
)
45 sprintf (tmpstr
, "%s%d", register_prefix
, (int)((instr
& mask
) >> low
));
46 return (strdup (tmpstr
));
50 get_field_imm (long instr
)
54 sprintf (tmpstr
, "%d", (short)((instr
& IMM_MASK
) >> IMM_LOW
));
55 return (strdup (tmpstr
));
59 get_field_imm5 (long instr
)
63 sprintf (tmpstr
, "%d", (short)((instr
& IMM5_MASK
) >> IMM_LOW
));
64 return (strdup (tmpstr
));
68 get_field_rfsl (long instr
)
72 sprintf (tmpstr
, "%s%d", fsl_register_prefix
,
73 (short)((instr
& RFSL_MASK
) >> IMM_LOW
));
74 return (strdup (tmpstr
));
78 get_field_imm15 (long instr
)
82 sprintf (tmpstr
, "%d", (short)((instr
& IMM15_MASK
) >> IMM_LOW
));
83 return (strdup (tmpstr
));
87 get_field_special (long instr
, struct op_code_struct
* op
)
92 switch ((((instr
& IMM_MASK
) >> IMM_LOW
) ^ op
->immval_mask
))
122 strcpy (spr
, "tlbx");
124 case REG_TLBLO_MASK
:
125 strcpy (spr
, "tlblo");
127 case REG_TLBHI_MASK
:
128 strcpy (spr
, "tlbhi");
130 case REG_TLBSX_MASK
:
131 strcpy (spr
, "tlbsx");
134 if (((((instr
& IMM_MASK
) >> IMM_LOW
) ^ op
->immval_mask
) & 0xE000)
137 sprintf (tmpstr
, "%spvr%d", register_prefix
,
138 (unsigned short)(((instr
& IMM_MASK
) >> IMM_LOW
)
139 ^ op
->immval_mask
) ^ REG_PVR_MASK
);
140 return (strdup (tmpstr
));
147 sprintf (tmpstr
, "%s%s", register_prefix
, spr
);
148 return (strdup (tmpstr
));
152 read_insn_microblaze (bfd_vma memaddr
,
153 struct disassemble_info
*info
,
154 struct op_code_struct
**opr
)
156 unsigned char ibytes
[4];
158 struct op_code_struct
* op
;
161 status
= info
->read_memory_func (memaddr
, ibytes
, 4, info
);
165 info
->memory_error_func (status
, memaddr
, info
);
169 if (info
->endian
== BFD_ENDIAN_BIG
)
170 inst
= (ibytes
[0] << 24) | (ibytes
[1] << 16) | (ibytes
[2] << 8) | ibytes
[3];
171 else if (info
->endian
== BFD_ENDIAN_LITTLE
)
172 inst
= (ibytes
[3] << 24) | (ibytes
[2] << 16) | (ibytes
[1] << 8) | ibytes
[0];
176 /* Just a linear search of the table. */
177 for (op
= opcodes
; op
->name
!= 0; op
++)
178 if (op
->bit_sequence
== (inst
& op
->opcode_mask
))
187 print_insn_microblaze (bfd_vma memaddr
, struct disassemble_info
* info
)
189 fprintf_ftype print_func
= info
->fprintf_func
;
190 void * stream
= info
->stream
;
191 unsigned long inst
, prev_inst
;
192 struct op_code_struct
* op
, *pop
;
194 bfd_boolean immfound
= FALSE
;
195 static bfd_vma prev_insn_addr
= -1; /* Init the prev insn addr. */
196 static int prev_insn_vma
= -1; /* Init the prev insn vma. */
197 int curr_insn_vma
= info
->buffer_vma
;
199 info
->bytes_per_chunk
= 4;
201 inst
= read_insn_microblaze (memaddr
, info
, &op
);
205 if (prev_insn_vma
== curr_insn_vma
)
207 if (memaddr
-(info
->bytes_per_chunk
) == prev_insn_addr
)
209 prev_inst
= read_insn_microblaze (prev_insn_addr
, info
, &pop
);
212 if (pop
->instr
== imm
)
214 immval
= (get_int_field_imm (prev_inst
) << 16) & 0xffff0000;
225 /* Make curr insn as prev insn. */
226 prev_insn_addr
= memaddr
;
227 prev_insn_vma
= curr_insn_vma
;
229 if (op
->name
== NULL
)
230 print_func (stream
, ".short 0x%04x", inst
);
233 print_func (stream
, "%s", op
->name
);
235 switch (op
->inst_type
)
237 case INST_TYPE_RD_R1_R2
:
238 print_func (stream
, "\t%s, %s, %s", get_field_rd (inst
),
239 get_field_r1(inst
), get_field_r2 (inst
));
241 case INST_TYPE_RD_R1_IMM
:
242 print_func (stream
, "\t%s, %s, %s", get_field_rd (inst
),
243 get_field_r1(inst
), get_field_imm (inst
));
244 if (info
->print_address_func
&& get_int_field_r1 (inst
) == 0
245 && info
->symbol_at_address_func
)
248 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
251 immval
= get_int_field_imm (inst
);
253 immval
|= 0xFFFF0000;
255 if (immval
> 0 && info
->symbol_at_address_func (immval
, info
))
257 print_func (stream
, "\t// ");
258 info
->print_address_func (immval
, info
);
262 case INST_TYPE_RD_R1_IMM5
:
263 print_func (stream
, "\t%s, %s, %s", get_field_rd (inst
),
264 get_field_r1(inst
), get_field_imm5 (inst
));
266 case INST_TYPE_RD_RFSL
:
267 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_rfsl (inst
));
269 case INST_TYPE_R1_RFSL
:
270 print_func (stream
, "\t%s, %s", get_field_r1 (inst
), get_field_rfsl (inst
));
272 case INST_TYPE_RD_SPECIAL
:
273 print_func (stream
, "\t%s, %s", get_field_rd (inst
),
274 get_field_special (inst
, op
));
276 case INST_TYPE_SPECIAL_R1
:
277 print_func (stream
, "\t%s, %s", get_field_special (inst
, op
),
280 case INST_TYPE_RD_R1
:
281 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_r1 (inst
));
283 case INST_TYPE_R1_R2
:
284 print_func (stream
, "\t%s, %s", get_field_r1 (inst
), get_field_r2 (inst
));
286 case INST_TYPE_R1_IMM
:
287 print_func (stream
, "\t%s, %s", get_field_r1 (inst
), get_field_imm (inst
));
288 /* The non-pc relative instructions are returns, which shouldn't
289 have a label printed. */
290 if (info
->print_address_func
&& op
->inst_offset_type
== INST_PC_OFFSET
291 && info
->symbol_at_address_func
)
294 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
297 immval
= get_int_field_imm (inst
);
299 immval
|= 0xFFFF0000;
302 if (immval
> 0 && info
->symbol_at_address_func (immval
, info
))
304 print_func (stream
, "\t// ");
305 info
->print_address_func (immval
, info
);
309 print_func (stream
, "\t\t// ");
310 print_func (stream
, "%x", immval
);
314 case INST_TYPE_RD_IMM
:
315 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_imm (inst
));
316 if (info
->print_address_func
&& info
->symbol_at_address_func
)
319 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
322 immval
= get_int_field_imm (inst
);
324 immval
|= 0xFFFF0000;
326 if (op
->inst_offset_type
== INST_PC_OFFSET
)
327 immval
+= (int) memaddr
;
328 if (info
->symbol_at_address_func (immval
, info
))
330 print_func (stream
, "\t// ");
331 info
->print_address_func (immval
, info
);
336 print_func (stream
, "\t%s", get_field_imm (inst
));
337 if (info
->print_address_func
&& info
->symbol_at_address_func
341 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
344 immval
= get_int_field_imm (inst
);
346 immval
|= 0xFFFF0000;
348 if (op
->inst_offset_type
== INST_PC_OFFSET
)
349 immval
+= (int) memaddr
;
350 if (immval
> 0 && info
->symbol_at_address_func (immval
, info
))
352 print_func (stream
, "\t// ");
353 info
->print_address_func (immval
, info
);
355 else if (op
->inst_offset_type
== INST_PC_OFFSET
)
357 print_func (stream
, "\t\t// ");
358 print_func (stream
, "%x", immval
);
362 case INST_TYPE_RD_R2
:
363 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_r2 (inst
));
366 print_func (stream
, "\t%s", get_field_r2 (inst
));
369 print_func (stream
, "\t%s", get_field_r1 (inst
));
371 case INST_TYPE_RD_R1_SPECIAL
:
372 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_r2 (inst
));
374 case INST_TYPE_RD_IMM15
:
375 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_imm15 (inst
));
377 /* For tuqula instruction */
379 print_func (stream
, "\t%s", get_field_rd (inst
));
382 print_func (stream
, "\t%s", get_field_rfsl (inst
));
385 /* If the disassembler lags the instruction set. */
386 print_func (stream
, "\tundecoded operands, inst is 0x%04x", inst
);
391 /* Say how many bytes we consumed. */
395 enum microblaze_instr
396 get_insn_microblaze (long inst
,
397 bfd_boolean
*isunsignedimm
,
398 enum microblaze_instr_type
*insn_type
,
401 struct op_code_struct
* op
;
402 *isunsignedimm
= FALSE
;
404 /* Just a linear search of the table. */
405 for (op
= opcodes
; op
->name
!= 0; op
++)
406 if (op
->bit_sequence
== (inst
& op
->opcode_mask
))
413 *isunsignedimm
= (op
->inst_type
== INST_TYPE_RD_R1_UNSIGNED_IMM
);
414 *insn_type
= op
->instr_type
;
415 *delay_slots
= op
->delay_slots
;
420 enum microblaze_instr
421 microblaze_decode_insn (long insn
, int *rd
, int *ra
, int *rb
, int *immed
)
423 enum microblaze_instr op
;
425 enum microblaze_instr_type t2
;
428 op
= get_insn_microblaze (insn
, &t1
, &t2
, &t3
);
429 *rd
= (insn
& RD_MASK
) >> RD_LOW
;
430 *ra
= (insn
& RA_MASK
) >> RA_LOW
;
431 *rb
= (insn
& RB_MASK
) >> RB_LOW
;
432 t3
= (insn
& IMM_MASK
) >> IMM_LOW
;
438 microblaze_get_target_address (long inst
, bfd_boolean immfound
, int immval
,
439 long pcval
, long r1val
, long r2val
,
440 bfd_boolean
*targetvalid
,
441 bfd_boolean
*unconditionalbranch
)
443 struct op_code_struct
* op
;
446 *unconditionalbranch
= FALSE
;
447 /* Just a linear search of the table. */
448 for (op
= opcodes
; op
->name
!= 0; op
++)
449 if (op
->bit_sequence
== (inst
& op
->opcode_mask
))
454 *targetvalid
= FALSE
;
456 else if (op
->instr_type
== branch_inst
)
458 switch (op
->inst_type
)
461 *unconditionalbranch
= TRUE
;
463 case INST_TYPE_RD_R2
:
464 case INST_TYPE_R1_R2
:
467 if (op
->inst_offset_type
== INST_PC_OFFSET
)
471 *unconditionalbranch
= TRUE
;
473 case INST_TYPE_RD_IMM
:
474 case INST_TYPE_R1_IMM
:
477 targetaddr
= (immval
<< 16) & 0xffff0000;
478 targetaddr
|= (get_int_field_imm (inst
) & 0x0000ffff);
482 targetaddr
= get_int_field_imm (inst
);
483 if (targetaddr
& 0x8000)
484 targetaddr
|= 0xFFFF0000;
486 if (op
->inst_offset_type
== INST_PC_OFFSET
)
491 *targetvalid
= FALSE
;
495 else if (op
->instr_type
== return_inst
)
499 targetaddr
= (immval
<< 16) & 0xffff0000;
500 targetaddr
|= (get_int_field_imm (inst
) & 0x0000ffff);
504 targetaddr
= get_int_field_imm (inst
);
505 if (targetaddr
& 0x8000)
506 targetaddr
|= 0xFFFF0000;
512 *targetvalid
= FALSE
;