* emultempl/beos.em: Remove #if 0 and #if 1 blocks.
[binutils.git] / opcodes / ia64-opc-m.c
blobc510a7a839f342b6cb91560481d2ebffae90c6da
1 /* ia64-opc-m.c -- IA-64 `M' opcode table.
2 Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 2, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "ia64-opc.h"
24 #define M0 IA64_TYPE_M, 0
25 #define M IA64_TYPE_M, 1
26 #define M2 IA64_TYPE_M, 2
28 /* instruction bit fields: */
29 #define bM(x) (((ia64_insn) ((x) & 0x1)) << 36)
30 #define bX(x) (((ia64_insn) ((x) & 0x1)) << 27)
31 #define bX2(x) (((ia64_insn) ((x) & 0x3)) << 31)
32 #define bX3(x) (((ia64_insn) ((x) & 0x7)) << 33)
33 #define bX4(x) (((ia64_insn) ((x) & 0xf)) << 27)
34 #define bX6a(x) (((ia64_insn) ((x) & 0x3f)) << 30)
35 #define bX6b(x) (((ia64_insn) ((x) & 0x3f)) << 27)
36 #define bX7(x) (((ia64_insn) ((x) & 0x1)) << 36) /* note: alias for bM() */
37 #define bY(x) (((ia64_insn) ((x) & 0x1)) << 26)
38 #define bHint(x) (((ia64_insn) ((x) & 0x3)) << 28)
40 #define mM bM (-1)
41 #define mX bX (-1)
42 #define mX2 bX2 (-1)
43 #define mX3 bX3 (-1)
44 #define mX4 bX4 (-1)
45 #define mX6a bX6a (-1)
46 #define mX6b bX6b (-1)
47 #define mX7 bX7 (-1)
48 #define mY bY (-1)
49 #define mHint bHint (-1)
51 #define OpX3(a,b) (bOp (a) | bX3 (b)), (mOp | mX3)
52 #define OpX3X6b(a,b,c) (bOp (a) | bX3 (b) | bX6b (c)), \
53 (mOp | mX3 | mX6b)
54 #define OpX3X6bX7(a,b,c,d) (bOp (a) | bX3 (b) | bX6b (c) | bX7 (d)), \
55 (mOp | mX3 | mX6b | mX7)
56 #define OpX3X4(a,b,c) (bOp (a) | bX3 (b) | bX4 (c)), \
57 (mOp | mX3 | mX4)
58 #define OpX3X4X2(a,b,c,d) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d)), \
59 (mOp | mX3 | mX4 | mX2)
60 #define OpX3X4X2Y(a,b,c,d,e) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d) | bY (e)), \
61 (mOp | mX3 | mX4 | mX2 | mY)
62 #define OpX6aHint(a,b,c) (bOp (a) | bX6a (b) | bHint (c)), \
63 (mOp | mX6a | mHint)
64 #define OpXX6aHint(a,b,c,d) (bOp (a) | bX (b) | bX6a (c) | bHint (d)), \
65 (mOp | mX | mX6a | mHint)
66 #define OpMXX6a(a,b,c,d) \
67 (bOp (a) | bM (b) | bX (c) | bX6a (d)), (mOp | mM | mX | mX6a)
68 #define OpMXX6aHint(a,b,c,d,e) \
69 (bOp (a) | bM (b) | bX (c) | bX6a (d) | bHint (e)), \
70 (mOp | mM | mX | mX6a | mHint)
72 /* Used to initialise unused fields in ia64_opcode struct,
73 in order to stop gcc from complaining. */
74 #define EMPTY 0,0,NULL
76 struct ia64_opcode ia64_opcodes_m[] =
78 /* M-type instruction encodings (sorted according to major opcode). */
80 {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY},
81 {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY},
82 {"chk.a.nc", M0, OpX3 (0, 6), {F1, TGT25c}, EMPTY},
83 {"chk.a.clr", M0, OpX3 (0, 7), {F1, TGT25c}, EMPTY},
85 {"invala", M0, OpX3X4X2 (0, 0, 0, 1), {}, EMPTY},
86 {"fwb", M0, OpX3X4X2 (0, 0, 0, 2), {}, EMPTY},
87 {"mf", M0, OpX3X4X2 (0, 0, 2, 2), {}, EMPTY},
88 {"mf.a", M0, OpX3X4X2 (0, 0, 3, 2), {}, EMPTY},
89 {"srlz.d", M0, OpX3X4X2 (0, 0, 0, 3), {}, EMPTY},
90 {"srlz.i", M0, OpX3X4X2 (0, 0, 1, 3), {}, EMPTY},
91 {"sync.i", M0, OpX3X4X2 (0, 0, 3, 3), {}, EMPTY},
92 {"flushrs", M0, OpX3X4X2 (0, 0, 0xc, 0), {}, FIRST | NO_PRED, 0, NULL},
93 {"loadrs", M0, OpX3X4X2 (0, 0, 0xa, 0), {}, FIRST | NO_PRED, 0, NULL},
94 {"invala.e", M0, OpX3X4X2 (0, 0, 2, 1), {R1}, EMPTY},
95 {"invala.e", M0, OpX3X4X2 (0, 0, 3, 1), {F1}, EMPTY},
96 {"mov.m", M, OpX3X4X2 (0, 0, 8, 2), {AR3, IMM8}, EMPTY},
98 {"break.m", M0, OpX3X4X2 (0, 0, 0, 0), {IMMU21}, EMPTY},
99 {"nop.m", M0, OpX3X4X2Y (0, 0, 1, 0, 0), {IMMU21}, EMPTY},
100 {"hint.m", M0, OpX3X4X2Y (0, 0, 1, 0, 1), {IMMU21}, EMPTY},
102 {"sum", M0, OpX3X4 (0, 0, 4), {IMMU24}, EMPTY},
103 {"rum", M0, OpX3X4 (0, 0, 5), {IMMU24}, EMPTY},
104 {"ssm", M0, OpX3X4 (0, 0, 6), {IMMU24}, PRIV, 0, NULL},
105 {"rsm", M0, OpX3X4 (0, 0, 7), {IMMU24}, PRIV, 0, NULL},
107 {"mov.m", M, OpX3X6b (1, 0, 0x2a), {AR3, R2}, EMPTY},
108 {"mov.m", M, OpX3X6b (1, 0, 0x22), {R1, AR3}, EMPTY},
109 {"mov", M, OpX3X6b (1, 0, 0x2c), {CR3, R2}, PRIV, 0, NULL},
110 {"mov", M, OpX3X6b (1, 0, 0x24), {R1, CR3}, PRIV, 0, NULL},
112 {"alloc", M, OpX3 (1, 6), {R1, AR_PFS, SOF, SOL, SOR}, FIRST|NO_PRED|MOD_RRBS, 0, NULL},
113 {"alloc", M, OpX3 (1, 6), {R1, SOF, SOL, SOR}, PSEUDO|FIRST|NO_PRED|MOD_RRBS, 0, NULL},
115 {"mov", M, OpX3X6b (1, 0, 0x2d), {PSR_L, R2}, PRIV, 0, NULL},
116 {"mov", M, OpX3X6b (1, 0, 0x29), {PSR_UM, R2}, EMPTY},
117 {"mov", M, OpX3X6b (1, 0, 0x25), {R1, PSR}, PRIV, 0, NULL},
118 {"mov", M, OpX3X6b (1, 0, 0x21), {R1, PSR_UM}, EMPTY},
119 {"probe.r", M, OpX3X6b (1, 0, 0x38), {R1, R3, R2}, EMPTY},
120 {"probe.w", M, OpX3X6b (1, 0, 0x39), {R1, R3, R2}, EMPTY},
121 {"probe.r", M, OpX3X6b (1, 0, 0x18), {R1, R3, IMMU2}, EMPTY},
122 {"probe.w", M, OpX3X6b (1, 0, 0x19), {R1, R3, IMMU2}, EMPTY},
123 {"probe.rw.fault", M0, OpX3X6b (1, 0, 0x31), {R3, IMMU2}, EMPTY},
124 {"probe.r.fault", M0, OpX3X6b (1, 0, 0x32), {R3, IMMU2}, EMPTY},
125 {"probe.w.fault", M0, OpX3X6b (1, 0, 0x33), {R3, IMMU2}, EMPTY},
126 {"itc.d", M0, OpX3X6b (1, 0, 0x2e), {R2}, LAST | PRIV, 0, NULL},
127 {"itc.i", M0, OpX3X6b (1, 0, 0x2f), {R2}, LAST | PRIV, 0, NULL},
129 {"mov", M, OpX3X6b (1, 0, 0x00), {RR_R3, R2}, PRIV, 0, NULL},
130 {"mov", M, OpX3X6b (1, 0, 0x01), {DBR_R3, R2}, PRIV, 0, NULL},
131 {"mov", M, OpX3X6b (1, 0, 0x02), {IBR_R3, R2}, PRIV, 0, NULL},
132 {"mov", M, OpX3X6b (1, 0, 0x03), {PKR_R3, R2}, PRIV, 0, NULL},
133 {"mov", M, OpX3X6b (1, 0, 0x04), {PMC_R3, R2}, PRIV, 0, NULL},
134 {"mov", M, OpX3X6b (1, 0, 0x05), {PMD_R3, R2}, PRIV, 0, NULL},
135 {"mov", M, OpX3X6b (1, 0, 0x06), {MSR_R3, R2}, PRIV, 0, NULL},
136 {"itr.d", M, OpX3X6b (1, 0, 0x0e), {DTR_R3, R2}, PRIV, 0, NULL},
137 {"itr.i", M, OpX3X6b (1, 0, 0x0f), {ITR_R3, R2}, PRIV, 0, NULL},
139 {"mov", M, OpX3X6b (1, 0, 0x10), {R1, RR_R3}, PRIV, 0, NULL},
140 {"mov", M, OpX3X6b (1, 0, 0x11), {R1, DBR_R3}, PRIV, 0, NULL},
141 {"mov", M, OpX3X6b (1, 0, 0x12), {R1, IBR_R3}, PRIV, 0, NULL},
142 {"mov", M, OpX3X6b (1, 0, 0x13), {R1, PKR_R3}, PRIV, 0, NULL},
143 {"mov", M, OpX3X6b (1, 0, 0x14), {R1, PMC_R3}, PRIV, 0, NULL},
144 {"mov", M, OpX3X6b (1, 0, 0x15), {R1, PMD_R3}, EMPTY},
145 {"mov", M, OpX3X6b (1, 0, 0x16), {R1, MSR_R3}, PRIV, 0, NULL},
146 {"mov", M, OpX3X6b (1, 0, 0x17), {R1, CPUID_R3}, EMPTY},
148 {"ptc.l", M0, OpX3X6b (1, 0, 0x09), {R3, R2}, PRIV, 0, NULL},
149 {"ptc.g", M0, OpX3X6b (1, 0, 0x0a), {R3, R2}, LAST | PRIV, 0, NULL},
150 {"ptc.ga", M0, OpX3X6b (1, 0, 0x0b), {R3, R2}, LAST | PRIV, 0, NULL},
151 {"ptr.d", M0, OpX3X6b (1, 0, 0x0c), {R3, R2}, PRIV, 0, NULL},
152 {"ptr.i", M0, OpX3X6b (1, 0, 0x0d), {R3, R2}, PRIV, 0, NULL},
154 {"thash", M, OpX3X6b (1, 0, 0x1a), {R1, R3}, EMPTY},
155 {"ttag", M, OpX3X6b (1, 0, 0x1b), {R1, R3}, EMPTY},
156 {"tpa", M, OpX3X6b (1, 0, 0x1e), {R1, R3}, PRIV, 0, NULL},
157 {"tak", M, OpX3X6b (1, 0, 0x1f), {R1, R3}, PRIV, 0, NULL},
159 {"chk.s.m", M0, OpX3 (1, 1), {R2, TGT25b}, EMPTY},
160 {"chk.s", M0, OpX3 (1, 3), {F2, TGT25b}, EMPTY},
162 {"fc", M0, OpX3X6bX7 (1, 0, 0x30, 0), {R3}, EMPTY},
163 {"fc.i", M0, OpX3X6bX7 (1, 0, 0x30, 1), {R3}, EMPTY},
164 {"ptc.e", M0, OpX3X6b (1, 0, 0x34), {R3}, PRIV, 0, NULL},
166 /* integer load */
167 {"ld1", M, OpMXX6aHint (4, 0, 0, 0x00, 0), {R1, MR3}, EMPTY},
168 {"ld1.nt1", M, OpMXX6aHint (4, 0, 0, 0x00, 1), {R1, MR3}, EMPTY},
169 {"ld1.nta", M, OpMXX6aHint (4, 0, 0, 0x00, 3), {R1, MR3}, EMPTY},
170 {"ld2", M, OpMXX6aHint (4, 0, 0, 0x01, 0), {R1, MR3}, EMPTY},
171 {"ld2.nt1", M, OpMXX6aHint (4, 0, 0, 0x01, 1), {R1, MR3}, EMPTY},
172 {"ld2.nta", M, OpMXX6aHint (4, 0, 0, 0x01, 3), {R1, MR3}, EMPTY},
173 {"ld4", M, OpMXX6aHint (4, 0, 0, 0x02, 0), {R1, MR3}, EMPTY},
174 {"ld4.nt1", M, OpMXX6aHint (4, 0, 0, 0x02, 1), {R1, MR3}, EMPTY},
175 {"ld4.nta", M, OpMXX6aHint (4, 0, 0, 0x02, 3), {R1, MR3}, EMPTY},
176 {"ld8", M, OpMXX6aHint (4, 0, 0, 0x03, 0), {R1, MR3}, EMPTY},
177 {"ld8.nt1", M, OpMXX6aHint (4, 0, 0, 0x03, 1), {R1, MR3}, EMPTY},
178 {"ld8.nta", M, OpMXX6aHint (4, 0, 0, 0x03, 3), {R1, MR3}, EMPTY},
179 {"ld16", M2, OpMXX6aHint (4, 0, 1, 0x28, 0), {R1, AR_CSD, MR3}, EMPTY},
180 {"ld16", M, OpMXX6aHint (4, 0, 1, 0x28, 0), {R1, MR3}, PSEUDO, 0, NULL},
181 {"ld16.nt1", M2, OpMXX6aHint (4, 0, 1, 0x28, 1), {R1, AR_CSD, MR3}, EMPTY},
182 {"ld16.nt1", M, OpMXX6aHint (4, 0, 1, 0x28, 1), {R1, MR3}, PSEUDO, 0, NULL},
183 {"ld16.nta", M2, OpMXX6aHint (4, 0, 1, 0x28, 3), {R1, AR_CSD, MR3}, EMPTY},
184 {"ld16.nta", M, OpMXX6aHint (4, 0, 1, 0x28, 3), {R1, MR3}, PSEUDO, 0, NULL},
185 {"ld1.s", M, OpMXX6aHint (4, 0, 0, 0x04, 0), {R1, MR3}, EMPTY},
186 {"ld1.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x04, 1), {R1, MR3}, EMPTY},
187 {"ld1.s.nta", M, OpMXX6aHint (4, 0, 0, 0x04, 3), {R1, MR3}, EMPTY},
188 {"ld2.s", M, OpMXX6aHint (4, 0, 0, 0x05, 0), {R1, MR3}, EMPTY},
189 {"ld2.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x05, 1), {R1, MR3}, EMPTY},
190 {"ld2.s.nta", M, OpMXX6aHint (4, 0, 0, 0x05, 3), {R1, MR3}, EMPTY},
191 {"ld4.s", M, OpMXX6aHint (4, 0, 0, 0x06, 0), {R1, MR3}, EMPTY},
192 {"ld4.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x06, 1), {R1, MR3}, EMPTY},
193 {"ld4.s.nta", M, OpMXX6aHint (4, 0, 0, 0x06, 3), {R1, MR3}, EMPTY},
194 {"ld8.s", M, OpMXX6aHint (4, 0, 0, 0x07, 0), {R1, MR3}, EMPTY},
195 {"ld8.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x07, 1), {R1, MR3}, EMPTY},
196 {"ld8.s.nta", M, OpMXX6aHint (4, 0, 0, 0x07, 3), {R1, MR3}, EMPTY},
197 {"ld1.a", M, OpMXX6aHint (4, 0, 0, 0x08, 0), {R1, MR3}, EMPTY},
198 {"ld1.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x08, 1), {R1, MR3}, EMPTY},
199 {"ld1.a.nta", M, OpMXX6aHint (4, 0, 0, 0x08, 3), {R1, MR3}, EMPTY},
200 {"ld2.a", M, OpMXX6aHint (4, 0, 0, 0x09, 0), {R1, MR3}, EMPTY},
201 {"ld2.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x09, 1), {R1, MR3}, EMPTY},
202 {"ld2.a.nta", M, OpMXX6aHint (4, 0, 0, 0x09, 3), {R1, MR3}, EMPTY},
203 {"ld4.a", M, OpMXX6aHint (4, 0, 0, 0x0a, 0), {R1, MR3}, EMPTY},
204 {"ld4.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x0a, 1), {R1, MR3}, EMPTY},
205 {"ld4.a.nta", M, OpMXX6aHint (4, 0, 0, 0x0a, 3), {R1, MR3}, EMPTY},
206 {"ld8.a", M, OpMXX6aHint (4, 0, 0, 0x0b, 0), {R1, MR3}, EMPTY},
207 {"ld8.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x0b, 1), {R1, MR3}, EMPTY},
208 {"ld8.a.nta", M, OpMXX6aHint (4, 0, 0, 0x0b, 3), {R1, MR3}, EMPTY},
209 {"ld1.sa", M, OpMXX6aHint (4, 0, 0, 0x0c, 0), {R1, MR3}, EMPTY},
210 {"ld1.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0c, 1), {R1, MR3}, EMPTY},
211 {"ld1.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0c, 3), {R1, MR3}, EMPTY},
212 {"ld2.sa", M, OpMXX6aHint (4, 0, 0, 0x0d, 0), {R1, MR3}, EMPTY},
213 {"ld2.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0d, 1), {R1, MR3}, EMPTY},
214 {"ld2.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0d, 3), {R1, MR3}, EMPTY},
215 {"ld4.sa", M, OpMXX6aHint (4, 0, 0, 0x0e, 0), {R1, MR3}, EMPTY},
216 {"ld4.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0e, 1), {R1, MR3}, EMPTY},
217 {"ld4.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0e, 3), {R1, MR3}, EMPTY},
218 {"ld8.sa", M, OpMXX6aHint (4, 0, 0, 0x0f, 0), {R1, MR3}, EMPTY},
219 {"ld8.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0f, 1), {R1, MR3}, EMPTY},
220 {"ld8.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0f, 3), {R1, MR3}, EMPTY},
221 {"ld1.bias", M, OpMXX6aHint (4, 0, 0, 0x10, 0), {R1, MR3}, EMPTY},
222 {"ld1.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x10, 1), {R1, MR3}, EMPTY},
223 {"ld1.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x10, 3), {R1, MR3}, EMPTY},
224 {"ld2.bias", M, OpMXX6aHint (4, 0, 0, 0x11, 0), {R1, MR3}, EMPTY},
225 {"ld2.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x11, 1), {R1, MR3}, EMPTY},
226 {"ld2.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x11, 3), {R1, MR3}, EMPTY},
227 {"ld4.bias", M, OpMXX6aHint (4, 0, 0, 0x12, 0), {R1, MR3}, EMPTY},
228 {"ld4.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x12, 1), {R1, MR3}, EMPTY},
229 {"ld4.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x12, 3), {R1, MR3}, EMPTY},
230 {"ld8.bias", M, OpMXX6aHint (4, 0, 0, 0x13, 0), {R1, MR3}, EMPTY},
231 {"ld8.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x13, 1), {R1, MR3}, EMPTY},
232 {"ld8.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x13, 3), {R1, MR3}, EMPTY},
233 {"ld1.acq", M, OpMXX6aHint (4, 0, 0, 0x14, 0), {R1, MR3}, EMPTY},
234 {"ld1.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x14, 1), {R1, MR3}, EMPTY},
235 {"ld1.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x14, 3), {R1, MR3}, EMPTY},
236 {"ld2.acq", M, OpMXX6aHint (4, 0, 0, 0x15, 0), {R1, MR3}, EMPTY},
237 {"ld2.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x15, 1), {R1, MR3}, EMPTY},
238 {"ld2.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x15, 3), {R1, MR3}, EMPTY},
239 {"ld4.acq", M, OpMXX6aHint (4, 0, 0, 0x16, 0), {R1, MR3}, EMPTY},
240 {"ld4.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x16, 1), {R1, MR3}, EMPTY},
241 {"ld4.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x16, 3), {R1, MR3}, EMPTY},
242 {"ld8.acq", M, OpMXX6aHint (4, 0, 0, 0x17, 0), {R1, MR3}, EMPTY},
243 {"ld8.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x17, 1), {R1, MR3}, EMPTY},
244 {"ld8.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x17, 3), {R1, MR3}, EMPTY},
245 {"ld16.acq", M2, OpMXX6aHint (4, 0, 1, 0x2c, 0), {R1, AR_CSD, MR3}, EMPTY},
246 {"ld16.acq", M, OpMXX6aHint (4, 0, 1, 0x2c, 0), {R1, MR3}, PSEUDO, 0, NULL},
247 {"ld16.acq.nt1", M2, OpMXX6aHint (4, 0, 1, 0x2c, 1), {R1, AR_CSD, MR3}, EMPTY},
248 {"ld16.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x2c, 1), {R1, MR3}, PSEUDO, 0, NULL},
249 {"ld16.acq.nta", M2, OpMXX6aHint (4, 0, 1, 0x2c, 3), {R1, AR_CSD, MR3}, EMPTY},
250 {"ld16.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x2c, 3), {R1, MR3}, PSEUDO, 0, NULL},
251 {"ld8.fill", M, OpMXX6aHint (4, 0, 0, 0x1b, 0), {R1, MR3}, EMPTY},
252 {"ld8.fill.nt1", M, OpMXX6aHint (4, 0, 0, 0x1b, 1), {R1, MR3}, EMPTY},
253 {"ld8.fill.nta", M, OpMXX6aHint (4, 0, 0, 0x1b, 3), {R1, MR3}, EMPTY},
254 {"ld1.c.clr", M, OpMXX6aHint (4, 0, 0, 0x20, 0), {R1, MR3}, EMPTY},
255 {"ld1.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x20, 1), {R1, MR3}, EMPTY},
256 {"ld1.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x20, 3), {R1, MR3}, EMPTY},
257 {"ld2.c.clr", M, OpMXX6aHint (4, 0, 0, 0x21, 0), {R1, MR3}, EMPTY},
258 {"ld2.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x21, 1), {R1, MR3}, EMPTY},
259 {"ld2.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x21, 3), {R1, MR3}, EMPTY},
260 {"ld4.c.clr", M, OpMXX6aHint (4, 0, 0, 0x22, 0), {R1, MR3}, EMPTY},
261 {"ld4.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x22, 1), {R1, MR3}, EMPTY},
262 {"ld4.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x22, 3), {R1, MR3}, EMPTY},
263 {"ld8.c.clr", M, OpMXX6aHint (4, 0, 0, 0x23, 0), {R1, MR3}, EMPTY},
264 {"ld8.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x23, 1), {R1, MR3}, EMPTY},
265 {"ld8.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x23, 3), {R1, MR3}, EMPTY},
266 {"ld1.c.nc", M, OpMXX6aHint (4, 0, 0, 0x24, 0), {R1, MR3}, EMPTY},
267 {"ld1.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x24, 1), {R1, MR3}, EMPTY},
268 {"ld1.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x24, 3), {R1, MR3}, EMPTY},
269 {"ld2.c.nc", M, OpMXX6aHint (4, 0, 0, 0x25, 0), {R1, MR3}, EMPTY},
270 {"ld2.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x25, 1), {R1, MR3}, EMPTY},
271 {"ld2.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x25, 3), {R1, MR3}, EMPTY},
272 {"ld4.c.nc", M, OpMXX6aHint (4, 0, 0, 0x26, 0), {R1, MR3}, EMPTY},
273 {"ld4.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x26, 1), {R1, MR3}, EMPTY},
274 {"ld4.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x26, 3), {R1, MR3}, EMPTY},
275 {"ld8.c.nc", M, OpMXX6aHint (4, 0, 0, 0x27, 0), {R1, MR3}, EMPTY},
276 {"ld8.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x27, 1), {R1, MR3}, EMPTY},
277 {"ld8.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x27, 3), {R1, MR3}, EMPTY},
278 {"ld1.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x28, 0), {R1, MR3}, EMPTY},
279 {"ld1.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x28, 1), {R1, MR3}, EMPTY},
280 {"ld1.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x28, 3), {R1, MR3}, EMPTY},
281 {"ld2.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x29, 0), {R1, MR3}, EMPTY},
282 {"ld2.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x29, 1), {R1, MR3}, EMPTY},
283 {"ld2.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x29, 3), {R1, MR3}, EMPTY},
284 {"ld4.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2a, 0), {R1, MR3}, EMPTY},
285 {"ld4.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2a, 1), {R1, MR3}, EMPTY},
286 {"ld4.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2a, 3), {R1, MR3}, EMPTY},
287 {"ld8.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2b, 0), {R1, MR3}, EMPTY},
288 {"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY},
289 {"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY},
291 /* Pseudo-op that generates ldxmov relocation. */
292 {"ld8.mov", M, OpMXX6aHint (4, 0, 0, 0x03, 0),
293 {R1, MR3, IA64_OPND_LDXMOV}, EMPTY},
295 /* Integer load w/increment by register. */
296 #define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL
297 {"ld1", LDINCREG (0x00, 0)},
298 {"ld1.nt1", LDINCREG (0x00, 1)},
299 {"ld1.nta", LDINCREG (0x00, 3)},
300 {"ld2", LDINCREG (0x01, 0)},
301 {"ld2.nt1", LDINCREG (0x01, 1)},
302 {"ld2.nta", LDINCREG (0x01, 3)},
303 {"ld4", LDINCREG (0x02, 0)},
304 {"ld4.nt1", LDINCREG (0x02, 1)},
305 {"ld4.nta", LDINCREG (0x02, 3)},
306 {"ld8", LDINCREG (0x03, 0)},
307 {"ld8.nt1", LDINCREG (0x03, 1)},
308 {"ld8.nta", LDINCREG (0x03, 3)},
309 {"ld1.s", LDINCREG (0x04, 0)},
310 {"ld1.s.nt1", LDINCREG (0x04, 1)},
311 {"ld1.s.nta", LDINCREG (0x04, 3)},
312 {"ld2.s", LDINCREG (0x05, 0)},
313 {"ld2.s.nt1", LDINCREG (0x05, 1)},
314 {"ld2.s.nta", LDINCREG (0x05, 3)},
315 {"ld4.s", LDINCREG (0x06, 0)},
316 {"ld4.s.nt1", LDINCREG (0x06, 1)},
317 {"ld4.s.nta", LDINCREG (0x06, 3)},
318 {"ld8.s", LDINCREG (0x07, 0)},
319 {"ld8.s.nt1", LDINCREG (0x07, 1)},
320 {"ld8.s.nta", LDINCREG (0x07, 3)},
321 {"ld1.a", LDINCREG (0x08, 0)},
322 {"ld1.a.nt1", LDINCREG (0x08, 1)},
323 {"ld1.a.nta", LDINCREG (0x08, 3)},
324 {"ld2.a", LDINCREG (0x09, 0)},
325 {"ld2.a.nt1", LDINCREG (0x09, 1)},
326 {"ld2.a.nta", LDINCREG (0x09, 3)},
327 {"ld4.a", LDINCREG (0x0a, 0)},
328 {"ld4.a.nt1", LDINCREG (0x0a, 1)},
329 {"ld4.a.nta", LDINCREG (0x0a, 3)},
330 {"ld8.a", LDINCREG (0x0b, 0)},
331 {"ld8.a.nt1", LDINCREG (0x0b, 1)},
332 {"ld8.a.nta", LDINCREG (0x0b, 3)},
333 {"ld1.sa", LDINCREG (0x0c, 0)},
334 {"ld1.sa.nt1", LDINCREG (0x0c, 1)},
335 {"ld1.sa.nta", LDINCREG (0x0c, 3)},
336 {"ld2.sa", LDINCREG (0x0d, 0)},
337 {"ld2.sa.nt1", LDINCREG (0x0d, 1)},
338 {"ld2.sa.nta", LDINCREG (0x0d, 3)},
339 {"ld4.sa", LDINCREG (0x0e, 0)},
340 {"ld4.sa.nt1", LDINCREG (0x0e, 1)},
341 {"ld4.sa.nta", LDINCREG (0x0e, 3)},
342 {"ld8.sa", LDINCREG (0x0f, 0)},
343 {"ld8.sa.nt1", LDINCREG (0x0f, 1)},
344 {"ld8.sa.nta", LDINCREG (0x0f, 3)},
345 {"ld1.bias", LDINCREG (0x10, 0)},
346 {"ld1.bias.nt1", LDINCREG (0x10, 1)},
347 {"ld1.bias.nta", LDINCREG (0x10, 3)},
348 {"ld2.bias", LDINCREG (0x11, 0)},
349 {"ld2.bias.nt1", LDINCREG (0x11, 1)},
350 {"ld2.bias.nta", LDINCREG (0x11, 3)},
351 {"ld4.bias", LDINCREG (0x12, 0)},
352 {"ld4.bias.nt1", LDINCREG (0x12, 1)},
353 {"ld4.bias.nta", LDINCREG (0x12, 3)},
354 {"ld8.bias", LDINCREG (0x13, 0)},
355 {"ld8.bias.nt1", LDINCREG (0x13, 1)},
356 {"ld8.bias.nta", LDINCREG (0x13, 3)},
357 {"ld1.acq", LDINCREG (0x14, 0)},
358 {"ld1.acq.nt1", LDINCREG (0x14, 1)},
359 {"ld1.acq.nta", LDINCREG (0x14, 3)},
360 {"ld2.acq", LDINCREG (0x15, 0)},
361 {"ld2.acq.nt1", LDINCREG (0x15, 1)},
362 {"ld2.acq.nta", LDINCREG (0x15, 3)},
363 {"ld4.acq", LDINCREG (0x16, 0)},
364 {"ld4.acq.nt1", LDINCREG (0x16, 1)},
365 {"ld4.acq.nta", LDINCREG (0x16, 3)},
366 {"ld8.acq", LDINCREG (0x17, 0)},
367 {"ld8.acq.nt1", LDINCREG (0x17, 1)},
368 {"ld8.acq.nta", LDINCREG (0x17, 3)},
369 {"ld8.fill", LDINCREG (0x1b, 0)},
370 {"ld8.fill.nt1", LDINCREG (0x1b, 1)},
371 {"ld8.fill.nta", LDINCREG (0x1b, 3)},
372 {"ld1.c.clr", LDINCREG (0x20, 0)},
373 {"ld1.c.clr.nt1", LDINCREG (0x20, 1)},
374 {"ld1.c.clr.nta", LDINCREG (0x20, 3)},
375 {"ld2.c.clr", LDINCREG (0x21, 0)},
376 {"ld2.c.clr.nt1", LDINCREG (0x21, 1)},
377 {"ld2.c.clr.nta", LDINCREG (0x21, 3)},
378 {"ld4.c.clr", LDINCREG (0x22, 0)},
379 {"ld4.c.clr.nt1", LDINCREG (0x22, 1)},
380 {"ld4.c.clr.nta", LDINCREG (0x22, 3)},
381 {"ld8.c.clr", LDINCREG (0x23, 0)},
382 {"ld8.c.clr.nt1", LDINCREG (0x23, 1)},
383 {"ld8.c.clr.nta", LDINCREG (0x23, 3)},
384 {"ld1.c.nc", LDINCREG (0x24, 0)},
385 {"ld1.c.nc.nt1", LDINCREG (0x24, 1)},
386 {"ld1.c.nc.nta", LDINCREG (0x24, 3)},
387 {"ld2.c.nc", LDINCREG (0x25, 0)},
388 {"ld2.c.nc.nt1", LDINCREG (0x25, 1)},
389 {"ld2.c.nc.nta", LDINCREG (0x25, 3)},
390 {"ld4.c.nc", LDINCREG (0x26, 0)},
391 {"ld4.c.nc.nt1", LDINCREG (0x26, 1)},
392 {"ld4.c.nc.nta", LDINCREG (0x26, 3)},
393 {"ld8.c.nc", LDINCREG (0x27, 0)},
394 {"ld8.c.nc.nt1", LDINCREG (0x27, 1)},
395 {"ld8.c.nc.nta", LDINCREG (0x27, 3)},
396 {"ld1.c.clr.acq", LDINCREG (0x28, 0)},
397 {"ld1.c.clr.acq.nt1", LDINCREG (0x28, 1)},
398 {"ld1.c.clr.acq.nta", LDINCREG (0x28, 3)},
399 {"ld2.c.clr.acq", LDINCREG (0x29, 0)},
400 {"ld2.c.clr.acq.nt1", LDINCREG (0x29, 1)},
401 {"ld2.c.clr.acq.nta", LDINCREG (0x29, 3)},
402 {"ld4.c.clr.acq", LDINCREG (0x2a, 0)},
403 {"ld4.c.clr.acq.nt1", LDINCREG (0x2a, 1)},
404 {"ld4.c.clr.acq.nta", LDINCREG (0x2a, 3)},
405 {"ld8.c.clr.acq", LDINCREG (0x2b, 0)},
406 {"ld8.c.clr.acq.nt1", LDINCREG (0x2b, 1)},
407 {"ld8.c.clr.acq.nta", LDINCREG (0x2b, 3)},
408 #undef LDINCREG
410 {"st1", M, OpMXX6aHint (4, 0, 0, 0x30, 0), {MR3, R2}, EMPTY},
411 {"st1.nta", M, OpMXX6aHint (4, 0, 0, 0x30, 3), {MR3, R2}, EMPTY},
412 {"st2", M, OpMXX6aHint (4, 0, 0, 0x31, 0), {MR3, R2}, EMPTY},
413 {"st2.nta", M, OpMXX6aHint (4, 0, 0, 0x31, 3), {MR3, R2}, EMPTY},
414 {"st4", M, OpMXX6aHint (4, 0, 0, 0x32, 0), {MR3, R2}, EMPTY},
415 {"st4.nta", M, OpMXX6aHint (4, 0, 0, 0x32, 3), {MR3, R2}, EMPTY},
416 {"st8", M, OpMXX6aHint (4, 0, 0, 0x33, 0), {MR3, R2}, EMPTY},
417 {"st8.nta", M, OpMXX6aHint (4, 0, 0, 0x33, 3), {MR3, R2}, EMPTY},
418 {"st16", M, OpMXX6aHint (4, 0, 1, 0x30, 0), {MR3, R2, AR_CSD}, EMPTY},
419 {"st16", M, OpMXX6aHint (4, 0, 1, 0x30, 0), {MR3, R2}, PSEUDO, 0, NULL},
420 {"st16.nta", M, OpMXX6aHint (4, 0, 1, 0x30, 3), {MR3, R2, AR_CSD}, EMPTY},
421 {"st16.nta", M, OpMXX6aHint (4, 0, 1, 0x30, 3), {MR3, R2}, PSEUDO, 0, NULL},
422 {"st1.rel", M, OpMXX6aHint (4, 0, 0, 0x34, 0), {MR3, R2}, EMPTY},
423 {"st1.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x34, 3), {MR3, R2}, EMPTY},
424 {"st2.rel", M, OpMXX6aHint (4, 0, 0, 0x35, 0), {MR3, R2}, EMPTY},
425 {"st2.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x35, 3), {MR3, R2}, EMPTY},
426 {"st4.rel", M, OpMXX6aHint (4, 0, 0, 0x36, 0), {MR3, R2}, EMPTY},
427 {"st4.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x36, 3), {MR3, R2}, EMPTY},
428 {"st8.rel", M, OpMXX6aHint (4, 0, 0, 0x37, 0), {MR3, R2}, EMPTY},
429 {"st8.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x37, 3), {MR3, R2}, EMPTY},
430 {"st16.rel", M, OpMXX6aHint (4, 0, 1, 0x34, 0), {MR3, R2, AR_CSD}, EMPTY},
431 {"st16.rel", M, OpMXX6aHint (4, 0, 1, 0x34, 0), {MR3, R2}, PSEUDO, 0, NULL},
432 {"st16.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2, AR_CSD}, EMPTY},
433 {"st16.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2}, PSEUDO, 0, NULL},
434 {"st8.spill", M, OpMXX6aHint (4, 0, 0, 0x3b, 0), {MR3, R2}, EMPTY},
435 {"st8.spill.nta", M, OpMXX6aHint (4, 0, 0, 0x3b, 3), {MR3, R2}, EMPTY},
437 #define CMPXCHG(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CCV}, EMPTY
438 #define CMPXCHG_P(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL
439 #define CMPXCHG16(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CSD, AR_CCV}, EMPTY
440 #define CMPXCHG16_P(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL
441 #define CMPXCHG_acq 0
442 #define CMPXCHG_rel 4
443 #define CMPXCHG_1 0
444 #define CMPXCHG_2 1
445 #define CMPXCHG_4 2
446 #define CMPXCHG_8 3
447 #define CMPXCHGn(n, s) \
448 {"cmpxchg"#n"."#s, CMPXCHG (CMPXCHG_##n|CMPXCHG_##s, 0)}, \
449 {"cmpxchg"#n"."#s, CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 0)}, \
450 {"cmpxchg"#n"."#s".nt1", CMPXCHG (CMPXCHG_##n|CMPXCHG_##s, 1)}, \
451 {"cmpxchg"#n"."#s".nt1", CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 1)}, \
452 {"cmpxchg"#n"."#s".nta", CMPXCHG (CMPXCHG_##n|CMPXCHG_##s, 3)}, \
453 {"cmpxchg"#n"."#s".nta", CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 3)}
454 #define CMP8XCHG16(s) \
455 {"cmp8xchg16."#s, CMPXCHG16 (0x20|CMPXCHG_##s, 0)}, \
456 {"cmp8xchg16."#s, CMPXCHG16_P (0x20|CMPXCHG_##s, 0)}, \
457 {"cmp8xchg16."#s".nt1", CMPXCHG16 (0x20|CMPXCHG_##s, 1)}, \
458 {"cmp8xchg16."#s".nt1", CMPXCHG16_P (0x20|CMPXCHG_##s, 1)}, \
459 {"cmp8xchg16."#s".nta", CMPXCHG16 (0x20|CMPXCHG_##s, 3)}, \
460 {"cmp8xchg16."#s".nta", CMPXCHG16_P (0x20|CMPXCHG_##s, 3)}
461 #define CMPXCHG_ALL(s) CMPXCHGn(1, s), \
462 CMPXCHGn(2, s), \
463 CMPXCHGn(4, s), \
464 CMPXCHGn(8, s), \
465 CMP8XCHG16(s)
466 CMPXCHG_ALL(acq),
467 CMPXCHG_ALL(rel),
468 #undef CMPXCHG
469 #undef CMPXCHG_P
470 #undef CMPXCHG16
471 #undef CMPXCHG16_P
472 #undef CMPXCHG_acq
473 #undef CMPXCHG_rel
474 #undef CMPXCHG_1
475 #undef CMPXCHG_2
476 #undef CMPXCHG_4
477 #undef CMPXCHG_8
478 #undef CMPXCHGn
479 #undef CMPXCHG16
480 #undef CMPXCHG_ALL
481 {"xchg1", M, OpMXX6aHint (4, 0, 1, 0x08, 0), {R1, MR3, R2}, EMPTY},
482 {"xchg1.nt1", M, OpMXX6aHint (4, 0, 1, 0x08, 1), {R1, MR3, R2}, EMPTY},
483 {"xchg1.nta", M, OpMXX6aHint (4, 0, 1, 0x08, 3), {R1, MR3, R2}, EMPTY},
484 {"xchg2", M, OpMXX6aHint (4, 0, 1, 0x09, 0), {R1, MR3, R2}, EMPTY},
485 {"xchg2.nt1", M, OpMXX6aHint (4, 0, 1, 0x09, 1), {R1, MR3, R2}, EMPTY},
486 {"xchg2.nta", M, OpMXX6aHint (4, 0, 1, 0x09, 3), {R1, MR3, R2}, EMPTY},
487 {"xchg4", M, OpMXX6aHint (4, 0, 1, 0x0a, 0), {R1, MR3, R2}, EMPTY},
488 {"xchg4.nt1", M, OpMXX6aHint (4, 0, 1, 0x0a, 1), {R1, MR3, R2}, EMPTY},
489 {"xchg4.nta", M, OpMXX6aHint (4, 0, 1, 0x0a, 3), {R1, MR3, R2}, EMPTY},
490 {"xchg8", M, OpMXX6aHint (4, 0, 1, 0x0b, 0), {R1, MR3, R2}, EMPTY},
491 {"xchg8.nt1", M, OpMXX6aHint (4, 0, 1, 0x0b, 1), {R1, MR3, R2}, EMPTY},
492 {"xchg8.nta", M, OpMXX6aHint (4, 0, 1, 0x0b, 3), {R1, MR3, R2}, EMPTY},
494 {"fetchadd4.acq", M, OpMXX6aHint (4, 0, 1, 0x12, 0), {R1, MR3, INC3}, EMPTY},
495 {"fetchadd4.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x12, 1), {R1, MR3, INC3}, EMPTY},
496 {"fetchadd4.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x12, 3), {R1, MR3, INC3}, EMPTY},
497 {"fetchadd8.acq", M, OpMXX6aHint (4, 0, 1, 0x13, 0), {R1, MR3, INC3}, EMPTY},
498 {"fetchadd8.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x13, 1), {R1, MR3, INC3}, EMPTY},
499 {"fetchadd8.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x13, 3), {R1, MR3, INC3}, EMPTY},
500 {"fetchadd4.rel", M, OpMXX6aHint (4, 0, 1, 0x16, 0), {R1, MR3, INC3}, EMPTY},
501 {"fetchadd4.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x16, 1), {R1, MR3, INC3}, EMPTY},
502 {"fetchadd4.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x16, 3), {R1, MR3, INC3}, EMPTY},
503 {"fetchadd8.rel", M, OpMXX6aHint (4, 0, 1, 0x17, 0), {R1, MR3, INC3}, EMPTY},
504 {"fetchadd8.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x17, 1), {R1, MR3, INC3}, EMPTY},
505 {"fetchadd8.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x17, 3), {R1, MR3, INC3}, EMPTY},
507 {"getf.sig", M, OpMXX6a (4, 0, 1, 0x1c), {R1, F2}, EMPTY},
508 {"getf.exp", M, OpMXX6a (4, 0, 1, 0x1d), {R1, F2}, EMPTY},
509 {"getf.s", M, OpMXX6a (4, 0, 1, 0x1e), {R1, F2}, EMPTY},
510 {"getf.d", M, OpMXX6a (4, 0, 1, 0x1f), {R1, F2}, EMPTY},
512 /* Integer load w/increment by immediate. */
513 #define LDINCIMMED(c,h) M, OpX6aHint (5, c, h), {R1, MR3, IMM9b}, POSTINC, 0, NULL
514 {"ld1", LDINCIMMED (0x00, 0)},
515 {"ld1.nt1", LDINCIMMED (0x00, 1)},
516 {"ld1.nta", LDINCIMMED (0x00, 3)},
517 {"ld2", LDINCIMMED (0x01, 0)},
518 {"ld2.nt1", LDINCIMMED (0x01, 1)},
519 {"ld2.nta", LDINCIMMED (0x01, 3)},
520 {"ld4", LDINCIMMED (0x02, 0)},
521 {"ld4.nt1", LDINCIMMED (0x02, 1)},
522 {"ld4.nta", LDINCIMMED (0x02, 3)},
523 {"ld8", LDINCIMMED (0x03, 0)},
524 {"ld8.nt1", LDINCIMMED (0x03, 1)},
525 {"ld8.nta", LDINCIMMED (0x03, 3)},
526 {"ld1.s", LDINCIMMED (0x04, 0)},
527 {"ld1.s.nt1", LDINCIMMED (0x04, 1)},
528 {"ld1.s.nta", LDINCIMMED (0x04, 3)},
529 {"ld2.s", LDINCIMMED (0x05, 0)},
530 {"ld2.s.nt1", LDINCIMMED (0x05, 1)},
531 {"ld2.s.nta", LDINCIMMED (0x05, 3)},
532 {"ld4.s", LDINCIMMED (0x06, 0)},
533 {"ld4.s.nt1", LDINCIMMED (0x06, 1)},
534 {"ld4.s.nta", LDINCIMMED (0x06, 3)},
535 {"ld8.s", LDINCIMMED (0x07, 0)},
536 {"ld8.s.nt1", LDINCIMMED (0x07, 1)},
537 {"ld8.s.nta", LDINCIMMED (0x07, 3)},
538 {"ld1.a", LDINCIMMED (0x08, 0)},
539 {"ld1.a.nt1", LDINCIMMED (0x08, 1)},
540 {"ld1.a.nta", LDINCIMMED (0x08, 3)},
541 {"ld2.a", LDINCIMMED (0x09, 0)},
542 {"ld2.a.nt1", LDINCIMMED (0x09, 1)},
543 {"ld2.a.nta", LDINCIMMED (0x09, 3)},
544 {"ld4.a", LDINCIMMED (0x0a, 0)},
545 {"ld4.a.nt1", LDINCIMMED (0x0a, 1)},
546 {"ld4.a.nta", LDINCIMMED (0x0a, 3)},
547 {"ld8.a", LDINCIMMED (0x0b, 0)},
548 {"ld8.a.nt1", LDINCIMMED (0x0b, 1)},
549 {"ld8.a.nta", LDINCIMMED (0x0b, 3)},
550 {"ld1.sa", LDINCIMMED (0x0c, 0)},
551 {"ld1.sa.nt1", LDINCIMMED (0x0c, 1)},
552 {"ld1.sa.nta", LDINCIMMED (0x0c, 3)},
553 {"ld2.sa", LDINCIMMED (0x0d, 0)},
554 {"ld2.sa.nt1", LDINCIMMED (0x0d, 1)},
555 {"ld2.sa.nta", LDINCIMMED (0x0d, 3)},
556 {"ld4.sa", LDINCIMMED (0x0e, 0)},
557 {"ld4.sa.nt1", LDINCIMMED (0x0e, 1)},
558 {"ld4.sa.nta", LDINCIMMED (0x0e, 3)},
559 {"ld8.sa", LDINCIMMED (0x0f, 0)},
560 {"ld8.sa.nt1", LDINCIMMED (0x0f, 1)},
561 {"ld8.sa.nta", LDINCIMMED (0x0f, 3)},
562 {"ld1.bias", LDINCIMMED (0x10, 0)},
563 {"ld1.bias.nt1", LDINCIMMED (0x10, 1)},
564 {"ld1.bias.nta", LDINCIMMED (0x10, 3)},
565 {"ld2.bias", LDINCIMMED (0x11, 0)},
566 {"ld2.bias.nt1", LDINCIMMED (0x11, 1)},
567 {"ld2.bias.nta", LDINCIMMED (0x11, 3)},
568 {"ld4.bias", LDINCIMMED (0x12, 0)},
569 {"ld4.bias.nt1", LDINCIMMED (0x12, 1)},
570 {"ld4.bias.nta", LDINCIMMED (0x12, 3)},
571 {"ld8.bias", LDINCIMMED (0x13, 0)},
572 {"ld8.bias.nt1", LDINCIMMED (0x13, 1)},
573 {"ld8.bias.nta", LDINCIMMED (0x13, 3)},
574 {"ld1.acq", LDINCIMMED (0x14, 0)},
575 {"ld1.acq.nt1", LDINCIMMED (0x14, 1)},
576 {"ld1.acq.nta", LDINCIMMED (0x14, 3)},
577 {"ld2.acq", LDINCIMMED (0x15, 0)},
578 {"ld2.acq.nt1", LDINCIMMED (0x15, 1)},
579 {"ld2.acq.nta", LDINCIMMED (0x15, 3)},
580 {"ld4.acq", LDINCIMMED (0x16, 0)},
581 {"ld4.acq.nt1", LDINCIMMED (0x16, 1)},
582 {"ld4.acq.nta", LDINCIMMED (0x16, 3)},
583 {"ld8.acq", LDINCIMMED (0x17, 0)},
584 {"ld8.acq.nt1", LDINCIMMED (0x17, 1)},
585 {"ld8.acq.nta", LDINCIMMED (0x17, 3)},
586 {"ld8.fill", LDINCIMMED (0x1b, 0)},
587 {"ld8.fill.nt1", LDINCIMMED (0x1b, 1)},
588 {"ld8.fill.nta", LDINCIMMED (0x1b, 3)},
589 {"ld1.c.clr", LDINCIMMED (0x20, 0)},
590 {"ld1.c.clr.nt1", LDINCIMMED (0x20, 1)},
591 {"ld1.c.clr.nta", LDINCIMMED (0x20, 3)},
592 {"ld2.c.clr", LDINCIMMED (0x21, 0)},
593 {"ld2.c.clr.nt1", LDINCIMMED (0x21, 1)},
594 {"ld2.c.clr.nta", LDINCIMMED (0x21, 3)},
595 {"ld4.c.clr", LDINCIMMED (0x22, 0)},
596 {"ld4.c.clr.nt1", LDINCIMMED (0x22, 1)},
597 {"ld4.c.clr.nta", LDINCIMMED (0x22, 3)},
598 {"ld8.c.clr", LDINCIMMED (0x23, 0)},
599 {"ld8.c.clr.nt1", LDINCIMMED (0x23, 1)},
600 {"ld8.c.clr.nta", LDINCIMMED (0x23, 3)},
601 {"ld1.c.nc", LDINCIMMED (0x24, 0)},
602 {"ld1.c.nc.nt1", LDINCIMMED (0x24, 1)},
603 {"ld1.c.nc.nta", LDINCIMMED (0x24, 3)},
604 {"ld2.c.nc", LDINCIMMED (0x25, 0)},
605 {"ld2.c.nc.nt1", LDINCIMMED (0x25, 1)},
606 {"ld2.c.nc.nta", LDINCIMMED (0x25, 3)},
607 {"ld4.c.nc", LDINCIMMED (0x26, 0)},
608 {"ld4.c.nc.nt1", LDINCIMMED (0x26, 1)},
609 {"ld4.c.nc.nta", LDINCIMMED (0x26, 3)},
610 {"ld8.c.nc", LDINCIMMED (0x27, 0)},
611 {"ld8.c.nc.nt1", LDINCIMMED (0x27, 1)},
612 {"ld8.c.nc.nta", LDINCIMMED (0x27, 3)},
613 {"ld1.c.clr.acq", LDINCIMMED (0x28, 0)},
614 {"ld1.c.clr.acq.nt1", LDINCIMMED (0x28, 1)},
615 {"ld1.c.clr.acq.nta", LDINCIMMED (0x28, 3)},
616 {"ld2.c.clr.acq", LDINCIMMED (0x29, 0)},
617 {"ld2.c.clr.acq.nt1", LDINCIMMED (0x29, 1)},
618 {"ld2.c.clr.acq.nta", LDINCIMMED (0x29, 3)},
619 {"ld4.c.clr.acq", LDINCIMMED (0x2a, 0)},
620 {"ld4.c.clr.acq.nt1", LDINCIMMED (0x2a, 1)},
621 {"ld4.c.clr.acq.nta", LDINCIMMED (0x2a, 3)},
622 {"ld8.c.clr.acq", LDINCIMMED (0x2b, 0)},
623 {"ld8.c.clr.acq.nt1", LDINCIMMED (0x2b, 1)},
624 {"ld8.c.clr.acq.nta", LDINCIMMED (0x2b, 3)},
625 #undef LDINCIMMED
627 /* Store w/increment by immediate. */
628 #define STINCIMMED(c,h) M, OpX6aHint (5, c, h), {MR3, R2, IMM9a}, POSTINC, 0, NULL
629 {"st1", STINCIMMED (0x30, 0)},
630 {"st1.nta", STINCIMMED (0x30, 3)},
631 {"st2", STINCIMMED (0x31, 0)},
632 {"st2.nta", STINCIMMED (0x31, 3)},
633 {"st4", STINCIMMED (0x32, 0)},
634 {"st4.nta", STINCIMMED (0x32, 3)},
635 {"st8", STINCIMMED (0x33, 0)},
636 {"st8.nta", STINCIMMED (0x33, 3)},
637 {"st1.rel", STINCIMMED (0x34, 0)},
638 {"st1.rel.nta", STINCIMMED (0x34, 3)},
639 {"st2.rel", STINCIMMED (0x35, 0)},
640 {"st2.rel.nta", STINCIMMED (0x35, 3)},
641 {"st4.rel", STINCIMMED (0x36, 0)},
642 {"st4.rel.nta", STINCIMMED (0x36, 3)},
643 {"st8.rel", STINCIMMED (0x37, 0)},
644 {"st8.rel.nta", STINCIMMED (0x37, 3)},
645 {"st8.spill", STINCIMMED (0x3b, 0)},
646 {"st8.spill.nta", STINCIMMED (0x3b, 3)},
647 #undef STINCIMMED
649 /* Floating-point load. */
650 {"ldfs", M, OpMXX6aHint (6, 0, 0, 0x02, 0), {F1, MR3}, EMPTY},
651 {"ldfs.nt1", M, OpMXX6aHint (6, 0, 0, 0x02, 1), {F1, MR3}, EMPTY},
652 {"ldfs.nta", M, OpMXX6aHint (6, 0, 0, 0x02, 3), {F1, MR3}, EMPTY},
653 {"ldfd", M, OpMXX6aHint (6, 0, 0, 0x03, 0), {F1, MR3}, EMPTY},
654 {"ldfd.nt1", M, OpMXX6aHint (6, 0, 0, 0x03, 1), {F1, MR3}, EMPTY},
655 {"ldfd.nta", M, OpMXX6aHint (6, 0, 0, 0x03, 3), {F1, MR3}, EMPTY},
656 {"ldf8", M, OpMXX6aHint (6, 0, 0, 0x01, 0), {F1, MR3}, EMPTY},
657 {"ldf8.nt1", M, OpMXX6aHint (6, 0, 0, 0x01, 1), {F1, MR3}, EMPTY},
658 {"ldf8.nta", M, OpMXX6aHint (6, 0, 0, 0x01, 3), {F1, MR3}, EMPTY},
659 {"ldfe", M, OpMXX6aHint (6, 0, 0, 0x00, 0), {F1, MR3}, EMPTY},
660 {"ldfe.nt1", M, OpMXX6aHint (6, 0, 0, 0x00, 1), {F1, MR3}, EMPTY},
661 {"ldfe.nta", M, OpMXX6aHint (6, 0, 0, 0x00, 3), {F1, MR3}, EMPTY},
662 {"ldfs.s", M, OpMXX6aHint (6, 0, 0, 0x06, 0), {F1, MR3}, EMPTY},
663 {"ldfs.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x06, 1), {F1, MR3}, EMPTY},
664 {"ldfs.s.nta", M, OpMXX6aHint (6, 0, 0, 0x06, 3), {F1, MR3}, EMPTY},
665 {"ldfd.s", M, OpMXX6aHint (6, 0, 0, 0x07, 0), {F1, MR3}, EMPTY},
666 {"ldfd.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x07, 1), {F1, MR3}, EMPTY},
667 {"ldfd.s.nta", M, OpMXX6aHint (6, 0, 0, 0x07, 3), {F1, MR3}, EMPTY},
668 {"ldf8.s", M, OpMXX6aHint (6, 0, 0, 0x05, 0), {F1, MR3}, EMPTY},
669 {"ldf8.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x05, 1), {F1, MR3}, EMPTY},
670 {"ldf8.s.nta", M, OpMXX6aHint (6, 0, 0, 0x05, 3), {F1, MR3}, EMPTY},
671 {"ldfe.s", M, OpMXX6aHint (6, 0, 0, 0x04, 0), {F1, MR3}, EMPTY},
672 {"ldfe.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x04, 1), {F1, MR3}, EMPTY},
673 {"ldfe.s.nta", M, OpMXX6aHint (6, 0, 0, 0x04, 3), {F1, MR3}, EMPTY},
674 {"ldfs.a", M, OpMXX6aHint (6, 0, 0, 0x0a, 0), {F1, MR3}, EMPTY},
675 {"ldfs.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x0a, 1), {F1, MR3}, EMPTY},
676 {"ldfs.a.nta", M, OpMXX6aHint (6, 0, 0, 0x0a, 3), {F1, MR3}, EMPTY},
677 {"ldfd.a", M, OpMXX6aHint (6, 0, 0, 0x0b, 0), {F1, MR3}, EMPTY},
678 {"ldfd.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x0b, 1), {F1, MR3}, EMPTY},
679 {"ldfd.a.nta", M, OpMXX6aHint (6, 0, 0, 0x0b, 3), {F1, MR3}, EMPTY},
680 {"ldf8.a", M, OpMXX6aHint (6, 0, 0, 0x09, 0), {F1, MR3}, EMPTY},
681 {"ldf8.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x09, 1), {F1, MR3}, EMPTY},
682 {"ldf8.a.nta", M, OpMXX6aHint (6, 0, 0, 0x09, 3), {F1, MR3}, EMPTY},
683 {"ldfe.a", M, OpMXX6aHint (6, 0, 0, 0x08, 0), {F1, MR3}, EMPTY},
684 {"ldfe.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x08, 1), {F1, MR3}, EMPTY},
685 {"ldfe.a.nta", M, OpMXX6aHint (6, 0, 0, 0x08, 3), {F1, MR3}, EMPTY},
686 {"ldfs.sa", M, OpMXX6aHint (6, 0, 0, 0x0e, 0), {F1, MR3}, EMPTY},
687 {"ldfs.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0e, 1), {F1, MR3}, EMPTY},
688 {"ldfs.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0e, 3), {F1, MR3}, EMPTY},
689 {"ldfd.sa", M, OpMXX6aHint (6, 0, 0, 0x0f, 0), {F1, MR3}, EMPTY},
690 {"ldfd.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0f, 1), {F1, MR3}, EMPTY},
691 {"ldfd.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0f, 3), {F1, MR3}, EMPTY},
692 {"ldf8.sa", M, OpMXX6aHint (6, 0, 0, 0x0d, 0), {F1, MR3}, EMPTY},
693 {"ldf8.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0d, 1), {F1, MR3}, EMPTY},
694 {"ldf8.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0d, 3), {F1, MR3}, EMPTY},
695 {"ldfe.sa", M, OpMXX6aHint (6, 0, 0, 0x0c, 0), {F1, MR3}, EMPTY},
696 {"ldfe.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0c, 1), {F1, MR3}, EMPTY},
697 {"ldfe.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0c, 3), {F1, MR3}, EMPTY},
698 {"ldf.fill", M, OpMXX6aHint (6, 0, 0, 0x1b, 0), {F1, MR3}, EMPTY},
699 {"ldf.fill.nt1", M, OpMXX6aHint (6, 0, 0, 0x1b, 1), {F1, MR3}, EMPTY},
700 {"ldf.fill.nta", M, OpMXX6aHint (6, 0, 0, 0x1b, 3), {F1, MR3}, EMPTY},
701 {"ldfs.c.clr", M, OpMXX6aHint (6, 0, 0, 0x22, 0), {F1, MR3}, EMPTY},
702 {"ldfs.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x22, 1), {F1, MR3}, EMPTY},
703 {"ldfs.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x22, 3), {F1, MR3}, EMPTY},
704 {"ldfd.c.clr", M, OpMXX6aHint (6, 0, 0, 0x23, 0), {F1, MR3}, EMPTY},
705 {"ldfd.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x23, 1), {F1, MR3}, EMPTY},
706 {"ldfd.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x23, 3), {F1, MR3}, EMPTY},
707 {"ldf8.c.clr", M, OpMXX6aHint (6, 0, 0, 0x21, 0), {F1, MR3}, EMPTY},
708 {"ldf8.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x21, 1), {F1, MR3}, EMPTY},
709 {"ldf8.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x21, 3), {F1, MR3}, EMPTY},
710 {"ldfe.c.clr", M, OpMXX6aHint (6, 0, 0, 0x20, 0), {F1, MR3}, EMPTY},
711 {"ldfe.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x20, 1), {F1, MR3}, EMPTY},
712 {"ldfe.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x20, 3), {F1, MR3}, EMPTY},
713 {"ldfs.c.nc", M, OpMXX6aHint (6, 0, 0, 0x26, 0), {F1, MR3}, EMPTY},
714 {"ldfs.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x26, 1), {F1, MR3}, EMPTY},
715 {"ldfs.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x26, 3), {F1, MR3}, EMPTY},
716 {"ldfd.c.nc", M, OpMXX6aHint (6, 0, 0, 0x27, 0), {F1, MR3}, EMPTY},
717 {"ldfd.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x27, 1), {F1, MR3}, EMPTY},
718 {"ldfd.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x27, 3), {F1, MR3}, EMPTY},
719 {"ldf8.c.nc", M, OpMXX6aHint (6, 0, 0, 0x25, 0), {F1, MR3}, EMPTY},
720 {"ldf8.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x25, 1), {F1, MR3}, EMPTY},
721 {"ldf8.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x25, 3), {F1, MR3}, EMPTY},
722 {"ldfe.c.nc", M, OpMXX6aHint (6, 0, 0, 0x24, 0), {F1, MR3}, EMPTY},
723 {"ldfe.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x24, 1), {F1, MR3}, EMPTY},
724 {"ldfe.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x24, 3), {F1, MR3}, EMPTY},
726 /* Floating-point load w/increment by register. */
727 #define FLDINCREG(c,h) M, OpMXX6aHint (6, 1, 0, c, h), {F1, MR3, R2}, POSTINC, 0, NULL
728 {"ldfs", FLDINCREG (0x02, 0)},
729 {"ldfs.nt1", FLDINCREG (0x02, 1)},
730 {"ldfs.nta", FLDINCREG (0x02, 3)},
731 {"ldfd", FLDINCREG (0x03, 0)},
732 {"ldfd.nt1", FLDINCREG (0x03, 1)},
733 {"ldfd.nta", FLDINCREG (0x03, 3)},
734 {"ldf8", FLDINCREG (0x01, 0)},
735 {"ldf8.nt1", FLDINCREG (0x01, 1)},
736 {"ldf8.nta", FLDINCREG (0x01, 3)},
737 {"ldfe", FLDINCREG (0x00, 0)},
738 {"ldfe.nt1", FLDINCREG (0x00, 1)},
739 {"ldfe.nta", FLDINCREG (0x00, 3)},
740 {"ldfs.s", FLDINCREG (0x06, 0)},
741 {"ldfs.s.nt1", FLDINCREG (0x06, 1)},
742 {"ldfs.s.nta", FLDINCREG (0x06, 3)},
743 {"ldfd.s", FLDINCREG (0x07, 0)},
744 {"ldfd.s.nt1", FLDINCREG (0x07, 1)},
745 {"ldfd.s.nta", FLDINCREG (0x07, 3)},
746 {"ldf8.s", FLDINCREG (0x05, 0)},
747 {"ldf8.s.nt1", FLDINCREG (0x05, 1)},
748 {"ldf8.s.nta", FLDINCREG (0x05, 3)},
749 {"ldfe.s", FLDINCREG (0x04, 0)},
750 {"ldfe.s.nt1", FLDINCREG (0x04, 1)},
751 {"ldfe.s.nta", FLDINCREG (0x04, 3)},
752 {"ldfs.a", FLDINCREG (0x0a, 0)},
753 {"ldfs.a.nt1", FLDINCREG (0x0a, 1)},
754 {"ldfs.a.nta", FLDINCREG (0x0a, 3)},
755 {"ldfd.a", FLDINCREG (0x0b, 0)},
756 {"ldfd.a.nt1", FLDINCREG (0x0b, 1)},
757 {"ldfd.a.nta", FLDINCREG (0x0b, 3)},
758 {"ldf8.a", FLDINCREG (0x09, 0)},
759 {"ldf8.a.nt1", FLDINCREG (0x09, 1)},
760 {"ldf8.a.nta", FLDINCREG (0x09, 3)},
761 {"ldfe.a", FLDINCREG (0x08, 0)},
762 {"ldfe.a.nt1", FLDINCREG (0x08, 1)},
763 {"ldfe.a.nta", FLDINCREG (0x08, 3)},
764 {"ldfs.sa", FLDINCREG (0x0e, 0)},
765 {"ldfs.sa.nt1", FLDINCREG (0x0e, 1)},
766 {"ldfs.sa.nta", FLDINCREG (0x0e, 3)},
767 {"ldfd.sa", FLDINCREG (0x0f, 0)},
768 {"ldfd.sa.nt1", FLDINCREG (0x0f, 1)},
769 {"ldfd.sa.nta", FLDINCREG (0x0f, 3)},
770 {"ldf8.sa", FLDINCREG (0x0d, 0)},
771 {"ldf8.sa.nt1", FLDINCREG (0x0d, 1)},
772 {"ldf8.sa.nta", FLDINCREG (0x0d, 3)},
773 {"ldfe.sa", FLDINCREG (0x0c, 0)},
774 {"ldfe.sa.nt1", FLDINCREG (0x0c, 1)},
775 {"ldfe.sa.nta", FLDINCREG (0x0c, 3)},
776 {"ldf.fill", FLDINCREG (0x1b, 0)},
777 {"ldf.fill.nt1", FLDINCREG (0x1b, 1)},
778 {"ldf.fill.nta", FLDINCREG (0x1b, 3)},
779 {"ldfs.c.clr", FLDINCREG (0x22, 0)},
780 {"ldfs.c.clr.nt1", FLDINCREG (0x22, 1)},
781 {"ldfs.c.clr.nta", FLDINCREG (0x22, 3)},
782 {"ldfd.c.clr", FLDINCREG (0x23, 0)},
783 {"ldfd.c.clr.nt1", FLDINCREG (0x23, 1)},
784 {"ldfd.c.clr.nta", FLDINCREG (0x23, 3)},
785 {"ldf8.c.clr", FLDINCREG (0x21, 0)},
786 {"ldf8.c.clr.nt1", FLDINCREG (0x21, 1)},
787 {"ldf8.c.clr.nta", FLDINCREG (0x21, 3)},
788 {"ldfe.c.clr", FLDINCREG (0x20, 0)},
789 {"ldfe.c.clr.nt1", FLDINCREG (0x20, 1)},
790 {"ldfe.c.clr.nta", FLDINCREG (0x20, 3)},
791 {"ldfs.c.nc", FLDINCREG (0x26, 0)},
792 {"ldfs.c.nc.nt1", FLDINCREG (0x26, 1)},
793 {"ldfs.c.nc.nta", FLDINCREG (0x26, 3)},
794 {"ldfd.c.nc", FLDINCREG (0x27, 0)},
795 {"ldfd.c.nc.nt1", FLDINCREG (0x27, 1)},
796 {"ldfd.c.nc.nta", FLDINCREG (0x27, 3)},
797 {"ldf8.c.nc", FLDINCREG (0x25, 0)},
798 {"ldf8.c.nc.nt1", FLDINCREG (0x25, 1)},
799 {"ldf8.c.nc.nta", FLDINCREG (0x25, 3)},
800 {"ldfe.c.nc", FLDINCREG (0x24, 0)},
801 {"ldfe.c.nc.nt1", FLDINCREG (0x24, 1)},
802 {"ldfe.c.nc.nta", FLDINCREG (0x24, 3)},
803 #undef FLDINCREG
805 /* Floating-point store. */
806 {"stfs", M, OpMXX6aHint (6, 0, 0, 0x32, 0), {MR3, F2}, EMPTY},
807 {"stfs.nta", M, OpMXX6aHint (6, 0, 0, 0x32, 3), {MR3, F2}, EMPTY},
808 {"stfd", M, OpMXX6aHint (6, 0, 0, 0x33, 0), {MR3, F2}, EMPTY},
809 {"stfd.nta", M, OpMXX6aHint (6, 0, 0, 0x33, 3), {MR3, F2}, EMPTY},
810 {"stf8", M, OpMXX6aHint (6, 0, 0, 0x31, 0), {MR3, F2}, EMPTY},
811 {"stf8.nta", M, OpMXX6aHint (6, 0, 0, 0x31, 3), {MR3, F2}, EMPTY},
812 {"stfe", M, OpMXX6aHint (6, 0, 0, 0x30, 0), {MR3, F2}, EMPTY},
813 {"stfe.nta", M, OpMXX6aHint (6, 0, 0, 0x30, 3), {MR3, F2}, EMPTY},
814 {"stf.spill", M, OpMXX6aHint (6, 0, 0, 0x3b, 0), {MR3, F2}, EMPTY},
815 {"stf.spill.nta", M, OpMXX6aHint (6, 0, 0, 0x3b, 3), {MR3, F2}, EMPTY},
817 /* Floating-point load pair. */
818 {"ldfps", M2, OpMXX6aHint (6, 0, 1, 0x02, 0), {F1, F2, MR3}, EMPTY},
819 {"ldfps.nt1", M2, OpMXX6aHint (6, 0, 1, 0x02, 1), {F1, F2, MR3}, EMPTY},
820 {"ldfps.nta", M2, OpMXX6aHint (6, 0, 1, 0x02, 3), {F1, F2, MR3}, EMPTY},
821 {"ldfpd", M2, OpMXX6aHint (6, 0, 1, 0x03, 0), {F1, F2, MR3}, EMPTY},
822 {"ldfpd.nt1", M2, OpMXX6aHint (6, 0, 1, 0x03, 1), {F1, F2, MR3}, EMPTY},
823 {"ldfpd.nta", M2, OpMXX6aHint (6, 0, 1, 0x03, 3), {F1, F2, MR3}, EMPTY},
824 {"ldfp8", M2, OpMXX6aHint (6, 0, 1, 0x01, 0), {F1, F2, MR3}, EMPTY},
825 {"ldfp8.nt1", M2, OpMXX6aHint (6, 0, 1, 0x01, 1), {F1, F2, MR3}, EMPTY},
826 {"ldfp8.nta", M2, OpMXX6aHint (6, 0, 1, 0x01, 3), {F1, F2, MR3}, EMPTY},
827 {"ldfps.s", M2, OpMXX6aHint (6, 0, 1, 0x06, 0), {F1, F2, MR3}, EMPTY},
828 {"ldfps.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x06, 1), {F1, F2, MR3}, EMPTY},
829 {"ldfps.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x06, 3), {F1, F2, MR3}, EMPTY},
830 {"ldfpd.s", M2, OpMXX6aHint (6, 0, 1, 0x07, 0), {F1, F2, MR3}, EMPTY},
831 {"ldfpd.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x07, 1), {F1, F2, MR3}, EMPTY},
832 {"ldfpd.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x07, 3), {F1, F2, MR3}, EMPTY},
833 {"ldfp8.s", M2, OpMXX6aHint (6, 0, 1, 0x05, 0), {F1, F2, MR3}, EMPTY},
834 {"ldfp8.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x05, 1), {F1, F2, MR3}, EMPTY},
835 {"ldfp8.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x05, 3), {F1, F2, MR3}, EMPTY},
836 {"ldfps.a", M2, OpMXX6aHint (6, 0, 1, 0x0a, 0), {F1, F2, MR3}, EMPTY},
837 {"ldfps.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0a, 1), {F1, F2, MR3}, EMPTY},
838 {"ldfps.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x0a, 3), {F1, F2, MR3}, EMPTY},
839 {"ldfpd.a", M2, OpMXX6aHint (6, 0, 1, 0x0b, 0), {F1, F2, MR3}, EMPTY},
840 {"ldfpd.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0b, 1), {F1, F2, MR3}, EMPTY},
841 {"ldfpd.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x0b, 3), {F1, F2, MR3}, EMPTY},
842 {"ldfp8.a", M2, OpMXX6aHint (6, 0, 1, 0x09, 0), {F1, F2, MR3}, EMPTY},
843 {"ldfp8.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x09, 1), {F1, F2, MR3}, EMPTY},
844 {"ldfp8.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x09, 3), {F1, F2, MR3}, EMPTY},
845 {"ldfps.sa", M2, OpMXX6aHint (6, 0, 1, 0x0e, 0), {F1, F2, MR3}, EMPTY},
846 {"ldfps.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0e, 1), {F1, F2, MR3}, EMPTY},
847 {"ldfps.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0e, 3), {F1, F2, MR3}, EMPTY},
848 {"ldfpd.sa", M2, OpMXX6aHint (6, 0, 1, 0x0f, 0), {F1, F2, MR3}, EMPTY},
849 {"ldfpd.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0f, 1), {F1, F2, MR3}, EMPTY},
850 {"ldfpd.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0f, 3), {F1, F2, MR3}, EMPTY},
851 {"ldfp8.sa", M2, OpMXX6aHint (6, 0, 1, 0x0d, 0), {F1, F2, MR3}, EMPTY},
852 {"ldfp8.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0d, 1), {F1, F2, MR3}, EMPTY},
853 {"ldfp8.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0d, 3), {F1, F2, MR3}, EMPTY},
854 {"ldfps.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x22, 0), {F1, F2, MR3}, EMPTY},
855 {"ldfps.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x22, 1), {F1, F2, MR3}, EMPTY},
856 {"ldfps.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x22, 3), {F1, F2, MR3}, EMPTY},
857 {"ldfpd.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x23, 0), {F1, F2, MR3}, EMPTY},
858 {"ldfpd.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x23, 1), {F1, F2, MR3}, EMPTY},
859 {"ldfpd.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x23, 3), {F1, F2, MR3}, EMPTY},
860 {"ldfp8.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x21, 0), {F1, F2, MR3}, EMPTY},
861 {"ldfp8.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x21, 1), {F1, F2, MR3}, EMPTY},
862 {"ldfp8.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x21, 3), {F1, F2, MR3}, EMPTY},
863 {"ldfps.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x26, 0), {F1, F2, MR3}, EMPTY},
864 {"ldfps.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x26, 1), {F1, F2, MR3}, EMPTY},
865 {"ldfps.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x26, 3), {F1, F2, MR3}, EMPTY},
866 {"ldfpd.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x27, 0), {F1, F2, MR3}, EMPTY},
867 {"ldfpd.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x27, 1), {F1, F2, MR3}, EMPTY},
868 {"ldfpd.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x27, 3), {F1, F2, MR3}, EMPTY},
869 {"ldfp8.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x25, 0), {F1, F2, MR3}, EMPTY},
870 {"ldfp8.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x25, 1), {F1, F2, MR3}, EMPTY},
871 {"ldfp8.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x25, 3), {F1, F2, MR3}, EMPTY},
873 /* Floating-point load pair w/increment by immediate. */
874 #define LD(a,b,c) M2, OpMXX6aHint (6, 1, 1, a, b), {F1, F2, MR3, c}, POSTINC, 0, NULL
875 {"ldfps", LD (0x02, 0, C8)},
876 {"ldfps.nt1", LD (0x02, 1, C8)},
877 {"ldfps.nta", LD (0x02, 3, C8)},
878 {"ldfpd", LD (0x03, 0, C16)},
879 {"ldfpd.nt1", LD (0x03, 1, C16)},
880 {"ldfpd.nta", LD (0x03, 3, C16)},
881 {"ldfp8", LD (0x01, 0, C16)},
882 {"ldfp8.nt1", LD (0x01, 1, C16)},
883 {"ldfp8.nta", LD (0x01, 3, C16)},
884 {"ldfps.s", LD (0x06, 0, C8)},
885 {"ldfps.s.nt1", LD (0x06, 1, C8)},
886 {"ldfps.s.nta", LD (0x06, 3, C8)},
887 {"ldfpd.s", LD (0x07, 0, C16)},
888 {"ldfpd.s.nt1", LD (0x07, 1, C16)},
889 {"ldfpd.s.nta", LD (0x07, 3, C16)},
890 {"ldfp8.s", LD (0x05, 0, C16)},
891 {"ldfp8.s.nt1", LD (0x05, 1, C16)},
892 {"ldfp8.s.nta", LD (0x05, 3, C16)},
893 {"ldfps.a", LD (0x0a, 0, C8)},
894 {"ldfps.a.nt1", LD (0x0a, 1, C8)},
895 {"ldfps.a.nta", LD (0x0a, 3, C8)},
896 {"ldfpd.a", LD (0x0b, 0, C16)},
897 {"ldfpd.a.nt1", LD (0x0b, 1, C16)},
898 {"ldfpd.a.nta", LD (0x0b, 3, C16)},
899 {"ldfp8.a", LD (0x09, 0, C16)},
900 {"ldfp8.a.nt1", LD (0x09, 1, C16)},
901 {"ldfp8.a.nta", LD (0x09, 3, C16)},
902 {"ldfps.sa", LD (0x0e, 0, C8)},
903 {"ldfps.sa.nt1", LD (0x0e, 1, C8)},
904 {"ldfps.sa.nta", LD (0x0e, 3, C8)},
905 {"ldfpd.sa", LD (0x0f, 0, C16)},
906 {"ldfpd.sa.nt1", LD (0x0f, 1, C16)},
907 {"ldfpd.sa.nta", LD (0x0f, 3, C16)},
908 {"ldfp8.sa", LD (0x0d, 0, C16)},
909 {"ldfp8.sa.nt1", LD (0x0d, 1, C16)},
910 {"ldfp8.sa.nta", LD (0x0d, 3, C16)},
911 {"ldfps.c.clr", LD (0x22, 0, C8)},
912 {"ldfps.c.clr.nt1", LD (0x22, 1, C8)},
913 {"ldfps.c.clr.nta", LD (0x22, 3, C8)},
914 {"ldfpd.c.clr", LD (0x23, 0, C16)},
915 {"ldfpd.c.clr.nt1", LD (0x23, 1, C16)},
916 {"ldfpd.c.clr.nta", LD (0x23, 3, C16)},
917 {"ldfp8.c.clr", LD (0x21, 0, C16)},
918 {"ldfp8.c.clr.nt1", LD (0x21, 1, C16)},
919 {"ldfp8.c.clr.nta", LD (0x21, 3, C16)},
920 {"ldfps.c.nc", LD (0x26, 0, C8)},
921 {"ldfps.c.nc.nt1", LD (0x26, 1, C8)},
922 {"ldfps.c.nc.nta", LD (0x26, 3, C8)},
923 {"ldfpd.c.nc", LD (0x27, 0, C16)},
924 {"ldfpd.c.nc.nt1", LD (0x27, 1, C16)},
925 {"ldfpd.c.nc.nta", LD (0x27, 3, C16)},
926 {"ldfp8.c.nc", LD (0x25, 0, C16)},
927 {"ldfp8.c.nc.nt1", LD (0x25, 1, C16)},
928 {"ldfp8.c.nc.nta", LD (0x25, 3, C16)},
929 #undef LD
931 /* Line prefetch. */
932 {"lfetch", M0, OpMXX6aHint (6, 0, 0, 0x2c, 0), {MR3}, EMPTY},
933 {"lfetch.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2c, 1), {MR3}, EMPTY},
934 {"lfetch.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2c, 2), {MR3}, EMPTY},
935 {"lfetch.nta", M0, OpMXX6aHint (6, 0, 0, 0x2c, 3), {MR3}, EMPTY},
936 {"lfetch.excl", M0, OpMXX6aHint (6, 0, 0, 0x2d, 0), {MR3}, EMPTY},
937 {"lfetch.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2d, 1), {MR3}, EMPTY},
938 {"lfetch.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2d, 2), {MR3}, EMPTY},
939 {"lfetch.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2d, 3), {MR3}, EMPTY},
940 {"lfetch.fault", M0, OpMXX6aHint (6, 0, 0, 0x2e, 0), {MR3}, EMPTY},
941 {"lfetch.fault.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2e, 1), {MR3}, EMPTY},
942 {"lfetch.fault.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2e, 2), {MR3}, EMPTY},
943 {"lfetch.fault.nta", M0, OpMXX6aHint (6, 0, 0, 0x2e, 3), {MR3}, EMPTY},
944 {"lfetch.fault.excl", M0, OpMXX6aHint (6, 0, 0, 0x2f, 0), {MR3}, EMPTY},
945 {"lfetch.fault.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2f, 1), {MR3}, EMPTY},
946 {"lfetch.fault.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2f, 2), {MR3}, EMPTY},
947 {"lfetch.fault.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2f, 3), {MR3}, EMPTY},
949 /* Line prefetch w/increment by register. */
950 #define LFETCHINCREG(c,h) M0, OpMXX6aHint (6, 1, 0, c, h), {MR3, R2}, POSTINC, 0, NULL
951 {"lfetch", LFETCHINCREG (0x2c, 0)},
952 {"lfetch.nt1", LFETCHINCREG (0x2c, 1)},
953 {"lfetch.nt2", LFETCHINCREG (0x2c, 2)},
954 {"lfetch.nta", LFETCHINCREG (0x2c, 3)},
955 {"lfetch.excl", LFETCHINCREG (0x2d, 0)},
956 {"lfetch.excl.nt1", LFETCHINCREG (0x2d, 1)},
957 {"lfetch.excl.nt2", LFETCHINCREG (0x2d, 2)},
958 {"lfetch.excl.nta", LFETCHINCREG (0x2d, 3)},
959 {"lfetch.fault", LFETCHINCREG (0x2e, 0)},
960 {"lfetch.fault.nt1", LFETCHINCREG (0x2e, 1)},
961 {"lfetch.fault.nt2", LFETCHINCREG (0x2e, 2)},
962 {"lfetch.fault.nta", LFETCHINCREG (0x2e, 3)},
963 {"lfetch.fault.excl", LFETCHINCREG (0x2f, 0)},
964 {"lfetch.fault.excl.nt1", LFETCHINCREG (0x2f, 1)},
965 {"lfetch.fault.excl.nt2", LFETCHINCREG (0x2f, 2)},
966 {"lfetch.fault.excl.nta", LFETCHINCREG (0x2f, 3)},
967 #undef LFETCHINCREG
969 /* Semaphore operations. */
970 {"setf.sig", M, OpMXX6a (6, 0, 1, 0x1c), {F1, R2}, EMPTY},
971 {"setf.exp", M, OpMXX6a (6, 0, 1, 0x1d), {F1, R2}, EMPTY},
972 {"setf.s", M, OpMXX6a (6, 0, 1, 0x1e), {F1, R2}, EMPTY},
973 {"setf.d", M, OpMXX6a (6, 0, 1, 0x1f), {F1, R2}, EMPTY},
975 /* Floating-point load w/increment by immediate. */
976 #define FLDINCIMMED(c,h) M, OpX6aHint (7, c, h), {F1, MR3, IMM9b}, POSTINC, 0, NULL
977 {"ldfs", FLDINCIMMED (0x02, 0)},
978 {"ldfs.nt1", FLDINCIMMED (0x02, 1)},
979 {"ldfs.nta", FLDINCIMMED (0x02, 3)},
980 {"ldfd", FLDINCIMMED (0x03, 0)},
981 {"ldfd.nt1", FLDINCIMMED (0x03, 1)},
982 {"ldfd.nta", FLDINCIMMED (0x03, 3)},
983 {"ldf8", FLDINCIMMED (0x01, 0)},
984 {"ldf8.nt1", FLDINCIMMED (0x01, 1)},
985 {"ldf8.nta", FLDINCIMMED (0x01, 3)},
986 {"ldfe", FLDINCIMMED (0x00, 0)},
987 {"ldfe.nt1", FLDINCIMMED (0x00, 1)},
988 {"ldfe.nta", FLDINCIMMED (0x00, 3)},
989 {"ldfs.s", FLDINCIMMED (0x06, 0)},
990 {"ldfs.s.nt1", FLDINCIMMED (0x06, 1)},
991 {"ldfs.s.nta", FLDINCIMMED (0x06, 3)},
992 {"ldfd.s", FLDINCIMMED (0x07, 0)},
993 {"ldfd.s.nt1", FLDINCIMMED (0x07, 1)},
994 {"ldfd.s.nta", FLDINCIMMED (0x07, 3)},
995 {"ldf8.s", FLDINCIMMED (0x05, 0)},
996 {"ldf8.s.nt1", FLDINCIMMED (0x05, 1)},
997 {"ldf8.s.nta", FLDINCIMMED (0x05, 3)},
998 {"ldfe.s", FLDINCIMMED (0x04, 0)},
999 {"ldfe.s.nt1", FLDINCIMMED (0x04, 1)},
1000 {"ldfe.s.nta", FLDINCIMMED (0x04, 3)},
1001 {"ldfs.a", FLDINCIMMED (0x0a, 0)},
1002 {"ldfs.a.nt1", FLDINCIMMED (0x0a, 1)},
1003 {"ldfs.a.nta", FLDINCIMMED (0x0a, 3)},
1004 {"ldfd.a", FLDINCIMMED (0x0b, 0)},
1005 {"ldfd.a.nt1", FLDINCIMMED (0x0b, 1)},
1006 {"ldfd.a.nta", FLDINCIMMED (0x0b, 3)},
1007 {"ldf8.a", FLDINCIMMED (0x09, 0)},
1008 {"ldf8.a.nt1", FLDINCIMMED (0x09, 1)},
1009 {"ldf8.a.nta", FLDINCIMMED (0x09, 3)},
1010 {"ldfe.a", FLDINCIMMED (0x08, 0)},
1011 {"ldfe.a.nt1", FLDINCIMMED (0x08, 1)},
1012 {"ldfe.a.nta", FLDINCIMMED (0x08, 3)},
1013 {"ldfs.sa", FLDINCIMMED (0x0e, 0)},
1014 {"ldfs.sa.nt1", FLDINCIMMED (0x0e, 1)},
1015 {"ldfs.sa.nta", FLDINCIMMED (0x0e, 3)},
1016 {"ldfd.sa", FLDINCIMMED (0x0f, 0)},
1017 {"ldfd.sa.nt1", FLDINCIMMED (0x0f, 1)},
1018 {"ldfd.sa.nta", FLDINCIMMED (0x0f, 3)},
1019 {"ldf8.sa", FLDINCIMMED (0x0d, 0)},
1020 {"ldf8.sa.nt1", FLDINCIMMED (0x0d, 1)},
1021 {"ldf8.sa.nta", FLDINCIMMED (0x0d, 3)},
1022 {"ldfe.sa", FLDINCIMMED (0x0c, 0)},
1023 {"ldfe.sa.nt1", FLDINCIMMED (0x0c, 1)},
1024 {"ldfe.sa.nta", FLDINCIMMED (0x0c, 3)},
1025 {"ldf.fill", FLDINCIMMED (0x1b, 0)},
1026 {"ldf.fill.nt1", FLDINCIMMED (0x1b, 1)},
1027 {"ldf.fill.nta", FLDINCIMMED (0x1b, 3)},
1028 {"ldfs.c.clr", FLDINCIMMED (0x22, 0)},
1029 {"ldfs.c.clr.nt1", FLDINCIMMED (0x22, 1)},
1030 {"ldfs.c.clr.nta", FLDINCIMMED (0x22, 3)},
1031 {"ldfd.c.clr", FLDINCIMMED (0x23, 0)},
1032 {"ldfd.c.clr.nt1", FLDINCIMMED (0x23, 1)},
1033 {"ldfd.c.clr.nta", FLDINCIMMED (0x23, 3)},
1034 {"ldf8.c.clr", FLDINCIMMED (0x21, 0)},
1035 {"ldf8.c.clr.nt1", FLDINCIMMED (0x21, 1)},
1036 {"ldf8.c.clr.nta", FLDINCIMMED (0x21, 3)},
1037 {"ldfe.c.clr", FLDINCIMMED (0x20, 0)},
1038 {"ldfe.c.clr.nt1", FLDINCIMMED (0x20, 1)},
1039 {"ldfe.c.clr.nta", FLDINCIMMED (0x20, 3)},
1040 {"ldfs.c.nc", FLDINCIMMED (0x26, 0)},
1041 {"ldfs.c.nc.nt1", FLDINCIMMED (0x26, 1)},
1042 {"ldfs.c.nc.nta", FLDINCIMMED (0x26, 3)},
1043 {"ldfd.c.nc", FLDINCIMMED (0x27, 0)},
1044 {"ldfd.c.nc.nt1", FLDINCIMMED (0x27, 1)},
1045 {"ldfd.c.nc.nta", FLDINCIMMED (0x27, 3)},
1046 {"ldf8.c.nc", FLDINCIMMED (0x25, 0)},
1047 {"ldf8.c.nc.nt1", FLDINCIMMED (0x25, 1)},
1048 {"ldf8.c.nc.nta", FLDINCIMMED (0x25, 3)},
1049 {"ldfe.c.nc", FLDINCIMMED (0x24, 0)},
1050 {"ldfe.c.nc.nt1", FLDINCIMMED (0x24, 1)},
1051 {"ldfe.c.nc.nta", FLDINCIMMED (0x24, 3)},
1052 #undef FLDINCIMMED
1054 /* Floating-point store w/increment by immediate. */
1055 #define FSTINCIMMED(c,h) M, OpX6aHint (7, c, h), {MR3, F2, IMM9a}, POSTINC, 0, NULL
1056 {"stfs", FSTINCIMMED (0x32, 0)},
1057 {"stfs.nta", FSTINCIMMED (0x32, 3)},
1058 {"stfd", FSTINCIMMED (0x33, 0)},
1059 {"stfd.nta", FSTINCIMMED (0x33, 3)},
1060 {"stf8", FSTINCIMMED (0x31, 0)},
1061 {"stf8.nta", FSTINCIMMED (0x31, 3)},
1062 {"stfe", FSTINCIMMED (0x30, 0)},
1063 {"stfe.nta", FSTINCIMMED (0x30, 3)},
1064 {"stf.spill", FSTINCIMMED (0x3b, 0)},
1065 {"stf.spill.nta", FSTINCIMMED (0x3b, 3)},
1066 #undef FSTINCIMMED
1068 /* Line prefetch w/increment by immediate. */
1069 #define LFETCHINCIMMED(c,h) M0, OpX6aHint (7, c, h), {MR3, IMM9b}, POSTINC, 0, NULL
1070 {"lfetch", LFETCHINCIMMED (0x2c, 0)},
1071 {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1)},
1072 {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2)},
1073 {"lfetch.nta", LFETCHINCIMMED (0x2c, 3)},
1074 {"lfetch.excl", LFETCHINCIMMED (0x2d, 0)},
1075 {"lfetch.excl.nt1", LFETCHINCIMMED (0x2d, 1)},
1076 {"lfetch.excl.nt2", LFETCHINCIMMED (0x2d, 2)},
1077 {"lfetch.excl.nta", LFETCHINCIMMED (0x2d, 3)},
1078 {"lfetch.fault", LFETCHINCIMMED (0x2e, 0)},
1079 {"lfetch.fault.nt1", LFETCHINCIMMED (0x2e, 1)},
1080 {"lfetch.fault.nt2", LFETCHINCIMMED (0x2e, 2)},
1081 {"lfetch.fault.nta", LFETCHINCIMMED (0x2e, 3)},
1082 {"lfetch.fault.excl", LFETCHINCIMMED (0x2f, 0)},
1083 {"lfetch.fault.excl.nt1", LFETCHINCIMMED (0x2f, 1)},
1084 {"lfetch.fault.excl.nt2", LFETCHINCIMMED (0x2f, 2)},
1085 {"lfetch.fault.excl.nta", LFETCHINCIMMED (0x2f, 3)},
1086 #undef LFETCHINCIMMED
1088 {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
1091 #undef M0
1092 #undef M
1093 #undef M2
1094 #undef bM
1095 #undef bX
1096 #undef bX2
1097 #undef bX3
1098 #undef bX4
1099 #undef bX6a
1100 #undef bX6b
1101 #undef bHint
1102 #undef mM
1103 #undef mX
1104 #undef mX2
1105 #undef mX3
1106 #undef mX4
1107 #undef mX6a
1108 #undef mX6b
1109 #undef mHint
1110 #undef OpX3
1111 #undef OpX3X6b
1112 #undef OpX3X4
1113 #undef OpX3X4X2
1114 #undef OpX6aHint
1115 #undef OpXX6aHint
1116 #undef OpMXX6a
1117 #undef OpMXX6aHint
1118 #undef EMPTY