1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
132 /* The following pseudo-registers are used for unwind directives only: */
140 DYNREG_GR
= 0, /* dynamic general purpose register */
141 DYNREG_FR
, /* dynamic floating point register */
142 DYNREG_PR
, /* dynamic predicate register */
146 enum operand_match_result
149 OPERAND_OUT_OF_RANGE
,
153 /* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
159 struct label_fix
*next
;
161 bfd_boolean dw2_mark_labels
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";{}";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
230 that are predicatable. */
233 /* Optimize for which CPU. */
240 /* What to do when hint.b is used. */
252 explicit_mode
: 1, /* which mode we're in */
253 default_explicit_mode
: 1, /* which mode is the default */
254 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
256 keep_pending_output
: 1;
258 /* What to do when something is wrong with unwind directives. */
261 unwind_check_warning
,
265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
267 the end_of_insn_group for the last instruction in a bundle. */
269 int num_slots_in_use
;
273 end_of_insn_group
: 1,
274 manual_bundling_on
: 1,
275 manual_bundling_off
: 1,
276 loc_directive_seen
: 1;
277 signed char user_template
; /* user-selected template, if any */
278 unsigned char qp_regno
; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
285 bfd_reloc_code_real_type code
;
286 enum ia64_opnd opnd
; /* type of operand in need of fix */
287 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
288 expressionS expr
; /* the value to be inserted */
290 fixup
[2]; /* at most two fixups per insn */
291 struct ia64_opcode
*idesc
;
292 struct label_fix
*label_fixups
;
293 struct label_fix
*tag_fixups
;
294 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
297 unsigned int src_line
;
298 struct dwarf2_line_info debug_line
;
306 struct dynreg
*next
; /* next dynamic register */
308 unsigned short base
; /* the base register number */
309 unsigned short num_regs
; /* # of registers in this set */
311 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
313 flagword flags
; /* ELF-header flags */
316 unsigned hint
:1; /* is this hint currently valid? */
317 bfd_vma offset
; /* mem.offset offset */
318 bfd_vma base
; /* mem.offset base */
321 int path
; /* number of alt. entry points seen */
322 const char **entry_labels
; /* labels of all alternate paths in
323 the current DV-checking block. */
324 int maxpaths
; /* size currently allocated for
327 int pointer_size
; /* size in bytes of a pointer */
328 int pointer_size_shift
; /* shift size of a pointer for alignment */
330 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
380 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
381 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
382 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
383 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
384 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
385 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
386 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
387 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
388 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
389 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
390 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
391 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
392 {"ar.pfs", AR_PFS
}, {"ar.lc", AR_LC
},
396 /* control registers: */
435 {"cr.gpta", CR_GPTA
},
436 {"cr.ipsr", CR_IPSR
},
440 {"cr.itir", CR_ITIR
},
441 {"cr.iipa", CR_IIPA
},
449 {"cr.irr0", CR_IRR0
},
450 {"cr.irr1", CR_IRR0
+ 1},
451 {"cr.irr2", CR_IRR0
+ 2},
452 {"cr.irr3", CR_IRR3
},
455 {"cr.cmcv", CR_CMCV
},
456 {"cr.lrr0", CR_LRR0
},
465 static const struct const_desc
472 /* PSR constant masks: */
475 {"psr.be", ((valueT
) 1) << 1},
476 {"psr.up", ((valueT
) 1) << 2},
477 {"psr.ac", ((valueT
) 1) << 3},
478 {"psr.mfl", ((valueT
) 1) << 4},
479 {"psr.mfh", ((valueT
) 1) << 5},
481 {"psr.ic", ((valueT
) 1) << 13},
482 {"psr.i", ((valueT
) 1) << 14},
483 {"psr.pk", ((valueT
) 1) << 15},
485 {"psr.dt", ((valueT
) 1) << 17},
486 {"psr.dfl", ((valueT
) 1) << 18},
487 {"psr.dfh", ((valueT
) 1) << 19},
488 {"psr.sp", ((valueT
) 1) << 20},
489 {"psr.pp", ((valueT
) 1) << 21},
490 {"psr.di", ((valueT
) 1) << 22},
491 {"psr.si", ((valueT
) 1) << 23},
492 {"psr.db", ((valueT
) 1) << 24},
493 {"psr.lp", ((valueT
) 1) << 25},
494 {"psr.tb", ((valueT
) 1) << 26},
495 {"psr.rt", ((valueT
) 1) << 27},
496 /* 28-31: reserved */
497 /* 32-33: cpl (current privilege level) */
498 {"psr.is", ((valueT
) 1) << 34},
499 {"psr.mc", ((valueT
) 1) << 35},
500 {"psr.it", ((valueT
) 1) << 36},
501 {"psr.id", ((valueT
) 1) << 37},
502 {"psr.da", ((valueT
) 1) << 38},
503 {"psr.dd", ((valueT
) 1) << 39},
504 {"psr.ss", ((valueT
) 1) << 40},
505 /* 41-42: ri (restart instruction) */
506 {"psr.ed", ((valueT
) 1) << 43},
507 {"psr.bn", ((valueT
) 1) << 44},
510 /* indirect register-sets/memory: */
519 { "CPUID", IND_CPUID
},
520 { "cpuid", IND_CPUID
},
532 /* Pseudo functions used to indicate relocation types (these functions
533 start with an at sign (@). */
555 /* reloc pseudo functions (these must come first!): */
556 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
557 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
558 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
559 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
560 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
561 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
562 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
563 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
564 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
565 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
566 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
567 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
568 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
569 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
570 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
571 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
572 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
574 /* mbtype4 constants: */
575 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
576 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
577 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
578 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
579 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
581 /* fclass constants: */
582 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
583 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
584 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
585 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
586 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
587 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
588 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
589 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
590 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
592 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
594 /* hint constants: */
595 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
597 /* unwind-related constants: */
598 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
599 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
600 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
601 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
602 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
603 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
604 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
606 /* unwind-related registers: */
607 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
610 /* 41-bit nop opcodes (one per unit): */
611 static const bfd_vma nop
[IA64_NUM_UNITS
] =
613 0x0000000000LL
, /* NIL => break 0 */
614 0x0008000000LL
, /* I-unit nop */
615 0x0008000000LL
, /* M-unit nop */
616 0x4000000000LL
, /* B-unit nop */
617 0x0008000000LL
, /* F-unit nop */
618 0x0000000000LL
, /* L-"unit" nop immediate */
619 0x0008000000LL
, /* X-unit nop */
622 /* Can't be `const' as it's passed to input routines (which have the
623 habit of setting temporary sentinels. */
624 static char special_section_name
[][20] =
626 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
627 {".IA_64.unwind"}, {".IA_64.unwind_info"},
628 {".init_array"}, {".fini_array"}
631 /* The best template for a particular sequence of up to three
633 #define N IA64_NUM_TYPES
634 static unsigned char best_template
[N
][N
][N
];
637 /* Resource dependencies currently in effect */
639 int depind
; /* dependency index */
640 const struct ia64_dependency
*dependency
; /* actual dependency */
641 unsigned specific
:1, /* is this a specific bit/regno? */
642 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
643 int index
; /* specific regno/bit within dependency */
644 int note
; /* optional qualifying note (0 if none) */
648 int insn_srlz
; /* current insn serialization state */
649 int data_srlz
; /* current data serialization state */
650 int qp_regno
; /* qualifying predicate for this usage */
651 char *file
; /* what file marked this dependency */
652 unsigned int line
; /* what line marked this dependency */
653 struct mem_offset mem_offset
; /* optional memory offset hint */
654 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
655 int path
; /* corresponding code entry index */
657 static int regdepslen
= 0;
658 static int regdepstotlen
= 0;
659 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
660 static const char *dv_sem
[] = { "none", "implied", "impliedf",
661 "data", "instr", "specific", "stop", "other" };
662 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
664 /* Current state of PR mutexation */
665 static struct qpmutex
{
668 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
669 static int qp_mutexeslen
= 0;
670 static int qp_mutexestotlen
= 0;
671 static valueT qp_safe_across_calls
= 0;
673 /* Current state of PR implications */
674 static struct qp_imply
{
677 unsigned p2_branched
:1;
679 } *qp_implies
= NULL
;
680 static int qp_implieslen
= 0;
681 static int qp_impliestotlen
= 0;
683 /* Keep track of static GR values so that indirect register usage can
684 sometimes be tracked. */
695 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
701 /* Remember the alignment frag. */
702 static fragS
*align_frag
;
704 /* These are the routines required to output the various types of
707 /* A slot_number is a frag address plus the slot index (0-2). We use the
708 frag address here so that if there is a section switch in the middle of
709 a function, then instructions emitted to a different section are not
710 counted. Since there may be more than one frag for a function, this
711 means we also need to keep track of which frag this address belongs to
712 so we can compute inter-frag distances. This also nicely solves the
713 problem with nops emitted for align directives, which can't easily be
714 counted, but can easily be derived from frag sizes. */
716 typedef struct unw_rec_list
{
718 unsigned long slot_number
;
720 struct unw_rec_list
*next
;
723 #define SLOT_NUM_NOT_SET (unsigned)-1
725 /* Linked list of saved prologue counts. A very poor
726 implementation of a map from label numbers to prologue counts. */
727 typedef struct label_prologue_count
729 struct label_prologue_count
*next
;
730 unsigned long label_number
;
731 unsigned int prologue_count
;
732 } label_prologue_count
;
734 typedef struct proc_pending
737 struct proc_pending
*next
;
742 /* Maintain a list of unwind entries for the current function. */
746 /* Any unwind entires that should be attached to the current slot
747 that an insn is being constructed for. */
748 unw_rec_list
*current_entry
;
750 /* These are used to create the unwind table entry for this function. */
751 proc_pending proc_pending
;
752 symbolS
*info
; /* pointer to unwind info */
753 symbolS
*personality_routine
;
755 subsegT saved_text_subseg
;
756 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
758 /* TRUE if processing unwind directives in a prologue region. */
759 unsigned int prologue
: 1;
760 unsigned int prologue_mask
: 4;
761 unsigned int prologue_gr
: 7;
762 unsigned int body
: 1;
763 unsigned int insn
: 1;
764 unsigned int prologue_count
; /* number of .prologues seen so far */
765 /* Prologue counts at previous .label_state directives. */
766 struct label_prologue_count
* saved_prologue_counts
;
768 /* List of split up .save-s. */
769 unw_p_record
*pending_saves
;
772 /* The input value is a negated offset from psp, and specifies an address
773 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
774 must add 16 and divide by 4 to get the encoded value. */
776 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
778 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
780 /* Forward declarations: */
781 static void set_section
PARAMS ((char *name
));
782 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
783 unsigned int, unsigned int));
784 static void dot_align (int);
785 static void dot_radix
PARAMS ((int));
786 static void dot_special_section
PARAMS ((int));
787 static void dot_proc
PARAMS ((int));
788 static void dot_fframe
PARAMS ((int));
789 static void dot_vframe
PARAMS ((int));
790 static void dot_vframesp
PARAMS ((int));
791 static void dot_save
PARAMS ((int));
792 static void dot_restore
PARAMS ((int));
793 static void dot_restorereg
PARAMS ((int));
794 static void dot_handlerdata
PARAMS ((int));
795 static void dot_unwentry
PARAMS ((int));
796 static void dot_altrp
PARAMS ((int));
797 static void dot_savemem
PARAMS ((int));
798 static void dot_saveg
PARAMS ((int));
799 static void dot_savef
PARAMS ((int));
800 static void dot_saveb
PARAMS ((int));
801 static void dot_savegf
PARAMS ((int));
802 static void dot_spill
PARAMS ((int));
803 static void dot_spillreg
PARAMS ((int));
804 static void dot_spillmem
PARAMS ((int));
805 static void dot_label_state
PARAMS ((int));
806 static void dot_copy_state
PARAMS ((int));
807 static void dot_unwabi
PARAMS ((int));
808 static void dot_personality
PARAMS ((int));
809 static void dot_body
PARAMS ((int));
810 static void dot_prologue
PARAMS ((int));
811 static void dot_endp
PARAMS ((int));
812 static void dot_template
PARAMS ((int));
813 static void dot_regstk
PARAMS ((int));
814 static void dot_rot
PARAMS ((int));
815 static void dot_byteorder
PARAMS ((int));
816 static void dot_psr
PARAMS ((int));
817 static void dot_alias
PARAMS ((int));
818 static void dot_ln
PARAMS ((int));
819 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
820 static void dot_xdata
PARAMS ((int));
821 static void stmt_float_cons
PARAMS ((int));
822 static void stmt_cons_ua
PARAMS ((int));
823 static void dot_xfloat_cons
PARAMS ((int));
824 static void dot_xstringer
PARAMS ((int));
825 static void dot_xdata_ua
PARAMS ((int));
826 static void dot_xfloat_cons_ua
PARAMS ((int));
827 static void print_prmask
PARAMS ((valueT mask
));
828 static void dot_pred_rel
PARAMS ((int));
829 static void dot_reg_val
PARAMS ((int));
830 static void dot_serialize
PARAMS ((int));
831 static void dot_dv_mode
PARAMS ((int));
832 static void dot_entry
PARAMS ((int));
833 static void dot_mem_offset
PARAMS ((int));
834 static void add_unwind_entry
PARAMS((unw_rec_list
*, int));
835 static symbolS
*declare_register
PARAMS ((const char *name
, unsigned int regnum
));
836 static void declare_register_set
PARAMS ((const char *, unsigned int, unsigned int));
837 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
838 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
841 static int parse_operand
PARAMS ((expressionS
*, int));
842 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
843 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
844 static void emit_one_bundle
PARAMS ((void));
845 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
846 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
847 bfd_reloc_code_real_type r_type
));
848 static void insn_group_break
PARAMS ((int, int, int));
849 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
850 struct rsrc
*, int depind
, int path
));
851 static void add_qp_mutex
PARAMS((valueT mask
));
852 static void add_qp_imply
PARAMS((int p1
, int p2
));
853 static void clear_qp_branch_flag
PARAMS((valueT mask
));
854 static void clear_qp_mutex
PARAMS((valueT mask
));
855 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
856 static int has_suffix_p
PARAMS((const char *, const char *));
857 static void clear_register_values
PARAMS ((void));
858 static void print_dependency
PARAMS ((const char *action
, int depind
));
859 static void instruction_serialization
PARAMS ((void));
860 static void data_serialization
PARAMS ((void));
861 static void remove_marked_resource
PARAMS ((struct rsrc
*));
862 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
863 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
864 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
865 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
866 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
867 struct ia64_opcode
*, int, struct rsrc
[], int, int));
868 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
869 static void check_dependencies
PARAMS((struct ia64_opcode
*));
870 static void mark_resources
PARAMS((struct ia64_opcode
*));
871 static void update_dependencies
PARAMS((struct ia64_opcode
*));
872 static void note_register_values
PARAMS((struct ia64_opcode
*));
873 static int qp_mutex
PARAMS ((int, int, int));
874 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
875 static void output_vbyte_mem
PARAMS ((int, char *, char *));
876 static void count_output
PARAMS ((int, char *, char *));
877 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
878 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
879 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
880 static void output_P1_format
PARAMS ((vbyte_func
, int));
881 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
882 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
883 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
884 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
885 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
886 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
887 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
888 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
889 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
890 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
891 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
892 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
893 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
894 static char format_ab_reg
PARAMS ((int, int));
895 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
897 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
898 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
900 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
901 static unw_rec_list
*output_endp
PARAMS ((void));
902 static unw_rec_list
*output_prologue
PARAMS ((void));
903 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
904 static unw_rec_list
*output_body
PARAMS ((void));
905 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
906 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
907 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
908 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
909 static unw_rec_list
*output_rp_when
PARAMS ((void));
910 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
911 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
912 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
913 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_pfs_when
PARAMS ((void));
915 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
916 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
917 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_preds_when
PARAMS ((void));
919 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
920 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
923 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
924 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
925 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
926 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
927 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
928 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
929 static unw_rec_list
*output_unat_when
PARAMS ((void));
930 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
931 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
932 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
933 static unw_rec_list
*output_lc_when
PARAMS ((void));
934 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
935 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
936 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
937 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
938 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
939 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
940 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
941 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
942 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
943 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
944 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
945 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
946 static unw_rec_list
*output_bsp_when
PARAMS ((void));
947 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
948 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
949 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
950 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
951 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
952 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
953 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
954 static unw_rec_list
*output_rnat_when
PARAMS ((void));
955 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
956 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
957 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
958 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
959 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
960 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
961 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
962 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int,
964 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int,
966 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
967 unsigned int, unsigned int));
968 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
969 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
970 static int calc_record_size
PARAMS ((unw_rec_list
*));
971 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
972 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
973 unsigned long, fragS
*,
975 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
976 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
977 static int parse_predicate_and_operand
PARAMS ((expressionS
*, unsigned *, const char *));
978 static void convert_expr_to_ab_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
979 static void convert_expr_to_xy_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
980 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
981 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
982 static void free_saved_prologue_counts
PARAMS ((void));
984 /* Determine if application register REGNUM resides only in the integer
985 unit (as opposed to the memory unit). */
987 ar_is_only_in_integer_unit (int reg
)
990 return reg
>= 64 && reg
<= 111;
993 /* Determine if application register REGNUM resides only in the memory
994 unit (as opposed to the integer unit). */
996 ar_is_only_in_memory_unit (int reg
)
999 return reg
>= 0 && reg
<= 47;
1002 /* Switch to section NAME and create section if necessary. It's
1003 rather ugly that we have to manipulate input_line_pointer but I
1004 don't see any other way to accomplish the same thing without
1005 changing obj-elf.c (which may be the Right Thing, in the end). */
1010 char *saved_input_line_pointer
;
1012 saved_input_line_pointer
= input_line_pointer
;
1013 input_line_pointer
= name
;
1014 obj_elf_section (0);
1015 input_line_pointer
= saved_input_line_pointer
;
1018 /* Map 's' to SHF_IA_64_SHORT. */
1021 ia64_elf_section_letter (letter
, ptr_msg
)
1026 return SHF_IA_64_SHORT
;
1027 else if (letter
== 'o')
1028 return SHF_LINK_ORDER
;
1030 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1034 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1037 ia64_elf_section_flags (flags
, attr
, type
)
1039 int attr
, type ATTRIBUTE_UNUSED
;
1041 if (attr
& SHF_IA_64_SHORT
)
1042 flags
|= SEC_SMALL_DATA
;
1047 ia64_elf_section_type (str
, len
)
1051 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1053 if (STREQ (ELF_STRING_ia64_unwind_info
))
1054 return SHT_PROGBITS
;
1056 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1057 return SHT_PROGBITS
;
1059 if (STREQ (ELF_STRING_ia64_unwind
))
1060 return SHT_IA_64_UNWIND
;
1062 if (STREQ (ELF_STRING_ia64_unwind_once
))
1063 return SHT_IA_64_UNWIND
;
1065 if (STREQ ("unwind"))
1066 return SHT_IA_64_UNWIND
;
1073 set_regstack (ins
, locs
, outs
, rots
)
1074 unsigned int ins
, locs
, outs
, rots
;
1076 /* Size of frame. */
1079 sof
= ins
+ locs
+ outs
;
1082 as_bad ("Size of frame exceeds maximum of 96 registers");
1087 as_warn ("Size of rotating registers exceeds frame size");
1090 md
.in
.base
= REG_GR
+ 32;
1091 md
.loc
.base
= md
.in
.base
+ ins
;
1092 md
.out
.base
= md
.loc
.base
+ locs
;
1094 md
.in
.num_regs
= ins
;
1095 md
.loc
.num_regs
= locs
;
1096 md
.out
.num_regs
= outs
;
1097 md
.rot
.num_regs
= rots
;
1104 struct label_fix
*lfix
;
1106 subsegT saved_subseg
;
1110 if (!md
.last_text_seg
)
1113 saved_seg
= now_seg
;
1114 saved_subseg
= now_subseg
;
1116 subseg_set (md
.last_text_seg
, 0);
1118 while (md
.num_slots_in_use
> 0)
1119 emit_one_bundle (); /* force out queued instructions */
1121 /* In case there are labels following the last instruction, resolve
1124 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1126 symbol_set_value_now (lfix
->sym
);
1127 mark
|= lfix
->dw2_mark_labels
;
1131 dwarf2_where (&CURR_SLOT
.debug_line
);
1132 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
1133 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
1135 CURR_SLOT
.label_fixups
= 0;
1137 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1138 symbol_set_value_now (lfix
->sym
);
1139 CURR_SLOT
.tag_fixups
= 0;
1141 /* In case there are unwind directives following the last instruction,
1142 resolve those now. We only handle prologue, body, and endp directives
1143 here. Give an error for others. */
1144 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1146 switch (ptr
->r
.type
)
1152 ptr
->slot_number
= (unsigned long) frag_more (0);
1153 ptr
->slot_frag
= frag_now
;
1156 /* Allow any record which doesn't have a "t" field (i.e.,
1157 doesn't relate to a particular instruction). */
1173 as_bad (_("Unwind directive not followed by an instruction."));
1177 unwind
.current_entry
= NULL
;
1179 subseg_set (saved_seg
, saved_subseg
);
1181 if (md
.qp
.X_op
== O_register
)
1182 as_bad ("qualifying predicate not followed by instruction");
1186 ia64_do_align (int nbytes
)
1188 char *saved_input_line_pointer
= input_line_pointer
;
1190 input_line_pointer
= "";
1191 s_align_bytes (nbytes
);
1192 input_line_pointer
= saved_input_line_pointer
;
1196 ia64_cons_align (nbytes
)
1201 char *saved_input_line_pointer
= input_line_pointer
;
1202 input_line_pointer
= "";
1203 s_align_bytes (nbytes
);
1204 input_line_pointer
= saved_input_line_pointer
;
1208 /* Output COUNT bytes to a memory location. */
1209 static char *vbyte_mem_ptr
= NULL
;
1212 output_vbyte_mem (count
, ptr
, comment
)
1215 char *comment ATTRIBUTE_UNUSED
;
1218 if (vbyte_mem_ptr
== NULL
)
1223 for (x
= 0; x
< count
; x
++)
1224 *(vbyte_mem_ptr
++) = ptr
[x
];
1227 /* Count the number of bytes required for records. */
1228 static int vbyte_count
= 0;
1230 count_output (count
, ptr
, comment
)
1232 char *ptr ATTRIBUTE_UNUSED
;
1233 char *comment ATTRIBUTE_UNUSED
;
1235 vbyte_count
+= count
;
1239 output_R1_format (f
, rtype
, rlen
)
1241 unw_record_type rtype
;
1248 output_R3_format (f
, rtype
, rlen
);
1254 else if (rtype
!= prologue
)
1255 as_bad ("record type is not valid");
1257 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1258 (*f
) (1, &byte
, NULL
);
1262 output_R2_format (f
, mask
, grsave
, rlen
)
1269 mask
= (mask
& 0x0f);
1270 grsave
= (grsave
& 0x7f);
1272 bytes
[0] = (UNW_R2
| (mask
>> 1));
1273 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1274 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1275 (*f
) (count
, bytes
, NULL
);
1279 output_R3_format (f
, rtype
, rlen
)
1281 unw_record_type rtype
;
1288 output_R1_format (f
, rtype
, rlen
);
1294 else if (rtype
!= prologue
)
1295 as_bad ("record type is not valid");
1296 bytes
[0] = (UNW_R3
| r
);
1297 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1298 (*f
) (count
+ 1, bytes
, NULL
);
1302 output_P1_format (f
, brmask
)
1307 byte
= UNW_P1
| (brmask
& 0x1f);
1308 (*f
) (1, &byte
, NULL
);
1312 output_P2_format (f
, brmask
, gr
)
1318 brmask
= (brmask
& 0x1f);
1319 bytes
[0] = UNW_P2
| (brmask
>> 1);
1320 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1321 (*f
) (2, bytes
, NULL
);
1325 output_P3_format (f
, rtype
, reg
)
1327 unw_record_type rtype
;
1372 as_bad ("Invalid record type for P3 format.");
1374 bytes
[0] = (UNW_P3
| (r
>> 1));
1375 bytes
[1] = (((r
& 1) << 7) | reg
);
1376 (*f
) (2, bytes
, NULL
);
1380 output_P4_format (f
, imask
, imask_size
)
1382 unsigned char *imask
;
1383 unsigned long imask_size
;
1386 (*f
) (imask_size
, (char *) imask
, NULL
);
1390 output_P5_format (f
, grmask
, frmask
)
1393 unsigned long frmask
;
1396 grmask
= (grmask
& 0x0f);
1399 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1400 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1401 bytes
[3] = (frmask
& 0x000000ff);
1402 (*f
) (4, bytes
, NULL
);
1406 output_P6_format (f
, rtype
, rmask
)
1408 unw_record_type rtype
;
1414 if (rtype
== gr_mem
)
1416 else if (rtype
!= fr_mem
)
1417 as_bad ("Invalid record type for format P6");
1418 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1419 (*f
) (1, &byte
, NULL
);
1423 output_P7_format (f
, rtype
, w1
, w2
)
1425 unw_record_type rtype
;
1432 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1437 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1487 bytes
[0] = (UNW_P7
| r
);
1488 (*f
) (count
, bytes
, NULL
);
1492 output_P8_format (f
, rtype
, t
)
1494 unw_record_type rtype
;
1533 case bspstore_psprel
:
1536 case bspstore_sprel
:
1548 case priunat_when_gr
:
1551 case priunat_psprel
:
1557 case priunat_when_mem
:
1564 count
+= output_leb128 (bytes
+ 2, t
, 0);
1565 (*f
) (count
, bytes
, NULL
);
1569 output_P9_format (f
, grmask
, gr
)
1576 bytes
[1] = (grmask
& 0x0f);
1577 bytes
[2] = (gr
& 0x7f);
1578 (*f
) (3, bytes
, NULL
);
1582 output_P10_format (f
, abi
, context
)
1589 bytes
[1] = (abi
& 0xff);
1590 bytes
[2] = (context
& 0xff);
1591 (*f
) (3, bytes
, NULL
);
1595 output_B1_format (f
, rtype
, label
)
1597 unw_record_type rtype
;
1598 unsigned long label
;
1604 output_B4_format (f
, rtype
, label
);
1607 if (rtype
== copy_state
)
1609 else if (rtype
!= label_state
)
1610 as_bad ("Invalid record type for format B1");
1612 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1613 (*f
) (1, &byte
, NULL
);
1617 output_B2_format (f
, ecount
, t
)
1619 unsigned long ecount
;
1626 output_B3_format (f
, ecount
, t
);
1629 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1630 count
+= output_leb128 (bytes
+ 1, t
, 0);
1631 (*f
) (count
, bytes
, NULL
);
1635 output_B3_format (f
, ecount
, t
)
1637 unsigned long ecount
;
1644 output_B2_format (f
, ecount
, t
);
1648 count
+= output_leb128 (bytes
+ 1, t
, 0);
1649 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1650 (*f
) (count
, bytes
, NULL
);
1654 output_B4_format (f
, rtype
, label
)
1656 unw_record_type rtype
;
1657 unsigned long label
;
1664 output_B1_format (f
, rtype
, label
);
1668 if (rtype
== copy_state
)
1670 else if (rtype
!= label_state
)
1671 as_bad ("Invalid record type for format B1");
1673 bytes
[0] = (UNW_B4
| (r
<< 3));
1674 count
+= output_leb128 (bytes
+ 1, label
, 0);
1675 (*f
) (count
, bytes
, NULL
);
1679 format_ab_reg (ab
, reg
)
1686 ret
= (ab
<< 5) | reg
;
1691 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1693 unw_record_type rtype
;
1703 if (rtype
== spill_sprel
)
1705 else if (rtype
!= spill_psprel
)
1706 as_bad ("Invalid record type for format X1");
1707 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1708 count
+= output_leb128 (bytes
+ 2, t
, 0);
1709 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1710 (*f
) (count
, bytes
, NULL
);
1714 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1723 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1724 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1725 count
+= output_leb128 (bytes
+ 3, t
, 0);
1726 (*f
) (count
, bytes
, NULL
);
1730 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1732 unw_record_type rtype
;
1743 if (rtype
== spill_sprel_p
)
1745 else if (rtype
!= spill_psprel_p
)
1746 as_bad ("Invalid record type for format X3");
1747 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1748 bytes
[2] = format_ab_reg (ab
, reg
);
1749 count
+= output_leb128 (bytes
+ 3, t
, 0);
1750 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1751 (*f
) (count
, bytes
, NULL
);
1755 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1765 bytes
[1] = (qp
& 0x3f);
1766 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1767 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1768 count
+= output_leb128 (bytes
+ 4, t
, 0);
1769 (*f
) (count
, bytes
, NULL
);
1772 /* This function checks whether there are any outstanding .save-s and
1773 discards them if so. */
1776 check_pending_save (void)
1778 if (unwind
.pending_saves
)
1780 unw_rec_list
*cur
, *prev
;
1782 as_warn ("Previous .save incomplete");
1783 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1784 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1787 prev
->next
= cur
->next
;
1789 unwind
.list
= cur
->next
;
1790 if (cur
== unwind
.tail
)
1792 if (cur
== unwind
.current_entry
)
1793 unwind
.current_entry
= cur
->next
;
1794 /* Don't free the first discarded record, it's being used as
1795 terminator for (currently) br_gr and gr_gr processing, and
1796 also prevents leaving a dangling pointer to it in its
1798 cur
->r
.record
.p
.grmask
= 0;
1799 cur
->r
.record
.p
.brmask
= 0;
1800 cur
->r
.record
.p
.frmask
= 0;
1801 prev
= cur
->r
.record
.p
.next
;
1802 cur
->r
.record
.p
.next
= NULL
;
1814 cur
= cur
->r
.record
.p
.next
;
1817 unwind
.pending_saves
= NULL
;
1821 /* This function allocates a record list structure, and initializes fields. */
1823 static unw_rec_list
*
1824 alloc_record (unw_record_type t
)
1827 ptr
= xmalloc (sizeof (*ptr
));
1828 memset (ptr
, 0, sizeof (*ptr
));
1829 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1834 /* Dummy unwind record used for calculating the length of the last prologue or
1837 static unw_rec_list
*
1840 unw_rec_list
*ptr
= alloc_record (endp
);
1844 static unw_rec_list
*
1847 unw_rec_list
*ptr
= alloc_record (prologue
);
1848 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1852 static unw_rec_list
*
1853 output_prologue_gr (saved_mask
, reg
)
1854 unsigned int saved_mask
;
1857 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1858 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1859 ptr
->r
.record
.r
.grmask
= saved_mask
;
1860 ptr
->r
.record
.r
.grsave
= reg
;
1864 static unw_rec_list
*
1867 unw_rec_list
*ptr
= alloc_record (body
);
1871 static unw_rec_list
*
1872 output_mem_stack_f (size
)
1875 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1876 ptr
->r
.record
.p
.size
= size
;
1880 static unw_rec_list
*
1881 output_mem_stack_v ()
1883 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1887 static unw_rec_list
*
1891 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1892 ptr
->r
.record
.p
.r
.gr
= gr
;
1896 static unw_rec_list
*
1897 output_psp_sprel (offset
)
1898 unsigned int offset
;
1900 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1901 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1905 static unw_rec_list
*
1908 unw_rec_list
*ptr
= alloc_record (rp_when
);
1912 static unw_rec_list
*
1916 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1917 ptr
->r
.record
.p
.r
.gr
= gr
;
1921 static unw_rec_list
*
1925 unw_rec_list
*ptr
= alloc_record (rp_br
);
1926 ptr
->r
.record
.p
.r
.br
= br
;
1930 static unw_rec_list
*
1931 output_rp_psprel (offset
)
1932 unsigned int offset
;
1934 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1935 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1939 static unw_rec_list
*
1940 output_rp_sprel (offset
)
1941 unsigned int offset
;
1943 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1944 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1948 static unw_rec_list
*
1951 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1955 static unw_rec_list
*
1959 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1960 ptr
->r
.record
.p
.r
.gr
= gr
;
1964 static unw_rec_list
*
1965 output_pfs_psprel (offset
)
1966 unsigned int offset
;
1968 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1969 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1973 static unw_rec_list
*
1974 output_pfs_sprel (offset
)
1975 unsigned int offset
;
1977 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1978 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1982 static unw_rec_list
*
1983 output_preds_when ()
1985 unw_rec_list
*ptr
= alloc_record (preds_when
);
1989 static unw_rec_list
*
1990 output_preds_gr (gr
)
1993 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1994 ptr
->r
.record
.p
.r
.gr
= gr
;
1998 static unw_rec_list
*
1999 output_preds_psprel (offset
)
2000 unsigned int offset
;
2002 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
2003 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2007 static unw_rec_list
*
2008 output_preds_sprel (offset
)
2009 unsigned int offset
;
2011 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
2012 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2016 static unw_rec_list
*
2017 output_fr_mem (mask
)
2020 unw_rec_list
*ptr
= alloc_record (fr_mem
);
2021 unw_rec_list
*cur
= ptr
;
2023 ptr
->r
.record
.p
.frmask
= mask
;
2024 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2027 unw_rec_list
*prev
= cur
;
2029 /* Clear least significant set bit. */
2030 mask
&= ~(mask
& (~mask
+ 1));
2033 cur
= alloc_record (fr_mem
);
2034 cur
->r
.record
.p
.frmask
= mask
;
2035 /* Retain only least significant bit. */
2036 prev
->r
.record
.p
.frmask
^= mask
;
2037 prev
->r
.record
.p
.next
= cur
;
2041 static unw_rec_list
*
2042 output_frgr_mem (gr_mask
, fr_mask
)
2043 unsigned int gr_mask
;
2044 unsigned int fr_mask
;
2046 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
2047 unw_rec_list
*cur
= ptr
;
2049 unwind
.pending_saves
= &cur
->r
.record
.p
;
2050 cur
->r
.record
.p
.frmask
= fr_mask
;
2053 unw_rec_list
*prev
= cur
;
2055 /* Clear least significant set bit. */
2056 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
2057 if (!gr_mask
&& !fr_mask
)
2059 cur
= alloc_record (frgr_mem
);
2060 cur
->r
.record
.p
.frmask
= fr_mask
;
2061 /* Retain only least significant bit. */
2062 prev
->r
.record
.p
.frmask
^= fr_mask
;
2063 prev
->r
.record
.p
.next
= cur
;
2065 cur
->r
.record
.p
.grmask
= gr_mask
;
2068 unw_rec_list
*prev
= cur
;
2070 /* Clear least significant set bit. */
2071 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
2074 cur
= alloc_record (frgr_mem
);
2075 cur
->r
.record
.p
.grmask
= gr_mask
;
2076 /* Retain only least significant bit. */
2077 prev
->r
.record
.p
.grmask
^= gr_mask
;
2078 prev
->r
.record
.p
.next
= cur
;
2082 static unw_rec_list
*
2083 output_gr_gr (mask
, reg
)
2087 unw_rec_list
*ptr
= alloc_record (gr_gr
);
2088 unw_rec_list
*cur
= ptr
;
2090 ptr
->r
.record
.p
.grmask
= mask
;
2091 ptr
->r
.record
.p
.r
.gr
= reg
;
2092 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2095 unw_rec_list
*prev
= cur
;
2097 /* Clear least significant set bit. */
2098 mask
&= ~(mask
& (~mask
+ 1));
2101 cur
= alloc_record (gr_gr
);
2102 cur
->r
.record
.p
.grmask
= mask
;
2103 /* Indicate this record shouldn't be output. */
2104 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2105 /* Retain only least significant bit. */
2106 prev
->r
.record
.p
.grmask
^= mask
;
2107 prev
->r
.record
.p
.next
= cur
;
2111 static unw_rec_list
*
2112 output_gr_mem (mask
)
2115 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2116 unw_rec_list
*cur
= ptr
;
2118 ptr
->r
.record
.p
.grmask
= mask
;
2119 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2122 unw_rec_list
*prev
= cur
;
2124 /* Clear least significant set bit. */
2125 mask
&= ~(mask
& (~mask
+ 1));
2128 cur
= alloc_record (gr_mem
);
2129 cur
->r
.record
.p
.grmask
= mask
;
2130 /* Retain only least significant bit. */
2131 prev
->r
.record
.p
.grmask
^= mask
;
2132 prev
->r
.record
.p
.next
= cur
;
2136 static unw_rec_list
*
2137 output_br_mem (unsigned int mask
)
2139 unw_rec_list
*ptr
= alloc_record (br_mem
);
2140 unw_rec_list
*cur
= ptr
;
2142 ptr
->r
.record
.p
.brmask
= mask
;
2143 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2146 unw_rec_list
*prev
= cur
;
2148 /* Clear least significant set bit. */
2149 mask
&= ~(mask
& (~mask
+ 1));
2152 cur
= alloc_record (br_mem
);
2153 cur
->r
.record
.p
.brmask
= mask
;
2154 /* Retain only least significant bit. */
2155 prev
->r
.record
.p
.brmask
^= mask
;
2156 prev
->r
.record
.p
.next
= cur
;
2160 static unw_rec_list
*
2161 output_br_gr (mask
, reg
)
2165 unw_rec_list
*ptr
= alloc_record (br_gr
);
2166 unw_rec_list
*cur
= ptr
;
2168 ptr
->r
.record
.p
.brmask
= mask
;
2169 ptr
->r
.record
.p
.r
.gr
= reg
;
2170 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2173 unw_rec_list
*prev
= cur
;
2175 /* Clear least significant set bit. */
2176 mask
&= ~(mask
& (~mask
+ 1));
2179 cur
= alloc_record (br_gr
);
2180 cur
->r
.record
.p
.brmask
= mask
;
2181 /* Indicate this record shouldn't be output. */
2182 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2183 /* Retain only least significant bit. */
2184 prev
->r
.record
.p
.brmask
^= mask
;
2185 prev
->r
.record
.p
.next
= cur
;
2189 static unw_rec_list
*
2190 output_spill_base (offset
)
2191 unsigned int offset
;
2193 unw_rec_list
*ptr
= alloc_record (spill_base
);
2194 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2198 static unw_rec_list
*
2201 unw_rec_list
*ptr
= alloc_record (unat_when
);
2205 static unw_rec_list
*
2209 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2210 ptr
->r
.record
.p
.r
.gr
= gr
;
2214 static unw_rec_list
*
2215 output_unat_psprel (offset
)
2216 unsigned int offset
;
2218 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2219 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2223 static unw_rec_list
*
2224 output_unat_sprel (offset
)
2225 unsigned int offset
;
2227 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2228 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2232 static unw_rec_list
*
2235 unw_rec_list
*ptr
= alloc_record (lc_when
);
2239 static unw_rec_list
*
2243 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2244 ptr
->r
.record
.p
.r
.gr
= gr
;
2248 static unw_rec_list
*
2249 output_lc_psprel (offset
)
2250 unsigned int offset
;
2252 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2253 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2257 static unw_rec_list
*
2258 output_lc_sprel (offset
)
2259 unsigned int offset
;
2261 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2262 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2266 static unw_rec_list
*
2269 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2273 static unw_rec_list
*
2277 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2278 ptr
->r
.record
.p
.r
.gr
= gr
;
2282 static unw_rec_list
*
2283 output_fpsr_psprel (offset
)
2284 unsigned int offset
;
2286 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2287 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2291 static unw_rec_list
*
2292 output_fpsr_sprel (offset
)
2293 unsigned int offset
;
2295 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2296 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2300 static unw_rec_list
*
2301 output_priunat_when_gr ()
2303 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2307 static unw_rec_list
*
2308 output_priunat_when_mem ()
2310 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2314 static unw_rec_list
*
2315 output_priunat_gr (gr
)
2318 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2319 ptr
->r
.record
.p
.r
.gr
= gr
;
2323 static unw_rec_list
*
2324 output_priunat_psprel (offset
)
2325 unsigned int offset
;
2327 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2328 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2332 static unw_rec_list
*
2333 output_priunat_sprel (offset
)
2334 unsigned int offset
;
2336 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2337 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2341 static unw_rec_list
*
2344 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2348 static unw_rec_list
*
2352 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2353 ptr
->r
.record
.p
.r
.gr
= gr
;
2357 static unw_rec_list
*
2358 output_bsp_psprel (offset
)
2359 unsigned int offset
;
2361 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2362 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2366 static unw_rec_list
*
2367 output_bsp_sprel (offset
)
2368 unsigned int offset
;
2370 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2371 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2375 static unw_rec_list
*
2376 output_bspstore_when ()
2378 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2382 static unw_rec_list
*
2383 output_bspstore_gr (gr
)
2386 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2387 ptr
->r
.record
.p
.r
.gr
= gr
;
2391 static unw_rec_list
*
2392 output_bspstore_psprel (offset
)
2393 unsigned int offset
;
2395 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2396 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2400 static unw_rec_list
*
2401 output_bspstore_sprel (offset
)
2402 unsigned int offset
;
2404 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2405 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2409 static unw_rec_list
*
2412 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2416 static unw_rec_list
*
2420 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2421 ptr
->r
.record
.p
.r
.gr
= gr
;
2425 static unw_rec_list
*
2426 output_rnat_psprel (offset
)
2427 unsigned int offset
;
2429 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2430 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2434 static unw_rec_list
*
2435 output_rnat_sprel (offset
)
2436 unsigned int offset
;
2438 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2439 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2443 static unw_rec_list
*
2444 output_unwabi (abi
, context
)
2446 unsigned long context
;
2448 unw_rec_list
*ptr
= alloc_record (unwabi
);
2449 ptr
->r
.record
.p
.abi
= abi
;
2450 ptr
->r
.record
.p
.context
= context
;
2454 static unw_rec_list
*
2455 output_epilogue (unsigned long ecount
)
2457 unw_rec_list
*ptr
= alloc_record (epilogue
);
2458 ptr
->r
.record
.b
.ecount
= ecount
;
2462 static unw_rec_list
*
2463 output_label_state (unsigned long label
)
2465 unw_rec_list
*ptr
= alloc_record (label_state
);
2466 ptr
->r
.record
.b
.label
= label
;
2470 static unw_rec_list
*
2471 output_copy_state (unsigned long label
)
2473 unw_rec_list
*ptr
= alloc_record (copy_state
);
2474 ptr
->r
.record
.b
.label
= label
;
2478 static unw_rec_list
*
2479 output_spill_psprel (ab
, reg
, offset
, predicate
)
2482 unsigned int offset
;
2483 unsigned int predicate
;
2485 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2486 ptr
->r
.record
.x
.ab
= ab
;
2487 ptr
->r
.record
.x
.reg
= reg
;
2488 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2489 ptr
->r
.record
.x
.qp
= predicate
;
2493 static unw_rec_list
*
2494 output_spill_sprel (ab
, reg
, offset
, predicate
)
2497 unsigned int offset
;
2498 unsigned int predicate
;
2500 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2501 ptr
->r
.record
.x
.ab
= ab
;
2502 ptr
->r
.record
.x
.reg
= reg
;
2503 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2504 ptr
->r
.record
.x
.qp
= predicate
;
2508 static unw_rec_list
*
2509 output_spill_reg (ab
, reg
, targ_reg
, xy
, predicate
)
2512 unsigned int targ_reg
;
2514 unsigned int predicate
;
2516 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2517 ptr
->r
.record
.x
.ab
= ab
;
2518 ptr
->r
.record
.x
.reg
= reg
;
2519 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2520 ptr
->r
.record
.x
.xy
= xy
;
2521 ptr
->r
.record
.x
.qp
= predicate
;
2525 /* Given a unw_rec_list process the correct format with the
2526 specified function. */
2529 process_one_record (ptr
, f
)
2533 unsigned int fr_mask
, gr_mask
;
2535 switch (ptr
->r
.type
)
2537 /* This is a dummy record that takes up no space in the output. */
2545 /* These are taken care of by prologue/prologue_gr. */
2550 if (ptr
->r
.type
== prologue_gr
)
2551 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2552 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2554 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2556 /* Output descriptor(s) for union of register spills (if any). */
2557 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2558 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2561 if ((fr_mask
& ~0xfUL
) == 0)
2562 output_P6_format (f
, fr_mem
, fr_mask
);
2565 output_P5_format (f
, gr_mask
, fr_mask
);
2570 output_P6_format (f
, gr_mem
, gr_mask
);
2571 if (ptr
->r
.record
.r
.mask
.br_mem
)
2572 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2574 /* output imask descriptor if necessary: */
2575 if (ptr
->r
.record
.r
.mask
.i
)
2576 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2577 ptr
->r
.record
.r
.imask_size
);
2581 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2585 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2586 ptr
->r
.record
.p
.size
);
2599 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2602 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2605 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2613 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2622 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2632 case bspstore_sprel
:
2634 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2637 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2639 const unw_rec_list
*cur
= ptr
;
2641 gr_mask
= cur
->r
.record
.p
.grmask
;
2642 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2643 gr_mask
|= cur
->r
.record
.p
.grmask
;
2644 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2648 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2650 const unw_rec_list
*cur
= ptr
;
2652 gr_mask
= cur
->r
.record
.p
.brmask
;
2653 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2654 gr_mask
|= cur
->r
.record
.p
.brmask
;
2655 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2659 as_bad ("spill_mask record unimplemented.");
2661 case priunat_when_gr
:
2662 case priunat_when_mem
:
2666 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2668 case priunat_psprel
:
2670 case bspstore_psprel
:
2672 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2675 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2678 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2682 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2685 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2686 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2687 ptr
->r
.record
.x
.where
.pspoff
);
2690 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2691 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2692 ptr
->r
.record
.x
.where
.spoff
);
2695 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2696 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2697 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2699 case spill_psprel_p
:
2700 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2701 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2702 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2705 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2706 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2707 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2710 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2711 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2712 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2716 as_bad ("record_type_not_valid");
2721 /* Given a unw_rec_list list, process all the records with
2722 the specified function. */
2724 process_unw_records (list
, f
)
2729 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2730 process_one_record (ptr
, f
);
2733 /* Determine the size of a record list in bytes. */
2735 calc_record_size (list
)
2739 process_unw_records (list
, count_output
);
2743 /* Return the number of bits set in the input value.
2744 Perhaps this has a better place... */
2745 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2746 # define popcount __builtin_popcount
2749 popcount (unsigned x
)
2751 static const unsigned char popcnt
[16] =
2759 if (x
< NELEMS (popcnt
))
2761 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2765 /* Update IMASK bitmask to reflect the fact that one or more registers
2766 of type TYPE are saved starting at instruction with index T. If N
2767 bits are set in REGMASK, it is assumed that instructions T through
2768 T+N-1 save these registers.
2772 1: instruction saves next fp reg
2773 2: instruction saves next general reg
2774 3: instruction saves next branch reg */
2776 set_imask (region
, regmask
, t
, type
)
2777 unw_rec_list
*region
;
2778 unsigned long regmask
;
2782 unsigned char *imask
;
2783 unsigned long imask_size
;
2787 imask
= region
->r
.record
.r
.mask
.i
;
2788 imask_size
= region
->r
.record
.r
.imask_size
;
2791 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2792 imask
= xmalloc (imask_size
);
2793 memset (imask
, 0, imask_size
);
2795 region
->r
.record
.r
.imask_size
= imask_size
;
2796 region
->r
.record
.r
.mask
.i
= imask
;
2800 pos
= 2 * (3 - t
% 4);
2803 if (i
>= imask_size
)
2805 as_bad ("Ignoring attempt to spill beyond end of region");
2809 imask
[i
] |= (type
& 0x3) << pos
;
2811 regmask
&= (regmask
- 1);
2821 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2822 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2823 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2827 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2828 unsigned long slot_addr
;
2830 unsigned long first_addr
;
2834 unsigned long index
= 0;
2836 /* First time we are called, the initial address and frag are invalid. */
2837 if (first_addr
== 0)
2840 /* If the two addresses are in different frags, then we need to add in
2841 the remaining size of this frag, and then the entire size of intermediate
2843 while (slot_frag
!= first_frag
)
2845 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2849 /* We can get the final addresses only during and after
2851 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2852 index
+= 3 * ((first_frag
->fr_next
->fr_address
2853 - first_frag
->fr_address
2854 - first_frag
->fr_fix
) >> 4);
2857 /* We don't know what the final addresses will be. We try our
2858 best to estimate. */
2859 switch (first_frag
->fr_type
)
2865 as_fatal ("only constant space allocation is supported");
2871 /* Take alignment into account. Assume the worst case
2872 before relaxation. */
2873 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2877 if (first_frag
->fr_symbol
)
2879 as_fatal ("only constant offsets are supported");
2883 index
+= 3 * (first_frag
->fr_offset
>> 4);
2887 /* Add in the full size of the frag converted to instruction slots. */
2888 index
+= 3 * (first_frag
->fr_fix
>> 4);
2889 /* Subtract away the initial part before first_addr. */
2890 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2891 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2893 /* Move to the beginning of the next frag. */
2894 first_frag
= first_frag
->fr_next
;
2895 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2897 /* This can happen if there is section switching in the middle of a
2898 function, causing the frag chain for the function to be broken. */
2899 if (first_frag
== NULL
)
2901 /* We get six warnings for one problem, because of the loop in
2902 fixup_unw_records, and because fixup_unw_records is called 3
2903 times: once before creating the variant frag, once to estimate
2904 its size, and once to relax it. This is unreasonable, so we use
2905 a static var to make sure we only emit the warning once. */
2906 static int warned
= 0;
2910 as_warn ("Corrupted unwind info due to unsupported section switching");
2918 /* Add in the used part of the last frag. */
2919 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2920 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2924 /* Optimize unwind record directives. */
2926 static unw_rec_list
*
2927 optimize_unw_records (list
)
2933 /* If the only unwind record is ".prologue" or ".prologue" followed
2934 by ".body", then we can optimize the unwind directives away. */
2935 if (list
->r
.type
== prologue
2936 && (list
->next
->r
.type
== endp
2937 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2943 /* Given a complete record list, process any records which have
2944 unresolved fields, (ie length counts for a prologue). After
2945 this has been run, all necessary information should be available
2946 within each record to generate an image. */
2949 fixup_unw_records (list
, before_relax
)
2953 unw_rec_list
*ptr
, *region
= 0;
2954 unsigned long first_addr
= 0, rlen
= 0, t
;
2955 fragS
*first_frag
= 0;
2957 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2959 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2960 as_bad (" Insn slot not set in unwind record.");
2961 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2962 first_addr
, first_frag
, before_relax
);
2963 switch (ptr
->r
.type
)
2971 unsigned long last_addr
= 0;
2972 fragS
*last_frag
= NULL
;
2974 first_addr
= ptr
->slot_number
;
2975 first_frag
= ptr
->slot_frag
;
2976 /* Find either the next body/prologue start, or the end of
2977 the function, and determine the size of the region. */
2978 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2979 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2980 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2982 last_addr
= last
->slot_number
;
2983 last_frag
= last
->slot_frag
;
2986 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2988 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2989 if (ptr
->r
.type
== body
)
2990 /* End of region. */
2998 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
3000 /* This happens when a memory-stack-less procedure uses a
3001 ".restore sp" directive at the end of a region to pop
3003 ptr
->r
.record
.b
.t
= 0;
3014 case priunat_when_gr
:
3015 case priunat_when_mem
:
3019 ptr
->r
.record
.p
.t
= t
;
3027 case spill_psprel_p
:
3028 ptr
->r
.record
.x
.t
= t
;
3034 as_bad ("frgr_mem record before region record!");
3037 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3038 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3039 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3040 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3045 as_bad ("fr_mem record before region record!");
3048 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3049 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3054 as_bad ("gr_mem record before region record!");
3057 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3058 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3063 as_bad ("br_mem record before region record!");
3066 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
3067 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3073 as_bad ("gr_gr record before region record!");
3076 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3081 as_bad ("br_gr record before region record!");
3084 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3093 /* Estimate the size of a frag before relaxing. We only have one type of frag
3094 to handle here, which is the unwind info frag. */
3097 ia64_estimate_size_before_relax (fragS
*frag
,
3098 asection
*segtype ATTRIBUTE_UNUSED
)
3103 /* ??? This code is identical to the first part of ia64_convert_frag. */
3104 list
= (unw_rec_list
*) frag
->fr_opcode
;
3105 fixup_unw_records (list
, 0);
3107 len
= calc_record_size (list
);
3108 /* pad to pointer-size boundary. */
3109 pad
= len
% md
.pointer_size
;
3111 len
+= md
.pointer_size
- pad
;
3112 /* Add 8 for the header. */
3114 /* Add a pointer for the personality offset. */
3115 if (frag
->fr_offset
)
3116 size
+= md
.pointer_size
;
3118 /* fr_var carries the max_chars that we created the fragment with.
3119 We must, of course, have allocated enough memory earlier. */
3120 assert (frag
->fr_var
>= size
);
3122 return frag
->fr_fix
+ size
;
3125 /* This function converts a rs_machine_dependent variant frag into a
3126 normal fill frag with the unwind image from the the record list. */
3128 ia64_convert_frag (fragS
*frag
)
3134 /* ??? This code is identical to ia64_estimate_size_before_relax. */
3135 list
= (unw_rec_list
*) frag
->fr_opcode
;
3136 fixup_unw_records (list
, 0);
3138 len
= calc_record_size (list
);
3139 /* pad to pointer-size boundary. */
3140 pad
= len
% md
.pointer_size
;
3142 len
+= md
.pointer_size
- pad
;
3143 /* Add 8 for the header. */
3145 /* Add a pointer for the personality offset. */
3146 if (frag
->fr_offset
)
3147 size
+= md
.pointer_size
;
3149 /* fr_var carries the max_chars that we created the fragment with.
3150 We must, of course, have allocated enough memory earlier. */
3151 assert (frag
->fr_var
>= size
);
3153 /* Initialize the header area. fr_offset is initialized with
3154 unwind.personality_routine. */
3155 if (frag
->fr_offset
)
3157 if (md
.flags
& EF_IA_64_ABI64
)
3158 flag_value
= (bfd_vma
) 3 << 32;
3160 /* 32-bit unwind info block. */
3161 flag_value
= (bfd_vma
) 0x1003 << 32;
3166 md_number_to_chars (frag
->fr_literal
,
3167 (((bfd_vma
) 1 << 48) /* Version. */
3168 | flag_value
/* U & E handler flags. */
3169 | (len
/ md
.pointer_size
)), /* Length. */
3172 /* Skip the header. */
3173 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3174 process_unw_records (list
, output_vbyte_mem
);
3176 /* Fill the padding bytes with zeros. */
3178 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3179 md
.pointer_size
- pad
);
3181 frag
->fr_fix
+= size
;
3182 frag
->fr_type
= rs_fill
;
3184 frag
->fr_offset
= 0;
3188 parse_predicate_and_operand (e
, qp
, po
)
3193 int sep
= parse_operand (e
, ',');
3195 *qp
= e
->X_add_number
- REG_P
;
3196 if (e
->X_op
!= O_register
|| *qp
> 63)
3198 as_bad ("First operand to .%s must be a predicate", po
);
3202 as_warn ("Pointless use of p0 as first operand to .%s", po
);
3204 sep
= parse_operand (e
, ',');
3211 convert_expr_to_ab_reg (e
, ab
, regp
, po
, n
)
3212 const expressionS
*e
;
3218 unsigned int reg
= e
->X_add_number
;
3220 *ab
= *regp
= 0; /* Anything valid is good here. */
3222 if (e
->X_op
!= O_register
)
3223 reg
= REG_GR
; /* Anything invalid is good here. */
3225 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3228 *regp
= reg
- REG_GR
;
3230 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3231 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3234 *regp
= reg
- REG_FR
;
3236 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3239 *regp
= reg
- REG_BR
;
3246 case REG_PR
: *regp
= 0; break;
3247 case REG_PSP
: *regp
= 1; break;
3248 case REG_PRIUNAT
: *regp
= 2; break;
3249 case REG_BR
+ 0: *regp
= 3; break;
3250 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3251 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3252 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3253 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3254 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3255 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3256 case REG_AR
+ AR_LC
: *regp
= 10; break;
3259 as_bad ("Operand %d to .%s must be a preserved register", n
, po
);
3266 convert_expr_to_xy_reg (e
, xy
, regp
, po
, n
)
3267 const expressionS
*e
;
3273 unsigned int reg
= e
->X_add_number
;
3275 *xy
= *regp
= 0; /* Anything valid is good here. */
3277 if (e
->X_op
!= O_register
)
3278 reg
= REG_GR
; /* Anything invalid is good here. */
3280 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3283 *regp
= reg
- REG_GR
;
3285 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3288 *regp
= reg
- REG_FR
;
3290 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3293 *regp
= reg
- REG_BR
;
3296 as_bad ("Operand %d to .%s must be a writable register", n
, po
);
3302 /* The current frag is an alignment frag. */
3303 align_frag
= frag_now
;
3304 s_align_bytes (arg
);
3309 int dummy ATTRIBUTE_UNUSED
;
3316 if (is_it_end_of_statement ())
3318 radix
= input_line_pointer
;
3319 ch
= get_symbol_end ();
3320 ia64_canonicalize_symbol_name (radix
);
3321 if (strcasecmp (radix
, "C"))
3322 as_bad ("Radix `%s' unsupported or invalid", radix
);
3323 *input_line_pointer
= ch
;
3324 demand_empty_rest_of_line ();
3327 /* Helper function for .loc directives. If the assembler is not generating
3328 line number info, then we need to remember which instructions have a .loc
3329 directive, and only call dwarf2_gen_line_info for those instructions. */
3334 CURR_SLOT
.loc_directive_seen
= 1;
3335 dwarf2_directive_loc (x
);
3338 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3340 dot_special_section (which
)
3343 set_section ((char *) special_section_name
[which
]);
3346 /* Return -1 for warning and 0 for error. */
3349 unwind_diagnostic (const char * region
, const char *directive
)
3351 if (md
.unwind_check
== unwind_check_warning
)
3353 as_warn (".%s outside of %s", directive
, region
);
3358 as_bad (".%s outside of %s", directive
, region
);
3359 ignore_rest_of_line ();
3364 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3365 a procedure but the unwind directive check is set to warning, 0 if
3366 a directive isn't in a procedure and the unwind directive check is set
3370 in_procedure (const char *directive
)
3372 if (unwind
.proc_pending
.sym
3373 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3375 return unwind_diagnostic ("procedure", directive
);
3378 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3379 a prologue but the unwind directive check is set to warning, 0 if
3380 a directive isn't in a prologue and the unwind directive check is set
3384 in_prologue (const char *directive
)
3386 int in
= in_procedure (directive
);
3388 if (in
> 0 && !unwind
.prologue
)
3389 in
= unwind_diagnostic ("prologue", directive
);
3390 check_pending_save ();
3394 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3395 a body but the unwind directive check is set to warning, 0 if
3396 a directive isn't in a body and the unwind directive check is set
3400 in_body (const char *directive
)
3402 int in
= in_procedure (directive
);
3404 if (in
> 0 && !unwind
.body
)
3405 in
= unwind_diagnostic ("body region", directive
);
3410 add_unwind_entry (ptr
, sep
)
3417 unwind
.tail
->next
= ptr
;
3422 /* The current entry can in fact be a chain of unwind entries. */
3423 if (unwind
.current_entry
== NULL
)
3424 unwind
.current_entry
= ptr
;
3427 /* The current entry can in fact be a chain of unwind entries. */
3428 if (unwind
.current_entry
== NULL
)
3429 unwind
.current_entry
= ptr
;
3433 /* Parse a tag permitted for the current directive. */
3437 ch
= get_symbol_end ();
3438 /* FIXME: For now, just issue a warning that this isn't implemented. */
3445 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3448 *input_line_pointer
= ch
;
3450 if (sep
!= NOT_A_CHAR
)
3451 demand_empty_rest_of_line ();
3456 int dummy ATTRIBUTE_UNUSED
;
3461 if (!in_prologue ("fframe"))
3464 sep
= parse_operand (&e
, ',');
3466 if (e
.X_op
!= O_constant
)
3468 as_bad ("First operand to .fframe must be a constant");
3471 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3476 int dummy ATTRIBUTE_UNUSED
;
3482 if (!in_prologue ("vframe"))
3485 sep
= parse_operand (&e
, ',');
3486 reg
= e
.X_add_number
- REG_GR
;
3487 if (e
.X_op
!= O_register
|| reg
> 127)
3489 as_bad ("First operand to .vframe must be a general register");
3492 add_unwind_entry (output_mem_stack_v (), sep
);
3493 if (! (unwind
.prologue_mask
& 2))
3494 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3495 else if (reg
!= unwind
.prologue_gr
3496 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3497 as_warn ("Operand of .vframe contradicts .prologue");
3508 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
3510 if (!in_prologue ("vframesp"))
3513 sep
= parse_operand (&e
, ',');
3514 if (e
.X_op
!= O_constant
)
3516 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3519 add_unwind_entry (output_mem_stack_v (), sep
);
3520 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3525 int dummy ATTRIBUTE_UNUSED
;
3528 unsigned reg1
, reg2
;
3531 if (!in_prologue ("save"))
3534 sep
= parse_operand (&e1
, ',');
3536 sep
= parse_operand (&e2
, ',');
3540 reg1
= e1
.X_add_number
;
3541 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3542 if (e1
.X_op
!= O_register
)
3544 as_bad ("First operand to .save not a register");
3545 reg1
= REG_PR
; /* Anything valid is good here. */
3547 reg2
= e2
.X_add_number
- REG_GR
;
3548 if (e2
.X_op
!= O_register
|| reg2
> 127)
3550 as_bad ("Second operand to .save not a valid register");
3555 case REG_AR
+ AR_BSP
:
3556 add_unwind_entry (output_bsp_when (), sep
);
3557 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3559 case REG_AR
+ AR_BSPSTORE
:
3560 add_unwind_entry (output_bspstore_when (), sep
);
3561 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3563 case REG_AR
+ AR_RNAT
:
3564 add_unwind_entry (output_rnat_when (), sep
);
3565 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3567 case REG_AR
+ AR_UNAT
:
3568 add_unwind_entry (output_unat_when (), sep
);
3569 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3571 case REG_AR
+ AR_FPSR
:
3572 add_unwind_entry (output_fpsr_when (), sep
);
3573 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3575 case REG_AR
+ AR_PFS
:
3576 add_unwind_entry (output_pfs_when (), sep
);
3577 if (! (unwind
.prologue_mask
& 4))
3578 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3579 else if (reg2
!= unwind
.prologue_gr
3580 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3581 as_warn ("Second operand of .save contradicts .prologue");
3583 case REG_AR
+ AR_LC
:
3584 add_unwind_entry (output_lc_when (), sep
);
3585 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3588 add_unwind_entry (output_rp_when (), sep
);
3589 if (! (unwind
.prologue_mask
& 8))
3590 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3591 else if (reg2
!= unwind
.prologue_gr
)
3592 as_warn ("Second operand of .save contradicts .prologue");
3595 add_unwind_entry (output_preds_when (), sep
);
3596 if (! (unwind
.prologue_mask
& 1))
3597 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3598 else if (reg2
!= unwind
.prologue_gr
3599 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3600 as_warn ("Second operand of .save contradicts .prologue");
3603 add_unwind_entry (output_priunat_when_gr (), sep
);
3604 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3607 as_bad ("First operand to .save not a valid register");
3608 add_unwind_entry (NULL
, sep
);
3615 int dummy ATTRIBUTE_UNUSED
;
3618 unsigned long ecount
; /* # of _additional_ regions to pop */
3621 if (!in_body ("restore"))
3624 sep
= parse_operand (&e1
, ',');
3625 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3626 as_bad ("First operand to .restore must be stack pointer (sp)");
3632 sep
= parse_operand (&e2
, ',');
3633 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3635 as_bad ("Second operand to .restore must be a constant >= 0");
3636 e2
.X_add_number
= 0;
3638 ecount
= e2
.X_add_number
;
3641 ecount
= unwind
.prologue_count
- 1;
3643 if (ecount
>= unwind
.prologue_count
)
3645 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3646 ecount
+ 1, unwind
.prologue_count
);
3650 add_unwind_entry (output_epilogue (ecount
), sep
);
3652 if (ecount
< unwind
.prologue_count
)
3653 unwind
.prologue_count
-= ecount
+ 1;
3655 unwind
.prologue_count
= 0;
3659 dot_restorereg (pred
)
3662 unsigned int qp
, ab
, reg
;
3665 const char * const po
= pred
? "restorereg.p" : "restorereg";
3667 if (!in_procedure (po
))
3671 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3674 sep
= parse_operand (&e
, ',');
3677 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3679 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3682 static char *special_linkonce_name
[] =
3684 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3688 start_unwind_section (const segT text_seg
, int sec_index
)
3691 Use a slightly ugly scheme to derive the unwind section names from
3692 the text section name:
3694 text sect. unwind table sect.
3695 name: name: comments:
3696 ---------- ----------------- --------------------------------
3698 .text.foo .IA_64.unwind.text.foo
3699 .foo .IA_64.unwind.foo
3701 .gnu.linkonce.ia64unw.foo
3702 _info .IA_64.unwind_info gas issues error message (ditto)
3703 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3705 This mapping is done so that:
3707 (a) An object file with unwind info only in .text will use
3708 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3709 This follows the letter of the ABI and also ensures backwards
3710 compatibility with older toolchains.
3712 (b) An object file with unwind info in multiple text sections
3713 will use separate unwind sections for each text section.
3714 This allows us to properly set the "sh_info" and "sh_link"
3715 fields in SHT_IA_64_UNWIND as required by the ABI and also
3716 lets GNU ld support programs with multiple segments
3717 containing unwind info (as might be the case for certain
3718 embedded applications).
3720 (c) An error is issued if there would be a name clash.
3723 const char *text_name
, *sec_text_name
;
3725 const char *prefix
= special_section_name
[sec_index
];
3727 size_t prefix_len
, suffix_len
, sec_name_len
;
3729 sec_text_name
= segment_name (text_seg
);
3730 text_name
= sec_text_name
;
3731 if (strncmp (text_name
, "_info", 5) == 0)
3733 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3735 ignore_rest_of_line ();
3738 if (strcmp (text_name
, ".text") == 0)
3741 /* Build the unwind section name by appending the (possibly stripped)
3742 text section name to the unwind prefix. */
3744 if (strncmp (text_name
, ".gnu.linkonce.t.",
3745 sizeof (".gnu.linkonce.t.") - 1) == 0)
3747 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3748 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3751 prefix_len
= strlen (prefix
);
3752 suffix_len
= strlen (suffix
);
3753 sec_name_len
= prefix_len
+ suffix_len
;
3754 sec_name
= alloca (sec_name_len
+ 1);
3755 memcpy (sec_name
, prefix
, prefix_len
);
3756 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3757 sec_name
[sec_name_len
] = '\0';
3759 /* Handle COMDAT group. */
3760 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3761 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3764 size_t len
, group_name_len
;
3765 const char *group_name
= elf_group_name (text_seg
);
3767 if (group_name
== NULL
)
3769 as_bad ("Group section `%s' has no group signature",
3771 ignore_rest_of_line ();
3774 /* We have to construct a fake section directive. */
3775 group_name_len
= strlen (group_name
);
3777 + 16 /* ,"aG",@progbits, */
3778 + group_name_len
/* ,group_name */
3781 section
= alloca (len
+ 1);
3782 memcpy (section
, sec_name
, sec_name_len
);
3783 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3784 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3785 memcpy (section
+ len
- 7, ",comdat", 7);
3786 section
[len
] = '\0';
3787 set_section (section
);
3791 set_section (sec_name
);
3792 bfd_set_section_flags (stdoutput
, now_seg
,
3793 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3796 elf_linked_to_section (now_seg
) = text_seg
;
3800 generate_unwind_image (const segT text_seg
)
3805 /* Mark the end of the unwind info, so that we can compute the size of the
3806 last unwind region. */
3807 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3809 /* Force out pending instructions, to make sure all unwind records have
3810 a valid slot_number field. */
3811 ia64_flush_insns ();
3813 /* Generate the unwind record. */
3814 list
= optimize_unw_records (unwind
.list
);
3815 fixup_unw_records (list
, 1);
3816 size
= calc_record_size (list
);
3818 if (size
> 0 || unwind
.force_unwind_entry
)
3820 unwind
.force_unwind_entry
= 0;
3821 /* pad to pointer-size boundary. */
3822 pad
= size
% md
.pointer_size
;
3824 size
+= md
.pointer_size
- pad
;
3825 /* Add 8 for the header. */
3827 /* Add a pointer for the personality offset. */
3828 if (unwind
.personality_routine
)
3829 size
+= md
.pointer_size
;
3832 /* If there are unwind records, switch sections, and output the info. */
3836 bfd_reloc_code_real_type reloc
;
3838 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3840 /* Make sure the section has 4 byte alignment for ILP32 and
3841 8 byte alignment for LP64. */
3842 frag_align (md
.pointer_size_shift
, 0, 0);
3843 record_alignment (now_seg
, md
.pointer_size_shift
);
3845 /* Set expression which points to start of unwind descriptor area. */
3846 unwind
.info
= expr_build_dot ();
3848 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3849 (offsetT
) (long) unwind
.personality_routine
,
3852 /* Add the personality address to the image. */
3853 if (unwind
.personality_routine
!= 0)
3855 exp
.X_op
= O_symbol
;
3856 exp
.X_add_symbol
= unwind
.personality_routine
;
3857 exp
.X_add_number
= 0;
3859 if (md
.flags
& EF_IA_64_BE
)
3861 if (md
.flags
& EF_IA_64_ABI64
)
3862 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3864 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3868 if (md
.flags
& EF_IA_64_ABI64
)
3869 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3871 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3874 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3875 md
.pointer_size
, &exp
, 0, reloc
);
3876 unwind
.personality_routine
= 0;
3880 free_saved_prologue_counts ();
3881 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3885 dot_handlerdata (dummy
)
3886 int dummy ATTRIBUTE_UNUSED
;
3888 if (!in_procedure ("handlerdata"))
3890 unwind
.force_unwind_entry
= 1;
3892 /* Remember which segment we're in so we can switch back after .endp */
3893 unwind
.saved_text_seg
= now_seg
;
3894 unwind
.saved_text_subseg
= now_subseg
;
3896 /* Generate unwind info into unwind-info section and then leave that
3897 section as the currently active one so dataXX directives go into
3898 the language specific data area of the unwind info block. */
3899 generate_unwind_image (now_seg
);
3900 demand_empty_rest_of_line ();
3904 dot_unwentry (dummy
)
3905 int dummy ATTRIBUTE_UNUSED
;
3907 if (!in_procedure ("unwentry"))
3909 unwind
.force_unwind_entry
= 1;
3910 demand_empty_rest_of_line ();
3915 int dummy ATTRIBUTE_UNUSED
;
3920 if (!in_prologue ("altrp"))
3923 parse_operand (&e
, 0);
3924 reg
= e
.X_add_number
- REG_BR
;
3925 if (e
.X_op
!= O_register
|| reg
> 7)
3927 as_bad ("First operand to .altrp not a valid branch register");
3930 add_unwind_entry (output_rp_br (reg
), 0);
3934 dot_savemem (psprel
)
3940 const char * const po
= psprel
? "savepsp" : "savesp";
3942 if (!in_prologue (po
))
3945 sep
= parse_operand (&e1
, ',');
3947 sep
= parse_operand (&e2
, ',');
3951 reg1
= e1
.X_add_number
;
3952 val
= e2
.X_add_number
;
3954 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3955 if (e1
.X_op
!= O_register
)
3957 as_bad ("First operand to .%s not a register", po
);
3958 reg1
= REG_PR
; /* Anything valid is good here. */
3960 if (e2
.X_op
!= O_constant
)
3962 as_bad ("Second operand to .%s not a constant", po
);
3968 case REG_AR
+ AR_BSP
:
3969 add_unwind_entry (output_bsp_when (), sep
);
3970 add_unwind_entry ((psprel
3972 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3974 case REG_AR
+ AR_BSPSTORE
:
3975 add_unwind_entry (output_bspstore_when (), sep
);
3976 add_unwind_entry ((psprel
3977 ? output_bspstore_psprel
3978 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3980 case REG_AR
+ AR_RNAT
:
3981 add_unwind_entry (output_rnat_when (), sep
);
3982 add_unwind_entry ((psprel
3983 ? output_rnat_psprel
3984 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3986 case REG_AR
+ AR_UNAT
:
3987 add_unwind_entry (output_unat_when (), sep
);
3988 add_unwind_entry ((psprel
3989 ? output_unat_psprel
3990 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3992 case REG_AR
+ AR_FPSR
:
3993 add_unwind_entry (output_fpsr_when (), sep
);
3994 add_unwind_entry ((psprel
3995 ? output_fpsr_psprel
3996 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3998 case REG_AR
+ AR_PFS
:
3999 add_unwind_entry (output_pfs_when (), sep
);
4000 add_unwind_entry ((psprel
4002 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
4004 case REG_AR
+ AR_LC
:
4005 add_unwind_entry (output_lc_when (), sep
);
4006 add_unwind_entry ((psprel
4008 : output_lc_sprel
) (val
), NOT_A_CHAR
);
4011 add_unwind_entry (output_rp_when (), sep
);
4012 add_unwind_entry ((psprel
4014 : output_rp_sprel
) (val
), NOT_A_CHAR
);
4017 add_unwind_entry (output_preds_when (), sep
);
4018 add_unwind_entry ((psprel
4019 ? output_preds_psprel
4020 : output_preds_sprel
) (val
), NOT_A_CHAR
);
4023 add_unwind_entry (output_priunat_when_mem (), sep
);
4024 add_unwind_entry ((psprel
4025 ? output_priunat_psprel
4026 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
4029 as_bad ("First operand to .%s not a valid register", po
);
4030 add_unwind_entry (NULL
, sep
);
4037 int dummy ATTRIBUTE_UNUSED
;
4043 if (!in_prologue ("save.g"))
4046 sep
= parse_operand (&e
, ',');
4048 grmask
= e
.X_add_number
;
4049 if (e
.X_op
!= O_constant
4050 || e
.X_add_number
<= 0
4051 || e
.X_add_number
> 0xf)
4053 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4060 int n
= popcount (grmask
);
4062 parse_operand (&e
, 0);
4063 reg
= e
.X_add_number
- REG_GR
;
4064 if (e
.X_op
!= O_register
|| reg
> 127)
4066 as_bad ("Second operand to .save.g must be a general register");
4069 else if (reg
> 128U - n
)
4071 as_bad ("Second operand to .save.g must be the first of %d general registers", n
);
4074 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
4077 add_unwind_entry (output_gr_mem (grmask
), 0);
4082 int dummy ATTRIBUTE_UNUSED
;
4086 if (!in_prologue ("save.f"))
4089 parse_operand (&e
, 0);
4091 if (e
.X_op
!= O_constant
4092 || e
.X_add_number
<= 0
4093 || e
.X_add_number
> 0xfffff)
4095 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4098 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
4103 int dummy ATTRIBUTE_UNUSED
;
4109 if (!in_prologue ("save.b"))
4112 sep
= parse_operand (&e
, ',');
4114 brmask
= e
.X_add_number
;
4115 if (e
.X_op
!= O_constant
4116 || e
.X_add_number
<= 0
4117 || e
.X_add_number
> 0x1f)
4119 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4126 int n
= popcount (brmask
);
4128 parse_operand (&e
, 0);
4129 reg
= e
.X_add_number
- REG_GR
;
4130 if (e
.X_op
!= O_register
|| reg
> 127)
4132 as_bad ("Second operand to .save.b must be a general register");
4135 else if (reg
> 128U - n
)
4137 as_bad ("Second operand to .save.b must be the first of %d general registers", n
);
4140 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
4143 add_unwind_entry (output_br_mem (brmask
), 0);
4148 int dummy ATTRIBUTE_UNUSED
;
4152 if (!in_prologue ("save.gf"))
4155 if (parse_operand (&e1
, ',') == ',')
4156 parse_operand (&e2
, 0);
4160 if (e1
.X_op
!= O_constant
4161 || e1
.X_add_number
< 0
4162 || e1
.X_add_number
> 0xf)
4164 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4166 e1
.X_add_number
= 0;
4168 if (e2
.X_op
!= O_constant
4169 || e2
.X_add_number
< 0
4170 || e2
.X_add_number
> 0xfffff)
4172 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4174 e2
.X_add_number
= 0;
4176 if (e1
.X_op
== O_constant
4177 && e2
.X_op
== O_constant
4178 && e1
.X_add_number
== 0
4179 && e2
.X_add_number
== 0)
4180 as_bad ("Operands to .save.gf may not be both zero");
4182 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4187 int dummy ATTRIBUTE_UNUSED
;
4191 if (!in_prologue ("spill"))
4194 parse_operand (&e
, 0);
4196 if (e
.X_op
!= O_constant
)
4198 as_bad ("Operand to .spill must be a constant");
4201 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4209 unsigned int qp
, ab
, xy
, reg
, treg
;
4211 const char * const po
= pred
? "spillreg.p" : "spillreg";
4213 if (!in_procedure (po
))
4217 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4220 sep
= parse_operand (&e
, ',');
4223 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4226 sep
= parse_operand (&e
, ',');
4229 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4231 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4235 dot_spillmem (psprel
)
4239 int pred
= (psprel
< 0), sep
;
4240 unsigned int qp
, ab
, reg
;
4246 po
= psprel
? "spillpsp.p" : "spillsp.p";
4249 po
= psprel
? "spillpsp" : "spillsp";
4251 if (!in_procedure (po
))
4255 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4258 sep
= parse_operand (&e
, ',');
4261 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4264 sep
= parse_operand (&e
, ',');
4267 if (e
.X_op
!= O_constant
)
4269 as_bad ("Operand %d to .%s must be a constant", 2 + pred
, po
);
4274 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4276 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4280 get_saved_prologue_count (lbl
)
4283 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4285 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4289 return lpc
->prologue_count
;
4291 as_bad ("Missing .label_state %ld", lbl
);
4296 save_prologue_count (lbl
, count
)
4300 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4302 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4306 lpc
->prologue_count
= count
;
4309 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4311 new_lpc
->next
= unwind
.saved_prologue_counts
;
4312 new_lpc
->label_number
= lbl
;
4313 new_lpc
->prologue_count
= count
;
4314 unwind
.saved_prologue_counts
= new_lpc
;
4319 free_saved_prologue_counts ()
4321 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4322 label_prologue_count
*next
;
4331 unwind
.saved_prologue_counts
= NULL
;
4335 dot_label_state (dummy
)
4336 int dummy ATTRIBUTE_UNUSED
;
4340 if (!in_body ("label_state"))
4343 parse_operand (&e
, 0);
4344 if (e
.X_op
== O_constant
)
4345 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4348 as_bad ("Operand to .label_state must be a constant");
4351 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4355 dot_copy_state (dummy
)
4356 int dummy ATTRIBUTE_UNUSED
;
4360 if (!in_body ("copy_state"))
4363 parse_operand (&e
, 0);
4364 if (e
.X_op
== O_constant
)
4365 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4368 as_bad ("Operand to .copy_state must be a constant");
4371 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4376 int dummy ATTRIBUTE_UNUSED
;
4381 if (!in_prologue ("unwabi"))
4384 sep
= parse_operand (&e1
, ',');
4386 parse_operand (&e2
, 0);
4390 if (e1
.X_op
!= O_constant
)
4392 as_bad ("First operand to .unwabi must be a constant");
4393 e1
.X_add_number
= 0;
4396 if (e2
.X_op
!= O_constant
)
4398 as_bad ("Second operand to .unwabi must be a constant");
4399 e2
.X_add_number
= 0;
4402 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4406 dot_personality (dummy
)
4407 int dummy ATTRIBUTE_UNUSED
;
4410 if (!in_procedure ("personality"))
4413 name
= input_line_pointer
;
4414 c
= get_symbol_end ();
4415 p
= input_line_pointer
;
4416 unwind
.personality_routine
= symbol_find_or_make (name
);
4417 unwind
.force_unwind_entry
= 1;
4420 demand_empty_rest_of_line ();
4425 int dummy ATTRIBUTE_UNUSED
;
4429 proc_pending
*pending
, *last_pending
;
4431 if (unwind
.proc_pending
.sym
)
4433 (md
.unwind_check
== unwind_check_warning
4435 : as_bad
) ("Missing .endp after previous .proc");
4436 while (unwind
.proc_pending
.next
)
4438 pending
= unwind
.proc_pending
.next
;
4439 unwind
.proc_pending
.next
= pending
->next
;
4443 last_pending
= NULL
;
4445 /* Parse names of main and alternate entry points and mark them as
4446 function symbols: */
4450 name
= input_line_pointer
;
4451 c
= get_symbol_end ();
4452 p
= input_line_pointer
;
4454 as_bad ("Empty argument of .proc");
4457 sym
= symbol_find_or_make (name
);
4458 if (S_IS_DEFINED (sym
))
4459 as_bad ("`%s' was already defined", name
);
4460 else if (!last_pending
)
4462 unwind
.proc_pending
.sym
= sym
;
4463 last_pending
= &unwind
.proc_pending
;
4467 pending
= xmalloc (sizeof (*pending
));
4469 last_pending
= last_pending
->next
= pending
;
4471 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4475 if (*input_line_pointer
!= ',')
4477 ++input_line_pointer
;
4481 unwind
.proc_pending
.sym
= expr_build_dot ();
4482 last_pending
= &unwind
.proc_pending
;
4484 last_pending
->next
= NULL
;
4485 demand_empty_rest_of_line ();
4488 unwind
.prologue
= 0;
4489 unwind
.prologue_count
= 0;
4492 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4493 unwind
.personality_routine
= 0;
4498 int dummy ATTRIBUTE_UNUSED
;
4500 if (!in_procedure ("body"))
4502 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4503 as_warn ("Initial .body should precede any instructions");
4504 check_pending_save ();
4506 unwind
.prologue
= 0;
4507 unwind
.prologue_mask
= 0;
4510 add_unwind_entry (output_body (), 0);
4514 dot_prologue (dummy
)
4515 int dummy ATTRIBUTE_UNUSED
;
4517 unsigned mask
= 0, grsave
= 0;
4519 if (!in_procedure ("prologue"))
4521 if (unwind
.prologue
)
4523 as_bad (".prologue within prologue");
4524 ignore_rest_of_line ();
4527 if (!unwind
.body
&& unwind
.insn
)
4528 as_warn ("Initial .prologue should precede any instructions");
4530 if (!is_it_end_of_statement ())
4533 int n
, sep
= parse_operand (&e
, ',');
4535 if (e
.X_op
!= O_constant
4536 || e
.X_add_number
< 0
4537 || e
.X_add_number
> 0xf)
4538 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4539 else if (e
.X_add_number
== 0)
4540 as_warn ("Pointless use of zero first operand to .prologue");
4542 mask
= e
.X_add_number
;
4543 n
= popcount (mask
);
4546 parse_operand (&e
, 0);
4549 if (e
.X_op
== O_constant
4550 && e
.X_add_number
>= 0
4551 && e
.X_add_number
< 128)
4553 if (md
.unwind_check
== unwind_check_error
)
4554 as_warn ("Using a constant as second operand to .prologue is deprecated");
4555 grsave
= e
.X_add_number
;
4557 else if (e
.X_op
!= O_register
4558 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4560 as_bad ("Second operand to .prologue must be a general register");
4563 else if (grsave
> 128U - n
)
4565 as_bad ("Second operand to .prologue must be the first of %d general registers", n
);
4572 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4574 add_unwind_entry (output_prologue (), 0);
4576 unwind
.prologue
= 1;
4577 unwind
.prologue_mask
= mask
;
4578 unwind
.prologue_gr
= grsave
;
4580 ++unwind
.prologue_count
;
4585 int dummy ATTRIBUTE_UNUSED
;
4588 int bytes_per_address
;
4591 subsegT saved_subseg
;
4592 proc_pending
*pending
;
4593 int unwind_check
= md
.unwind_check
;
4595 md
.unwind_check
= unwind_check_error
;
4596 if (!in_procedure ("endp"))
4598 md
.unwind_check
= unwind_check
;
4600 if (unwind
.saved_text_seg
)
4602 saved_seg
= unwind
.saved_text_seg
;
4603 saved_subseg
= unwind
.saved_text_subseg
;
4604 unwind
.saved_text_seg
= NULL
;
4608 saved_seg
= now_seg
;
4609 saved_subseg
= now_subseg
;
4612 insn_group_break (1, 0, 0);
4614 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4616 generate_unwind_image (saved_seg
);
4618 if (unwind
.info
|| unwind
.force_unwind_entry
)
4622 subseg_set (md
.last_text_seg
, 0);
4623 proc_end
= expr_build_dot ();
4625 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4627 /* Make sure that section has 4 byte alignment for ILP32 and
4628 8 byte alignment for LP64. */
4629 record_alignment (now_seg
, md
.pointer_size_shift
);
4631 /* Need space for 3 pointers for procedure start, procedure end,
4633 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4634 where
= frag_now_fix () - (3 * md
.pointer_size
);
4635 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4637 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4638 e
.X_op
= O_pseudo_fixup
;
4639 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4641 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4642 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4643 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4644 S_GET_VALUE (unwind
.proc_pending
.sym
),
4645 symbol_get_frag (unwind
.proc_pending
.sym
));
4647 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4648 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4650 e
.X_op
= O_pseudo_fixup
;
4651 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4653 e
.X_add_symbol
= proc_end
;
4654 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4655 bytes_per_address
, &e
);
4659 e
.X_op
= O_pseudo_fixup
;
4660 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4662 e
.X_add_symbol
= unwind
.info
;
4663 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4664 bytes_per_address
, &e
);
4667 subseg_set (saved_seg
, saved_subseg
);
4669 /* Set symbol sizes. */
4670 pending
= &unwind
.proc_pending
;
4671 if (S_GET_NAME (pending
->sym
))
4675 symbolS
*sym
= pending
->sym
;
4677 if (!S_IS_DEFINED (sym
))
4678 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym
));
4679 else if (S_GET_SIZE (sym
) == 0
4680 && symbol_get_obj (sym
)->size
== NULL
)
4682 fragS
*frag
= symbol_get_frag (sym
);
4686 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4687 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4690 symbol_get_obj (sym
)->size
=
4691 (expressionS
*) xmalloc (sizeof (expressionS
));
4692 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4693 symbol_get_obj (sym
)->size
->X_add_symbol
4694 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4695 frag_now_fix (), frag_now
);
4696 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4697 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4701 } while ((pending
= pending
->next
) != NULL
);
4704 /* Parse names of main and alternate entry points. */
4710 name
= input_line_pointer
;
4711 c
= get_symbol_end ();
4712 p
= input_line_pointer
;
4714 (md
.unwind_check
== unwind_check_warning
4716 : as_bad
) ("Empty argument of .endp");
4719 symbolS
*sym
= symbol_find (name
);
4721 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4723 if (sym
== pending
->sym
)
4725 pending
->sym
= NULL
;
4729 if (!sym
|| !pending
)
4730 as_warn ("`%s' was not specified with previous .proc", name
);
4734 if (*input_line_pointer
!= ',')
4736 ++input_line_pointer
;
4738 demand_empty_rest_of_line ();
4740 /* Deliberately only checking for the main entry point here; the
4741 language spec even says all arguments to .endp are ignored. */
4742 if (unwind
.proc_pending
.sym
4743 && S_GET_NAME (unwind
.proc_pending
.sym
)
4744 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4745 as_warn ("`%s' should be an operand to this .endp",
4746 S_GET_NAME (unwind
.proc_pending
.sym
));
4747 while (unwind
.proc_pending
.next
)
4749 pending
= unwind
.proc_pending
.next
;
4750 unwind
.proc_pending
.next
= pending
->next
;
4753 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4757 dot_template (template)
4760 CURR_SLOT
.user_template
= template;
4765 int dummy ATTRIBUTE_UNUSED
;
4767 int ins
, locs
, outs
, rots
;
4769 if (is_it_end_of_statement ())
4770 ins
= locs
= outs
= rots
= 0;
4773 ins
= get_absolute_expression ();
4774 if (*input_line_pointer
++ != ',')
4776 locs
= get_absolute_expression ();
4777 if (*input_line_pointer
++ != ',')
4779 outs
= get_absolute_expression ();
4780 if (*input_line_pointer
++ != ',')
4782 rots
= get_absolute_expression ();
4784 set_regstack (ins
, locs
, outs
, rots
);
4788 as_bad ("Comma expected");
4789 ignore_rest_of_line ();
4797 valueT num_alloced
= 0;
4798 struct dynreg
**drpp
, *dr
;
4799 int ch
, base_reg
= 0;
4805 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4806 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4807 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4811 /* First, remove existing names from hash table. */
4812 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4814 hash_delete (md
.dynreg_hash
, dr
->name
);
4815 /* FIXME: Free dr->name. */
4819 drpp
= &md
.dynreg
[type
];
4822 start
= input_line_pointer
;
4823 ch
= get_symbol_end ();
4824 len
= strlen (ia64_canonicalize_symbol_name (start
));
4825 *input_line_pointer
= ch
;
4828 if (*input_line_pointer
!= '[')
4830 as_bad ("Expected '['");
4833 ++input_line_pointer
; /* skip '[' */
4835 num_regs
= get_absolute_expression ();
4837 if (*input_line_pointer
++ != ']')
4839 as_bad ("Expected ']'");
4844 as_bad ("Number of elements must be positive");
4849 num_alloced
+= num_regs
;
4853 if (num_alloced
> md
.rot
.num_regs
)
4855 as_bad ("Used more than the declared %d rotating registers",
4861 if (num_alloced
> 96)
4863 as_bad ("Used more than the available 96 rotating registers");
4868 if (num_alloced
> 48)
4870 as_bad ("Used more than the available 48 rotating registers");
4881 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4882 memset (*drpp
, 0, sizeof (*dr
));
4885 name
= obstack_alloc (¬es
, len
+ 1);
4886 memcpy (name
, start
, len
);
4891 dr
->num_regs
= num_regs
;
4892 dr
->base
= base_reg
;
4894 base_reg
+= num_regs
;
4896 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4898 as_bad ("Attempt to redefine register set `%s'", name
);
4899 obstack_free (¬es
, name
);
4903 if (*input_line_pointer
!= ',')
4905 ++input_line_pointer
; /* skip comma */
4908 demand_empty_rest_of_line ();
4912 ignore_rest_of_line ();
4916 dot_byteorder (byteorder
)
4919 segment_info_type
*seginfo
= seg_info (now_seg
);
4921 if (byteorder
== -1)
4923 if (seginfo
->tc_segment_info_data
.endian
== 0)
4924 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4925 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4928 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4930 if (target_big_endian
!= byteorder
)
4932 target_big_endian
= byteorder
;
4933 if (target_big_endian
)
4935 ia64_number_to_chars
= number_to_chars_bigendian
;
4936 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4940 ia64_number_to_chars
= number_to_chars_littleendian
;
4941 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4948 int dummy ATTRIBUTE_UNUSED
;
4955 option
= input_line_pointer
;
4956 ch
= get_symbol_end ();
4957 if (strcmp (option
, "lsb") == 0)
4958 md
.flags
&= ~EF_IA_64_BE
;
4959 else if (strcmp (option
, "msb") == 0)
4960 md
.flags
|= EF_IA_64_BE
;
4961 else if (strcmp (option
, "abi32") == 0)
4962 md
.flags
&= ~EF_IA_64_ABI64
;
4963 else if (strcmp (option
, "abi64") == 0)
4964 md
.flags
|= EF_IA_64_ABI64
;
4966 as_bad ("Unknown psr option `%s'", option
);
4967 *input_line_pointer
= ch
;
4970 if (*input_line_pointer
!= ',')
4973 ++input_line_pointer
;
4976 demand_empty_rest_of_line ();
4981 int dummy ATTRIBUTE_UNUSED
;
4983 new_logical_line (0, get_absolute_expression ());
4984 demand_empty_rest_of_line ();
4988 cross_section (ref
, cons
, ua
)
4990 void (*cons
) PARAMS((int));
4994 int saved_auto_align
;
4995 unsigned int section_count
;
4998 start
= input_line_pointer
;
5004 name
= demand_copy_C_string (&len
);
5005 obstack_free(¬es
, name
);
5008 ignore_rest_of_line ();
5014 char c
= get_symbol_end ();
5016 if (input_line_pointer
== start
)
5018 as_bad ("Missing section name");
5019 ignore_rest_of_line ();
5022 *input_line_pointer
= c
;
5024 end
= input_line_pointer
;
5026 if (*input_line_pointer
!= ',')
5028 as_bad ("Comma expected after section name");
5029 ignore_rest_of_line ();
5033 end
= input_line_pointer
+ 1; /* skip comma */
5034 input_line_pointer
= start
;
5035 md
.keep_pending_output
= 1;
5036 section_count
= bfd_count_sections(stdoutput
);
5037 obj_elf_section (0);
5038 if (section_count
!= bfd_count_sections(stdoutput
))
5039 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5040 input_line_pointer
= end
;
5041 saved_auto_align
= md
.auto_align
;
5046 md
.auto_align
= saved_auto_align
;
5047 obj_elf_previous (0);
5048 md
.keep_pending_output
= 0;
5055 cross_section (size
, cons
, 0);
5058 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
5061 stmt_float_cons (kind
)
5082 ia64_do_align (alignment
);
5090 int saved_auto_align
= md
.auto_align
;
5094 md
.auto_align
= saved_auto_align
;
5098 dot_xfloat_cons (kind
)
5101 cross_section (kind
, stmt_float_cons
, 0);
5105 dot_xstringer (zero
)
5108 cross_section (zero
, stringer
, 0);
5115 cross_section (size
, cons
, 1);
5119 dot_xfloat_cons_ua (kind
)
5122 cross_section (kind
, float_cons
, 1);
5125 /* .reg.val <regname>,value */
5129 int dummy ATTRIBUTE_UNUSED
;
5133 expression_and_evaluate (®
);
5134 if (reg
.X_op
!= O_register
)
5136 as_bad (_("Register name expected"));
5137 ignore_rest_of_line ();
5139 else if (*input_line_pointer
++ != ',')
5141 as_bad (_("Comma expected"));
5142 ignore_rest_of_line ();
5146 valueT value
= get_absolute_expression ();
5147 int regno
= reg
.X_add_number
;
5148 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
5149 as_warn (_("Register value annotation ignored"));
5152 gr_values
[regno
- REG_GR
].known
= 1;
5153 gr_values
[regno
- REG_GR
].value
= value
;
5154 gr_values
[regno
- REG_GR
].path
= md
.path
;
5157 demand_empty_rest_of_line ();
5162 .serialize.instruction
5165 dot_serialize (type
)
5168 insn_group_break (0, 0, 0);
5170 instruction_serialization ();
5172 data_serialization ();
5173 insn_group_break (0, 0, 0);
5174 demand_empty_rest_of_line ();
5177 /* select dv checking mode
5182 A stop is inserted when changing modes
5189 if (md
.manual_bundling
)
5190 as_warn (_("Directive invalid within a bundle"));
5192 if (type
== 'E' || type
== 'A')
5193 md
.mode_explicitly_set
= 0;
5195 md
.mode_explicitly_set
= 1;
5202 if (md
.explicit_mode
)
5203 insn_group_break (1, 0, 0);
5204 md
.explicit_mode
= 0;
5208 if (!md
.explicit_mode
)
5209 insn_group_break (1, 0, 0);
5210 md
.explicit_mode
= 1;
5214 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5215 insn_group_break (1, 0, 0);
5216 md
.explicit_mode
= md
.default_explicit_mode
;
5217 md
.mode_explicitly_set
= 0;
5228 for (regno
= 0; regno
< 64; regno
++)
5230 if (mask
& ((valueT
) 1 << regno
))
5232 fprintf (stderr
, "%s p%d", comma
, regno
);
5239 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5240 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5241 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5242 .pred.safe_across_calls p1 [, p2 [,...]]
5251 int p1
= -1, p2
= -1;
5255 if (*input_line_pointer
== '"')
5258 char *form
= demand_copy_C_string (&len
);
5260 if (strcmp (form
, "mutex") == 0)
5262 else if (strcmp (form
, "clear") == 0)
5264 else if (strcmp (form
, "imply") == 0)
5266 obstack_free (¬es
, form
);
5268 else if (*input_line_pointer
== '@')
5270 char *form
= ++input_line_pointer
;
5271 char c
= get_symbol_end();
5273 if (strcmp (form
, "mutex") == 0)
5275 else if (strcmp (form
, "clear") == 0)
5277 else if (strcmp (form
, "imply") == 0)
5279 *input_line_pointer
= c
;
5283 as_bad (_("Missing predicate relation type"));
5284 ignore_rest_of_line ();
5289 as_bad (_("Unrecognized predicate relation type"));
5290 ignore_rest_of_line ();
5293 if (*input_line_pointer
== ',')
5294 ++input_line_pointer
;
5303 expressionS pr
, *pr1
, *pr2
;
5305 expression_and_evaluate (&pr
);
5306 if (pr
.X_op
== O_register
5307 && pr
.X_add_number
>= REG_P
5308 && pr
.X_add_number
<= REG_P
+ 63)
5310 regno
= pr
.X_add_number
- REG_P
;
5318 else if (type
!= 'i'
5319 && pr
.X_op
== O_subtract
5320 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5321 && pr1
->X_op
== O_register
5322 && pr1
->X_add_number
>= REG_P
5323 && pr1
->X_add_number
<= REG_P
+ 63
5324 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5325 && pr2
->X_op
== O_register
5326 && pr2
->X_add_number
>= REG_P
5327 && pr2
->X_add_number
<= REG_P
+ 63)
5332 regno
= pr1
->X_add_number
- REG_P
;
5333 stop
= pr2
->X_add_number
- REG_P
;
5336 as_bad (_("Bad register range"));
5337 ignore_rest_of_line ();
5340 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5341 count
+= stop
- regno
+ 1;
5345 as_bad (_("Predicate register expected"));
5346 ignore_rest_of_line ();
5350 as_warn (_("Duplicate predicate register ignored"));
5352 if (*input_line_pointer
!= ',')
5354 ++input_line_pointer
;
5363 clear_qp_mutex (mask
);
5364 clear_qp_implies (mask
, (valueT
) 0);
5367 if (count
!= 2 || p1
== -1 || p2
== -1)
5368 as_bad (_("Predicate source and target required"));
5369 else if (p1
== 0 || p2
== 0)
5370 as_bad (_("Use of p0 is not valid in this context"));
5372 add_qp_imply (p1
, p2
);
5377 as_bad (_("At least two PR arguments expected"));
5382 as_bad (_("Use of p0 is not valid in this context"));
5385 add_qp_mutex (mask
);
5388 /* note that we don't override any existing relations */
5391 as_bad (_("At least one PR argument expected"));
5396 fprintf (stderr
, "Safe across calls: ");
5397 print_prmask (mask
);
5398 fprintf (stderr
, "\n");
5400 qp_safe_across_calls
= mask
;
5403 demand_empty_rest_of_line ();
5406 /* .entry label [, label [, ...]]
5407 Hint to DV code that the given labels are to be considered entry points.
5408 Otherwise, only global labels are considered entry points. */
5412 int dummy ATTRIBUTE_UNUSED
;
5421 name
= input_line_pointer
;
5422 c
= get_symbol_end ();
5423 symbolP
= symbol_find_or_make (name
);
5425 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5427 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5430 *input_line_pointer
= c
;
5432 c
= *input_line_pointer
;
5435 input_line_pointer
++;
5437 if (*input_line_pointer
== '\n')
5443 demand_empty_rest_of_line ();
5446 /* .mem.offset offset, base
5447 "base" is used to distinguish between offsets from a different base. */
5450 dot_mem_offset (dummy
)
5451 int dummy ATTRIBUTE_UNUSED
;
5453 md
.mem_offset
.hint
= 1;
5454 md
.mem_offset
.offset
= get_absolute_expression ();
5455 if (*input_line_pointer
!= ',')
5457 as_bad (_("Comma expected"));
5458 ignore_rest_of_line ();
5461 ++input_line_pointer
;
5462 md
.mem_offset
.base
= get_absolute_expression ();
5463 demand_empty_rest_of_line ();
5466 /* ia64-specific pseudo-ops: */
5467 const pseudo_typeS md_pseudo_table
[] =
5469 { "radix", dot_radix
, 0 },
5470 { "lcomm", s_lcomm_bytes
, 1 },
5471 { "loc", dot_loc
, 0 },
5472 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5473 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5474 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5475 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5476 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5477 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5478 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5479 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5480 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5481 { "proc", dot_proc
, 0 },
5482 { "body", dot_body
, 0 },
5483 { "prologue", dot_prologue
, 0 },
5484 { "endp", dot_endp
, 0 },
5486 { "fframe", dot_fframe
, 0 },
5487 { "vframe", dot_vframe
, 0 },
5488 { "vframesp", dot_vframesp
, 0 },
5489 { "vframepsp", dot_vframesp
, 1 },
5490 { "save", dot_save
, 0 },
5491 { "restore", dot_restore
, 0 },
5492 { "restorereg", dot_restorereg
, 0 },
5493 { "restorereg.p", dot_restorereg
, 1 },
5494 { "handlerdata", dot_handlerdata
, 0 },
5495 { "unwentry", dot_unwentry
, 0 },
5496 { "altrp", dot_altrp
, 0 },
5497 { "savesp", dot_savemem
, 0 },
5498 { "savepsp", dot_savemem
, 1 },
5499 { "save.g", dot_saveg
, 0 },
5500 { "save.f", dot_savef
, 0 },
5501 { "save.b", dot_saveb
, 0 },
5502 { "save.gf", dot_savegf
, 0 },
5503 { "spill", dot_spill
, 0 },
5504 { "spillreg", dot_spillreg
, 0 },
5505 { "spillsp", dot_spillmem
, 0 },
5506 { "spillpsp", dot_spillmem
, 1 },
5507 { "spillreg.p", dot_spillreg
, 1 },
5508 { "spillsp.p", dot_spillmem
, ~0 },
5509 { "spillpsp.p", dot_spillmem
, ~1 },
5510 { "label_state", dot_label_state
, 0 },
5511 { "copy_state", dot_copy_state
, 0 },
5512 { "unwabi", dot_unwabi
, 0 },
5513 { "personality", dot_personality
, 0 },
5514 { "mii", dot_template
, 0x0 },
5515 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5516 { "mlx", dot_template
, 0x2 },
5517 { "mmi", dot_template
, 0x4 },
5518 { "mfi", dot_template
, 0x6 },
5519 { "mmf", dot_template
, 0x7 },
5520 { "mib", dot_template
, 0x8 },
5521 { "mbb", dot_template
, 0x9 },
5522 { "bbb", dot_template
, 0xb },
5523 { "mmb", dot_template
, 0xc },
5524 { "mfb", dot_template
, 0xe },
5525 { "align", dot_align
, 0 },
5526 { "regstk", dot_regstk
, 0 },
5527 { "rotr", dot_rot
, DYNREG_GR
},
5528 { "rotf", dot_rot
, DYNREG_FR
},
5529 { "rotp", dot_rot
, DYNREG_PR
},
5530 { "lsb", dot_byteorder
, 0 },
5531 { "msb", dot_byteorder
, 1 },
5532 { "psr", dot_psr
, 0 },
5533 { "alias", dot_alias
, 0 },
5534 { "secalias", dot_alias
, 1 },
5535 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5537 { "xdata1", dot_xdata
, 1 },
5538 { "xdata2", dot_xdata
, 2 },
5539 { "xdata4", dot_xdata
, 4 },
5540 { "xdata8", dot_xdata
, 8 },
5541 { "xdata16", dot_xdata
, 16 },
5542 { "xreal4", dot_xfloat_cons
, 'f' },
5543 { "xreal8", dot_xfloat_cons
, 'd' },
5544 { "xreal10", dot_xfloat_cons
, 'x' },
5545 { "xreal16", dot_xfloat_cons
, 'X' },
5546 { "xstring", dot_xstringer
, 0 },
5547 { "xstringz", dot_xstringer
, 1 },
5549 /* unaligned versions: */
5550 { "xdata2.ua", dot_xdata_ua
, 2 },
5551 { "xdata4.ua", dot_xdata_ua
, 4 },
5552 { "xdata8.ua", dot_xdata_ua
, 8 },
5553 { "xdata16.ua", dot_xdata_ua
, 16 },
5554 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5555 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5556 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5557 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5559 /* annotations/DV checking support */
5560 { "entry", dot_entry
, 0 },
5561 { "mem.offset", dot_mem_offset
, 0 },
5562 { "pred.rel", dot_pred_rel
, 0 },
5563 { "pred.rel.clear", dot_pred_rel
, 'c' },
5564 { "pred.rel.imply", dot_pred_rel
, 'i' },
5565 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5566 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5567 { "reg.val", dot_reg_val
, 0 },
5568 { "serialize.data", dot_serialize
, 0 },
5569 { "serialize.instruction", dot_serialize
, 1 },
5570 { "auto", dot_dv_mode
, 'a' },
5571 { "explicit", dot_dv_mode
, 'e' },
5572 { "default", dot_dv_mode
, 'd' },
5574 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5575 IA-64 aligns data allocation pseudo-ops by default, so we have to
5576 tell it that these ones are supposed to be unaligned. Long term,
5577 should rewrite so that only IA-64 specific data allocation pseudo-ops
5578 are aligned by default. */
5579 {"2byte", stmt_cons_ua
, 2},
5580 {"4byte", stmt_cons_ua
, 4},
5581 {"8byte", stmt_cons_ua
, 8},
5586 static const struct pseudo_opcode
5589 void (*handler
) (int);
5594 /* these are more like pseudo-ops, but don't start with a dot */
5595 { "data1", cons
, 1 },
5596 { "data2", cons
, 2 },
5597 { "data4", cons
, 4 },
5598 { "data8", cons
, 8 },
5599 { "data16", cons
, 16 },
5600 { "real4", stmt_float_cons
, 'f' },
5601 { "real8", stmt_float_cons
, 'd' },
5602 { "real10", stmt_float_cons
, 'x' },
5603 { "real16", stmt_float_cons
, 'X' },
5604 { "string", stringer
, 0 },
5605 { "stringz", stringer
, 1 },
5607 /* unaligned versions: */
5608 { "data2.ua", stmt_cons_ua
, 2 },
5609 { "data4.ua", stmt_cons_ua
, 4 },
5610 { "data8.ua", stmt_cons_ua
, 8 },
5611 { "data16.ua", stmt_cons_ua
, 16 },
5612 { "real4.ua", float_cons
, 'f' },
5613 { "real8.ua", float_cons
, 'd' },
5614 { "real10.ua", float_cons
, 'x' },
5615 { "real16.ua", float_cons
, 'X' },
5618 /* Declare a register by creating a symbol for it and entering it in
5619 the symbol table. */
5622 declare_register (name
, regnum
)
5624 unsigned int regnum
;
5629 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5631 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5633 as_fatal ("Inserting \"%s\" into register table failed: %s",
5640 declare_register_set (prefix
, num_regs
, base_regnum
)
5642 unsigned int num_regs
;
5643 unsigned int base_regnum
;
5648 for (i
= 0; i
< num_regs
; ++i
)
5650 sprintf (name
, "%s%u", prefix
, i
);
5651 declare_register (name
, base_regnum
+ i
);
5656 operand_width (opnd
)
5657 enum ia64_opnd opnd
;
5659 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5660 unsigned int bits
= 0;
5664 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5665 bits
+= odesc
->field
[i
].bits
;
5670 static enum operand_match_result
5671 operand_match (idesc
, index
, e
)
5672 const struct ia64_opcode
*idesc
;
5676 enum ia64_opnd opnd
= idesc
->operands
[index
];
5677 int bits
, relocatable
= 0;
5678 struct insn_fix
*fix
;
5685 case IA64_OPND_AR_CCV
:
5686 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5687 return OPERAND_MATCH
;
5690 case IA64_OPND_AR_CSD
:
5691 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5692 return OPERAND_MATCH
;
5695 case IA64_OPND_AR_PFS
:
5696 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5697 return OPERAND_MATCH
;
5701 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5702 return OPERAND_MATCH
;
5706 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5707 return OPERAND_MATCH
;
5711 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5712 return OPERAND_MATCH
;
5715 case IA64_OPND_PR_ROT
:
5716 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5717 return OPERAND_MATCH
;
5721 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5722 return OPERAND_MATCH
;
5725 case IA64_OPND_PSR_L
:
5726 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5727 return OPERAND_MATCH
;
5730 case IA64_OPND_PSR_UM
:
5731 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5732 return OPERAND_MATCH
;
5736 if (e
->X_op
== O_constant
)
5738 if (e
->X_add_number
== 1)
5739 return OPERAND_MATCH
;
5741 return OPERAND_OUT_OF_RANGE
;
5746 if (e
->X_op
== O_constant
)
5748 if (e
->X_add_number
== 8)
5749 return OPERAND_MATCH
;
5751 return OPERAND_OUT_OF_RANGE
;
5756 if (e
->X_op
== O_constant
)
5758 if (e
->X_add_number
== 16)
5759 return OPERAND_MATCH
;
5761 return OPERAND_OUT_OF_RANGE
;
5765 /* register operands: */
5768 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5769 && e
->X_add_number
< REG_AR
+ 128)
5770 return OPERAND_MATCH
;
5775 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5776 && e
->X_add_number
< REG_BR
+ 8)
5777 return OPERAND_MATCH
;
5781 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5782 && e
->X_add_number
< REG_CR
+ 128)
5783 return OPERAND_MATCH
;
5790 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5791 && e
->X_add_number
< REG_FR
+ 128)
5792 return OPERAND_MATCH
;
5797 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5798 && e
->X_add_number
< REG_P
+ 64)
5799 return OPERAND_MATCH
;
5805 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5806 && e
->X_add_number
< REG_GR
+ 128)
5807 return OPERAND_MATCH
;
5810 case IA64_OPND_R3_2
:
5811 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5813 if (e
->X_add_number
< REG_GR
+ 4)
5814 return OPERAND_MATCH
;
5815 else if (e
->X_add_number
< REG_GR
+ 128)
5816 return OPERAND_OUT_OF_RANGE
;
5820 /* indirect operands: */
5821 case IA64_OPND_CPUID_R3
:
5822 case IA64_OPND_DBR_R3
:
5823 case IA64_OPND_DTR_R3
:
5824 case IA64_OPND_ITR_R3
:
5825 case IA64_OPND_IBR_R3
:
5826 case IA64_OPND_MSR_R3
:
5827 case IA64_OPND_PKR_R3
:
5828 case IA64_OPND_PMC_R3
:
5829 case IA64_OPND_PMD_R3
:
5830 case IA64_OPND_RR_R3
:
5831 if (e
->X_op
== O_index
&& e
->X_op_symbol
5832 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5833 == opnd
- IA64_OPND_CPUID_R3
))
5834 return OPERAND_MATCH
;
5838 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5839 return OPERAND_MATCH
;
5842 /* immediate operands: */
5843 case IA64_OPND_CNT2a
:
5844 case IA64_OPND_LEN4
:
5845 case IA64_OPND_LEN6
:
5846 bits
= operand_width (idesc
->operands
[index
]);
5847 if (e
->X_op
== O_constant
)
5849 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5850 return OPERAND_MATCH
;
5852 return OPERAND_OUT_OF_RANGE
;
5856 case IA64_OPND_CNT2b
:
5857 if (e
->X_op
== O_constant
)
5859 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5860 return OPERAND_MATCH
;
5862 return OPERAND_OUT_OF_RANGE
;
5866 case IA64_OPND_CNT2c
:
5867 val
= e
->X_add_number
;
5868 if (e
->X_op
== O_constant
)
5870 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5871 return OPERAND_MATCH
;
5873 return OPERAND_OUT_OF_RANGE
;
5878 /* SOR must be an integer multiple of 8 */
5879 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5880 return OPERAND_OUT_OF_RANGE
;
5883 if (e
->X_op
== O_constant
)
5885 if ((bfd_vma
) e
->X_add_number
<= 96)
5886 return OPERAND_MATCH
;
5888 return OPERAND_OUT_OF_RANGE
;
5892 case IA64_OPND_IMMU62
:
5893 if (e
->X_op
== O_constant
)
5895 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5896 return OPERAND_MATCH
;
5898 return OPERAND_OUT_OF_RANGE
;
5902 /* FIXME -- need 62-bit relocation type */
5903 as_bad (_("62-bit relocation not yet implemented"));
5907 case IA64_OPND_IMMU64
:
5908 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5909 || e
->X_op
== O_subtract
)
5911 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5912 fix
->code
= BFD_RELOC_IA64_IMM64
;
5913 if (e
->X_op
!= O_subtract
)
5915 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5916 if (e
->X_op
== O_pseudo_fixup
)
5920 fix
->opnd
= idesc
->operands
[index
];
5923 ++CURR_SLOT
.num_fixups
;
5924 return OPERAND_MATCH
;
5926 else if (e
->X_op
== O_constant
)
5927 return OPERAND_MATCH
;
5930 case IA64_OPND_CCNT5
:
5931 case IA64_OPND_CNT5
:
5932 case IA64_OPND_CNT6
:
5933 case IA64_OPND_CPOS6a
:
5934 case IA64_OPND_CPOS6b
:
5935 case IA64_OPND_CPOS6c
:
5936 case IA64_OPND_IMMU2
:
5937 case IA64_OPND_IMMU7a
:
5938 case IA64_OPND_IMMU7b
:
5939 case IA64_OPND_IMMU21
:
5940 case IA64_OPND_IMMU24
:
5941 case IA64_OPND_MBTYPE4
:
5942 case IA64_OPND_MHTYPE8
:
5943 case IA64_OPND_POS6
:
5944 bits
= operand_width (idesc
->operands
[index
]);
5945 if (e
->X_op
== O_constant
)
5947 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5948 return OPERAND_MATCH
;
5950 return OPERAND_OUT_OF_RANGE
;
5954 case IA64_OPND_IMMU9
:
5955 bits
= operand_width (idesc
->operands
[index
]);
5956 if (e
->X_op
== O_constant
)
5958 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5960 int lobits
= e
->X_add_number
& 0x3;
5961 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5962 e
->X_add_number
|= (bfd_vma
) 0x3;
5963 return OPERAND_MATCH
;
5966 return OPERAND_OUT_OF_RANGE
;
5970 case IA64_OPND_IMM44
:
5971 /* least 16 bits must be zero */
5972 if ((e
->X_add_number
& 0xffff) != 0)
5973 /* XXX technically, this is wrong: we should not be issuing warning
5974 messages until we're sure this instruction pattern is going to
5976 as_warn (_("lower 16 bits of mask ignored"));
5978 if (e
->X_op
== O_constant
)
5980 if (((e
->X_add_number
>= 0
5981 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5982 || (e
->X_add_number
< 0
5983 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5986 if (e
->X_add_number
>= 0
5987 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5989 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5991 return OPERAND_MATCH
;
5994 return OPERAND_OUT_OF_RANGE
;
5998 case IA64_OPND_IMM17
:
5999 /* bit 0 is a don't care (pr0 is hardwired to 1) */
6000 if (e
->X_op
== O_constant
)
6002 if (((e
->X_add_number
>= 0
6003 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
6004 || (e
->X_add_number
< 0
6005 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
6008 if (e
->X_add_number
>= 0
6009 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
6011 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
6013 return OPERAND_MATCH
;
6016 return OPERAND_OUT_OF_RANGE
;
6020 case IA64_OPND_IMM14
:
6021 case IA64_OPND_IMM22
:
6023 case IA64_OPND_IMM1
:
6024 case IA64_OPND_IMM8
:
6025 case IA64_OPND_IMM8U4
:
6026 case IA64_OPND_IMM8M1
:
6027 case IA64_OPND_IMM8M1U4
:
6028 case IA64_OPND_IMM8M1U8
:
6029 case IA64_OPND_IMM9a
:
6030 case IA64_OPND_IMM9b
:
6031 bits
= operand_width (idesc
->operands
[index
]);
6032 if (relocatable
&& (e
->X_op
== O_symbol
6033 || e
->X_op
== O_subtract
6034 || e
->X_op
== O_pseudo_fixup
))
6036 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6038 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
6039 fix
->code
= BFD_RELOC_IA64_IMM14
;
6041 fix
->code
= BFD_RELOC_IA64_IMM22
;
6043 if (e
->X_op
!= O_subtract
)
6045 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6046 if (e
->X_op
== O_pseudo_fixup
)
6050 fix
->opnd
= idesc
->operands
[index
];
6053 ++CURR_SLOT
.num_fixups
;
6054 return OPERAND_MATCH
;
6056 else if (e
->X_op
!= O_constant
6057 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
6058 return OPERAND_MISMATCH
;
6060 if (opnd
== IA64_OPND_IMM8M1U4
)
6062 /* Zero is not valid for unsigned compares that take an adjusted
6063 constant immediate range. */
6064 if (e
->X_add_number
== 0)
6065 return OPERAND_OUT_OF_RANGE
;
6067 /* Sign-extend 32-bit unsigned numbers, so that the following range
6068 checks will work. */
6069 val
= e
->X_add_number
;
6070 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6071 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6072 val
= ((val
<< 32) >> 32);
6074 /* Check for 0x100000000. This is valid because
6075 0x100000000-1 is the same as ((uint32_t) -1). */
6076 if (val
== ((bfd_signed_vma
) 1 << 32))
6077 return OPERAND_MATCH
;
6081 else if (opnd
== IA64_OPND_IMM8M1U8
)
6083 /* Zero is not valid for unsigned compares that take an adjusted
6084 constant immediate range. */
6085 if (e
->X_add_number
== 0)
6086 return OPERAND_OUT_OF_RANGE
;
6088 /* Check for 0x10000000000000000. */
6089 if (e
->X_op
== O_big
)
6091 if (generic_bignum
[0] == 0
6092 && generic_bignum
[1] == 0
6093 && generic_bignum
[2] == 0
6094 && generic_bignum
[3] == 0
6095 && generic_bignum
[4] == 1)
6096 return OPERAND_MATCH
;
6098 return OPERAND_OUT_OF_RANGE
;
6101 val
= e
->X_add_number
- 1;
6103 else if (opnd
== IA64_OPND_IMM8M1
)
6104 val
= e
->X_add_number
- 1;
6105 else if (opnd
== IA64_OPND_IMM8U4
)
6107 /* Sign-extend 32-bit unsigned numbers, so that the following range
6108 checks will work. */
6109 val
= e
->X_add_number
;
6110 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6111 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6112 val
= ((val
<< 32) >> 32);
6115 val
= e
->X_add_number
;
6117 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
6118 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
6119 return OPERAND_MATCH
;
6121 return OPERAND_OUT_OF_RANGE
;
6123 case IA64_OPND_INC3
:
6124 /* +/- 1, 4, 8, 16 */
6125 val
= e
->X_add_number
;
6128 if (e
->X_op
== O_constant
)
6130 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
6131 return OPERAND_MATCH
;
6133 return OPERAND_OUT_OF_RANGE
;
6137 case IA64_OPND_TGT25
:
6138 case IA64_OPND_TGT25b
:
6139 case IA64_OPND_TGT25c
:
6140 case IA64_OPND_TGT64
:
6141 if (e
->X_op
== O_symbol
)
6143 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6144 if (opnd
== IA64_OPND_TGT25
)
6145 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
6146 else if (opnd
== IA64_OPND_TGT25b
)
6147 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
6148 else if (opnd
== IA64_OPND_TGT25c
)
6149 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
6150 else if (opnd
== IA64_OPND_TGT64
)
6151 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
6155 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6156 fix
->opnd
= idesc
->operands
[index
];
6159 ++CURR_SLOT
.num_fixups
;
6160 return OPERAND_MATCH
;
6162 case IA64_OPND_TAG13
:
6163 case IA64_OPND_TAG13b
:
6167 return OPERAND_MATCH
;
6170 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6171 /* There are no external relocs for TAG13/TAG13b fields, so we
6172 create a dummy reloc. This will not live past md_apply_fix. */
6173 fix
->code
= BFD_RELOC_UNUSED
;
6174 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6175 fix
->opnd
= idesc
->operands
[index
];
6178 ++CURR_SLOT
.num_fixups
;
6179 return OPERAND_MATCH
;
6186 case IA64_OPND_LDXMOV
:
6187 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6188 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6189 fix
->opnd
= idesc
->operands
[index
];
6192 ++CURR_SLOT
.num_fixups
;
6193 return OPERAND_MATCH
;
6198 return OPERAND_MISMATCH
;
6202 parse_operand (e
, more
)
6208 memset (e
, 0, sizeof (*e
));
6211 expression_and_evaluate (e
);
6212 sep
= *input_line_pointer
;
6213 if (more
&& (sep
== ',' || sep
== more
))
6214 ++input_line_pointer
;
6218 /* Returns the next entry in the opcode table that matches the one in
6219 IDESC, and frees the entry in IDESC. If no matching entry is
6220 found, NULL is returned instead. */
6222 static struct ia64_opcode
*
6223 get_next_opcode (struct ia64_opcode
*idesc
)
6225 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6226 ia64_free_opcode (idesc
);
6230 /* Parse the operands for the opcode and find the opcode variant that
6231 matches the specified operands, or NULL if no match is possible. */
6233 static struct ia64_opcode
*
6234 parse_operands (idesc
)
6235 struct ia64_opcode
*idesc
;
6237 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6238 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6241 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6242 enum operand_match_result result
;
6244 char *first_arg
= 0, *end
, *saved_input_pointer
;
6247 assert (strlen (idesc
->name
) <= 128);
6249 strcpy (mnemonic
, idesc
->name
);
6250 if (idesc
->operands
[2] == IA64_OPND_SOF
6251 || idesc
->operands
[1] == IA64_OPND_SOF
)
6253 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6254 can't parse the first operand until we have parsed the
6255 remaining operands of the "alloc" instruction. */
6257 first_arg
= input_line_pointer
;
6258 end
= strchr (input_line_pointer
, '=');
6261 as_bad ("Expected separator `='");
6264 input_line_pointer
= end
+ 1;
6271 if (i
< NELEMS (CURR_SLOT
.opnd
))
6273 sep
= parse_operand (CURR_SLOT
.opnd
+ i
, '=');
6274 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6281 sep
= parse_operand (&dummy
, '=');
6282 if (dummy
.X_op
== O_absent
)
6288 if (sep
!= '=' && sep
!= ',')
6293 if (num_outputs
> 0)
6294 as_bad ("Duplicate equal sign (=) in instruction");
6296 num_outputs
= i
+ 1;
6301 as_bad ("Illegal operand separator `%c'", sep
);
6305 if (idesc
->operands
[2] == IA64_OPND_SOF
6306 || idesc
->operands
[1] == IA64_OPND_SOF
)
6308 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6309 Note, however, that due to that mapping operand numbers in error
6310 messages for any of the constant operands will not be correct. */
6311 know (strcmp (idesc
->name
, "alloc") == 0);
6312 /* The first operand hasn't been parsed/initialized, yet (but
6313 num_operands intentionally doesn't account for that). */
6314 i
= num_operands
> 4 ? 2 : 1;
6315 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6316 ? CURR_SLOT.opnd[n].X_add_number \
6318 sof
= set_regstack (FORCE_CONST(i
),
6321 FORCE_CONST(i
+ 3));
6324 /* now we can parse the first arg: */
6325 saved_input_pointer
= input_line_pointer
;
6326 input_line_pointer
= first_arg
;
6327 sep
= parse_operand (CURR_SLOT
.opnd
+ 0, '=');
6329 --num_outputs
; /* force error */
6330 input_line_pointer
= saved_input_pointer
;
6332 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6333 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6334 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6335 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6336 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6338 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6339 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6342 highest_unmatched_operand
= -4;
6343 curr_out_of_range_pos
= -1;
6345 for (; idesc
; idesc
= get_next_opcode (idesc
))
6347 if (num_outputs
!= idesc
->num_outputs
)
6348 continue; /* mismatch in # of outputs */
6349 if (highest_unmatched_operand
< 0)
6350 highest_unmatched_operand
|= 1;
6351 if (num_operands
> NELEMS (idesc
->operands
)
6352 || (num_operands
< NELEMS (idesc
->operands
)
6353 && idesc
->operands
[num_operands
])
6354 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6355 continue; /* mismatch in number of arguments */
6356 if (highest_unmatched_operand
< 0)
6357 highest_unmatched_operand
|= 2;
6359 CURR_SLOT
.num_fixups
= 0;
6361 /* Try to match all operands. If we see an out-of-range operand,
6362 then continue trying to match the rest of the operands, since if
6363 the rest match, then this idesc will give the best error message. */
6365 out_of_range_pos
= -1;
6366 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6368 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6369 if (result
!= OPERAND_MATCH
)
6371 if (result
!= OPERAND_OUT_OF_RANGE
)
6373 if (out_of_range_pos
< 0)
6374 /* remember position of the first out-of-range operand: */
6375 out_of_range_pos
= i
;
6379 /* If we did not match all operands, or if at least one operand was
6380 out-of-range, then this idesc does not match. Keep track of which
6381 idesc matched the most operands before failing. If we have two
6382 idescs that failed at the same position, and one had an out-of-range
6383 operand, then prefer the out-of-range operand. Thus if we have
6384 "add r0=0x1000000,r1" we get an error saying the constant is out
6385 of range instead of an error saying that the constant should have been
6388 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6390 if (i
> highest_unmatched_operand
6391 || (i
== highest_unmatched_operand
6392 && out_of_range_pos
> curr_out_of_range_pos
))
6394 highest_unmatched_operand
= i
;
6395 if (out_of_range_pos
>= 0)
6397 expected_operand
= idesc
->operands
[out_of_range_pos
];
6398 error_pos
= out_of_range_pos
;
6402 expected_operand
= idesc
->operands
[i
];
6405 curr_out_of_range_pos
= out_of_range_pos
;
6414 if (expected_operand
)
6415 as_bad ("Operand %u of `%s' should be %s",
6416 error_pos
+ 1, mnemonic
,
6417 elf64_ia64_operands
[expected_operand
].desc
);
6418 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6419 as_bad ("Wrong number of output operands");
6420 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6421 as_bad ("Wrong number of input operands");
6423 as_bad ("Operand mismatch");
6427 /* Check that the instruction doesn't use
6428 - r0, f0, or f1 as output operands
6429 - the same predicate twice as output operands
6430 - r0 as address of a base update load or store
6431 - the same GR as output and address of a base update load
6432 - two even- or two odd-numbered FRs as output operands of a floating
6433 point parallel load.
6434 At most two (conflicting) output (or output-like) operands can exist,
6435 (floating point parallel loads have three outputs, but the base register,
6436 if updated, cannot conflict with the actual outputs). */
6438 for (i
= 0; i
< num_operands
; ++i
)
6443 switch (idesc
->operands
[i
])
6448 if (i
< num_outputs
)
6450 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6453 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6455 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6460 if (i
< num_outputs
)
6463 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6465 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6472 if (i
< num_outputs
)
6474 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6475 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6478 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6481 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6483 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6487 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6489 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6492 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6494 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6505 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6508 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6514 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6519 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6524 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6532 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6534 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6535 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6536 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6537 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6538 && ! ((reg1
^ reg2
) & 1))
6539 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6540 reg1
- REG_FR
, reg2
- REG_FR
);
6541 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6542 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6543 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6544 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6545 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6546 reg1
- REG_FR
, reg2
- REG_FR
);
6551 build_insn (slot
, insnp
)
6555 const struct ia64_operand
*odesc
, *o2desc
;
6556 struct ia64_opcode
*idesc
= slot
->idesc
;
6562 insn
= idesc
->opcode
| slot
->qp_regno
;
6564 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6566 if (slot
->opnd
[i
].X_op
== O_register
6567 || slot
->opnd
[i
].X_op
== O_constant
6568 || slot
->opnd
[i
].X_op
== O_index
)
6569 val
= slot
->opnd
[i
].X_add_number
;
6570 else if (slot
->opnd
[i
].X_op
== O_big
)
6572 /* This must be the value 0x10000000000000000. */
6573 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6579 switch (idesc
->operands
[i
])
6581 case IA64_OPND_IMMU64
:
6582 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6583 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6584 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6585 | (((val
>> 63) & 0x1) << 36));
6588 case IA64_OPND_IMMU62
:
6589 val
&= 0x3fffffffffffffffULL
;
6590 if (val
!= slot
->opnd
[i
].X_add_number
)
6591 as_warn (_("Value truncated to 62 bits"));
6592 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6593 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6596 case IA64_OPND_TGT64
:
6598 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6599 insn
|= ((((val
>> 59) & 0x1) << 36)
6600 | (((val
>> 0) & 0xfffff) << 13));
6631 case IA64_OPND_R3_2
:
6632 case IA64_OPND_CPUID_R3
:
6633 case IA64_OPND_DBR_R3
:
6634 case IA64_OPND_DTR_R3
:
6635 case IA64_OPND_ITR_R3
:
6636 case IA64_OPND_IBR_R3
:
6638 case IA64_OPND_MSR_R3
:
6639 case IA64_OPND_PKR_R3
:
6640 case IA64_OPND_PMC_R3
:
6641 case IA64_OPND_PMD_R3
:
6642 case IA64_OPND_RR_R3
:
6650 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6651 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6653 as_bad_where (slot
->src_file
, slot
->src_line
,
6654 "Bad operand value: %s", err
);
6655 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6657 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6658 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6660 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6661 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6663 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6664 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6665 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6667 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6668 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6678 int manual_bundling_off
= 0, manual_bundling
= 0;
6679 enum ia64_unit required_unit
, insn_unit
= 0;
6680 enum ia64_insn_type type
[3], insn_type
;
6681 unsigned int template, orig_template
;
6682 bfd_vma insn
[3] = { -1, -1, -1 };
6683 struct ia64_opcode
*idesc
;
6684 int end_of_insn_group
= 0, user_template
= -1;
6685 int n
, i
, j
, first
, curr
, last_slot
;
6686 bfd_vma t0
= 0, t1
= 0;
6687 struct label_fix
*lfix
;
6688 bfd_boolean mark_label
;
6689 struct insn_fix
*ifix
;
6695 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6696 know (first
>= 0 & first
< NUM_SLOTS
);
6697 n
= MIN (3, md
.num_slots_in_use
);
6699 /* Determine template: user user_template if specified, best match
6702 if (md
.slot
[first
].user_template
>= 0)
6703 user_template
= template = md
.slot
[first
].user_template
;
6706 /* Auto select appropriate template. */
6707 memset (type
, 0, sizeof (type
));
6709 for (i
= 0; i
< n
; ++i
)
6711 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6713 type
[i
] = md
.slot
[curr
].idesc
->type
;
6714 curr
= (curr
+ 1) % NUM_SLOTS
;
6716 template = best_template
[type
[0]][type
[1]][type
[2]];
6719 /* initialize instructions with appropriate nops: */
6720 for (i
= 0; i
< 3; ++i
)
6721 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6725 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6726 from the start of the frag. */
6727 addr_mod
= frag_now_fix () & 15;
6728 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6729 as_bad (_("instruction address is not a multiple of 16"));
6730 frag_now
->insn_addr
= addr_mod
;
6731 frag_now
->has_code
= 1;
6733 /* now fill in slots with as many insns as possible: */
6735 idesc
= md
.slot
[curr
].idesc
;
6736 end_of_insn_group
= 0;
6738 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6740 /* If we have unwind records, we may need to update some now. */
6741 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6742 unw_rec_list
*end_ptr
= NULL
;
6746 /* Find the last prologue/body record in the list for the current
6747 insn, and set the slot number for all records up to that point.
6748 This needs to be done now, because prologue/body records refer to
6749 the current point, not the point after the instruction has been
6750 issued. This matters because there may have been nops emitted
6751 meanwhile. Any non-prologue non-body record followed by a
6752 prologue/body record must also refer to the current point. */
6753 unw_rec_list
*last_ptr
;
6755 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6756 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6757 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6758 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6759 || ptr
->r
.type
== body
)
6763 /* Make last_ptr point one after the last prologue/body
6765 last_ptr
= last_ptr
->next
;
6766 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6769 ptr
->slot_number
= (unsigned long) f
+ i
;
6770 ptr
->slot_frag
= frag_now
;
6772 /* Remove the initialized records, so that we won't accidentally
6773 update them again if we insert a nop and continue. */
6774 md
.slot
[curr
].unwind_record
= last_ptr
;
6778 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6779 if (md
.slot
[curr
].manual_bundling_on
)
6782 manual_bundling
= 1;
6784 break; /* Need to start a new bundle. */
6787 /* If this instruction specifies a template, then it must be the first
6788 instruction of a bundle. */
6789 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6792 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6794 if (manual_bundling
&& !manual_bundling_off
)
6796 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6797 "`%s' must be last in bundle", idesc
->name
);
6799 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6803 if (idesc
->flags
& IA64_OPCODE_LAST
)
6806 unsigned int required_template
;
6808 /* If we need a stop bit after an M slot, our only choice is
6809 template 5 (M;;MI). If we need a stop bit after a B
6810 slot, our only choice is to place it at the end of the
6811 bundle, because the only available templates are MIB,
6812 MBB, BBB, MMB, and MFB. We don't handle anything other
6813 than M and B slots because these are the only kind of
6814 instructions that can have the IA64_OPCODE_LAST bit set. */
6815 required_template
= template;
6816 switch (idesc
->type
)
6820 required_template
= 5;
6828 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6829 "Internal error: don't know how to force %s to end"
6830 "of instruction group", idesc
->name
);
6835 && (i
> required_slot
6836 || (required_slot
== 2 && !manual_bundling_off
)
6837 || (user_template
>= 0
6838 /* Changing from MMI to M;MI is OK. */
6839 && (template ^ required_template
) > 1)))
6841 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6842 "`%s' must be last in instruction group",
6844 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6845 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6847 if (required_slot
< i
)
6848 /* Can't fit this instruction. */
6852 if (required_template
!= template)
6854 /* If we switch the template, we need to reset the NOPs
6855 after slot i. The slot-types of the instructions ahead
6856 of i never change, so we don't need to worry about
6857 changing NOPs in front of this slot. */
6858 for (j
= i
; j
< 3; ++j
)
6859 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6861 template = required_template
;
6863 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6865 if (manual_bundling
)
6867 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6868 "Label must be first in a bundle");
6869 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6871 /* This insn must go into the first slot of a bundle. */
6875 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6877 /* We need an instruction group boundary in the middle of a
6878 bundle. See if we can switch to an other template with
6879 an appropriate boundary. */
6881 orig_template
= template;
6882 if (i
== 1 && (user_template
== 4
6883 || (user_template
< 0
6884 && (ia64_templ_desc
[template].exec_unit
[0]
6888 end_of_insn_group
= 0;
6890 else if (i
== 2 && (user_template
== 0
6891 || (user_template
< 0
6892 && (ia64_templ_desc
[template].exec_unit
[1]
6894 /* This test makes sure we don't switch the template if
6895 the next instruction is one that needs to be first in
6896 an instruction group. Since all those instructions are
6897 in the M group, there is no way such an instruction can
6898 fit in this bundle even if we switch the template. The
6899 reason we have to check for this is that otherwise we
6900 may end up generating "MI;;I M.." which has the deadly
6901 effect that the second M instruction is no longer the
6902 first in the group! --davidm 99/12/16 */
6903 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6906 end_of_insn_group
= 0;
6909 && user_template
== 0
6910 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6911 /* Use the next slot. */
6913 else if (curr
!= first
)
6914 /* can't fit this insn */
6917 if (template != orig_template
)
6918 /* if we switch the template, we need to reset the NOPs
6919 after slot i. The slot-types of the instructions ahead
6920 of i never change, so we don't need to worry about
6921 changing NOPs in front of this slot. */
6922 for (j
= i
; j
< 3; ++j
)
6923 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6925 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6927 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6928 if (idesc
->type
== IA64_TYPE_DYN
)
6930 enum ia64_opnd opnd1
, opnd2
;
6932 if ((strcmp (idesc
->name
, "nop") == 0)
6933 || (strcmp (idesc
->name
, "break") == 0))
6934 insn_unit
= required_unit
;
6935 else if (strcmp (idesc
->name
, "hint") == 0)
6937 insn_unit
= required_unit
;
6938 if (required_unit
== IA64_UNIT_B
)
6944 case hint_b_warning
:
6945 as_warn ("hint in B unit may be treated as nop");
6948 /* When manual bundling is off and there is no
6949 user template, we choose a different unit so
6950 that hint won't go into the current slot. We
6951 will fill the current bundle with nops and
6952 try to put hint into the next bundle. */
6953 if (!manual_bundling
&& user_template
< 0)
6954 insn_unit
= IA64_UNIT_I
;
6956 as_bad ("hint in B unit can't be used");
6961 else if (strcmp (idesc
->name
, "chk.s") == 0
6962 || strcmp (idesc
->name
, "mov") == 0)
6964 insn_unit
= IA64_UNIT_M
;
6965 if (required_unit
== IA64_UNIT_I
6966 || (required_unit
== IA64_UNIT_F
&& template == 6))
6967 insn_unit
= IA64_UNIT_I
;
6970 as_fatal ("emit_one_bundle: unexpected dynamic op");
6972 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6973 opnd1
= idesc
->operands
[0];
6974 opnd2
= idesc
->operands
[1];
6975 ia64_free_opcode (idesc
);
6976 idesc
= ia64_find_opcode (mnemonic
);
6977 /* moves to/from ARs have collisions */
6978 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6980 while (idesc
!= NULL
6981 && (idesc
->operands
[0] != opnd1
6982 || idesc
->operands
[1] != opnd2
))
6983 idesc
= get_next_opcode (idesc
);
6985 md
.slot
[curr
].idesc
= idesc
;
6989 insn_type
= idesc
->type
;
6990 insn_unit
= IA64_UNIT_NIL
;
6994 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6995 insn_unit
= required_unit
;
6997 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6998 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6999 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
7000 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
7001 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
7006 if (insn_unit
!= required_unit
)
7007 continue; /* Try next slot. */
7009 /* Now is a good time to fix up the labels for this insn. */
7011 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
7013 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
7014 symbol_set_frag (lfix
->sym
, frag_now
);
7015 mark_label
|= lfix
->dw2_mark_labels
;
7017 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
7019 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
7020 symbol_set_frag (lfix
->sym
, frag_now
);
7023 if (debug_type
== DEBUG_DWARF2
7024 || md
.slot
[curr
].loc_directive_seen
7027 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
7029 md
.slot
[curr
].loc_directive_seen
= 0;
7031 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
7033 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
7036 build_insn (md
.slot
+ curr
, insn
+ i
);
7038 ptr
= md
.slot
[curr
].unwind_record
;
7041 /* Set slot numbers for all remaining unwind records belonging to the
7042 current insn. There can not be any prologue/body unwind records
7044 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
7046 ptr
->slot_number
= (unsigned long) f
+ i
;
7047 ptr
->slot_frag
= frag_now
;
7049 md
.slot
[curr
].unwind_record
= NULL
;
7052 if (required_unit
== IA64_UNIT_L
)
7055 /* skip one slot for long/X-unit instructions */
7058 --md
.num_slots_in_use
;
7061 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
7063 ifix
= md
.slot
[curr
].fixup
+ j
;
7064 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
7065 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
7066 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
7067 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
7068 fix
->fx_file
= md
.slot
[curr
].src_file
;
7069 fix
->fx_line
= md
.slot
[curr
].src_line
;
7072 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
7075 ia64_free_opcode (md
.slot
[curr
].idesc
);
7076 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7077 md
.slot
[curr
].user_template
= -1;
7079 if (manual_bundling_off
)
7081 manual_bundling
= 0;
7084 curr
= (curr
+ 1) % NUM_SLOTS
;
7085 idesc
= md
.slot
[curr
].idesc
;
7087 if (manual_bundling
> 0)
7089 if (md
.num_slots_in_use
> 0)
7092 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7093 "`%s' does not fit into bundle", idesc
->name
);
7094 else if (last_slot
< 0)
7096 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7097 "`%s' does not fit into %s template",
7098 idesc
->name
, ia64_templ_desc
[template].name
);
7099 /* Drop first insn so we don't livelock. */
7100 --md
.num_slots_in_use
;
7101 know (curr
== first
);
7102 ia64_free_opcode (md
.slot
[curr
].idesc
);
7103 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7104 md
.slot
[curr
].user_template
= -1;
7112 else if (last_slot
== 0)
7113 where
= "slots 2 or 3";
7116 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7117 "`%s' can't go in %s of %s template",
7118 idesc
->name
, where
, ia64_templ_desc
[template].name
);
7122 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7123 "Missing '}' at end of file");
7125 know (md
.num_slots_in_use
< NUM_SLOTS
);
7127 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
7128 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7130 number_to_chars_littleendian (f
+ 0, t0
, 8);
7131 number_to_chars_littleendian (f
+ 8, t1
, 8);
7135 md_parse_option (c
, arg
)
7142 /* Switches from the Intel assembler. */
7144 if (strcmp (arg
, "ilp64") == 0
7145 || strcmp (arg
, "lp64") == 0
7146 || strcmp (arg
, "p64") == 0)
7148 md
.flags
|= EF_IA_64_ABI64
;
7150 else if (strcmp (arg
, "ilp32") == 0)
7152 md
.flags
&= ~EF_IA_64_ABI64
;
7154 else if (strcmp (arg
, "le") == 0)
7156 md
.flags
&= ~EF_IA_64_BE
;
7157 default_big_endian
= 0;
7159 else if (strcmp (arg
, "be") == 0)
7161 md
.flags
|= EF_IA_64_BE
;
7162 default_big_endian
= 1;
7164 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7167 if (strcmp (arg
, "warning") == 0)
7168 md
.unwind_check
= unwind_check_warning
;
7169 else if (strcmp (arg
, "error") == 0)
7170 md
.unwind_check
= unwind_check_error
;
7174 else if (strncmp (arg
, "hint.b=", 7) == 0)
7177 if (strcmp (arg
, "ok") == 0)
7178 md
.hint_b
= hint_b_ok
;
7179 else if (strcmp (arg
, "warning") == 0)
7180 md
.hint_b
= hint_b_warning
;
7181 else if (strcmp (arg
, "error") == 0)
7182 md
.hint_b
= hint_b_error
;
7186 else if (strncmp (arg
, "tune=", 5) == 0)
7189 if (strcmp (arg
, "itanium1") == 0)
7191 else if (strcmp (arg
, "itanium2") == 0)
7201 if (strcmp (arg
, "so") == 0)
7203 /* Suppress signon message. */
7205 else if (strcmp (arg
, "pi") == 0)
7207 /* Reject privileged instructions. FIXME */
7209 else if (strcmp (arg
, "us") == 0)
7211 /* Allow union of signed and unsigned range. FIXME */
7213 else if (strcmp (arg
, "close_fcalls") == 0)
7215 /* Do not resolve global function calls. */
7222 /* temp[="prefix"] Insert temporary labels into the object file
7223 symbol table prefixed by "prefix".
7224 Default prefix is ":temp:".
7229 /* indirect=<tgt> Assume unannotated indirect branches behavior
7230 according to <tgt> --
7231 exit: branch out from the current context (default)
7232 labels: all labels in context may be branch targets
7234 if (strncmp (arg
, "indirect=", 9) != 0)
7239 /* -X conflicts with an ignored option, use -x instead */
7241 if (!arg
|| strcmp (arg
, "explicit") == 0)
7243 /* set default mode to explicit */
7244 md
.default_explicit_mode
= 1;
7247 else if (strcmp (arg
, "auto") == 0)
7249 md
.default_explicit_mode
= 0;
7251 else if (strcmp (arg
, "none") == 0)
7255 else if (strcmp (arg
, "debug") == 0)
7259 else if (strcmp (arg
, "debugx") == 0)
7261 md
.default_explicit_mode
= 1;
7264 else if (strcmp (arg
, "debugn") == 0)
7271 as_bad (_("Unrecognized option '-x%s'"), arg
);
7276 /* nops Print nops statistics. */
7279 /* GNU specific switches for gcc. */
7280 case OPTION_MCONSTANT_GP
:
7281 md
.flags
|= EF_IA_64_CONS_GP
;
7284 case OPTION_MAUTO_PIC
:
7285 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7296 md_show_usage (stream
)
7301 --mconstant-gp mark output file as using the constant-GP model\n\
7302 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7303 --mauto-pic mark output file as using the constant-GP model\n\
7304 without function descriptors (sets ELF header flag\n\
7305 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7306 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7307 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7308 -mtune=[itanium1|itanium2]\n\
7309 tune for a specific CPU (default -mtune=itanium2)\n\
7310 -munwind-check=[warning|error]\n\
7311 unwind directive check (default -munwind-check=warning)\n\
7312 -mhint.b=[ok|warning|error]\n\
7313 hint.b check (default -mhint.b=error)\n\
7314 -x | -xexplicit turn on dependency violation checking\n\
7315 -xauto automagically remove dependency violations (default)\n\
7316 -xnone turn off dependency violation checking\n\
7317 -xdebug debug dependency violation checker\n\
7318 -xdebugn debug dependency violation checker but turn off\n\
7319 dependency violation checking\n\
7320 -xdebugx debug dependency violation checker and turn on\n\
7321 dependency violation checking\n"),
7326 ia64_after_parse_args ()
7328 if (debug_type
== DEBUG_STABS
)
7329 as_fatal (_("--gstabs is not supported for ia64"));
7332 /* Return true if TYPE fits in TEMPL at SLOT. */
7335 match (int templ
, int type
, int slot
)
7337 enum ia64_unit unit
;
7340 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7343 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7345 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7347 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7348 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7349 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7350 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7351 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7352 default: result
= 0; break;
7357 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7358 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7359 type M or I would fit in TEMPL at SLOT. */
7362 extra_goodness (int templ
, int slot
)
7367 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7369 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7375 if (match (templ
, IA64_TYPE_M
, slot
)
7376 || match (templ
, IA64_TYPE_I
, slot
))
7377 /* Favor M- and I-unit NOPs. We definitely want to avoid
7378 F-unit and B-unit may cause split-issue or less-than-optimal
7379 branch-prediction. */
7390 /* This function is called once, at assembler startup time. It sets
7391 up all the tables, etc. that the MD part of the assembler will need
7392 that can be determined before arguments are parsed. */
7396 int i
, j
, k
, t
, goodness
, best
, ok
;
7401 md
.explicit_mode
= md
.default_explicit_mode
;
7403 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7405 /* Make sure function pointers get initialized. */
7406 target_big_endian
= -1;
7407 dot_byteorder (default_big_endian
);
7409 alias_hash
= hash_new ();
7410 alias_name_hash
= hash_new ();
7411 secalias_hash
= hash_new ();
7412 secalias_name_hash
= hash_new ();
7414 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7415 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7416 &zero_address_frag
);
7418 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7419 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7420 &zero_address_frag
);
7422 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7423 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7424 &zero_address_frag
);
7426 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7427 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7428 &zero_address_frag
);
7430 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7431 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7432 &zero_address_frag
);
7434 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7435 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7436 &zero_address_frag
);
7438 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7439 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7440 &zero_address_frag
);
7442 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7443 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7444 &zero_address_frag
);
7446 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7447 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7448 &zero_address_frag
);
7450 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7451 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7452 &zero_address_frag
);
7454 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7455 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7456 &zero_address_frag
);
7458 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7459 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7460 &zero_address_frag
);
7462 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7463 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7464 &zero_address_frag
);
7466 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7467 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7468 &zero_address_frag
);
7470 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7471 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7472 &zero_address_frag
);
7474 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7475 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7476 &zero_address_frag
);
7478 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7479 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7480 &zero_address_frag
);
7482 if (md
.tune
!= itanium1
)
7484 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7486 le_nop_stop
[0] = 0x9;
7489 /* Compute the table of best templates. We compute goodness as a
7490 base 4 value, in which each match counts for 3. Match-failures
7491 result in NOPs and we use extra_goodness() to pick the execution
7492 units that are best suited for issuing the NOP. */
7493 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7494 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7495 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7498 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7501 if (match (t
, i
, 0))
7503 if (match (t
, j
, 1))
7505 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7506 goodness
= 3 + 3 + 3;
7508 goodness
= 3 + 3 + extra_goodness (t
, 2);
7510 else if (match (t
, j
, 2))
7511 goodness
= 3 + 3 + extra_goodness (t
, 1);
7515 goodness
+= extra_goodness (t
, 1);
7516 goodness
+= extra_goodness (t
, 2);
7519 else if (match (t
, i
, 1))
7521 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7524 goodness
= 3 + extra_goodness (t
, 2);
7526 else if (match (t
, i
, 2))
7527 goodness
= 3 + extra_goodness (t
, 1);
7529 if (goodness
> best
)
7532 best_template
[i
][j
][k
] = t
;
7537 #ifdef DEBUG_TEMPLATES
7538 /* For debugging changes to the best_template calculations. We don't care
7539 about combinations with invalid instructions, so start the loops at 1. */
7540 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7541 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7542 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7544 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7546 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7548 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7552 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7553 md
.slot
[i
].user_template
= -1;
7555 md
.pseudo_hash
= hash_new ();
7556 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7558 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7559 (void *) (pseudo_opcode
+ i
));
7561 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7562 pseudo_opcode
[i
].name
, err
);
7565 md
.reg_hash
= hash_new ();
7566 md
.dynreg_hash
= hash_new ();
7567 md
.const_hash
= hash_new ();
7568 md
.entry_hash
= hash_new ();
7570 /* general registers: */
7571 declare_register_set ("r", 128, REG_GR
);
7572 declare_register ("gp", REG_GR
+ 1);
7573 declare_register ("sp", REG_GR
+ 12);
7574 declare_register ("tp", REG_GR
+ 13);
7575 declare_register_set ("ret", 4, REG_GR
+ 8);
7577 /* floating point registers: */
7578 declare_register_set ("f", 128, REG_FR
);
7579 declare_register_set ("farg", 8, REG_FR
+ 8);
7580 declare_register_set ("fret", 8, REG_FR
+ 8);
7582 /* branch registers: */
7583 declare_register_set ("b", 8, REG_BR
);
7584 declare_register ("rp", REG_BR
+ 0);
7586 /* predicate registers: */
7587 declare_register_set ("p", 64, REG_P
);
7588 declare_register ("pr", REG_PR
);
7589 declare_register ("pr.rot", REG_PR_ROT
);
7591 /* application registers: */
7592 declare_register_set ("ar", 128, REG_AR
);
7593 for (i
= 0; i
< NELEMS (ar
); ++i
)
7594 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7596 /* control registers: */
7597 declare_register_set ("cr", 128, REG_CR
);
7598 for (i
= 0; i
< NELEMS (cr
); ++i
)
7599 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7601 declare_register ("ip", REG_IP
);
7602 declare_register ("cfm", REG_CFM
);
7603 declare_register ("psr", REG_PSR
);
7604 declare_register ("psr.l", REG_PSR_L
);
7605 declare_register ("psr.um", REG_PSR_UM
);
7607 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7609 unsigned int regnum
= indirect_reg
[i
].regnum
;
7611 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7614 /* pseudo-registers used to specify unwind info: */
7615 declare_register ("psp", REG_PSP
);
7617 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7619 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7620 (PTR
) (const_bits
+ i
));
7622 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7626 /* Set the architecture and machine depending on defaults and command line
7628 if (md
.flags
& EF_IA_64_ABI64
)
7629 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7631 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7634 as_warn (_("Could not set architecture and machine"));
7636 /* Set the pointer size and pointer shift size depending on md.flags */
7638 if (md
.flags
& EF_IA_64_ABI64
)
7640 md
.pointer_size
= 8; /* pointers are 8 bytes */
7641 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7645 md
.pointer_size
= 4; /* pointers are 4 bytes */
7646 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7649 md
.mem_offset
.hint
= 0;
7652 md
.entry_labels
= NULL
;
7655 /* Set the default options in md. Cannot do this in md_begin because
7656 that is called after md_parse_option which is where we set the
7657 options in md based on command line options. */
7660 ia64_init (argc
, argv
)
7661 int argc ATTRIBUTE_UNUSED
;
7662 char **argv ATTRIBUTE_UNUSED
;
7664 md
.flags
= MD_FLAGS_DEFAULT
;
7666 /* FIXME: We should change it to unwind_check_error someday. */
7667 md
.unwind_check
= unwind_check_warning
;
7668 md
.hint_b
= hint_b_error
;
7672 /* Return a string for the target object file format. */
7675 ia64_target_format ()
7677 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7679 if (md
.flags
& EF_IA_64_BE
)
7681 if (md
.flags
& EF_IA_64_ABI64
)
7682 #if defined(TE_AIX50)
7683 return "elf64-ia64-aix-big";
7684 #elif defined(TE_HPUX)
7685 return "elf64-ia64-hpux-big";
7687 return "elf64-ia64-big";
7690 #if defined(TE_AIX50)
7691 return "elf32-ia64-aix-big";
7692 #elif defined(TE_HPUX)
7693 return "elf32-ia64-hpux-big";
7695 return "elf32-ia64-big";
7700 if (md
.flags
& EF_IA_64_ABI64
)
7702 return "elf64-ia64-aix-little";
7704 return "elf64-ia64-little";
7708 return "elf32-ia64-aix-little";
7710 return "elf32-ia64-little";
7715 return "unknown-format";
7719 ia64_end_of_source ()
7721 /* terminate insn group upon reaching end of file: */
7722 insn_group_break (1, 0, 0);
7724 /* emits slots we haven't written yet: */
7725 ia64_flush_insns ();
7727 bfd_set_private_flags (stdoutput
, md
.flags
);
7729 md
.mem_offset
.hint
= 0;
7738 /* Make sure we don't reference input_line_pointer[-1] when that's
7744 if (md
.qp
.X_op
== O_register
)
7745 as_bad ("qualifying predicate not followed by instruction");
7746 md
.qp
.X_op
= O_absent
;
7748 if (ignore_input ())
7751 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7753 if (md
.detect_dv
&& !md
.explicit_mode
)
7760 as_warn (_("Explicit stops are ignored in auto mode"));
7764 insn_group_break (1, 0, 0);
7766 else if (input_line_pointer
[-1] == '{')
7768 if (md
.manual_bundling
)
7769 as_warn ("Found '{' when manual bundling is already turned on");
7771 CURR_SLOT
.manual_bundling_on
= 1;
7772 md
.manual_bundling
= 1;
7774 /* Bundling is only acceptable in explicit mode
7775 or when in default automatic mode. */
7776 if (md
.detect_dv
&& !md
.explicit_mode
)
7778 if (!md
.mode_explicitly_set
7779 && !md
.default_explicit_mode
)
7782 as_warn (_("Found '{' after explicit switch to automatic mode"));
7785 else if (input_line_pointer
[-1] == '}')
7787 if (!md
.manual_bundling
)
7788 as_warn ("Found '}' when manual bundling is off");
7790 PREV_SLOT
.manual_bundling_off
= 1;
7791 md
.manual_bundling
= 0;
7793 /* switch back to automatic mode, if applicable */
7796 && !md
.mode_explicitly_set
7797 && !md
.default_explicit_mode
)
7802 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7804 static int defining_tag
= 0;
7807 ia64_unrecognized_line (ch
)
7813 expression_and_evaluate (&md
.qp
);
7814 if (*input_line_pointer
++ != ')')
7816 as_bad ("Expected ')'");
7819 if (md
.qp
.X_op
!= O_register
)
7821 as_bad ("Qualifying predicate expected");
7824 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7826 as_bad ("Predicate register expected");
7838 if (md
.qp
.X_op
== O_register
)
7840 as_bad ("Tag must come before qualifying predicate.");
7844 /* This implements just enough of read_a_source_file in read.c to
7845 recognize labels. */
7846 if (is_name_beginner (*input_line_pointer
))
7848 s
= input_line_pointer
;
7849 c
= get_symbol_end ();
7851 else if (LOCAL_LABELS_FB
7852 && ISDIGIT (*input_line_pointer
))
7855 while (ISDIGIT (*input_line_pointer
))
7856 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7857 fb_label_instance_inc (temp
);
7858 s
= fb_label_name (temp
, 0);
7859 c
= *input_line_pointer
;
7868 /* Put ':' back for error messages' sake. */
7869 *input_line_pointer
++ = ':';
7870 as_bad ("Expected ':'");
7877 /* Put ':' back for error messages' sake. */
7878 *input_line_pointer
++ = ':';
7879 if (*input_line_pointer
++ != ']')
7881 as_bad ("Expected ']'");
7886 as_bad ("Tag name expected");
7896 /* Not a valid line. */
7901 ia64_frob_label (sym
)
7904 struct label_fix
*fix
;
7906 /* Tags need special handling since they are not bundle breaks like
7910 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7912 fix
->next
= CURR_SLOT
.tag_fixups
;
7913 fix
->dw2_mark_labels
= FALSE
;
7914 CURR_SLOT
.tag_fixups
= fix
;
7919 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7921 md
.last_text_seg
= now_seg
;
7922 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7924 fix
->next
= CURR_SLOT
.label_fixups
;
7925 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7926 CURR_SLOT
.label_fixups
= fix
;
7928 /* Keep track of how many code entry points we've seen. */
7929 if (md
.path
== md
.maxpaths
)
7932 md
.entry_labels
= (const char **)
7933 xrealloc ((void *) md
.entry_labels
,
7934 md
.maxpaths
* sizeof (char *));
7936 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7941 /* The HP-UX linker will give unresolved symbol errors for symbols
7942 that are declared but unused. This routine removes declared,
7943 unused symbols from an object. */
7945 ia64_frob_symbol (sym
)
7948 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7949 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7950 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7951 && ! S_IS_EXTERNAL (sym
)))
7958 ia64_flush_pending_output ()
7960 if (!md
.keep_pending_output
7961 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7963 /* ??? This causes many unnecessary stop bits to be emitted.
7964 Unfortunately, it isn't clear if it is safe to remove this. */
7965 insn_group_break (1, 0, 0);
7966 ia64_flush_insns ();
7970 /* Do ia64-specific expression optimization. All that's done here is
7971 to transform index expressions that are either due to the indexing
7972 of rotating registers or due to the indexing of indirect register
7975 ia64_optimize_expr (l
, op
, r
)
7982 resolve_expression (l
);
7983 if (l
->X_op
== O_register
)
7985 unsigned num_regs
= l
->X_add_number
>> 16;
7987 resolve_expression (r
);
7990 /* Left side is a .rotX-allocated register. */
7991 if (r
->X_op
!= O_constant
)
7993 as_bad ("Rotating register index must be a non-negative constant");
7994 r
->X_add_number
= 0;
7996 else if ((valueT
) r
->X_add_number
>= num_regs
)
7998 as_bad ("Index out of range 0..%u", num_regs
- 1);
7999 r
->X_add_number
= 0;
8001 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
8004 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
8006 if (r
->X_op
!= O_register
8007 || r
->X_add_number
< REG_GR
8008 || r
->X_add_number
> REG_GR
+ 127)
8010 as_bad ("Indirect register index must be a general register");
8011 r
->X_add_number
= REG_GR
;
8014 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
8015 l
->X_add_number
= r
->X_add_number
;
8019 as_bad ("Index can only be applied to rotating or indirect registers");
8020 /* Fall back to some register use of which has as little as possible
8021 side effects, to minimize subsequent error messages. */
8022 l
->X_op
= O_register
;
8023 l
->X_add_number
= REG_GR
+ 3;
8028 ia64_parse_name (name
, e
, nextcharP
)
8033 struct const_desc
*cdesc
;
8034 struct dynreg
*dr
= 0;
8041 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
8043 /* Find what relocation pseudo-function we're dealing with. */
8044 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
8045 if (pseudo_func
[idx
].name
8046 && pseudo_func
[idx
].name
[0] == name
[1]
8047 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
8049 pseudo_type
= pseudo_func
[idx
].type
;
8052 switch (pseudo_type
)
8054 case PSEUDO_FUNC_RELOC
:
8055 end
= input_line_pointer
;
8056 if (*nextcharP
!= '(')
8058 as_bad ("Expected '('");
8062 ++input_line_pointer
;
8064 if (*input_line_pointer
!= ')')
8066 as_bad ("Missing ')'");
8070 ++input_line_pointer
;
8071 if (e
->X_op
!= O_symbol
)
8073 if (e
->X_op
!= O_pseudo_fixup
)
8075 as_bad ("Not a symbolic expression");
8078 if (idx
!= FUNC_LT_RELATIVE
)
8080 as_bad ("Illegal combination of relocation functions");
8083 switch (S_GET_VALUE (e
->X_op_symbol
))
8085 case FUNC_FPTR_RELATIVE
:
8086 idx
= FUNC_LT_FPTR_RELATIVE
; break;
8087 case FUNC_DTP_MODULE
:
8088 idx
= FUNC_LT_DTP_MODULE
; break;
8089 case FUNC_DTP_RELATIVE
:
8090 idx
= FUNC_LT_DTP_RELATIVE
; break;
8091 case FUNC_TP_RELATIVE
:
8092 idx
= FUNC_LT_TP_RELATIVE
; break;
8094 as_bad ("Illegal combination of relocation functions");
8098 /* Make sure gas doesn't get rid of local symbols that are used
8100 e
->X_op
= O_pseudo_fixup
;
8101 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8103 *nextcharP
= *input_line_pointer
;
8106 case PSEUDO_FUNC_CONST
:
8107 e
->X_op
= O_constant
;
8108 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8111 case PSEUDO_FUNC_REG
:
8112 e
->X_op
= O_register
;
8113 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8122 /* first see if NAME is a known register name: */
8123 sym
= hash_find (md
.reg_hash
, name
);
8126 e
->X_op
= O_register
;
8127 e
->X_add_number
= S_GET_VALUE (sym
);
8131 cdesc
= hash_find (md
.const_hash
, name
);
8134 e
->X_op
= O_constant
;
8135 e
->X_add_number
= cdesc
->value
;
8139 /* check for inN, locN, or outN: */
8144 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8152 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8160 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8171 /* Ignore register numbers with leading zeroes, except zero itself. */
8172 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8174 unsigned long regnum
;
8176 /* The name is inN, locN, or outN; parse the register number. */
8177 regnum
= strtoul (name
+ idx
, &end
, 10);
8178 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8180 if (regnum
>= dr
->num_regs
)
8183 as_bad ("No current frame");
8185 as_bad ("Register number out of range 0..%u",
8189 e
->X_op
= O_register
;
8190 e
->X_add_number
= dr
->base
+ regnum
;
8195 end
= alloca (strlen (name
) + 1);
8197 name
= ia64_canonicalize_symbol_name (end
);
8198 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8200 /* We've got ourselves the name of a rotating register set.
8201 Store the base register number in the low 16 bits of
8202 X_add_number and the size of the register set in the top 16
8204 e
->X_op
= O_register
;
8205 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8211 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8214 ia64_canonicalize_symbol_name (name
)
8217 size_t len
= strlen (name
), full
= len
;
8219 while (len
> 0 && name
[len
- 1] == '#')
8224 as_bad ("Standalone `#' is illegal");
8226 else if (len
< full
- 1)
8227 as_warn ("Redundant `#' suffix operators");
8232 /* Return true if idesc is a conditional branch instruction. This excludes
8233 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8234 because they always read/write resources regardless of the value of the
8235 qualifying predicate. br.ia must always use p0, and hence is always
8236 taken. Thus this function returns true for branches which can fall
8237 through, and which use no resources if they do fall through. */
8240 is_conditional_branch (idesc
)
8241 struct ia64_opcode
*idesc
;
8243 /* br is a conditional branch. Everything that starts with br. except
8244 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8245 Everything that starts with brl is a conditional branch. */
8246 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8247 && (idesc
->name
[2] == '\0'
8248 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8249 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8250 || idesc
->name
[2] == 'l'
8251 /* br.cond, br.call, br.clr */
8252 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8253 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8254 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8257 /* Return whether the given opcode is a taken branch. If there's any doubt,
8261 is_taken_branch (idesc
)
8262 struct ia64_opcode
*idesc
;
8264 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8265 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8268 /* Return whether the given opcode is an interruption or rfi. If there's any
8269 doubt, returns zero. */
8272 is_interruption_or_rfi (idesc
)
8273 struct ia64_opcode
*idesc
;
8275 if (strcmp (idesc
->name
, "rfi") == 0)
8280 /* Returns the index of the given dependency in the opcode's list of chks, or
8281 -1 if there is no dependency. */
8284 depends_on (depind
, idesc
)
8286 struct ia64_opcode
*idesc
;
8289 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8290 for (i
= 0; i
< dep
->nchks
; i
++)
8292 if (depind
== DEP (dep
->chks
[i
]))
8298 /* Determine a set of specific resources used for a particular resource
8299 class. Returns the number of specific resources identified For those
8300 cases which are not determinable statically, the resource returned is
8303 Meanings of value in 'NOTE':
8304 1) only read/write when the register number is explicitly encoded in the
8306 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8307 accesses CFM when qualifying predicate is in the rotating region.
8308 3) general register value is used to specify an indirect register; not
8309 determinable statically.
8310 4) only read the given resource when bits 7:0 of the indirect index
8311 register value does not match the register number of the resource; not
8312 determinable statically.
8313 5) all rules are implementation specific.
8314 6) only when both the index specified by the reader and the index specified
8315 by the writer have the same value in bits 63:61; not determinable
8317 7) only access the specified resource when the corresponding mask bit is
8319 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8320 only read when these insns reference FR2-31
8321 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8322 written when these insns write FR32-127
8323 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8325 11) The target predicates are written independently of PR[qp], but source
8326 registers are only read if PR[qp] is true. Since the state of PR[qp]
8327 cannot statically be determined, all source registers are marked used.
8328 12) This insn only reads the specified predicate register when that
8329 register is the PR[qp].
8330 13) This reference to ld-c only applies to teh GR whose value is loaded
8331 with data returned from memory, not the post-incremented address register.
8332 14) The RSE resource includes the implementation-specific RSE internal
8333 state resources. At least one (and possibly more) of these resources are
8334 read by each instruction listed in IC:rse-readers. At least one (and
8335 possibly more) of these resources are written by each insn listed in
8337 15+16) Represents reserved instructions, which the assembler does not
8340 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8341 this code; there are no dependency violations based on memory access.
8344 #define MAX_SPECS 256
8349 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8350 const struct ia64_dependency
*dep
;
8351 struct ia64_opcode
*idesc
;
8352 int type
; /* is this a DV chk or a DV reg? */
8353 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8354 int note
; /* resource note for this insn's usage */
8355 int path
; /* which execution path to examine */
8362 if (dep
->mode
== IA64_DV_WAW
8363 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8364 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8367 /* template for any resources we identify */
8368 tmpl
.dependency
= dep
;
8370 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8371 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8372 tmpl
.link_to_qp_branch
= 1;
8373 tmpl
.mem_offset
.hint
= 0;
8374 tmpl
.mem_offset
.offset
= 0;
8375 tmpl
.mem_offset
.base
= 0;
8378 tmpl
.cmp_type
= CMP_NONE
;
8385 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8386 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8387 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8389 /* we don't need to track these */
8390 if (dep
->semantics
== IA64_DVS_NONE
)
8393 switch (dep
->specifier
)
8398 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8400 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8401 if (regno
>= 0 && regno
<= 7)
8403 specs
[count
] = tmpl
;
8404 specs
[count
++].index
= regno
;
8410 for (i
= 0; i
< 8; i
++)
8412 specs
[count
] = tmpl
;
8413 specs
[count
++].index
= i
;
8422 case IA64_RS_AR_UNAT
:
8423 /* This is a mov =AR or mov AR= instruction. */
8424 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8426 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8427 if (regno
== AR_UNAT
)
8429 specs
[count
++] = tmpl
;
8434 /* This is a spill/fill, or other instruction that modifies the
8437 /* Unless we can determine the specific bits used, mark the whole
8438 thing; bits 8:3 of the memory address indicate the bit used in
8439 UNAT. The .mem.offset hint may be used to eliminate a small
8440 subset of conflicts. */
8441 specs
[count
] = tmpl
;
8442 if (md
.mem_offset
.hint
)
8445 fprintf (stderr
, " Using hint for spill/fill\n");
8446 /* The index isn't actually used, just set it to something
8447 approximating the bit index. */
8448 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8449 specs
[count
].mem_offset
.hint
= 1;
8450 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8451 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8455 specs
[count
++].specific
= 0;
8463 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8465 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8466 if ((regno
>= 8 && regno
<= 15)
8467 || (regno
>= 20 && regno
<= 23)
8468 || (regno
>= 31 && regno
<= 39)
8469 || (regno
>= 41 && regno
<= 47)
8470 || (regno
>= 67 && regno
<= 111))
8472 specs
[count
] = tmpl
;
8473 specs
[count
++].index
= regno
;
8486 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8488 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8489 if ((regno
>= 48 && regno
<= 63)
8490 || (regno
>= 112 && regno
<= 127))
8492 specs
[count
] = tmpl
;
8493 specs
[count
++].index
= regno
;
8499 for (i
= 48; i
< 64; i
++)
8501 specs
[count
] = tmpl
;
8502 specs
[count
++].index
= i
;
8504 for (i
= 112; i
< 128; i
++)
8506 specs
[count
] = tmpl
;
8507 specs
[count
++].index
= i
;
8525 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8526 if (idesc
->operands
[i
] == IA64_OPND_B1
8527 || idesc
->operands
[i
] == IA64_OPND_B2
)
8529 specs
[count
] = tmpl
;
8530 specs
[count
++].index
=
8531 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8536 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8537 if (idesc
->operands
[i
] == IA64_OPND_B1
8538 || idesc
->operands
[i
] == IA64_OPND_B2
)
8540 specs
[count
] = tmpl
;
8541 specs
[count
++].index
=
8542 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8548 case IA64_RS_CPUID
: /* four or more registers */
8551 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8553 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8554 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8557 specs
[count
] = tmpl
;
8558 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8562 specs
[count
] = tmpl
;
8563 specs
[count
++].specific
= 0;
8573 case IA64_RS_DBR
: /* four or more registers */
8576 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8578 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8579 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8582 specs
[count
] = tmpl
;
8583 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8587 specs
[count
] = tmpl
;
8588 specs
[count
++].specific
= 0;
8592 else if (note
== 0 && !rsrc_write
)
8594 specs
[count
] = tmpl
;
8595 specs
[count
++].specific
= 0;
8603 case IA64_RS_IBR
: /* four or more registers */
8606 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8608 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8609 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8612 specs
[count
] = tmpl
;
8613 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8617 specs
[count
] = tmpl
;
8618 specs
[count
++].specific
= 0;
8631 /* These are implementation specific. Force all references to
8632 conflict with all other references. */
8633 specs
[count
] = tmpl
;
8634 specs
[count
++].specific
= 0;
8642 case IA64_RS_PKR
: /* 16 or more registers */
8643 if (note
== 3 || note
== 4)
8645 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8647 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8648 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8653 specs
[count
] = tmpl
;
8654 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8657 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8659 /* Uses all registers *except* the one in R3. */
8660 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8662 specs
[count
] = tmpl
;
8663 specs
[count
++].index
= i
;
8669 specs
[count
] = tmpl
;
8670 specs
[count
++].specific
= 0;
8677 specs
[count
] = tmpl
;
8678 specs
[count
++].specific
= 0;
8682 case IA64_RS_PMC
: /* four or more registers */
8685 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8686 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8689 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8691 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8692 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8695 specs
[count
] = tmpl
;
8696 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8700 specs
[count
] = tmpl
;
8701 specs
[count
++].specific
= 0;
8711 case IA64_RS_PMD
: /* four or more registers */
8714 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8716 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8717 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8720 specs
[count
] = tmpl
;
8721 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8725 specs
[count
] = tmpl
;
8726 specs
[count
++].specific
= 0;
8736 case IA64_RS_RR
: /* eight registers */
8739 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8741 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8742 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8745 specs
[count
] = tmpl
;
8746 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8750 specs
[count
] = tmpl
;
8751 specs
[count
++].specific
= 0;
8755 else if (note
== 0 && !rsrc_write
)
8757 specs
[count
] = tmpl
;
8758 specs
[count
++].specific
= 0;
8766 case IA64_RS_CR_IRR
:
8769 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8770 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8772 && idesc
->operands
[1] == IA64_OPND_CR3
8775 for (i
= 0; i
< 4; i
++)
8777 specs
[count
] = tmpl
;
8778 specs
[count
++].index
= CR_IRR0
+ i
;
8784 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8785 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8787 && regno
<= CR_IRR3
)
8789 specs
[count
] = tmpl
;
8790 specs
[count
++].index
= regno
;
8799 case IA64_RS_CR_LRR
:
8806 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8807 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8808 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8810 specs
[count
] = tmpl
;
8811 specs
[count
++].index
= regno
;
8819 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8821 specs
[count
] = tmpl
;
8822 specs
[count
++].index
=
8823 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8838 else if (rsrc_write
)
8840 if (dep
->specifier
== IA64_RS_FRb
8841 && idesc
->operands
[0] == IA64_OPND_F1
)
8843 specs
[count
] = tmpl
;
8844 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8849 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8851 if (idesc
->operands
[i
] == IA64_OPND_F2
8852 || idesc
->operands
[i
] == IA64_OPND_F3
8853 || idesc
->operands
[i
] == IA64_OPND_F4
)
8855 specs
[count
] = tmpl
;
8856 specs
[count
++].index
=
8857 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8866 /* This reference applies only to the GR whose value is loaded with
8867 data returned from memory. */
8868 specs
[count
] = tmpl
;
8869 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8875 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8876 if (idesc
->operands
[i
] == IA64_OPND_R1
8877 || idesc
->operands
[i
] == IA64_OPND_R2
8878 || idesc
->operands
[i
] == IA64_OPND_R3
)
8880 specs
[count
] = tmpl
;
8881 specs
[count
++].index
=
8882 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8884 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8885 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8886 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8888 specs
[count
] = tmpl
;
8889 specs
[count
++].index
=
8890 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8895 /* Look for anything that reads a GR. */
8896 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8898 if (idesc
->operands
[i
] == IA64_OPND_MR3
8899 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8900 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8901 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8902 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8903 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8904 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8905 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8906 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8907 || ((i
>= idesc
->num_outputs
)
8908 && (idesc
->operands
[i
] == IA64_OPND_R1
8909 || idesc
->operands
[i
] == IA64_OPND_R2
8910 || idesc
->operands
[i
] == IA64_OPND_R3
8911 /* addl source register. */
8912 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8914 specs
[count
] = tmpl
;
8915 specs
[count
++].index
=
8916 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8927 /* This is the same as IA64_RS_PRr, except that the register range is
8928 from 1 - 15, and there are no rotating register reads/writes here. */
8932 for (i
= 1; i
< 16; i
++)
8934 specs
[count
] = tmpl
;
8935 specs
[count
++].index
= i
;
8941 /* Mark only those registers indicated by the mask. */
8944 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8945 for (i
= 1; i
< 16; i
++)
8946 if (mask
& ((valueT
) 1 << i
))
8948 specs
[count
] = tmpl
;
8949 specs
[count
++].index
= i
;
8957 else if (note
== 11) /* note 11 implies note 1 as well */
8961 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8963 if (idesc
->operands
[i
] == IA64_OPND_P1
8964 || idesc
->operands
[i
] == IA64_OPND_P2
)
8966 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8967 if (regno
>= 1 && regno
< 16)
8969 specs
[count
] = tmpl
;
8970 specs
[count
++].index
= regno
;
8980 else if (note
== 12)
8982 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8984 specs
[count
] = tmpl
;
8985 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8992 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8993 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8994 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8995 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8997 if ((idesc
->operands
[0] == IA64_OPND_P1
8998 || idesc
->operands
[0] == IA64_OPND_P2
)
8999 && p1
>= 1 && p1
< 16)
9001 specs
[count
] = tmpl
;
9002 specs
[count
].cmp_type
=
9003 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9004 specs
[count
++].index
= p1
;
9006 if ((idesc
->operands
[1] == IA64_OPND_P1
9007 || idesc
->operands
[1] == IA64_OPND_P2
)
9008 && p2
>= 1 && p2
< 16)
9010 specs
[count
] = tmpl
;
9011 specs
[count
].cmp_type
=
9012 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9013 specs
[count
++].index
= p2
;
9018 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
9020 specs
[count
] = tmpl
;
9021 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9023 if (idesc
->operands
[1] == IA64_OPND_PR
)
9025 for (i
= 1; i
< 16; i
++)
9027 specs
[count
] = tmpl
;
9028 specs
[count
++].index
= i
;
9039 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9040 simplified cases of this. */
9044 for (i
= 16; i
< 63; i
++)
9046 specs
[count
] = tmpl
;
9047 specs
[count
++].index
= i
;
9053 /* Mark only those registers indicated by the mask. */
9055 && idesc
->operands
[0] == IA64_OPND_PR
)
9057 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9058 if (mask
& ((valueT
) 1 << 16))
9059 for (i
= 16; i
< 63; i
++)
9061 specs
[count
] = tmpl
;
9062 specs
[count
++].index
= i
;
9066 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9068 for (i
= 16; i
< 63; i
++)
9070 specs
[count
] = tmpl
;
9071 specs
[count
++].index
= i
;
9079 else if (note
== 11) /* note 11 implies note 1 as well */
9083 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9085 if (idesc
->operands
[i
] == IA64_OPND_P1
9086 || idesc
->operands
[i
] == IA64_OPND_P2
)
9088 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9089 if (regno
>= 16 && regno
< 63)
9091 specs
[count
] = tmpl
;
9092 specs
[count
++].index
= regno
;
9102 else if (note
== 12)
9104 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9106 specs
[count
] = tmpl
;
9107 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9114 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9115 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9116 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9117 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9119 if ((idesc
->operands
[0] == IA64_OPND_P1
9120 || idesc
->operands
[0] == IA64_OPND_P2
)
9121 && p1
>= 16 && p1
< 63)
9123 specs
[count
] = tmpl
;
9124 specs
[count
].cmp_type
=
9125 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9126 specs
[count
++].index
= p1
;
9128 if ((idesc
->operands
[1] == IA64_OPND_P1
9129 || idesc
->operands
[1] == IA64_OPND_P2
)
9130 && p2
>= 16 && p2
< 63)
9132 specs
[count
] = tmpl
;
9133 specs
[count
].cmp_type
=
9134 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9135 specs
[count
++].index
= p2
;
9140 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9142 specs
[count
] = tmpl
;
9143 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9145 if (idesc
->operands
[1] == IA64_OPND_PR
)
9147 for (i
= 16; i
< 63; i
++)
9149 specs
[count
] = tmpl
;
9150 specs
[count
++].index
= i
;
9162 /* Verify that the instruction is using the PSR bit indicated in
9166 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9168 if (dep
->regindex
< 6)
9170 specs
[count
++] = tmpl
;
9173 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9175 if (dep
->regindex
< 32
9176 || dep
->regindex
== 35
9177 || dep
->regindex
== 36
9178 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9180 specs
[count
++] = tmpl
;
9183 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9185 if (dep
->regindex
< 32
9186 || dep
->regindex
== 35
9187 || dep
->regindex
== 36
9188 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9190 specs
[count
++] = tmpl
;
9195 /* Several PSR bits have very specific dependencies. */
9196 switch (dep
->regindex
)
9199 specs
[count
++] = tmpl
;
9204 specs
[count
++] = tmpl
;
9208 /* Only certain CR accesses use PSR.ic */
9209 if (idesc
->operands
[0] == IA64_OPND_CR3
9210 || idesc
->operands
[1] == IA64_OPND_CR3
)
9213 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9216 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9231 specs
[count
++] = tmpl
;
9240 specs
[count
++] = tmpl
;
9244 /* Only some AR accesses use cpl */
9245 if (idesc
->operands
[0] == IA64_OPND_AR3
9246 || idesc
->operands
[1] == IA64_OPND_AR3
)
9249 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9252 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9259 && regno
<= AR_K7
))))
9261 specs
[count
++] = tmpl
;
9266 specs
[count
++] = tmpl
;
9276 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9278 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9284 if (mask
& ((valueT
) 1 << dep
->regindex
))
9286 specs
[count
++] = tmpl
;
9291 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9292 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9293 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9294 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9296 if (idesc
->operands
[i
] == IA64_OPND_F1
9297 || idesc
->operands
[i
] == IA64_OPND_F2
9298 || idesc
->operands
[i
] == IA64_OPND_F3
9299 || idesc
->operands
[i
] == IA64_OPND_F4
)
9301 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9302 if (reg
>= min
&& reg
<= max
)
9304 specs
[count
++] = tmpl
;
9311 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9312 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9313 /* mfh is read on writes to FR32-127; mfl is read on writes to
9315 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9317 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9319 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9320 if (reg
>= min
&& reg
<= max
)
9322 specs
[count
++] = tmpl
;
9327 else if (note
== 10)
9329 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9331 if (idesc
->operands
[i
] == IA64_OPND_R1
9332 || idesc
->operands
[i
] == IA64_OPND_R2
9333 || idesc
->operands
[i
] == IA64_OPND_R3
)
9335 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9336 if (regno
>= 16 && regno
<= 31)
9338 specs
[count
++] = tmpl
;
9349 case IA64_RS_AR_FPSR
:
9350 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9352 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9353 if (regno
== AR_FPSR
)
9355 specs
[count
++] = tmpl
;
9360 specs
[count
++] = tmpl
;
9365 /* Handle all AR[REG] resources */
9366 if (note
== 0 || note
== 1)
9368 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9369 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9370 && regno
== dep
->regindex
)
9372 specs
[count
++] = tmpl
;
9374 /* other AR[REG] resources may be affected by AR accesses */
9375 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9378 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9379 switch (dep
->regindex
)
9385 if (regno
== AR_BSPSTORE
)
9387 specs
[count
++] = tmpl
;
9391 (regno
== AR_BSPSTORE
9392 || regno
== AR_RNAT
))
9394 specs
[count
++] = tmpl
;
9399 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9402 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9403 switch (dep
->regindex
)
9408 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9410 specs
[count
++] = tmpl
;
9417 specs
[count
++] = tmpl
;
9427 /* Handle all CR[REG] resources */
9428 if (note
== 0 || note
== 1)
9430 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9432 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9433 if (regno
== dep
->regindex
)
9435 specs
[count
++] = tmpl
;
9437 else if (!rsrc_write
)
9439 /* Reads from CR[IVR] affect other resources. */
9440 if (regno
== CR_IVR
)
9442 if ((dep
->regindex
>= CR_IRR0
9443 && dep
->regindex
<= CR_IRR3
)
9444 || dep
->regindex
== CR_TPR
)
9446 specs
[count
++] = tmpl
;
9453 specs
[count
++] = tmpl
;
9462 case IA64_RS_INSERVICE
:
9463 /* look for write of EOI (67) or read of IVR (65) */
9464 if ((idesc
->operands
[0] == IA64_OPND_CR3
9465 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9466 || (idesc
->operands
[1] == IA64_OPND_CR3
9467 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9469 specs
[count
++] = tmpl
;
9476 specs
[count
++] = tmpl
;
9487 specs
[count
++] = tmpl
;
9491 /* Check if any of the registers accessed are in the rotating region.
9492 mov to/from pr accesses CFM only when qp_regno is in the rotating
9494 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9496 if (idesc
->operands
[i
] == IA64_OPND_R1
9497 || idesc
->operands
[i
] == IA64_OPND_R2
9498 || idesc
->operands
[i
] == IA64_OPND_R3
)
9500 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9501 /* Assumes that md.rot.num_regs is always valid */
9502 if (md
.rot
.num_regs
> 0
9504 && num
< 31 + md
.rot
.num_regs
)
9506 specs
[count
] = tmpl
;
9507 specs
[count
++].specific
= 0;
9510 else if (idesc
->operands
[i
] == IA64_OPND_F1
9511 || idesc
->operands
[i
] == IA64_OPND_F2
9512 || idesc
->operands
[i
] == IA64_OPND_F3
9513 || idesc
->operands
[i
] == IA64_OPND_F4
)
9515 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9518 specs
[count
] = tmpl
;
9519 specs
[count
++].specific
= 0;
9522 else if (idesc
->operands
[i
] == IA64_OPND_P1
9523 || idesc
->operands
[i
] == IA64_OPND_P2
)
9525 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9528 specs
[count
] = tmpl
;
9529 specs
[count
++].specific
= 0;
9533 if (CURR_SLOT
.qp_regno
> 15)
9535 specs
[count
] = tmpl
;
9536 specs
[count
++].specific
= 0;
9541 /* This is the same as IA64_RS_PRr, except simplified to account for
9542 the fact that there is only one register. */
9546 specs
[count
++] = tmpl
;
9551 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9552 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9553 if (mask
& ((valueT
) 1 << 63))
9554 specs
[count
++] = tmpl
;
9556 else if (note
== 11)
9558 if ((idesc
->operands
[0] == IA64_OPND_P1
9559 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9560 || (idesc
->operands
[1] == IA64_OPND_P2
9561 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9563 specs
[count
++] = tmpl
;
9566 else if (note
== 12)
9568 if (CURR_SLOT
.qp_regno
== 63)
9570 specs
[count
++] = tmpl
;
9577 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9578 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9579 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9580 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9583 && (idesc
->operands
[0] == IA64_OPND_P1
9584 || idesc
->operands
[0] == IA64_OPND_P2
))
9586 specs
[count
] = tmpl
;
9587 specs
[count
++].cmp_type
=
9588 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9591 && (idesc
->operands
[1] == IA64_OPND_P1
9592 || idesc
->operands
[1] == IA64_OPND_P2
))
9594 specs
[count
] = tmpl
;
9595 specs
[count
++].cmp_type
=
9596 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9601 if (CURR_SLOT
.qp_regno
== 63)
9603 specs
[count
++] = tmpl
;
9614 /* FIXME we can identify some individual RSE written resources, but RSE
9615 read resources have not yet been completely identified, so for now
9616 treat RSE as a single resource */
9617 if (strncmp (idesc
->name
, "mov", 3) == 0)
9621 if (idesc
->operands
[0] == IA64_OPND_AR3
9622 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9624 specs
[count
++] = tmpl
;
9629 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9631 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9632 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9634 specs
[count
++] = tmpl
;
9637 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9639 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9640 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9641 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9643 specs
[count
++] = tmpl
;
9650 specs
[count
++] = tmpl
;
9655 /* FIXME -- do any of these need to be non-specific? */
9656 specs
[count
++] = tmpl
;
9660 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9667 /* Clear branch flags on marked resources. This breaks the link between the
9668 QP of the marking instruction and a subsequent branch on the same QP. */
9671 clear_qp_branch_flag (mask
)
9675 for (i
= 0; i
< regdepslen
; i
++)
9677 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9678 if ((bit
& mask
) != 0)
9680 regdeps
[i
].link_to_qp_branch
= 0;
9685 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9686 any mutexes which contain one of the PRs and create new ones when
9690 update_qp_mutex (valueT mask
)
9696 while (i
< qp_mutexeslen
)
9698 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9700 /* If it destroys and creates the same mutex, do nothing. */
9701 if (qp_mutexes
[i
].prmask
== mask
9702 && qp_mutexes
[i
].path
== md
.path
)
9713 fprintf (stderr
, " Clearing mutex relation");
9714 print_prmask (qp_mutexes
[i
].prmask
);
9715 fprintf (stderr
, "\n");
9718 /* Deal with the old mutex with more than 3+ PRs only if
9719 the new mutex on the same execution path with it.
9721 FIXME: The 3+ mutex support is incomplete.
9722 dot_pred_rel () may be a better place to fix it. */
9723 if (qp_mutexes
[i
].path
== md
.path
)
9725 /* If it is a proper subset of the mutex, create a
9728 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9731 qp_mutexes
[i
].prmask
&= ~mask
;
9732 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9734 /* Modify the mutex if there are more than one
9742 /* Remove the mutex. */
9743 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9751 add_qp_mutex (mask
);
9756 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9758 Any changes to a PR clears the mutex relations which include that PR. */
9761 clear_qp_mutex (mask
)
9767 while (i
< qp_mutexeslen
)
9769 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9773 fprintf (stderr
, " Clearing mutex relation");
9774 print_prmask (qp_mutexes
[i
].prmask
);
9775 fprintf (stderr
, "\n");
9777 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9784 /* Clear implies relations which contain PRs in the given masks.
9785 P1_MASK indicates the source of the implies relation, while P2_MASK
9786 indicates the implied PR. */
9789 clear_qp_implies (p1_mask
, p2_mask
)
9796 while (i
< qp_implieslen
)
9798 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9799 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9802 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9803 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9804 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9811 /* Add the PRs specified to the list of implied relations. */
9814 add_qp_imply (p1
, p2
)
9821 /* p0 is not meaningful here. */
9822 if (p1
== 0 || p2
== 0)
9828 /* If it exists already, ignore it. */
9829 for (i
= 0; i
< qp_implieslen
; i
++)
9831 if (qp_implies
[i
].p1
== p1
9832 && qp_implies
[i
].p2
== p2
9833 && qp_implies
[i
].path
== md
.path
9834 && !qp_implies
[i
].p2_branched
)
9838 if (qp_implieslen
== qp_impliestotlen
)
9840 qp_impliestotlen
+= 20;
9841 qp_implies
= (struct qp_imply
*)
9842 xrealloc ((void *) qp_implies
,
9843 qp_impliestotlen
* sizeof (struct qp_imply
));
9846 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9847 qp_implies
[qp_implieslen
].p1
= p1
;
9848 qp_implies
[qp_implieslen
].p2
= p2
;
9849 qp_implies
[qp_implieslen
].path
= md
.path
;
9850 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9852 /* Add in the implied transitive relations; for everything that p2 implies,
9853 make p1 imply that, too; for everything that implies p1, make it imply p2
9855 for (i
= 0; i
< qp_implieslen
; i
++)
9857 if (qp_implies
[i
].p1
== p2
)
9858 add_qp_imply (p1
, qp_implies
[i
].p2
);
9859 if (qp_implies
[i
].p2
== p1
)
9860 add_qp_imply (qp_implies
[i
].p1
, p2
);
9862 /* Add in mutex relations implied by this implies relation; for each mutex
9863 relation containing p2, duplicate it and replace p2 with p1. */
9864 bit
= (valueT
) 1 << p1
;
9865 mask
= (valueT
) 1 << p2
;
9866 for (i
= 0; i
< qp_mutexeslen
; i
++)
9868 if (qp_mutexes
[i
].prmask
& mask
)
9869 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9873 /* Add the PRs specified in the mask to the mutex list; this means that only
9874 one of the PRs can be true at any time. PR0 should never be included in
9884 if (qp_mutexeslen
== qp_mutexestotlen
)
9886 qp_mutexestotlen
+= 20;
9887 qp_mutexes
= (struct qpmutex
*)
9888 xrealloc ((void *) qp_mutexes
,
9889 qp_mutexestotlen
* sizeof (struct qpmutex
));
9893 fprintf (stderr
, " Registering mutex on");
9894 print_prmask (mask
);
9895 fprintf (stderr
, "\n");
9897 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9898 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9902 has_suffix_p (name
, suffix
)
9906 size_t namelen
= strlen (name
);
9907 size_t sufflen
= strlen (suffix
);
9909 if (namelen
<= sufflen
)
9911 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9915 clear_register_values ()
9919 fprintf (stderr
, " Clearing register values\n");
9920 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9921 gr_values
[i
].known
= 0;
9924 /* Keep track of register values/changes which affect DV tracking.
9926 optimization note: should add a flag to classes of insns where otherwise we
9927 have to examine a group of strings to identify them. */
9930 note_register_values (idesc
)
9931 struct ia64_opcode
*idesc
;
9933 valueT qp_changemask
= 0;
9936 /* Invalidate values for registers being written to. */
9937 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9939 if (idesc
->operands
[i
] == IA64_OPND_R1
9940 || idesc
->operands
[i
] == IA64_OPND_R2
9941 || idesc
->operands
[i
] == IA64_OPND_R3
)
9943 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9944 if (regno
> 0 && regno
< NELEMS (gr_values
))
9945 gr_values
[regno
].known
= 0;
9947 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9949 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9950 if (regno
> 0 && regno
< 4)
9951 gr_values
[regno
].known
= 0;
9953 else if (idesc
->operands
[i
] == IA64_OPND_P1
9954 || idesc
->operands
[i
] == IA64_OPND_P2
)
9956 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9957 qp_changemask
|= (valueT
) 1 << regno
;
9959 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9961 if (idesc
->operands
[2] & (valueT
) 0x10000)
9962 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9964 qp_changemask
= idesc
->operands
[2];
9967 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9969 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9970 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9972 qp_changemask
= idesc
->operands
[1];
9973 qp_changemask
&= ~(valueT
) 0xFFFF;
9978 /* Always clear qp branch flags on any PR change. */
9979 /* FIXME there may be exceptions for certain compares. */
9980 clear_qp_branch_flag (qp_changemask
);
9982 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9983 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9985 qp_changemask
|= ~(valueT
) 0xFFFF;
9986 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9988 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9989 gr_values
[i
].known
= 0;
9991 clear_qp_mutex (qp_changemask
);
9992 clear_qp_implies (qp_changemask
, qp_changemask
);
9994 /* After a call, all register values are undefined, except those marked
9996 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9997 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9999 /* FIXME keep GR values which are marked as "safe_across_calls" */
10000 clear_register_values ();
10001 clear_qp_mutex (~qp_safe_across_calls
);
10002 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
10003 clear_qp_branch_flag (~qp_safe_across_calls
);
10005 else if (is_interruption_or_rfi (idesc
)
10006 || is_taken_branch (idesc
))
10008 clear_register_values ();
10009 clear_qp_mutex (~(valueT
) 0);
10010 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
10012 /* Look for mutex and implies relations. */
10013 else if ((idesc
->operands
[0] == IA64_OPND_P1
10014 || idesc
->operands
[0] == IA64_OPND_P2
)
10015 && (idesc
->operands
[1] == IA64_OPND_P1
10016 || idesc
->operands
[1] == IA64_OPND_P2
))
10018 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
10019 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
10020 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
10021 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
10023 /* If both PRs are PR0, we can't really do anything. */
10024 if (p1
== 0 && p2
== 0)
10027 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
10029 /* In general, clear mutexes and implies which include P1 or P2,
10030 with the following exceptions. */
10031 else if (has_suffix_p (idesc
->name
, ".or.andcm")
10032 || has_suffix_p (idesc
->name
, ".and.orcm"))
10034 clear_qp_implies (p2mask
, p1mask
);
10036 else if (has_suffix_p (idesc
->name
, ".andcm")
10037 || has_suffix_p (idesc
->name
, ".and"))
10039 clear_qp_implies (0, p1mask
| p2mask
);
10041 else if (has_suffix_p (idesc
->name
, ".orcm")
10042 || has_suffix_p (idesc
->name
, ".or"))
10044 clear_qp_mutex (p1mask
| p2mask
);
10045 clear_qp_implies (p1mask
| p2mask
, 0);
10051 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
10053 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10054 if (p1
== 0 || p2
== 0)
10055 clear_qp_mutex (p1mask
| p2mask
);
10057 added
= update_qp_mutex (p1mask
| p2mask
);
10059 if (CURR_SLOT
.qp_regno
== 0
10060 || has_suffix_p (idesc
->name
, ".unc"))
10062 if (added
== 0 && p1
&& p2
)
10063 add_qp_mutex (p1mask
| p2mask
);
10064 if (CURR_SLOT
.qp_regno
!= 0)
10067 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
10069 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10074 /* Look for mov imm insns into GRs. */
10075 else if (idesc
->operands
[0] == IA64_OPND_R1
10076 && (idesc
->operands
[1] == IA64_OPND_IMM22
10077 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10078 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10079 && (strcmp (idesc
->name
, "mov") == 0
10080 || strcmp (idesc
->name
, "movl") == 0))
10082 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10083 if (regno
> 0 && regno
< NELEMS (gr_values
))
10085 gr_values
[regno
].known
= 1;
10086 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10087 gr_values
[regno
].path
= md
.path
;
10090 fprintf (stderr
, " Know gr%d = ", regno
);
10091 fprintf_vma (stderr
, gr_values
[regno
].value
);
10092 fputs ("\n", stderr
);
10096 /* Look for dep.z imm insns. */
10097 else if (idesc
->operands
[0] == IA64_OPND_R1
10098 && idesc
->operands
[1] == IA64_OPND_IMM8
10099 && strcmp (idesc
->name
, "dep.z") == 0)
10101 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10102 if (regno
> 0 && regno
< NELEMS (gr_values
))
10104 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10106 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10107 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10108 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10109 gr_values
[regno
].known
= 1;
10110 gr_values
[regno
].value
= value
;
10111 gr_values
[regno
].path
= md
.path
;
10114 fprintf (stderr
, " Know gr%d = ", regno
);
10115 fprintf_vma (stderr
, gr_values
[regno
].value
);
10116 fputs ("\n", stderr
);
10122 clear_qp_mutex (qp_changemask
);
10123 clear_qp_implies (qp_changemask
, qp_changemask
);
10127 /* Return whether the given predicate registers are currently mutex. */
10130 qp_mutex (p1
, p2
, path
)
10140 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10141 for (i
= 0; i
< qp_mutexeslen
; i
++)
10143 if (qp_mutexes
[i
].path
>= path
10144 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10151 /* Return whether the given resource is in the given insn's list of chks
10152 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10156 resources_match (rs
, idesc
, note
, qp_regno
, path
)
10158 struct ia64_opcode
*idesc
;
10163 struct rsrc specs
[MAX_SPECS
];
10166 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10167 we don't need to check. One exception is note 11, which indicates that
10168 target predicates are written regardless of PR[qp]. */
10169 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10173 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10174 while (count
-- > 0)
10176 /* UNAT checking is a bit more specific than other resources */
10177 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10178 && specs
[count
].mem_offset
.hint
10179 && rs
->mem_offset
.hint
)
10181 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10183 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10184 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10191 /* Skip apparent PR write conflicts where both writes are an AND or both
10192 writes are an OR. */
10193 if (rs
->dependency
->specifier
== IA64_RS_PR
10194 || rs
->dependency
->specifier
== IA64_RS_PRr
10195 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10197 if (specs
[count
].cmp_type
!= CMP_NONE
10198 && specs
[count
].cmp_type
== rs
->cmp_type
)
10201 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10202 dv_mode
[rs
->dependency
->mode
],
10203 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10204 specs
[count
].index
: 63);
10209 " %s on parallel compare conflict %s vs %s on PR%d\n",
10210 dv_mode
[rs
->dependency
->mode
],
10211 dv_cmp_type
[rs
->cmp_type
],
10212 dv_cmp_type
[specs
[count
].cmp_type
],
10213 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10214 specs
[count
].index
: 63);
10218 /* If either resource is not specific, conservatively assume a conflict
10220 if (!specs
[count
].specific
|| !rs
->specific
)
10222 else if (specs
[count
].index
== rs
->index
)
10229 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10230 insert a stop to create the break. Update all resource dependencies
10231 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10232 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10233 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10237 insn_group_break (insert_stop
, qp_regno
, save_current
)
10244 if (insert_stop
&& md
.num_slots_in_use
> 0)
10245 PREV_SLOT
.end_of_insn_group
= 1;
10249 fprintf (stderr
, " Insn group break%s",
10250 (insert_stop
? " (w/stop)" : ""));
10252 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10253 fprintf (stderr
, "\n");
10257 while (i
< regdepslen
)
10259 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10262 && regdeps
[i
].qp_regno
!= qp_regno
)
10269 && CURR_SLOT
.src_file
== regdeps
[i
].file
10270 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10276 /* clear dependencies which are automatically cleared by a stop, or
10277 those that have reached the appropriate state of insn serialization */
10278 if (dep
->semantics
== IA64_DVS_IMPLIED
10279 || dep
->semantics
== IA64_DVS_IMPLIEDF
10280 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10282 print_dependency ("Removing", i
);
10283 regdeps
[i
] = regdeps
[--regdepslen
];
10287 if (dep
->semantics
== IA64_DVS_DATA
10288 || dep
->semantics
== IA64_DVS_INSTR
10289 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10291 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10292 regdeps
[i
].insn_srlz
= STATE_STOP
;
10293 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10294 regdeps
[i
].data_srlz
= STATE_STOP
;
10301 /* Add the given resource usage spec to the list of active dependencies. */
10304 mark_resource (idesc
, dep
, spec
, depind
, path
)
10305 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10306 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10311 if (regdepslen
== regdepstotlen
)
10313 regdepstotlen
+= 20;
10314 regdeps
= (struct rsrc
*)
10315 xrealloc ((void *) regdeps
,
10316 regdepstotlen
* sizeof (struct rsrc
));
10319 regdeps
[regdepslen
] = *spec
;
10320 regdeps
[regdepslen
].depind
= depind
;
10321 regdeps
[regdepslen
].path
= path
;
10322 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10323 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10325 print_dependency ("Adding", regdepslen
);
10331 print_dependency (action
, depind
)
10332 const char *action
;
10337 fprintf (stderr
, " %s %s '%s'",
10338 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10339 (regdeps
[depind
].dependency
)->name
);
10340 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10341 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10342 if (regdeps
[depind
].mem_offset
.hint
)
10344 fputs (" ", stderr
);
10345 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10346 fputs ("+", stderr
);
10347 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10349 fprintf (stderr
, "\n");
10354 instruction_serialization ()
10358 fprintf (stderr
, " Instruction serialization\n");
10359 for (i
= 0; i
< regdepslen
; i
++)
10360 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10361 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10365 data_serialization ()
10369 fprintf (stderr
, " Data serialization\n");
10370 while (i
< regdepslen
)
10372 if (regdeps
[i
].data_srlz
== STATE_STOP
10373 /* Note: as of 991210, all "other" dependencies are cleared by a
10374 data serialization. This might change with new tables */
10375 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10377 print_dependency ("Removing", i
);
10378 regdeps
[i
] = regdeps
[--regdepslen
];
10385 /* Insert stops and serializations as needed to avoid DVs. */
10388 remove_marked_resource (rs
)
10391 switch (rs
->dependency
->semantics
)
10393 case IA64_DVS_SPECIFIC
:
10395 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10396 /* ...fall through... */
10397 case IA64_DVS_INSTR
:
10399 fprintf (stderr
, "Inserting instr serialization\n");
10400 if (rs
->insn_srlz
< STATE_STOP
)
10401 insn_group_break (1, 0, 0);
10402 if (rs
->insn_srlz
< STATE_SRLZ
)
10404 struct slot oldslot
= CURR_SLOT
;
10405 /* Manually jam a srlz.i insn into the stream */
10406 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10407 CURR_SLOT
.user_template
= -1;
10408 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10409 instruction_serialization ();
10410 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10411 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10412 emit_one_bundle ();
10413 CURR_SLOT
= oldslot
;
10415 insn_group_break (1, 0, 0);
10417 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10418 "other" types of DV are eliminated
10419 by a data serialization */
10420 case IA64_DVS_DATA
:
10422 fprintf (stderr
, "Inserting data serialization\n");
10423 if (rs
->data_srlz
< STATE_STOP
)
10424 insn_group_break (1, 0, 0);
10426 struct slot oldslot
= CURR_SLOT
;
10427 /* Manually jam a srlz.d insn into the stream */
10428 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10429 CURR_SLOT
.user_template
= -1;
10430 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10431 data_serialization ();
10432 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10433 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10434 emit_one_bundle ();
10435 CURR_SLOT
= oldslot
;
10438 case IA64_DVS_IMPLIED
:
10439 case IA64_DVS_IMPLIEDF
:
10441 fprintf (stderr
, "Inserting stop\n");
10442 insn_group_break (1, 0, 0);
10449 /* Check the resources used by the given opcode against the current dependency
10452 The check is run once for each execution path encountered. In this case,
10453 a unique execution path is the sequence of instructions following a code
10454 entry point, e.g. the following has three execution paths, one starting
10455 at L0, one at L1, and one at L2.
10464 check_dependencies (idesc
)
10465 struct ia64_opcode
*idesc
;
10467 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10471 /* Note that the number of marked resources may change within the
10472 loop if in auto mode. */
10474 while (i
< regdepslen
)
10476 struct rsrc
*rs
= ®deps
[i
];
10477 const struct ia64_dependency
*dep
= rs
->dependency
;
10480 int start_over
= 0;
10482 if (dep
->semantics
== IA64_DVS_NONE
10483 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10489 note
= NOTE (opdeps
->chks
[chkind
]);
10491 /* Check this resource against each execution path seen thus far. */
10492 for (path
= 0; path
<= md
.path
; path
++)
10496 /* If the dependency wasn't on the path being checked, ignore it. */
10497 if (rs
->path
< path
)
10500 /* If the QP for this insn implies a QP which has branched, don't
10501 bother checking. Ed. NOTE: I don't think this check is terribly
10502 useful; what's the point of generating code which will only be
10503 reached if its QP is zero?
10504 This code was specifically inserted to handle the following code,
10505 based on notes from Intel's DV checking code, where p1 implies p2.
10511 if (CURR_SLOT
.qp_regno
!= 0)
10515 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10517 if (qp_implies
[implies
].path
>= path
10518 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10519 && qp_implies
[implies
].p2_branched
)
10529 if ((matchtype
= resources_match (rs
, idesc
, note
,
10530 CURR_SLOT
.qp_regno
, path
)) != 0)
10533 char pathmsg
[256] = "";
10534 char indexmsg
[256] = "";
10535 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10538 sprintf (pathmsg
, " when entry is at label '%s'",
10539 md
.entry_labels
[path
- 1]);
10540 if (matchtype
== 1 && rs
->index
>= 0)
10541 sprintf (indexmsg
, ", specific resource number is %d",
10543 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10545 (certain
? "violates" : "may violate"),
10546 dv_mode
[dep
->mode
], dep
->name
,
10547 dv_sem
[dep
->semantics
],
10548 pathmsg
, indexmsg
);
10550 if (md
.explicit_mode
)
10552 as_warn ("%s", msg
);
10553 if (path
< md
.path
)
10554 as_warn (_("Only the first path encountering the conflict "
10556 as_warn_where (rs
->file
, rs
->line
,
10557 _("This is the location of the "
10558 "conflicting usage"));
10559 /* Don't bother checking other paths, to avoid duplicating
10560 the same warning */
10566 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10568 remove_marked_resource (rs
);
10570 /* since the set of dependencies has changed, start over */
10571 /* FIXME -- since we're removing dvs as we go, we
10572 probably don't really need to start over... */
10585 /* Register new dependencies based on the given opcode. */
10588 mark_resources (idesc
)
10589 struct ia64_opcode
*idesc
;
10592 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10593 int add_only_qp_reads
= 0;
10595 /* A conditional branch only uses its resources if it is taken; if it is
10596 taken, we stop following that path. The other branch types effectively
10597 *always* write their resources. If it's not taken, register only QP
10599 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10601 add_only_qp_reads
= 1;
10605 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10607 for (i
= 0; i
< opdeps
->nregs
; i
++)
10609 const struct ia64_dependency
*dep
;
10610 struct rsrc specs
[MAX_SPECS
];
10615 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10616 note
= NOTE (opdeps
->regs
[i
]);
10618 if (add_only_qp_reads
10619 && !(dep
->mode
== IA64_DV_WAR
10620 && (dep
->specifier
== IA64_RS_PR
10621 || dep
->specifier
== IA64_RS_PRr
10622 || dep
->specifier
== IA64_RS_PR63
)))
10625 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10627 while (count
-- > 0)
10629 mark_resource (idesc
, dep
, &specs
[count
],
10630 DEP (opdeps
->regs
[i
]), md
.path
);
10633 /* The execution path may affect register values, which may in turn
10634 affect which indirect-access resources are accessed. */
10635 switch (dep
->specifier
)
10639 case IA64_RS_CPUID
:
10647 for (path
= 0; path
< md
.path
; path
++)
10649 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10650 while (count
-- > 0)
10651 mark_resource (idesc
, dep
, &specs
[count
],
10652 DEP (opdeps
->regs
[i
]), path
);
10659 /* Remove dependencies when they no longer apply. */
10662 update_dependencies (idesc
)
10663 struct ia64_opcode
*idesc
;
10667 if (strcmp (idesc
->name
, "srlz.i") == 0)
10669 instruction_serialization ();
10671 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10673 data_serialization ();
10675 else if (is_interruption_or_rfi (idesc
)
10676 || is_taken_branch (idesc
))
10678 /* Although technically the taken branch doesn't clear dependencies
10679 which require a srlz.[id], we don't follow the branch; the next
10680 instruction is assumed to start with a clean slate. */
10684 else if (is_conditional_branch (idesc
)
10685 && CURR_SLOT
.qp_regno
!= 0)
10687 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10689 for (i
= 0; i
< qp_implieslen
; i
++)
10691 /* If the conditional branch's predicate is implied by the predicate
10692 in an existing dependency, remove that dependency. */
10693 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10696 /* Note that this implied predicate takes a branch so that if
10697 a later insn generates a DV but its predicate implies this
10698 one, we can avoid the false DV warning. */
10699 qp_implies
[i
].p2_branched
= 1;
10700 while (depind
< regdepslen
)
10702 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10704 print_dependency ("Removing", depind
);
10705 regdeps
[depind
] = regdeps
[--regdepslen
];
10712 /* Any marked resources which have this same predicate should be
10713 cleared, provided that the QP hasn't been modified between the
10714 marking instruction and the branch. */
10717 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10722 while (i
< regdepslen
)
10724 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10725 && regdeps
[i
].link_to_qp_branch
10726 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10727 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10729 /* Treat like a taken branch */
10730 print_dependency ("Removing", i
);
10731 regdeps
[i
] = regdeps
[--regdepslen
];
10740 /* Examine the current instruction for dependency violations. */
10744 struct ia64_opcode
*idesc
;
10748 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10749 idesc
->name
, CURR_SLOT
.src_line
,
10750 idesc
->dependencies
->nchks
,
10751 idesc
->dependencies
->nregs
);
10754 /* Look through the list of currently marked resources; if the current
10755 instruction has the dependency in its chks list which uses that resource,
10756 check against the specific resources used. */
10757 check_dependencies (idesc
);
10759 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10760 then add them to the list of marked resources. */
10761 mark_resources (idesc
);
10763 /* There are several types of dependency semantics, and each has its own
10764 requirements for being cleared
10766 Instruction serialization (insns separated by interruption, rfi, or
10767 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10769 Data serialization (instruction serialization, or writer + srlz.d +
10770 reader, where writer and srlz.d are in separate groups) clears
10771 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10772 always be the case).
10774 Instruction group break (groups separated by stop, taken branch,
10775 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10777 update_dependencies (idesc
);
10779 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10780 warning. Keep track of as many as possible that are useful. */
10781 note_register_values (idesc
);
10783 /* We don't need or want this anymore. */
10784 md
.mem_offset
.hint
= 0;
10789 /* Translate one line of assembly. Pseudo ops and labels do not show
10795 char *saved_input_line_pointer
, *mnemonic
;
10796 const struct pseudo_opcode
*pdesc
;
10797 struct ia64_opcode
*idesc
;
10798 unsigned char qp_regno
;
10799 unsigned int flags
;
10802 saved_input_line_pointer
= input_line_pointer
;
10803 input_line_pointer
= str
;
10805 /* extract the opcode (mnemonic): */
10807 mnemonic
= input_line_pointer
;
10808 ch
= get_symbol_end ();
10809 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10812 *input_line_pointer
= ch
;
10813 (*pdesc
->handler
) (pdesc
->arg
);
10817 /* Find the instruction descriptor matching the arguments. */
10819 idesc
= ia64_find_opcode (mnemonic
);
10820 *input_line_pointer
= ch
;
10823 as_bad ("Unknown opcode `%s'", mnemonic
);
10827 idesc
= parse_operands (idesc
);
10831 /* Handle the dynamic ops we can handle now: */
10832 if (idesc
->type
== IA64_TYPE_DYN
)
10834 if (strcmp (idesc
->name
, "add") == 0)
10836 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10837 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10841 ia64_free_opcode (idesc
);
10842 idesc
= ia64_find_opcode (mnemonic
);
10844 else if (strcmp (idesc
->name
, "mov") == 0)
10846 enum ia64_opnd opnd1
, opnd2
;
10849 opnd1
= idesc
->operands
[0];
10850 opnd2
= idesc
->operands
[1];
10851 if (opnd1
== IA64_OPND_AR3
)
10853 else if (opnd2
== IA64_OPND_AR3
)
10857 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10859 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10860 mnemonic
= "mov.i";
10861 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10862 mnemonic
= "mov.m";
10870 ia64_free_opcode (idesc
);
10871 idesc
= ia64_find_opcode (mnemonic
);
10872 while (idesc
!= NULL
10873 && (idesc
->operands
[0] != opnd1
10874 || idesc
->operands
[1] != opnd2
))
10875 idesc
= get_next_opcode (idesc
);
10879 else if (strcmp (idesc
->name
, "mov.i") == 0
10880 || strcmp (idesc
->name
, "mov.m") == 0)
10882 enum ia64_opnd opnd1
, opnd2
;
10885 opnd1
= idesc
->operands
[0];
10886 opnd2
= idesc
->operands
[1];
10887 if (opnd1
== IA64_OPND_AR3
)
10889 else if (opnd2
== IA64_OPND_AR3
)
10893 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10896 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10898 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10900 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10901 as_bad ("AR %d can only be accessed by %c-unit",
10902 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10906 else if (strcmp (idesc
->name
, "hint.b") == 0)
10912 case hint_b_warning
:
10913 as_warn ("hint.b may be treated as nop");
10916 as_bad ("hint.b shouldn't be used");
10922 if (md
.qp
.X_op
== O_register
)
10924 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10925 md
.qp
.X_op
= O_absent
;
10928 flags
= idesc
->flags
;
10930 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10932 /* The alignment frag has to end with a stop bit only if the
10933 next instruction after the alignment directive has to be
10934 the first instruction in an instruction group. */
10937 while (align_frag
->fr_type
!= rs_align_code
)
10939 align_frag
= align_frag
->fr_next
;
10943 /* align_frag can be NULL if there are directives in
10945 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10946 align_frag
->tc_frag_data
= 1;
10949 insn_group_break (1, 0, 0);
10953 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10955 as_bad ("`%s' cannot be predicated", idesc
->name
);
10959 /* Build the instruction. */
10960 CURR_SLOT
.qp_regno
= qp_regno
;
10961 CURR_SLOT
.idesc
= idesc
;
10962 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10963 dwarf2_where (&CURR_SLOT
.debug_line
);
10965 /* Add unwind entries, if there are any. */
10966 if (unwind
.current_entry
)
10968 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10969 unwind
.current_entry
= NULL
;
10971 if (unwind
.pending_saves
)
10973 if (unwind
.pending_saves
->next
)
10975 /* Attach the next pending save to the next slot so that its
10976 slot number will get set correctly. */
10977 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10978 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10981 unwind
.pending_saves
= NULL
;
10983 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10986 /* Check for dependency violations. */
10990 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10991 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10992 emit_one_bundle ();
10994 if ((flags
& IA64_OPCODE_LAST
) != 0)
10995 insn_group_break (1, 0, 0);
10997 md
.last_text_seg
= now_seg
;
11000 input_line_pointer
= saved_input_line_pointer
;
11003 /* Called when symbol NAME cannot be found in the symbol table.
11004 Should be used for dynamic valued symbols only. */
11007 md_undefined_symbol (name
)
11008 char *name ATTRIBUTE_UNUSED
;
11013 /* Called for any expression that can not be recognized. When the
11014 function is called, `input_line_pointer' will point to the start of
11021 switch (*input_line_pointer
)
11024 ++input_line_pointer
;
11025 expression_and_evaluate (e
);
11026 if (*input_line_pointer
!= ']')
11028 as_bad ("Closing bracket missing");
11033 if (e
->X_op
!= O_register
11034 || e
->X_add_number
< REG_GR
11035 || e
->X_add_number
> REG_GR
+ 127)
11037 as_bad ("Index must be a general register");
11038 e
->X_add_number
= REG_GR
;
11041 ++input_line_pointer
;
11052 ignore_rest_of_line ();
11055 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11056 a section symbol plus some offset. For relocs involving @fptr(),
11057 directives we don't want such adjustments since we need to have the
11058 original symbol's name in the reloc. */
11060 ia64_fix_adjustable (fix
)
11063 /* Prevent all adjustments to global symbols */
11064 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
11067 switch (fix
->fx_r_type
)
11069 case BFD_RELOC_IA64_FPTR64I
:
11070 case BFD_RELOC_IA64_FPTR32MSB
:
11071 case BFD_RELOC_IA64_FPTR32LSB
:
11072 case BFD_RELOC_IA64_FPTR64MSB
:
11073 case BFD_RELOC_IA64_FPTR64LSB
:
11074 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11075 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11085 ia64_force_relocation (fix
)
11088 switch (fix
->fx_r_type
)
11090 case BFD_RELOC_IA64_FPTR64I
:
11091 case BFD_RELOC_IA64_FPTR32MSB
:
11092 case BFD_RELOC_IA64_FPTR32LSB
:
11093 case BFD_RELOC_IA64_FPTR64MSB
:
11094 case BFD_RELOC_IA64_FPTR64LSB
:
11096 case BFD_RELOC_IA64_LTOFF22
:
11097 case BFD_RELOC_IA64_LTOFF64I
:
11098 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11099 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11100 case BFD_RELOC_IA64_PLTOFF22
:
11101 case BFD_RELOC_IA64_PLTOFF64I
:
11102 case BFD_RELOC_IA64_PLTOFF64MSB
:
11103 case BFD_RELOC_IA64_PLTOFF64LSB
:
11105 case BFD_RELOC_IA64_LTOFF22X
:
11106 case BFD_RELOC_IA64_LDXMOV
:
11113 return generic_force_reloc (fix
);
11116 /* Decide from what point a pc-relative relocation is relative to,
11117 relative to the pc-relative fixup. Er, relatively speaking. */
11119 ia64_pcrel_from_section (fix
, sec
)
11123 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11125 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11132 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11134 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11138 expr
.X_op
= O_pseudo_fixup
;
11139 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11140 expr
.X_add_number
= 0;
11141 expr
.X_add_symbol
= symbol
;
11142 emit_expr (&expr
, size
);
11145 /* This is called whenever some data item (not an instruction) needs a
11146 fixup. We pick the right reloc code depending on the byteorder
11147 currently in effect. */
11149 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
11155 bfd_reloc_code_real_type code
;
11160 /* There are no reloc for 8 and 16 bit quantities, but we allow
11161 them here since they will work fine as long as the expression
11162 is fully defined at the end of the pass over the source file. */
11163 case 1: code
= BFD_RELOC_8
; break;
11164 case 2: code
= BFD_RELOC_16
; break;
11166 if (target_big_endian
)
11167 code
= BFD_RELOC_IA64_DIR32MSB
;
11169 code
= BFD_RELOC_IA64_DIR32LSB
;
11173 /* In 32-bit mode, data8 could mean function descriptors too. */
11174 if (exp
->X_op
== O_pseudo_fixup
11175 && exp
->X_op_symbol
11176 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11177 && !(md
.flags
& EF_IA_64_ABI64
))
11179 if (target_big_endian
)
11180 code
= BFD_RELOC_IA64_IPLTMSB
;
11182 code
= BFD_RELOC_IA64_IPLTLSB
;
11183 exp
->X_op
= O_symbol
;
11188 if (target_big_endian
)
11189 code
= BFD_RELOC_IA64_DIR64MSB
;
11191 code
= BFD_RELOC_IA64_DIR64LSB
;
11196 if (exp
->X_op
== O_pseudo_fixup
11197 && exp
->X_op_symbol
11198 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11200 if (target_big_endian
)
11201 code
= BFD_RELOC_IA64_IPLTMSB
;
11203 code
= BFD_RELOC_IA64_IPLTLSB
;
11204 exp
->X_op
= O_symbol
;
11210 as_bad ("Unsupported fixup size %d", nbytes
);
11211 ignore_rest_of_line ();
11215 if (exp
->X_op
== O_pseudo_fixup
)
11217 exp
->X_op
= O_symbol
;
11218 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11219 /* ??? If code unchanged, unsupported. */
11222 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11223 /* We need to store the byte order in effect in case we're going
11224 to fix an 8 or 16 bit relocation (for which there no real
11225 relocs available). See md_apply_fix(). */
11226 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11229 /* Return the actual relocation we wish to associate with the pseudo
11230 reloc described by SYM and R_TYPE. SYM should be one of the
11231 symbols in the pseudo_func array, or NULL. */
11233 static bfd_reloc_code_real_type
11234 ia64_gen_real_reloc_type (sym
, r_type
)
11235 struct symbol
*sym
;
11236 bfd_reloc_code_real_type r_type
;
11238 bfd_reloc_code_real_type
new = 0;
11239 const char *type
= NULL
, *suffix
= "";
11246 switch (S_GET_VALUE (sym
))
11248 case FUNC_FPTR_RELATIVE
:
11251 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11252 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11253 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11254 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11255 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11256 default: type
= "FPTR"; break;
11260 case FUNC_GP_RELATIVE
:
11263 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11264 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11265 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11266 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11267 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11268 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11269 default: type
= "GPREL"; break;
11273 case FUNC_LT_RELATIVE
:
11276 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11277 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11278 default: type
= "LTOFF"; break;
11282 case FUNC_LT_RELATIVE_X
:
11285 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11286 default: type
= "LTOFF"; suffix
= "X"; break;
11290 case FUNC_PC_RELATIVE
:
11293 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11294 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11295 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11296 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11297 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11298 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11299 default: type
= "PCREL"; break;
11303 case FUNC_PLT_RELATIVE
:
11306 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11307 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11308 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11309 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11310 default: type
= "PLTOFF"; break;
11314 case FUNC_SEC_RELATIVE
:
11317 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11318 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11319 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11320 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11321 default: type
= "SECREL"; break;
11325 case FUNC_SEG_RELATIVE
:
11328 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11329 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11330 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11331 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11332 default: type
= "SEGREL"; break;
11336 case FUNC_LTV_RELATIVE
:
11339 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11340 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11341 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11342 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11343 default: type
= "LTV"; break;
11347 case FUNC_LT_FPTR_RELATIVE
:
11350 case BFD_RELOC_IA64_IMM22
:
11351 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11352 case BFD_RELOC_IA64_IMM64
:
11353 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11354 case BFD_RELOC_IA64_DIR32MSB
:
11355 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11356 case BFD_RELOC_IA64_DIR32LSB
:
11357 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11358 case BFD_RELOC_IA64_DIR64MSB
:
11359 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11360 case BFD_RELOC_IA64_DIR64LSB
:
11361 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11363 type
= "LTOFF_FPTR"; break;
11367 case FUNC_TP_RELATIVE
:
11370 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11371 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11372 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11373 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11374 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11375 default: type
= "TPREL"; break;
11379 case FUNC_LT_TP_RELATIVE
:
11382 case BFD_RELOC_IA64_IMM22
:
11383 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11385 type
= "LTOFF_TPREL"; break;
11389 case FUNC_DTP_MODULE
:
11392 case BFD_RELOC_IA64_DIR64MSB
:
11393 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11394 case BFD_RELOC_IA64_DIR64LSB
:
11395 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11397 type
= "DTPMOD"; break;
11401 case FUNC_LT_DTP_MODULE
:
11404 case BFD_RELOC_IA64_IMM22
:
11405 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11407 type
= "LTOFF_DTPMOD"; break;
11411 case FUNC_DTP_RELATIVE
:
11414 case BFD_RELOC_IA64_DIR32MSB
:
11415 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11416 case BFD_RELOC_IA64_DIR32LSB
:
11417 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11418 case BFD_RELOC_IA64_DIR64MSB
:
11419 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11420 case BFD_RELOC_IA64_DIR64LSB
:
11421 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11422 case BFD_RELOC_IA64_IMM14
:
11423 new = BFD_RELOC_IA64_DTPREL14
; break;
11424 case BFD_RELOC_IA64_IMM22
:
11425 new = BFD_RELOC_IA64_DTPREL22
; break;
11426 case BFD_RELOC_IA64_IMM64
:
11427 new = BFD_RELOC_IA64_DTPREL64I
; break;
11429 type
= "DTPREL"; break;
11433 case FUNC_LT_DTP_RELATIVE
:
11436 case BFD_RELOC_IA64_IMM22
:
11437 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11439 type
= "LTOFF_DTPREL"; break;
11443 case FUNC_IPLT_RELOC
:
11446 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11447 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11448 default: type
= "IPLT"; break;
11466 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11467 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11468 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11469 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11470 case BFD_RELOC_UNUSED
: width
= 13; break;
11471 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11472 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11473 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11477 /* This should be an error, but since previously there wasn't any
11478 diagnostic here, dont't make it fail because of this for now. */
11479 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11484 /* Here is where generate the appropriate reloc for pseudo relocation
11487 ia64_validate_fix (fix
)
11490 switch (fix
->fx_r_type
)
11492 case BFD_RELOC_IA64_FPTR64I
:
11493 case BFD_RELOC_IA64_FPTR32MSB
:
11494 case BFD_RELOC_IA64_FPTR64LSB
:
11495 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11496 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11497 if (fix
->fx_offset
!= 0)
11498 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11499 "No addend allowed in @fptr() relocation");
11507 fix_insn (fix
, odesc
, value
)
11509 const struct ia64_operand
*odesc
;
11512 bfd_vma insn
[3], t0
, t1
, control_bits
;
11517 slot
= fix
->fx_where
& 0x3;
11518 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11520 /* Bundles are always in little-endian byte order */
11521 t0
= bfd_getl64 (fixpos
);
11522 t1
= bfd_getl64 (fixpos
+ 8);
11523 control_bits
= t0
& 0x1f;
11524 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11525 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11526 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11529 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11531 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11532 insn
[2] |= (((value
& 0x7f) << 13)
11533 | (((value
>> 7) & 0x1ff) << 27)
11534 | (((value
>> 16) & 0x1f) << 22)
11535 | (((value
>> 21) & 0x1) << 21)
11536 | (((value
>> 63) & 0x1) << 36));
11538 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11540 if (value
& ~0x3fffffffffffffffULL
)
11541 err
= "integer operand out of range";
11542 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11543 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11545 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11548 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11549 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11550 | (((value
>> 0) & 0xfffff) << 13));
11553 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11556 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11558 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11559 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11560 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11561 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11564 /* Attempt to simplify or even eliminate a fixup. The return value is
11565 ignored; perhaps it was once meaningful, but now it is historical.
11566 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11568 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11572 md_apply_fix (fix
, valP
, seg
)
11575 segT seg ATTRIBUTE_UNUSED
;
11578 valueT value
= *valP
;
11580 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11584 switch (fix
->fx_r_type
)
11586 case BFD_RELOC_IA64_PCREL21B
: break;
11587 case BFD_RELOC_IA64_PCREL21BI
: break;
11588 case BFD_RELOC_IA64_PCREL21F
: break;
11589 case BFD_RELOC_IA64_PCREL21M
: break;
11590 case BFD_RELOC_IA64_PCREL60B
: break;
11591 case BFD_RELOC_IA64_PCREL22
: break;
11592 case BFD_RELOC_IA64_PCREL64I
: break;
11593 case BFD_RELOC_IA64_PCREL32MSB
: break;
11594 case BFD_RELOC_IA64_PCREL32LSB
: break;
11595 case BFD_RELOC_IA64_PCREL64MSB
: break;
11596 case BFD_RELOC_IA64_PCREL64LSB
: break;
11598 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11605 switch (fix
->fx_r_type
)
11607 case BFD_RELOC_UNUSED
:
11608 /* This must be a TAG13 or TAG13b operand. There are no external
11609 relocs defined for them, so we must give an error. */
11610 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11611 "%s must have a constant value",
11612 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11616 case BFD_RELOC_IA64_TPREL14
:
11617 case BFD_RELOC_IA64_TPREL22
:
11618 case BFD_RELOC_IA64_TPREL64I
:
11619 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11620 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11621 case BFD_RELOC_IA64_DTPREL14
:
11622 case BFD_RELOC_IA64_DTPREL22
:
11623 case BFD_RELOC_IA64_DTPREL64I
:
11624 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11625 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11632 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11634 if (fix
->tc_fix_data
.bigendian
)
11635 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11637 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11642 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11647 /* Generate the BFD reloc to be stuck in the object file from the
11648 fixup used internally in the assembler. */
11651 tc_gen_reloc (sec
, fixp
)
11652 asection
*sec ATTRIBUTE_UNUSED
;
11657 reloc
= xmalloc (sizeof (*reloc
));
11658 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11659 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11660 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11661 reloc
->addend
= fixp
->fx_offset
;
11662 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11666 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11667 "Cannot represent %s relocation in object file",
11668 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11673 /* Turn a string in input_line_pointer into a floating point constant
11674 of type TYPE, and store the appropriate bytes in *LIT. The number
11675 of LITTLENUMS emitted is stored in *SIZE. An error message is
11676 returned, or NULL on OK. */
11678 #define MAX_LITTLENUMS 5
11681 md_atof (type
, lit
, size
)
11686 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11716 return "Bad call to MD_ATOF()";
11718 t
= atof_ieee (input_line_pointer
, type
, words
);
11720 input_line_pointer
= t
;
11722 (*ia64_float_to_chars
) (lit
, words
, prec
);
11726 /* It is 10 byte floating point with 6 byte padding. */
11727 memset (&lit
[10], 0, 6);
11728 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11731 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11736 /* Handle ia64 specific semantics of the align directive. */
11739 ia64_md_do_align (n
, fill
, len
, max
)
11740 int n ATTRIBUTE_UNUSED
;
11741 const char *fill ATTRIBUTE_UNUSED
;
11742 int len ATTRIBUTE_UNUSED
;
11743 int max ATTRIBUTE_UNUSED
;
11745 if (subseg_text_p (now_seg
))
11746 ia64_flush_insns ();
11749 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11750 of an rs_align_code fragment. */
11753 ia64_handle_align (fragp
)
11758 const unsigned char *nop
;
11760 if (fragp
->fr_type
!= rs_align_code
)
11763 /* Check if this frag has to end with a stop bit. */
11764 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11766 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11767 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11769 /* If no paddings are needed, we check if we need a stop bit. */
11770 if (!bytes
&& fragp
->tc_frag_data
)
11772 if (fragp
->fr_fix
< 16)
11774 /* FIXME: It won't work with
11776 alloc r32=ar.pfs,1,2,4,0
11780 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11781 _("Can't add stop bit to mark end of instruction group"));
11784 /* Bundles are always in little-endian byte order. Make sure
11785 the previous bundle has the stop bit. */
11789 /* Make sure we are on a 16-byte boundary, in case someone has been
11790 putting data into a text section. */
11793 int fix
= bytes
& 15;
11794 memset (p
, 0, fix
);
11797 fragp
->fr_fix
+= fix
;
11800 /* Instruction bundles are always little-endian. */
11801 memcpy (p
, nop
, 16);
11802 fragp
->fr_var
= 16;
11806 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11811 number_to_chars_bigendian (lit
, (long) (*words
++),
11812 sizeof (LITTLENUM_TYPE
));
11813 lit
+= sizeof (LITTLENUM_TYPE
);
11818 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11823 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11824 sizeof (LITTLENUM_TYPE
));
11825 lit
+= sizeof (LITTLENUM_TYPE
);
11830 ia64_elf_section_change_hook (void)
11832 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11833 && elf_linked_to_section (now_seg
) == NULL
)
11834 elf_linked_to_section (now_seg
) = text_section
;
11835 dot_byteorder (-1);
11838 /* Check if a label should be made global. */
11840 ia64_check_label (symbolS
*label
)
11842 if (*input_line_pointer
== ':')
11844 S_SET_EXTERNAL (label
);
11845 input_line_pointer
++;
11849 /* Used to remember where .alias and .secalias directives are seen. We
11850 will rename symbol and section names when we are about to output
11851 the relocatable file. */
11854 char *file
; /* The file where the directive is seen. */
11855 unsigned int line
; /* The line number the directive is at. */
11856 const char *name
; /* The orignale name of the symbol. */
11859 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11860 .secalias. Otherwise, it is .alias. */
11862 dot_alias (int section
)
11864 char *name
, *alias
;
11868 const char *error_string
;
11871 struct hash_control
*ahash
, *nhash
;
11874 name
= input_line_pointer
;
11875 delim
= get_symbol_end ();
11876 end_name
= input_line_pointer
;
11879 if (name
== end_name
)
11881 as_bad (_("expected symbol name"));
11882 ignore_rest_of_line ();
11886 SKIP_WHITESPACE ();
11888 if (*input_line_pointer
!= ',')
11891 as_bad (_("expected comma after \"%s\""), name
);
11893 ignore_rest_of_line ();
11897 input_line_pointer
++;
11899 ia64_canonicalize_symbol_name (name
);
11901 /* We call demand_copy_C_string to check if alias string is valid.
11902 There should be a closing `"' and no `\0' in the string. */
11903 alias
= demand_copy_C_string (&len
);
11906 ignore_rest_of_line ();
11910 /* Make a copy of name string. */
11911 len
= strlen (name
) + 1;
11912 obstack_grow (¬es
, name
, len
);
11913 name
= obstack_finish (¬es
);
11918 ahash
= secalias_hash
;
11919 nhash
= secalias_name_hash
;
11924 ahash
= alias_hash
;
11925 nhash
= alias_name_hash
;
11928 /* Check if alias has been used before. */
11929 h
= (struct alias
*) hash_find (ahash
, alias
);
11932 if (strcmp (h
->name
, name
))
11933 as_bad (_("`%s' is already the alias of %s `%s'"),
11934 alias
, kind
, h
->name
);
11938 /* Check if name already has an alias. */
11939 a
= (const char *) hash_find (nhash
, name
);
11942 if (strcmp (a
, alias
))
11943 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11947 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11948 as_where (&h
->file
, &h
->line
);
11951 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11954 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11955 alias
, kind
, error_string
);
11959 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11962 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11963 alias
, kind
, error_string
);
11965 obstack_free (¬es
, name
);
11966 obstack_free (¬es
, alias
);
11969 demand_empty_rest_of_line ();
11972 /* It renames the original symbol name to its alias. */
11974 do_alias (const char *alias
, PTR value
)
11976 struct alias
*h
= (struct alias
*) value
;
11977 symbolS
*sym
= symbol_find (h
->name
);
11980 as_warn_where (h
->file
, h
->line
,
11981 _("symbol `%s' aliased to `%s' is not used"),
11984 S_SET_NAME (sym
, (char *) alias
);
11987 /* Called from write_object_file. */
11989 ia64_adjust_symtab (void)
11991 hash_traverse (alias_hash
, do_alias
);
11994 /* It renames the original section name to its alias. */
11996 do_secalias (const char *alias
, PTR value
)
11998 struct alias
*h
= (struct alias
*) value
;
11999 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
12002 as_warn_where (h
->file
, h
->line
,
12003 _("section `%s' aliased to `%s' is not used"),
12009 /* Called from write_object_file. */
12011 ia64_frob_file (void)
12013 hash_traverse (secalias_hash
, do_secalias
);