| blob | bdc99e6424686bce96702c8edfe5e7b41712d485 |
1 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
3 * config/tc-i386.h (Size64): Fix a typo in comment.
5 2006-07-12 Nick Clifton <nickc@redhat.com>
7 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
8 fixup_segment() to repeat a range check on a value that has
9 already been checked here.
11 2006-07-07 James E Wilson <wilson@specifix.com>
13 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
15 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
16 Nick Clifton <nickc@redhat.com>
18 PR binutils/2877
19 * doc/as.texi: Fix spelling typo: branchs => branches.
20 * doc/c-m68hc11.texi: Likewise.
21 * config/tc-m68hc11.c: Likewise.
22 Support old spelling of command line switch for backwards
23 compatibility.
25 2006-07-04 Thiemo Seufer <ths@mips.com>
26 David Ung <davidu@mips.com>
28 * config/tc-mips.c (s_is_linkonce): New function.
29 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
30 weak, external, and linkonce symbols.
31 (pic_need_relax): Use s_is_linkonce.
33 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
35 * doc/as.texinfo (Org): Remove space.
36 (P2align): Add "@var{abs-expr},".
38 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
40 * config/tc-i386.c (cpu_arch_tune_set): New.
41 (cpu_arch_isa): Likewise.
42 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
43 nops with short or long nop sequences based on -march=/.arch
44 and -mtune=.
45 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
46 set cpu_arch_tune and cpu_arch_tune_flags.
47 (md_parse_option): For -march=, set cpu_arch_isa and set
48 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
49 0. Set cpu_arch_tune_set to 1 for -mtune=.
50 (i386_target_format): Don't set cpu_arch_tune.
52 2006-06-23 Nigel Stephens <nigel@mips.com>
54 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
55 generated .sbss.* and .gnu.linkonce.sb.*.
57 2006-06-23 Thiemo Seufer <ths@mips.com>
58 David Ung <davidu@mips.com>
60 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
61 label_list.
62 * config/tc-mips.c (label_list): Define per-segment label_list.
63 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
64 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
65 mips_from_file_after_relocs, mips_define_label): Use per-segment
66 label_list.
68 2006-06-22 Thiemo Seufer <ths@mips.com>
70 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
71 (append_insn): Use it.
72 (md_apply_fix): Whitespace formatting.
73 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
74 mips16_extended_frag): Remove register specifier.
75 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
76 constants.
78 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
80 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
81 a directive saving VFP registers for ARMv6 or later.
82 (s_arm_unwind_save): Add parameter arch_v6 and call
83 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
84 appropriate.
85 (md_pseudo_table): Add entry for new "vsave" directive.
86 * doc/c-arm.texi: Correct error in example for "save"
87 directive (fstmdf -> fstmdx). Also document "vsave" directive.
89 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
90 Anatoly Sokolov <aesok@post.ru>
92 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
93 and atmega644p devices. Rename atmega164/atmega324 devices to
94 atmega164p/atmega324p.
95 * doc/c-avr.texi: Document new mcu and arch options.
97 2006-06-17 Nick Clifton <nickc@redhat.com>
99 * config/tc-arm.c (enum parse_operand_result): Move outside of
100 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
102 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
104 * config/tc-i386.h (processor_type): New.
105 (arch_entry): Add type.
107 * config/tc-i386.c (cpu_arch_tune): New.
108 (cpu_arch_tune_flags): Likewise.
109 (cpu_arch_isa_flags): Likewise.
110 (cpu_arch): Updated.
111 (set_cpu_arch): Also update cpu_arch_isa_flags.
112 (md_assemble): Update cpu_arch_isa_flags.
113 (OPTION_MARCH): New.
114 (OPTION_MTUNE): Likewise.
115 (md_longopts): Add -march= and -mtune=.
116 (md_parse_option): Support -march= and -mtune=.
117 (md_show_usage): Add -march=CPU/-mtune=CPU.
118 (i386_target_format): Also update cpu_arch_isa_flags,
119 cpu_arch_tune and cpu_arch_tune_flags.
121 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
123 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
125 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
127 * config/tc-arm.c (enum parse_operand_result): New.
128 (struct group_reloc_table_entry): New.
129 (enum group_reloc_type): New.
130 (group_reloc_table): New array.
131 (find_group_reloc_table_entry): New function.
132 (parse_shifter_operand_group_reloc): New function.
133 (parse_address_main): New function, incorporating code
134 from the old parse_address function. To be used via...
135 (parse_address): wrapper for parse_address_main; and
136 (parse_address_group_reloc): new function, likewise.
137 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
138 OP_ADDRGLDRS, OP_ADDRGLDC.
139 (parse_operands): Support for these new operand codes.
140 New macro po_misc_or_fail_no_backtrack.
141 (encode_arm_cp_address): Preserve group relocations.
142 (insns): Modify to use the above operand codes where group
143 relocations are permitted.
144 (md_apply_fix): Handle the group relocations
145 ALU_PC_G0_NC through LDC_SB_G2.
146 (tc_gen_reloc): Likewise.
147 (arm_force_relocation): Leave group relocations for the linker.
148 (arm_fix_adjustable): Likewise.
150 2006-06-15 Julian Brown <julian@codesourcery.com>
152 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
153 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
154 relocs properly.
156 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
158 * config/tc-i386.c (process_suffix): Don't add rex64 for
159 "xchg %rax,%rax".
161 2006-06-09 Thiemo Seufer <ths@mips.com>
163 * config/tc-mips.c (mips_ip): Maintain argument count.
165 2006-06-09 Alan Modra <amodra@bigpond.net.au>
167 * config/tc-iq2000.c: Include sb.h.
169 2006-06-08 Nigel Stephens <nigel@mips.com>
171 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
172 aliases for better compatibility with SGI tools.
174 2006-06-08 Alan Modra <amodra@bigpond.net.au>
176 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
177 * Makefile.am (GASLIBS): Expand @BFDLIB@.
178 (BFDVER_H): Delete.
179 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
180 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
181 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
182 Run "make dep-am".
183 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
184 * Makefile.in: Regenerate.
185 * doc/Makefile.in: Regenerate.
186 * configure: Regenerate.
188 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
190 * po/Make-in (pdf, ps): New dummy targets.
192 2006-06-07 Julian Brown <julian@codesourcery.com>
194 * config/tc-arm.c (stdarg.h): include.
195 (arm_it): Add uncond_value field. Add isvec and issingle to operand
196 array.
197 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
198 REG_TYPE_NSDQ (single, double or quad vector reg).
199 (reg_expected_msgs): Update.
200 (BAD_FPU): Add macro for unsupported FPU instruction error.
201 (parse_neon_type): Support 'd' as an alias for .f64.
202 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
203 sets of registers.
204 (parse_vfp_reg_list): Don't update first arg on error.
205 (parse_neon_mov): Support extra syntax for VFP moves.
206 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
207 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
208 (parse_operands): Support isvec, issingle operands fields, new parse
209 codes above.
210 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
211 msr variants.
212 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
213 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
214 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
215 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
216 shapes.
217 (neon_shape): Redefine in terms of above.
218 (neon_shape_class): New enumeration, table of shape classes.
219 (neon_shape_el): New enumeration. One element of a shape.
220 (neon_shape_el_size): Register widths of above, where appropriate.
221 (neon_shape_info): New struct. Info for shape table.
222 (neon_shape_tab): New array.
223 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
224 (neon_check_shape): Rewrite as...
225 (neon_select_shape): New function to classify instruction shapes,
226 driven by new table neon_shape_tab array.
227 (neon_quad): New function. Return 1 if shape should set Q flag in
228 instructions (or equivalent), 0 otherwise.
229 (type_chk_of_el_type): Support F64.
230 (el_type_of_type_chk): Likewise.
231 (neon_check_type): Add support for VFP type checking (VFP data
232 elements fill their containing registers).
233 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
234 in thumb mode for VFP instructions.
235 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
236 and encode the current instruction as if it were that opcode.
237 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
238 arguments, call function in PFN.
239 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
240 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
241 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
242 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
243 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
244 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
245 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
246 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
247 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
248 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
249 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
250 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
251 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
252 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
253 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
254 neon_quad.
255 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
256 between VFP and Neon turns out to belong to Neon. Perform
257 architecture check and fill in condition field if appropriate.
258 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
259 (do_neon_cvt): Add support for VFP variants of instructions.
260 (neon_cvt_flavour): Extend to cover VFP conversions.
261 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
262 vmov variants.
263 (do_neon_ldr_str): Handle single-precision VFP load/store.
264 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
265 NS_NULL not NS_IGNORE.
266 (opcode_tag): Add OT_csuffixF for operands which either take a
267 conditional suffix, or have 0xF in the condition field.
268 (md_assemble): Add support for OT_csuffixF.
269 (NCE): Replace macro with...
270 (NCE_tag, NCE, NCEF): New macros.
271 (nCE): Replace macro with...
272 (nCE_tag, nCE, nCEF): New macros.
273 (insns): Add support for VFP insns or VFP versions of insns msr,
274 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
275 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
276 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
277 VFP/Neon insns together.
279 2006-06-07 Alan Modra <amodra@bigpond.net.au>
280 Ladislav Michl <ladis@linux-mips.org>
282 * app.c: Don't include headers already included by as.h.
283 * as.c: Likewise.
284 * atof-generic.c: Likewise.
285 * cgen.c: Likewise.
286 * dwarf2dbg.c: Likewise.
287 * expr.c: Likewise.
288 * input-file.c: Likewise.
289 * input-scrub.c: Likewise.
290 * macro.c: Likewise.
291 * output-file.c: Likewise.
292 * read.c: Likewise.
293 * sb.c: Likewise.
294 * config/bfin-lex.l: Likewise.
295 * config/obj-coff.h: Likewise.
296 * config/obj-elf.h: Likewise.
297 * config/obj-som.h: Likewise.
298 * config/tc-arc.c: Likewise.
299 * config/tc-arm.c: Likewise.
300 * config/tc-avr.c: Likewise.
301 * config/tc-bfin.c: Likewise.
302 * config/tc-cris.c: Likewise.
303 * config/tc-d10v.c: Likewise.
304 * config/tc-d30v.c: Likewise.
305 * config/tc-dlx.h: Likewise.
306 * config/tc-fr30.c: Likewise.
307 * config/tc-frv.c: Likewise.
308 * config/tc-h8300.c: Likewise.
309 * config/tc-hppa.c: Likewise.
310 * config/tc-i370.c: Likewise.
311 * config/tc-i860.c: Likewise.
312 * config/tc-i960.c: Likewise.
313 * config/tc-ip2k.c: Likewise.
314 * config/tc-iq2000.c: Likewise.
315 * config/tc-m32c.c: Likewise.
316 * config/tc-m32r.c: Likewise.
317 * config/tc-maxq.c: Likewise.
318 * config/tc-mcore.c: Likewise.
319 * config/tc-mips.c: Likewise.
320 * config/tc-mmix.c: Likewise.
321 * config/tc-mn10200.c: Likewise.
322 * config/tc-mn10300.c: Likewise.
323 * config/tc-msp430.c: Likewise.
324 * config/tc-mt.c: Likewise.
325 * config/tc-ns32k.c: Likewise.
326 * config/tc-openrisc.c: Likewise.
327 * config/tc-ppc.c: Likewise.
328 * config/tc-s390.c: Likewise.
329 * config/tc-sh.c: Likewise.
330 * config/tc-sh64.c: Likewise.
331 * config/tc-sparc.c: Likewise.
332 * config/tc-tic30.c: Likewise.
333 * config/tc-tic4x.c: Likewise.
334 * config/tc-tic54x.c: Likewise.
335 * config/tc-v850.c: Likewise.
336 * config/tc-vax.c: Likewise.
337 * config/tc-xc16x.c: Likewise.
338 * config/tc-xstormy16.c: Likewise.
339 * config/tc-xtensa.c: Likewise.
340 * config/tc-z80.c: Likewise.
341 * config/tc-z8k.c: Likewise.
342 * macro.h: Don't include sb.h or ansidecl.h.
343 * sb.h: Don't include stdio.h or ansidecl.h.
344 * cond.c: Include sb.h.
345 * itbl-lex.l: Include as.h instead of other system headers.
346 * itbl-parse.y: Likewise.
347 * itbl-ops.c: Similarly.
348 * itbl-ops.h: Don't include as.h or ansidecl.h.
349 * config/bfin-defs.h: Don't include bfd.h or as.h.
350 * config/bfin-parse.y: Include as.h instead of other system headers.
352 2006-06-06 Ben Elliston <bje@au.ibm.com>
353 Anton Blanchard <anton@samba.org>
355 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
356 (md_show_usage): Document it.
357 (ppc_setup_opcodes): Test power6 opcode flag bits.
358 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
360 2006-06-06 Thiemo Seufer <ths@mips.com>
361 Chao-ying Fu <fu@mips.com>
363 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
364 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
365 (macro_build): Update comment.
366 (mips_ip): Allow DSP64 instructions for MIPS64R2.
367 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
368 CPU_HAS_MDMX.
369 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
370 MIPS_CPU_ASE_MDMX flags for sb1.
372 2006-06-05 Thiemo Seufer <ths@mips.com>
374 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
375 appropriate.
376 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
377 (mips_ip): Make overflowed/underflowed constant arguments in DSP
378 and MT instructions a fatal error. Use INSERT_OPERAND where
379 appropriate. Improve warnings for break and wait code overflows.
380 Use symbolic constant of OP_MASK_COPZ.
381 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
383 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
385 * po/Make-in (top_builddir): Define.
387 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
389 * doc/Makefile.am (TEXI2DVI): Define.
390 * doc/Makefile.in: Regenerate.
391 * doc/c-arc.texi: Fix typo.
393 2006-06-01 Alan Modra <amodra@bigpond.net.au>
395 * config/obj-ieee.c: Delete.
396 * config/obj-ieee.h: Delete.
397 * Makefile.am (OBJ_FORMATS): Remove ieee.
398 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
399 (obj-ieee.o): Remove rule.
400 * Makefile.in: Regenerate.
401 * configure.in (atof): Remove tahoe.
402 (OBJ_MAYBE_IEEE): Don't define.
403 * configure: Regenerate.
404 * config.in: Regenerate.
405 * doc/Makefile.in: Regenerate.
406 * po/POTFILES.in: Regenerate.
408 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
410 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
411 and LIBINTL_DEP everywhere.
412 (INTLLIBS): Remove.
413 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
414 * acinclude.m4: Include new gettext macros.
415 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
416 Remove local code for po/Makefile.
417 * Makefile.in, configure, doc/Makefile.in: Regenerated.
419 2006-05-30 Nick Clifton <nickc@redhat.com>
421 * po/es.po: Updated Spanish translation.
423 2006-05-06 Denis Chertykov <denisc@overta.ru>
425 * doc/c-avr.texi: New file.
426 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
427 * doc/all.texi: Set AVR
428 * doc/as.texinfo: Include c-avr.texi
430 2006-05-28 Jie Zhang <jie.zhang@analog.com>
432 * config/bfin-parse.y (check_macfunc): Loose the condition of
433 calling check_multiply_halfregs ().
435 2006-05-25 Jie Zhang <jie.zhang@analog.com>
437 * config/bfin-parse.y (asm_1): Better check and deal with
438 vector and scalar Multiply 16-Bit Operands instructions.
440 2006-05-24 Nick Clifton <nickc@redhat.com>
442 * config/tc-hppa.c: Convert to ISO C90 format.
443 * config/tc-hppa.h: Likewise.
445 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
446 Randolph Chung <randolph@tausq.org>
448 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
449 is_tls_ieoff, is_tls_leoff): Define.
450 (fix_new_hppa): Handle TLS.
451 (cons_fix_new_hppa): Likewise.
452 (pa_ip): Likewise.
453 (md_apply_fix): Handle TLS relocs.
454 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
456 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
458 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
460 2006-05-23 Thiemo Seufer <ths@mips.com>
461 David Ung <davidu@mips.com>
462 Nigel Stephens <nigel@mips.com>
464 [ gas/ChangeLog ]
465 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
466 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
467 ISA_HAS_MXHC1): New macros.
468 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
469 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
470 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
471 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
472 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
473 (mips_after_parse_args): Change default handling of float register
474 size to account for 32bit code with 64bit FP. Better sanity checking
475 of ISA/ASE/ABI option combinations.
476 (s_mipsset): Support switching of GPR and FPR sizes via
477 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
478 options.
479 (mips_elf_final_processing): We should record the use of 64bit FP
480 registers in 32bit code but we don't, because ELF header flags are
481 a scarce ressource.
482 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
483 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
484 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
485 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
486 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
487 missing -march options. Document .set arch=CPU. Move .set smartmips
488 to ASE page. Use @code for .set FOO examples.
490 2006-05-23 Jie Zhang <jie.zhang@analog.com>
492 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
493 if needed.
495 2006-05-23 Jie Zhang <jie.zhang@analog.com>
497 * config/bfin-defs.h (bfin_equals): Remove declaration.
498 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
499 * config/tc-bfin.c (bfin_name_is_register): Remove.
500 (bfin_equals): Remove.
501 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
502 (bfin_name_is_register): Remove declaration.
504 2006-05-19 Thiemo Seufer <ths@mips.com>
505 Nigel Stephens <nigel@mips.com>
507 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
508 (mips_oddfpreg_ok): New function.
509 (mips_ip): Use it.
511 2006-05-19 Thiemo Seufer <ths@mips.com>
512 David Ung <davidu@mips.com>
514 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
515 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
516 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
517 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
518 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
519 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
520 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
521 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
522 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
523 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
524 reg_names_o32, reg_names_n32n64): Define register classes.
525 (reg_lookup): New function, use register classes.
526 (md_begin): Reserve register names in the symbol table. Simplify
527 OBJ_ELF defines.
528 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
529 Use reg_lookup.
530 (mips16_ip): Use reg_lookup.
531 (tc_get_register): Likewise.
532 (tc_mips_regname_to_dw2regnum): New function.
534 2006-05-19 Thiemo Seufer <ths@mips.com>
536 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
537 Un-constify string argument.
538 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
539 Likewise.
540 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
541 Likewise.
542 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
543 Likewise.
544 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
545 Likewise.
546 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
547 Likewise.
548 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
549 Likewise.
551 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
553 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
554 cfloat/m68881 to correct architecture before using it.
556 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
558 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
559 constant values.
561 2006-05-15 Paul Brook <paul@codesourcery.com>
563 * config/tc-arm.c (arm_adjust_symtab): Use
564 bfd_is_arm_special_symbol_name.
566 2006-05-15 Bob Wilson <bob.wilson@acm.org>
568 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
569 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
570 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
571 Handle errors from calls to xtensa_opcode_is_* functions.
573 2006-05-14 Thiemo Seufer <ths@mips.com>
575 * config/tc-mips.c (macro_build): Test for currently active
576 mips16 option.
577 (mips16_ip): Reject invalid opcodes.
579 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
581 * doc/as.texinfo: Rename "Index" to "AS Index",
582 and "ABORT" to "ABORT (COFF)".
584 2006-05-11 Paul Brook <paul@codesourcery.com>
586 * config/tc-arm.c (parse_half): New function.
587 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
588 (parse_operands): Ditto.
589 (do_mov16): Reject invalid relocations.
590 (do_t_mov16): Ditto. Use Thumb reloc numbers.
591 (insns): Replace Iffff with HALF.
592 (md_apply_fix): Add MOVW and MOVT relocs.
593 (tc_gen_reloc): Ditto.
594 * doc/c-arm.texi: Document relocation operators
596 2006-05-11 Paul Brook <paul@codesourcery.com>
598 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
600 2006-05-11 Thiemo Seufer <ths@mips.com>
602 * config/tc-mips.c (append_insn): Don't check the range of j or
603 jal addresses.
605 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
607 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
608 relocs against external symbols for WinCE targets.
609 (md_apply_fix): Likewise.
611 2006-05-09 David Ung <davidu@mips.com>
613 * config/tc-mips.c (append_insn): Only warn about an out-of-range
614 j or jal address.
616 2006-05-09 Nick Clifton <nickc@redhat.com>
618 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
619 against symbols which are not going to be placed into the symbol
620 table.
622 2006-05-09 Ben Elliston <bje@au.ibm.com>
624 * expr.c (operand): Remove `if (0 && ..)' statement and
625 subsequently unused target_op label. Collapse `if (1 || ..)'
626 statement.
627 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
628 separately above the switch.
630 2006-05-08 Nick Clifton <nickc@redhat.com>
632 PR gas/2623
633 * config/tc-msp430.c (line_separator_character): Define as |.
635 2006-05-08 Thiemo Seufer <ths@mips.com>
636 Nigel Stephens <nigel@mips.com>
637 David Ung <davidu@mips.com>
639 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
640 (mips_opts): Likewise.
641 (file_ase_smartmips): New variable.
642 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
643 (macro_build): Handle SmartMIPS instructions.
644 (mips_ip): Likewise.
645 (md_longopts): Add argument handling for smartmips.
646 (md_parse_options, mips_after_parse_args): Likewise.
647 (s_mipsset): Add .set smartmips support.
648 (md_show_usage): Document -msmartmips/-mno-smartmips.
649 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
650 .set smartmips.
651 * doc/c-mips.texi: Likewise.
653 2006-05-08 Alan Modra <amodra@bigpond.net.au>
655 * write.c (relax_segment): Add pass count arg. Don't error on
656 negative org/space on first two passes.
657 (relax_seg_info): New struct.
658 (relax_seg, write_object_file): Adjust.
659 * write.h (relax_segment): Update prototype.
661 2006-05-05 Julian Brown <julian@codesourcery.com>
663 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
664 checking.
665 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
666 architecture version checks.
667 (insns): Allow overlapping instructions to be used in VFP mode.
669 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
671 PR gas/2598
672 * config/obj-elf.c (obj_elf_change_section): Allow user
673 specified SHF_ALPHA_GPREL.
675 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
677 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
678 for PMEM related expressions.
680 2006-05-05 Nick Clifton <nickc@redhat.com>
682 PR gas/2582
683 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
684 insertion of a directory separator character into a string at a
685 given offset. Uses heuristics to decide when to use a backslash
686 character rather than a forward-slash character.
687 (dwarf2_directive_loc): Use the macro.
688 (out_debug_info): Likewise.
690 2006-05-05 Thiemo Seufer <ths@mips.com>
691 David Ung <davidu@mips.com>
693 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
694 instruction.
695 (macro): Add new case M_CACHE_AB.
697 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
699 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
700 (opcode_lookup): Issue a warning for opcode with
701 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
702 identical to OT_cinfix3.
703 (TxC3w, TC3w, tC3w): New.
704 (insns): Use tC3w and TC3w for comparison instructions with
705 's' suffix.
707 2006-05-04 Alan Modra <amodra@bigpond.net.au>
709 * subsegs.h (struct frchain): Delete frch_seg.
710 (frchain_root): Delete.
711 (seg_info): Define as macro.
712 * subsegs.c (frchain_root): Delete.
713 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
714 (subsegs_begin, subseg_change): Adjust for above.
715 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
716 rather than to one big list.
717 (subseg_get): Don't special case abs, und sections.
718 (subseg_new, subseg_force_new): Don't set frchainP here.
719 (seg_info): Delete.
720 (subsegs_print_statistics): Adjust frag chain control list traversal.
721 * debug.c (dmp_frags): Likewise.
722 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
723 at frchain_root. Make use of known frchain ordering.
724 (last_frag_for_seg): Likewise.
725 (get_frag_fix): Likewise. Add seg param.
726 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
727 * write.c (chain_frchains_together_1): Adjust for struct frchain.
728 (SUB_SEGMENT_ALIGN): Likewise.
729 (subsegs_finish): Adjust frchain list traversal.
730 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
731 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
732 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
733 (xtensa_fix_b_j_loop_end_frags): Likewise.
734 (xtensa_fix_close_loop_end_frags): Likewise.
735 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
736 (retrieve_segment_info): Delete frch_seg initialisation.
738 2006-05-03 Alan Modra <amodra@bigpond.net.au>
740 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
741 * config/obj-elf.h (obj_sec_set_private_data): Delete.
742 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
743 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
745 2006-05-02 Joseph Myers <joseph@codesourcery.com>
747 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
748 here.
749 (md_apply_fix3): Multiply offset by 4 here for
750 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
752 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
753 Jan Beulich <jbeulich@novell.com>
755 * config/tc-i386.c (output_invalid_buf): Change size for
756 unsigned char.
757 * config/tc-tic30.c (output_invalid_buf): Likewise.
759 * config/tc-i386.c (output_invalid): Cast none-ascii char to
760 unsigned char.
761 * config/tc-tic30.c (output_invalid): Likewise.
763 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
765 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
766 (TEXI2POD): Use AM_MAKEINFOFLAGS.
767 (asconfig.texi): Don't set top_srcdir.
768 * doc/as.texinfo: Don't use top_srcdir.
769 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
771 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
773 * config/tc-i386.c (output_invalid_buf): Change size to 16.
774 * config/tc-tic30.c (output_invalid_buf): Likewise.
776 * config/tc-i386.c (output_invalid): Use snprintf instead of
777 sprintf.
778 * config/tc-ia64.c (declare_register_set): Likewise.
779 (emit_one_bundle): Likewise.
780 (check_dependencies): Likewise.
781 * config/tc-tic30.c (output_invalid): Likewise.
783 2006-05-02 Paul Brook <paul@codesourcery.com>
785 * config/tc-arm.c (arm_optimize_expr): New function.
786 * config/tc-arm.h (md_optimize_expr): Define
787 (arm_optimize_expr): Add prototype.
788 (TC_FORCE_RELOCATION_SUB_SAME): Define.
790 2006-05-02 Ben Elliston <bje@au.ibm.com>
792 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
793 field unsigned.
795 * sb.h (sb_list_vector): Move to sb.c.
796 * sb.c (free_list): Use type of sb_list_vector directly.
797 (sb_build): Fix off-by-one error in assertion about `size'.
799 2006-05-01 Ben Elliston <bje@au.ibm.com>
801 * listing.c (listing_listing): Remove useless loop.
802 * macro.c (macro_expand): Remove is_positional local variable.
803 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
804 and simplify surrounding expressions, where possible.
805 (assign_symbol): Likewise.
806 (s_weakref): Likewise.
807 * symbols.c (colon): Likewise.
809 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
811 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
813 2006-04-30 Thiemo Seufer <ths@mips.com>
814 David Ung <davidu@mips.com>
816 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
817 (mips_immed): New table that records various handling of udi
818 instruction patterns.
819 (mips_ip): Adds udi handling.
821 2006-04-28 Alan Modra <amodra@bigpond.net.au>
823 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
824 of list rather than beginning.
826 2006-04-26 Julian Brown <julian@codesourcery.com>
828 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
829 (is_quarter_float): Rename from above. Simplify slightly.
830 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
831 number.
832 (parse_neon_mov): Parse floating-point constants.
833 (neon_qfloat_bits): Fix encoding.
834 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
835 preference to integer encoding when using the F32 type.
837 2006-04-26 Julian Brown <julian@codesourcery.com>
839 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
840 zero-initialising structures containing it will lead to invalid types).
841 (arm_it): Add vectype to each operand.
842 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
843 defined field.
844 (neon_typed_alias): New structure. Extra information for typed
845 register aliases.
846 (reg_entry): Add neon type info field.
847 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
848 Break out alternative syntax for coprocessor registers, etc. into...
849 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
850 out from arm_reg_parse.
851 (parse_neon_type): Move. Return SUCCESS/FAIL.
852 (first_error): New function. Call to ensure first error which occurs is
853 reported.
854 (parse_neon_operand_type): Parse exactly one type.
855 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
856 (parse_typed_reg_or_scalar): New function. Handle core of both
857 arm_typed_reg_parse and parse_scalar.
858 (arm_typed_reg_parse): Parse a register with an optional type.
859 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
860 result.
861 (parse_scalar): Parse a Neon scalar with optional type.
862 (parse_reg_list): Use first_error.
863 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
864 (neon_alias_types_same): New function. Return true if two (alias) types
865 are the same.
866 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
867 of elements.
868 (insert_reg_alias): Return new reg_entry not void.
869 (insert_neon_reg_alias): New function. Insert type/index information as
870 well as register for alias.
871 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
872 make typed register aliases accordingly.
873 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
874 of line.
875 (s_unreq): Delete type information if present.
876 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
877 (s_arm_unwind_save_mmxwcg): Likewise.
878 (s_arm_unwind_movsp): Likewise.
879 (s_arm_unwind_setfp): Likewise.
880 (parse_shift): Likewise.
881 (parse_shifter_operand): Likewise.
882 (parse_address): Likewise.
883 (parse_tb): Likewise.
884 (tc_arm_regname_to_dw2regnum): Likewise.
885 (md_pseudo_table): Add dn, qn.
886 (parse_neon_mov): Handle typed operands.
887 (parse_operands): Likewise.
888 (neon_type_mask): Add N_SIZ.
889 (N_ALLMODS): New macro.
890 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
891 (el_type_of_type_chk): Add some safeguards.
892 (modify_types_allowed): Fix logic bug.
893 (neon_check_type): Handle operands with types.
894 (neon_three_same): Remove redundant optional arg handling.
895 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
896 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
897 (do_neon_step): Adjust accordingly.
898 (neon_cmode_for_logic_imm): Use first_error.
899 (do_neon_bitfield): Call neon_check_type.
900 (neon_dyadic): Rename to...
901 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
902 to allow modification of type of the destination.
903 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
904 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
905 (do_neon_compare): Make destination be an untyped bitfield.
906 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
907 (neon_mul_mac): Return early in case of errors.
908 (neon_move_immediate): Use first_error.
909 (neon_mac_reg_scalar_long): Fix type to include scalar.
910 (do_neon_dup): Likewise.
911 (do_neon_mov): Likewise (in several places).
912 (do_neon_tbl_tbx): Fix type.
913 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
914 (do_neon_ld_dup): Exit early in case of errors and/or use
915 first_error.
916 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
917 Handle .dn/.qn directives.
918 (REGDEF): Add zero for reg_entry neon field.
920 2006-04-26 Julian Brown <julian@codesourcery.com>
922 * config/tc-arm.c (limits.h): Include.
923 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
924 (fpu_vfp_v3_or_neon_ext): Declare constants.
925 (neon_el_type): New enumeration of types for Neon vector elements.
926 (neon_type_el): New struct. Define type and size of a vector element.
927 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
928 instruction.
929 (neon_type): Define struct. The type of an instruction.
930 (arm_it): Add 'vectype' for the current instruction.
931 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
932 (vfp_sp_reg_pos): Rename to...
933 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
934 tags.
935 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
936 (Neon D or Q register).
937 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
938 register.
939 (GE_OPT_PREFIX_BIG): Define constant, for use in...
940 (my_get_expression): Allow above constant as argument to accept
941 64-bit constants with optional prefix.
942 (arm_reg_parse): Add extra argument to return the specific type of
943 register in when either a D or Q register (REG_TYPE_NDQ) is
944 requested. Can be NULL.
945 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
946 (parse_reg_list): Update for new arm_reg_parse args.
947 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
948 (parse_neon_el_struct_list): New function. Parse element/structure
949 register lists for VLD<n>/VST<n> instructions.
950 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
951 (s_arm_unwind_save_mmxwr): Likewise.
952 (s_arm_unwind_save_mmxwcg): Likewise.
953 (s_arm_unwind_movsp): Likewise.
954 (s_arm_unwind_setfp): Likewise.
955 (parse_big_immediate): New function. Parse an immediate, which may be
956 64 bits wide. Put results in inst.operands[i].
957 (parse_shift): Update for new arm_reg_parse args.
958 (parse_address): Likewise. Add parsing of alignment specifiers.
959 (parse_neon_mov): Parse the operands of a VMOV instruction.
960 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
961 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
962 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
963 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
964 (parse_operands): Handle new codes above.
965 (encode_arm_vfp_sp_reg): Rename to...
966 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
967 selected VFP version only supports D0-D15.
968 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
969 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
970 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
971 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
972 encode_arm_vfp_reg name, and allow 32 D regs.
973 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
974 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
975 regs.
976 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
977 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
978 constant-load and conversion insns introduced with VFPv3.
979 (neon_tab_entry): New struct.
980 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
981 those which are the targets of pseudo-instructions.
982 (neon_opc): Enumerate opcodes, use as indices into...
983 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
984 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
985 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
986 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
987 neon_enc_tab.
988 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
989 Neon instructions.
990 (neon_type_mask): New. Compact type representation for type checking.
991 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
992 permitted type combinations.
993 (N_IGNORE_TYPE): New macro.
994 (neon_check_shape): New function. Check an instruction shape for
995 multiple alternatives. Return the specific shape for the current
996 instruction.
997 (neon_modify_type_size): New function. Modify a vector type and size,
998 depending on the bit mask in argument 1.
999 (neon_type_promote): New function. Convert a given "key" type (of an
1000 operand) into the correct type for a different operand, based on a bit
1001 mask.
1002 (type_chk_of_el_type): New function. Convert a type and size into the
1003 compact representation used for type checking.
1004 (el_type_of_type_ckh): New function. Reverse of above (only when a
1005 single bit is set in the bit mask).
1006 (modify_types_allowed): New function. Alter a mask of allowed types
1007 based on a bit mask of modifications.
1008 (neon_check_type): New function. Check the type of the current
1009 instruction against the variable argument list. The "key" type of the
1010 instruction is returned.
1011 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1012 a Neon data-processing instruction depending on whether we're in ARM
1013 mode or Thumb-2 mode.
1014 (neon_logbits): New function.
1015 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1016 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1017 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1018 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1019 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1020 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1021 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1022 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1023 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1024 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1025 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1026 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1027 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1028 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1029 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1030 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1031 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1032 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1033 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1034 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1035 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1036 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1037 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1038 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1039 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1040 helpers.
1041 (parse_neon_type): New function. Parse Neon type specifier.
1042 (opcode_lookup): Allow parsing of Neon type specifiers.
1043 (REGNUM2, REGSETH, REGSET2): New macros.
1044 (reg_names): Add new VFPv3 and Neon registers.
1045 (NUF, nUF, NCE, nCE): New macros for opcode table.
1046 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1047 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1048 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1049 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1050 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1051 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1052 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1053 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1054 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1055 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1056 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1057 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1058 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1059 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1060 fto[us][lh][sd].
1061 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1062 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1063 (arm_option_cpu_value): Add vfp3 and neon.
1064 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1065 VFPv1 attribute.
1067 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1069 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1070 syntax instead of hardcoded opcodes with ".w18" suffixes.
1071 (wide_branch_opcode): New.
1072 (build_transition): Use it to check for wide branch opcodes with
1073 either ".w18" or ".w15" suffixes.
1075 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1077 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1078 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1079 frag's is_literal flag.
1081 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1083 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1085 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1087 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1088 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1089 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1090 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1091 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1093 2005-04-20 Paul Brook <paul@codesourcery.com>
1095 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1096 all targets.
1097 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1099 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1101 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1102 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1103 Make some cpus unsupported on ELF. Run "make dep-am".
1104 * Makefile.in: Regenerate.
1106 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1108 * configure.in (--enable-targets): Indent help message.
1109 * configure: Regenerate.
1111 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1113 PR gas/2533
1114 * config/tc-i386.c (i386_immediate): Check illegal immediate
1115 register operand.
1117 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1119 * config/tc-i386.c: Formatting.
1120 (output_disp, output_imm): ISO C90 params.
1122 * frags.c (frag_offset_fixed_p): Constify args.
1123 * frags.h (frag_offset_fixed_p): Ditto.
1125 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1126 (COFF_MAGIC): Delete.
1128 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1130 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1132 * po/POTFILES.in: Regenerated.
1134 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1136 * doc/as.texinfo: Mention that some .type syntaxes are not
1137 supported on all architectures.
1139 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1141 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1142 instructions when such transformations have been disabled.
1144 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1146 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1147 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1148 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1149 decoding the loop instructions. Remove current_offset variable.
1150 (xtensa_fix_short_loop_frags): Likewise.
1151 (min_bytes_to_other_loop_end): Remove current_offset argument.
1153 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1155 * config/tc-z80.c (z80_optimize_expr): Removed.
1156 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1158 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1160 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1161 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1162 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1163 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1164 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1165 at90can64, at90usb646, at90usb647, at90usb1286 and
1166 at90usb1287.
1167 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1169 2006-04-07 Paul Brook <paul@codesourcery.com>
1171 * config/tc-arm.c (parse_operands): Set default error message.
1173 2006-04-07 Paul Brook <paul@codesourcery.com>
1175 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1177 2006-04-07 Paul Brook <paul@codesourcery.com>
1179 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1181 2006-04-07 Paul Brook <paul@codesourcery.com>
1183 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1184 (move_or_literal_pool): Handle Thumb-2 instructions.
1185 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1187 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1189 PR 2512.
1190 * config/tc-i386.c (match_template): Move 64-bit operand tests
1191 inside loop.
1193 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1195 * po/Make-in: Add install-html target.
1196 * Makefile.am: Add install-html and install-html-recursive targets.
1197 * Makefile.in: Regenerate.
1198 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1199 * configure: Regenerate.
1200 * doc/Makefile.am: Add install-html and install-html-am targets.
1201 * doc/Makefile.in: Regenerate.
1203 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1205 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1206 second scan.
1208 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1209 Daniel Jacobowitz <dan@codesourcery.com>
1211 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1212 (GOTT_BASE, GOTT_INDEX): New.
1213 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1214 GOTT_INDEX when generating VxWorks PIC.
1215 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1216 use the generic *-*-vxworks* stanza instead.
1218 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1220 PR 997
1221 * frags.c (frag_offset_fixed_p): New function.
1222 * frags.h (frag_offset_fixed_p): Declare.
1223 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1224 (resolve_expression): Likewise.
1226 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1228 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1229 of the same length but different numbers of slots.
1231 2006-03-30 Andreas Schwab <schwab@suse.de>
1233 * configure.in: Fix help string for --enable-targets option.
1234 * configure: Regenerate.
1236 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1238 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1239 (m68k_ip): ... here. Use for all chips. Protect against buffer
1240 overrun and avoid excessive copying.
1242 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1243 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1244 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1245 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1246 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1247 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1248 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1249 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1250 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1251 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1252 (struct m68k_cpu): Change chip field to control_regs.
1253 (current_chip): Remove.
1254 (control_regs): New.
1255 (m68k_archs, m68k_extensions): Adjust.
1256 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1257 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1258 (find_cf_chip): Reimplement for new organization of cpu table.
1259 (select_control_regs): Remove.
1260 (mri_chip): Adjust.
1261 (struct save_opts): Save control regs, not chip.
1262 (s_save, s_restore): Adjust.
1263 (m68k_lookup_cpu): Give deprecated warning when necessary.
1264 (m68k_init_arch): Adjust.
1265 (md_show_usage): Adjust for new cpu table organization.
1267 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1269 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1270 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1271 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1272 "elf/bfin.h".
1273 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1274 (any_gotrel): New rule.
1275 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1276 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1277 "elf/bfin.h".
1278 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1279 (bfin_pic_ptr): New function.
1280 (md_pseudo_table): Add it for ".picptr".
1281 (OPTION_FDPIC): New macro.
1282 (md_longopts): Add -mfdpic.
1283 (md_parse_option): Handle it.
1284 (md_begin): Set BFD flags.
1285 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1286 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1287 us for GOT relocs.
1288 * Makefile.am (bfin-parse.o): Update dependencies.
1289 (DEPTC_bfin_elf): Likewise.
1290 * Makefile.in: Regenerate.
1292 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1294 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1295 mcfemac instead of mcfmac.
1297 2006-03-23 Michael Matz <matz@suse.de>
1299 * config/tc-i386.c (type_names): Correct placement of 'static'.
1300 (reloc): Map some more relocs to their 64 bit counterpart when
1301 size is 8.
1302 (output_insn): Work around breakage if DEBUG386 is defined.
1303 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1304 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1305 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1306 different from i386.
1307 (output_imm): Ditto.
1308 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1309 Imm64.
1310 (md_convert_frag): Jumps can now be larger than 2GB away, error
1311 out in that case.
1312 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1313 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1315 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1316 Daniel Jacobowitz <dan@codesourcery.com>
1317 Phil Edwards <phil@codesourcery.com>
1318 Zack Weinberg <zack@codesourcery.com>
1319 Mark Mitchell <mark@codesourcery.com>
1320 Nathan Sidwell <nathan@codesourcery.com>
1322 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1323 (md_begin): Complain about -G being used for PIC. Don't change
1324 the text, data and bss alignments on VxWorks.
1325 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1326 generating VxWorks PIC.
1327 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1328 (macro): Likewise, but do not treat la $25 specially for
1329 VxWorks PIC, and do not handle jal.
1330 (OPTION_MVXWORKS_PIC): New macro.
1331 (md_longopts): Add -mvxworks-pic.
1332 (md_parse_option): Don't complain about using PIC and -G together here.
1333 Handle OPTION_MVXWORKS_PIC.
1334 (md_estimate_size_before_relax): Always use the first relaxation
1335 sequence on VxWorks.
1336 * config/tc-mips.h (VXWORKS_PIC): New.
1338 2006-03-21 Paul Brook <paul@codesourcery.com>
1340 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1342 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1344 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1345 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1346 (get_loop_align_size): New.
1347 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1348 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1349 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1350 (get_noop_aligned_address): Use get_loop_align_size.
1351 (get_aligned_diff): Likewise.
1353 2006-03-21 Paul Brook <paul@codesourcery.com>
1355 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1357 2006-03-20 Paul Brook <paul@codesourcery.com>
1359 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1360 (do_t_branch): Encode branches inside IT blocks as unconditional.
1361 (do_t_cps): New function.
1362 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1363 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1364 (opcode_lookup): Allow conditional suffixes on all instructions in
1365 Thumb mode.
1366 (md_assemble): Advance condexec state before checking for errors.
1367 (insns): Use do_t_cps.
1369 2006-03-20 Paul Brook <paul@codesourcery.com>
1371 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1372 outputting the insn.
1374 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1376 * config/tc-vax.c: Update copyright year.
1377 * config/tc-vax.h: Likewise.
1379 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1381 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1382 make it static.
1383 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1385 2006-03-17 Paul Brook <paul@codesourcery.com>
1387 * config/tc-arm.c (insns): Add ldm and stm.
1389 2006-03-17 Ben Elliston <bje@au.ibm.com>
1391 PR gas/2446
1392 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1394 2006-03-16 Paul Brook <paul@codesourcery.com>
1396 * config/tc-arm.c (insns): Add "svc".
1398 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1400 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1401 flag and avoid double underscore prefixes.
1403 2006-03-10 Paul Brook <paul@codesourcery.com>
1405 * config/tc-arm.c (md_begin): Handle EABIv5.
1406 (arm_eabis): Add EF_ARM_EABI_VER5.
1407 * doc/c-arm.texi: Document -meabi=5.
1409 2006-03-10 Ben Elliston <bje@au.ibm.com>
1411 * app.c (do_scrub_chars): Simplify string handling.
1413 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1414 Daniel Jacobowitz <dan@codesourcery.com>
1415 Zack Weinberg <zack@codesourcery.com>
1416 Nathan Sidwell <nathan@codesourcery.com>
1417 Paul Brook <paul@codesourcery.com>
1418 Ricardo Anguiano <anguiano@codesourcery.com>
1419 Phil Edwards <phil@codesourcery.com>
1421 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1422 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1423 R_ARM_ABS12 reloc.
1424 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1425 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1426 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1428 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1430 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1431 even when using the text-section-literals option.
1433 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1435 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1436 and cf.
1437 (m68k_ip): <case 'J'> Check we have some control regs.
1438 (md_parse_option): Allow raw arch switch.
1439 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1440 whether 68881 or cfloat was meant by -mfloat.
1441 (md_show_usage): Adjust extension display.
1442 (m68k_elf_final_processing): Adjust.
1444 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1446 * config/tc-avr.c (avr_mod_hash_value): New function.
1447 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1448 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1449 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1450 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1451 of (int).
1452 (tc_gen_reloc): Handle substractions of symbols, if possible do
1453 fixups, abort otherwise.
1454 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1455 tc_fix_adjustable): Define.
1457 2006-03-02 James E Wilson <wilson@specifix.com>
1459 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1460 change the template, then clear md.slot[curr].end_of_insn_group.
1462 2006-02-28 Jan Beulich <jbeulich@novell.com>
1464 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1466 2006-02-28 Jan Beulich <jbeulich@novell.com>
1468 PR/1070
1469 * macro.c (getstring): Don't treat parentheses special anymore.
1470 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1471 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1472 characters.
1474 2006-02-28 Mat <mat@csail.mit.edu>
1476 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1478 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1480 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1481 field.
1482 (CFI_signal_frame): Define.
1483 (cfi_pseudo_table): Add .cfi_signal_frame.
1484 (dot_cfi): Handle CFI_signal_frame.
1485 (output_cie): Handle cie->signal_frame.
1486 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1487 different. Copy signal_frame from FDE to newly created CIE.
1488 * doc/as.texinfo: Document .cfi_signal_frame.
1490 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1492 * doc/Makefile.am: Add html target.
1493 * doc/Makefile.in: Regenerate.
1494 * po/Make-in: Add html target.
1496 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1498 * config/tc-i386.c (output_insn): Support Intel Merom New
1499 Instructions.
1501 * config/tc-i386.h (CpuMNI): New.
1502 (CpuUnknownFlags): Add CpuMNI.
1504 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1506 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1507 (hpriv_reg_table): New table for hyperprivileged registers.
1508 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1509 register encoding.
1511 2006-02-24 DJ Delorie <dj@redhat.com>
1513 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1514 (tc_gen_reloc): Don't define.
1515 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1516 (OPTION_LINKRELAX): New.
1517 (md_longopts): Add it.
1518 (m32c_relax): New.
1519 (md_parse_options): Set it.
1520 (md_assemble): Emit relaxation relocs as needed.
1521 (md_convert_frag): Emit relaxation relocs as needed.
1522 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1523 (m32c_apply_fix): New.
1524 (tc_gen_reloc): New.
1525 (m32c_force_relocation): Force out jump relocs when relaxing.
1526 (m32c_fix_adjustable): Return false if relaxing.
1528 2006-02-24 Paul Brook <paul@codesourcery.com>
1530 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1531 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1532 (struct asm_barrier_opt): Define.
1533 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1534 (parse_psr): Accept V7M psr names.
1535 (parse_barrier): New function.
1536 (enum operand_parse_code): Add OP_oBARRIER.
1537 (parse_operands): Implement OP_oBARRIER.
1538 (do_barrier): New function.
1539 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1540 (do_t_cpsi): Add V7M restrictions.
1541 (do_t_mrs, do_t_msr): Validate V7M variants.
1542 (md_assemble): Check for NULL variants.
1543 (v7m_psrs, barrier_opt_names): New tables.
1544 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1545 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1546 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1547 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1548 (struct cpu_arch_ver_table): Define.
1549 (cpu_arch_ver): New.
1550 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1551 Tag_CPU_arch_profile.
1552 * doc/c-arm.texi: Document new cpu and arch options.
1554 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1556 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1558 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1560 * config/tc-ia64.c: Update copyright years.
1562 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1564 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1565 SDM 2.2.
1567 2005-02-22 Paul Brook <paul@codesourcery.com>
1569 * config/tc-arm.c (do_pld): Remove incorrect write to
1570 inst.instruction.
1571 (encode_thumb32_addr_mode): Use correct operand.
1573 2006-02-21 Paul Brook <paul@codesourcery.com>
1575 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1577 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1578 Anil Paranjape <anilp1@kpitcummins.com>
1579 Shilin Shakti <shilins@kpitcummins.com>
1581 * Makefile.am: Add xc16x related entry.
1582 * Makefile.in: Regenerate.
1583 * configure.in: Added xc16x related entry.
1584 * configure: Regenerate.
1585 * config/tc-xc16x.h: New file
1586 * config/tc-xc16x.c: New file
1587 * doc/c-xc16x.texi: New file for xc16x
1588 * doc/all.texi: Entry for xc16x
1589 * doc/Makefile.texi: Added c-xc16x.texi
1590 * NEWS: Announce the support for the new target.
1592 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1594 * configure.tgt: set emulation for mips-*-netbsd*
1596 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1598 * config.in: Rebuilt.
1600 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1602 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1603 from 1, not 0, in error messages.
1604 (md_assemble): Simplify special-case check for ENTRY instructions.
1605 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1606 operand in error message.
1608 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1610 * configure.tgt (arm-*-linux-gnueabi*): Change to
1611 arm-*-linux-*eabi*.
1613 2006-02-10 Nick Clifton <nickc@redhat.com>
1615 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1616 32-bit value is propagated into the upper bits of a 64-bit long.
1618 * config/tc-arc.c (init_opcode_tables): Fix cast.
1619 (arc_extoper, md_operand): Likewise.
1621 2006-02-09 David Heine <dlheine@tensilica.com>
1623 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1624 each relaxation step.
1626 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1628 * configure.in (CHECK_DECLS): Add vsnprintf.
1629 * configure: Regenerate.
1630 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1631 include/declare here, but...
1632 * as.h: Move code detecting VARARGS idiom to the top.
1633 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1634 (vsnprintf): Declare if not already declared.
1636 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1638 * as.c (close_output_file): New.
1639 (main): Register close_output_file with xatexit before
1640 dump_statistics. Don't call output_file_close.
1642 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1644 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1645 mcf5329_control_regs): New.
1646 (not_current_architecture, selected_arch, selected_cpu): New.
1647 (m68k_archs, m68k_extensions): New.
1648 (archs): Renamed to ...
1649 (m68k_cpus): ... here. Adjust.
1650 (n_arches): Remove.
1651 (md_pseudo_table): Add arch and cpu directives.
1652 (find_cf_chip, m68k_ip): Adjust table scanning.
1653 (no_68851, no_68881): Remove.
1654 (md_assemble): Lazily initialize.
1655 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1656 (md_init_after_args): Move functionality to m68k_init_arch.
1657 (mri_chip): Adjust table scanning.
1658 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1659 options with saner parsing.
1660 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1661 m68k_init_arch): New.
1662 (s_m68k_cpu, s_m68k_arch): New.
1663 (md_show_usage): Adjust.
1664 (m68k_elf_final_processing): Set CF EF flags.
1665 * config/tc-m68k.h (m68k_init_after_args): Remove.
1666 (tc_init_after_args): Remove.
1667 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1668 (M68k-Directives): Document .arch and .cpu directives.
1670 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1672 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1673 synonyms for equ and defl.
1674 (z80_cons_fix_new): New function.
1675 (emit_byte): Disallow relative jumps to absolute locations.
1676 (emit_data): Only handle defb, prototype changed, because defb is
1677 now handled as pseudo-op rather than an instruction.
1678 (instab): Entries for defb,defw,db,dw moved from here...
1679 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1680 Add entries for def24,def32,d24,d32.
1681 (md_assemble): Improved error handling.
1682 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1683 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1684 (z80_cons_fix_new): Declare.
1685 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1686 (def24,d24,def32,d32): New pseudo-ops.
1688 2006-02-02 Paul Brook <paul@codesourcery.com>
1690 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1692 2005-02-02 Paul Brook <paul@codesourcery.com>
1694 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1695 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1696 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1697 T2_OPCODE_RSB): Define.
1698 (thumb32_negate_data_op): New function.
1699 (md_apply_fix): Use it.
1701 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1703 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1704 fields.
1705 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1706 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1707 subtracted symbols.
1708 (relaxation_requirements): Add pfinish_frag argument and use it to
1709 replace setting tinsn->record_fix fields.
1710 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1711 and vinsn_to_insnbuf. Remove references to record_fix and
1712 slot_sub_symbols fields.
1713 (xtensa_mark_narrow_branches): Delete unused code.
1714 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1715 a symbol.
1716 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1717 record_fix fields.
1718 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1719 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1720 of the record_fix field. Simplify error messages for unexpected
1721 symbolic operands.
1722 (set_expr_symbol_offset_diff): Delete.
1724 2006-01-31 Paul Brook <paul@codesourcery.com>
1726 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1728 2006-01-31 Paul Brook <paul@codesourcery.com>
1729 Richard Earnshaw <rearnsha@arm.com>
1731 * config/tc-arm.c: Use arm_feature_set.
1732 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1733 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1734 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1735 New variables.
1736 (insns): Use them.
1737 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1738 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1739 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1740 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1741 feature flags.
1742 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1743 (arm_opts): Move old cpu/arch options from here...
1744 (arm_legacy_opts): ... to here.
1745 (md_parse_option): Search arm_legacy_opts.
1746 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1747 (arm_float_abis, arm_eabis): Make const.
1749 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1751 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1753 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1755 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1756 in load immediate intruction.
1758 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1760 * config/bfin-parse.y (value_match): Use correct conversion
1761 specifications in template string for __FILE__ and __LINE__.
1762 (binary): Ditto.
1763 (unary): Ditto.
1765 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1767 Introduce TLS descriptors for i386 and x86_64.
1768 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1769 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1770 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1771 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1772 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1773 displacement bits.
1774 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1775 (lex_got): Handle @tlsdesc and @tlscall.
1776 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1778 2006-01-11 Nick Clifton <nickc@redhat.com>
1780 Fixes for building on 64-bit hosts:
1781 * config/tc-avr.c (mod_index): New union to allow conversion
1782 between pointers and integers.
1783 (md_begin, avr_ldi_expression): Use it.
1784 * config/tc-i370.c (md_assemble): Add cast for argument to print
1785 statement.
1786 * config/tc-tic54x.c (subsym_substitute): Likewise.
1787 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1788 opindex field of fr_cgen structure into a pointer so that it can
1789 be stored in a frag.
1790 * config/tc-mn10300.c (md_assemble): Likewise.
1791 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1792 types.
1793 * config/tc-v850.c: Replace uses of (int) casts with correct
1794 types.
1796 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1798 PR gas/2117
1799 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1801 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1803 PR gas/2101
1804 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1805 a local-label reference.
1807 For older changes see ChangeLog-2005
1808 \f
1809 Local Variables:
1810 mode: change-log
1811 left-margin: 8
1812 fill-column: 74
1813 version-control: never
1814 End: