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[binutils.git] / opcodes / m32c-asm.c
blob1bfa926efdbe9ee548e9b1c36cf2509935999a3f
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52 #include "safe-ctype.h"
53
54 #define MACH_M32C 5 /* Must match md_begin. */
55
56 static int
57 m32c_cgen_isa_register (const char **strp)
58 {
59 int u;
60 const char *s = *strp;
61 static char * m32c_register_names [] =
62 {
63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
67 };
68
69 for (u = 0; m32c_register_names[u]; u++)
70 {
71 int len = strlen (m32c_register_names[u]);
72
73 if (memcmp (m32c_register_names[u], s, len) == 0
74 && (s[len] == 0 || ! ISALNUM (s[len])))
75 return 1;
76 }
77 return 0;
78 }
79
80 #define PARSE_UNSIGNED \
81 do \
82 { \
83 /* Don't successfully parse literals beginning with '['. */ \
84 if (**strp == '[') \
85 return "Invalid literal"; /* Anything -- will not be seen. */ \
86 \
87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
88 if (errmsg) \
89 return errmsg; \
90 } \
91 while (0)
92
93 #define PARSE_SIGNED \
94 do \
95 { \
96 /* Don't successfully parse literals beginning with '['. */ \
97 if (**strp == '[') \
98 return "Invalid literal"; /* Anything -- will not be seen. */ \
99 \
100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
101 if (errmsg) \
102 return errmsg; \
103 } \
104 while (0)
105
106 static const char *
107 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
108 int opindex, unsigned long *valuep)
109 {
110 const char *errmsg = 0;
111 unsigned long value;
112
113 PARSE_UNSIGNED;
114
115 if (value > 0x3f)
116 return _("imm:6 immediate is out of range");
117
118 *valuep = value;
119 return 0;
120 }
121
122 static const char *
123 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
124 int opindex, unsigned long *valuep)
125 {
126 const char *errmsg = 0;
127 unsigned long value;
128 long have_zero = 0;
129
130 if (strncasecmp (*strp, "%dsp8(", 6) == 0)
131 {
132 enum cgen_parse_operand_result result_type;
133 bfd_vma value;
134 const char *errmsg;
135
136 *strp += 6;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138 & result_type, & value);
139 if (**strp != ')')
140 return _("missing `)'");
141 (*strp) ++;
142
143 if (errmsg == NULL
144 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145 {
146 return _("%dsp8() takes a symbolic address, not a number");
147 }
148 *valuep = value;
149 return errmsg;
150 }
151
152 if (strncmp (*strp, "0x0", 3) == 0
153 || (**strp == '0' && *(*strp + 1) != 'x'))
154 have_zero = 1;
155
156 PARSE_UNSIGNED;
157
158 if (value > 0xff)
159 return _("dsp:8 immediate is out of range");
160
161 /* If this field may require a relocation then use larger dsp16. */
162 if (! have_zero && value == 0)
163 return _("dsp:8 immediate is out of range");
164
165 *valuep = value;
166 return 0;
167 }
168
169 static const char *
170 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171 int opindex, signed long *valuep)
172 {
173 const char *errmsg = 0;
174 signed long value;
175 long have_zero = 0;
176
177 if (strncmp (*strp, "0x0", 3) == 0
178 || (**strp == '0' && *(*strp + 1) != 'x'))
179 have_zero = 1;
180
181 PARSE_SIGNED;
182
183 if (value < -8 || value > 7)
184 return _("Immediate is out of range -8 to 7");
185
186 /* If this field may require a relocation then use larger dsp16. */
187 if (! have_zero && value == 0)
188 return _("Immediate is out of range -8 to 7");
189
190 *valuep = value;
191 return 0;
192 }
193
194 static const char *
195 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
196 int opindex, signed long *valuep)
197 {
198 const char *errmsg = 0;
199 signed long value;
200
201 if (strncasecmp (*strp, "%hi8(", 5) == 0)
202 {
203 enum cgen_parse_operand_result result_type;
204 bfd_vma value;
205 const char *errmsg;
206
207 *strp += 5;
208 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
209 & result_type, & value);
210 if (**strp != ')')
211 return _("missing `)'");
212 (*strp) ++;
213
214 if (errmsg == NULL
215 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
216 {
217 value >>= 16;
218 }
219 *valuep = value;
220 return errmsg;
221 }
222
223 PARSE_SIGNED;
224
225 if (value <= 255 && value > 127)
226 value -= 0x100;
227
228 if (value < -128 || value > 127)
229 return _("dsp:8 immediate is out of range");
230
231 *valuep = value;
232 return 0;
233 }
234
235 static const char *
236 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
237 int opindex, unsigned long *valuep)
238 {
239 const char *errmsg = 0;
240 unsigned long value;
241 long have_zero = 0;
242
243 if (strncasecmp (*strp, "%dsp16(", 7) == 0)
244 {
245 enum cgen_parse_operand_result result_type;
246 bfd_vma value;
247 const char *errmsg;
248
249 *strp += 7;
250 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
251 & result_type, & value);
252 if (**strp != ')')
253 return _("missing `)'");
254 (*strp) ++;
255
256 if (errmsg == NULL
257 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
258 {
259 return _("%dsp16() takes a symbolic address, not a number");
260 }
261 *valuep = value;
262 return errmsg;
263 }
264
265 /* Don't successfully parse literals beginning with '['. */
266 if (**strp == '[')
267 return "Invalid literal"; /* Anything -- will not be seen. */
268
269 /* Don't successfully parse register names. */
270 if (m32c_cgen_isa_register (strp))
271 return "Invalid literal"; /* Anything -- will not be seen. */
272
273 if (strncmp (*strp, "0x0", 3) == 0
274 || (**strp == '0' && *(*strp + 1) != 'x'))
275 have_zero = 1;
276
277 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
278 if (errmsg)
279 return errmsg;
280
281 if (value > 0xffff)
282 return _("dsp:16 immediate is out of range");
283
284 /* If this field may require a relocation then use larger dsp24. */
285 if (cd->machs == MACH_M32C && ! have_zero && value == 0
286 && (strncmp (*strp, "[a", 2) == 0
287 || **strp == ','
288 || **strp == 0))
289 return _("dsp:16 immediate is out of range");
290
291 *valuep = value;
292 return 0;
293 }
294
295 static const char *
296 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
297 int opindex, signed long *valuep)
298 {
299 const char *errmsg = 0;
300 signed long value;
301
302 if (strncasecmp (*strp, "%lo16(", 6) == 0)
303 {
304 enum cgen_parse_operand_result result_type;
305 bfd_vma value;
306 const char *errmsg;
307
308 *strp += 6;
309 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
310 & result_type, & value);
311 if (**strp != ')')
312 return _("missing `)'");
313 (*strp) ++;
314
315 if (errmsg == NULL
316 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
317 {
318 value &= 0xffff;
319 }
320 *valuep = value;
321 return errmsg;
322 }
323
324 if (strncasecmp (*strp, "%hi16(", 6) == 0)
325 {
326 enum cgen_parse_operand_result result_type;
327 bfd_vma value;
328 const char *errmsg;
329
330 *strp += 6;
331 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
332 & result_type, & value);
333 if (**strp != ')')
334 return _("missing `)'");
335 (*strp) ++;
336
337 if (errmsg == NULL
338 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
339 {
340 value >>= 16;
341 }
342 *valuep = value;
343 return errmsg;
344 }
345
346 PARSE_SIGNED;
347
348 if (value <= 65535 && value > 32767)
349 value -= 0x10000;
350
351 if (value < -32768 || value > 32767)
352 return _("dsp:16 immediate is out of range");
353
354 *valuep = value;
355 return 0;
356 }
357
358 static const char *
359 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
360 int opindex, unsigned long *valuep)
361 {
362 const char *errmsg = 0;
363 unsigned long value;
364
365 /* Don't successfully parse literals beginning with '['. */
366 if (**strp == '[')
367 return "Invalid literal"; /* Anything -- will not be seen. */
368
369 /* Don't successfully parse register names. */
370 if (m32c_cgen_isa_register (strp))
371 return "Invalid literal"; /* Anything -- will not be seen. */
372
373 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
374 if (errmsg)
375 return errmsg;
376
377 if (value > 0xfffff)
378 return _("dsp:20 immediate is out of range");
379
380 *valuep = value;
381 return 0;
382 }
383
384 static const char *
385 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
386 int opindex, unsigned long *valuep)
387 {
388 const char *errmsg = 0;
389 unsigned long value;
390
391 /* Don't successfully parse literals beginning with '['. */
392 if (**strp == '[')
393 return "Invalid literal"; /* Anything -- will not be seen. */
394
395 /* Don't successfully parse register names. */
396 if (m32c_cgen_isa_register (strp))
397 return "Invalid literal"; /* Anything -- will not be seen. */
398
399 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
400 if (errmsg)
401 return errmsg;
402
403 if (value > 0xffffff)
404 return _("dsp:24 immediate is out of range");
405
406 *valuep = value;
407 return 0;
408 }
409
410 static const char *
411 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
412 int opindex, signed long *valuep)
413 {
414 const char *errmsg = 0;
415 signed long value;
416
417 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
418 if (errmsg)
419 return errmsg;
420
421 *valuep = value;
422 return 0;
423 }
424
425 static const char *
426 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
427 int opindex, signed long *valuep)
428 {
429 const char *errmsg = 0;
430 signed long value;
431
432 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
433 if (errmsg)
434 return errmsg;
435
436 if (value < 1 || value > 2)
437 return _("immediate is out of range 1-2");
438
439 *valuep = value;
440 return 0;
441 }
442
443 static const char *
444 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
445 int opindex, signed long *valuep)
446 {
447 const char *errmsg = 0;
448 signed long value;
449
450 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
451 if (errmsg)
452 return errmsg;
453
454 if (value < 1 || value > 8)
455 return _("immediate is out of range 1-8");
456
457 *valuep = value;
458 return 0;
459 }
460
461 static const char *
462 parse_lab_5_3 (CGEN_CPU_DESC cd,
463 const char **strp,
464 int opindex ATTRIBUTE_UNUSED,
465 int opinfo,
466 enum cgen_parse_operand_result *type_addr,
467 bfd_vma *valuep)
468 {
469 const char *errmsg = 0;
470 bfd_vma value;
471 enum cgen_parse_operand_result op_res;
472
473 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
474 opinfo, & op_res, & value);
475
476 if (type_addr)
477 *type_addr = op_res;
478
479 if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
480 {
481 /* This is a hack; the field cannot handle near-zero signed
482 offsets that CGEN wants to put in to indicate an "empty"
483 operand at first. */
484 *valuep = 2;
485 return 0;
486 }
487 if (errmsg)
488 return errmsg;
489
490 if (value < 2 || value > 9)
491 return _("immediate is out of range 2-9");
492
493 *valuep = value;
494 return 0;
495 }
496
497 static const char *
498 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
499 int opindex, unsigned long *valuep)
500 {
501 const char *errmsg = 0;
502 unsigned long value;
503
504 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
505 if (errmsg)
506 return errmsg;
507
508 if (value > 15)
509 return _("Bit number for indexing general register is out of range 0-15");
510
511 *valuep = value;
512 return 0;
513 }
514
515 static const char *
516 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
517 int opindex, unsigned long *valuep,
518 unsigned bits)
519 {
520 const char *errmsg = 0;
521 unsigned long bit;
522 unsigned long base;
523 const char *newp = *strp;
524 unsigned long long bitbase;
525
526 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
527 if (errmsg)
528 return errmsg;
529
530 if (*newp != ',')
531 return "Missing base for bit,base:8";
532
533 ++newp;
534 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
535 if (errmsg)
536 return errmsg;
537
538 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
539
540 if (bitbase >= (1ull << bits))
541 return _("bit,base is out of range");
542
543 *valuep = bitbase;
544 *strp = newp;
545 return 0;
546 }
547
548 static const char *
549 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
550 int opindex, signed long *valuep,
551 unsigned bits)
552 {
553 const char *errmsg = 0;
554 unsigned long bit;
555 signed long base;
556 const char *newp = *strp;
557 long long bitbase;
558 long long limit;
559
560 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
561 if (errmsg)
562 return errmsg;
563
564 if (*newp != ',')
565 return "Missing base for bit,base:8";
566
567 ++newp;
568 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
569 if (errmsg)
570 return errmsg;
571
572 bitbase = (long long)bit + ((long long)base * 8);
573
574 limit = 1ll << (bits - 1);
575 if (bitbase < -limit || bitbase >= limit)
576 return _("bit,base is out of range");
577
578 *valuep = bitbase;
579 *strp = newp;
580 return 0;
581 }
582
583 static const char *
584 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
585 int opindex, unsigned long *valuep)
586 {
587 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
588 }
589
590 static const char *
591 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
592 int opindex, unsigned long *valuep)
593 {
594 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
595 }
596
597 static const char *
598 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
599 int opindex, unsigned long *valuep)
600 {
601 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
602 }
603
604 static const char *
605 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
606 int opindex, unsigned long *valuep)
607 {
608 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
609 }
610
611 static const char *
612 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
613 int opindex, unsigned long *valuep)
614 {
615 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
616 }
617
618 static const char *
619 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
620 int opindex, signed long *valuep)
621 {
622 return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
623 }
624
625 static const char *
626 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
627 int opindex, signed long *valuep)
628 {
629 return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
630 }
631
632 static const char *
633 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
634 int opindex, signed long *valuep)
635 {
636 return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
637 }
638
639 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */
640
641 static const char *
642 parse_suffix (const char **strp, char suffix)
643 {
644 const char *newp = *strp;
645
646 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
647 newp = *strp + 2;
648
649 if (ISSPACE (*newp))
650 {
651 *strp = newp;
652 return 0;
653 }
654
655 return "Invalid suffix"; /* Anything -- will not be seen. */
656 }
657
658 static const char *
659 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
660 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
661 {
662 return parse_suffix (strp, 's');
663 }
664
665 static const char *
666 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
667 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
668 {
669 return parse_suffix (strp, 'g');
670 }
671
672 static const char *
673 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
674 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
675 {
676 return parse_suffix (strp, 'q');
677 }
678
679 static const char *
680 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
681 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
682 {
683 return parse_suffix (strp, 'z');
684 }
685
686 /* Parse an empty suffix. Fail if the next char is ':'. */
687
688 static const char *
689 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
690 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
691 {
692 if (**strp == ':')
693 return "Unexpected suffix";
694 return 0;
695 }
696
697 static const char *
698 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
699 int opindex ATTRIBUTE_UNUSED, signed long *valuep)
700 {
701 const char *errmsg;
702 signed long value;
703 signed long junk;
704 const char *newp = *strp;
705
706 /* Parse r0[hl]. */
707 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
708 if (errmsg)
709 return errmsg;
710
711 if (*newp != ',')
712 return _("not a valid r0l/r0h pair");
713 ++newp;
714
715 /* Parse the second register in the pair. */
716 if (value == 0) /* r0l */
717 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
718 else
719 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
720 if (errmsg)
721 return errmsg;
722
723 *strp = newp;
724 *valuep = ! value;
725 return 0;
726 }
727
728 /* Accept .b or .w in any case. */
729
730 static const char *
731 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
732 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
733 {
734 if (**strp == '.'
735 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
736 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
737 {
738 *strp += 2;
739 return NULL;
740 }
741
742 return _("Invalid size specifier");
743 }
744
745 /* Special check to ensure that instruction exists for given machine. */
746
747 int
748 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
749 const CGEN_INSN *insn)
750 {
751 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
752 int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
753
754 /* If attributes are absent, assume no restriction. */
755 if (machs == 0)
756 machs = ~0;
757
758 return ((machs & cd->machs)
759 && (isas & cd->isas));
760 }
761
762 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
763
764 static const char *
765 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
766 const char **strp,
767 int opindex ATTRIBUTE_UNUSED,
768 unsigned long *valuep,
769 int push)
770 {
771 const char *errmsg = 0;
772 int regno = 0;
773
774 *valuep = 0;
775 while (**strp && **strp != ')')
776 {
777 if (**strp == 'r' || **strp == 'R')
778 {
779 ++*strp;
780 regno = **strp - '0';
781 if (regno > 4)
782 errmsg = _("Register number is not valid");
783 }
784 else if (**strp == 'a' || **strp == 'A')
785 {
786 ++*strp;
787 regno = **strp - '0';
788 if (regno > 2)
789 errmsg = _("Register number is not valid");
790 regno = **strp - '0' + 4;
791 }
792
793 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
794 {
795 regno = 6;
796 ++*strp;
797 }
798
799 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
800 {
801 regno = 7;
802 ++*strp;
803 }
804
805 if (push) /* Mask is reversed for push. */
806 *valuep |= 0x80 >> regno;
807 else
808 *valuep |= 1 << regno;
809
810 ++*strp;
811 if (**strp == ',')
812 {
813 if (*(*strp + 1) == ')')
814 break;
815 ++*strp;
816 }
817 }
818
819 if (!*strp)
820 errmsg = _("Register list is not valid");
821
822 return errmsg;
823 }
824
825 #define POP 0
826 #define PUSH 1
827
828 static const char *
829 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
830 const char **strp,
831 int opindex ATTRIBUTE_UNUSED,
832 unsigned long *valuep)
833 {
834 return parse_regset (cd, strp, opindex, valuep, POP);
835 }
836
837 static const char *
838 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
839 const char **strp,
840 int opindex ATTRIBUTE_UNUSED,
841 unsigned long *valuep)
842 {
843 return parse_regset (cd, strp, opindex, valuep, PUSH);
844 }
845
846 /* -- dis.c */
847
848 const char * m32c_cgen_parse_operand
849 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
850
851 /* Main entry point for operand parsing.
852
853 This function is basically just a big switch statement. Earlier versions
854 used tables to look up the function to use, but
855 - if the table contains both assembler and disassembler functions then
856 the disassembler contains much of the assembler and vice-versa,
857 - there's a lot of inlining possibilities as things grow,
858 - using a switch statement avoids the function call overhead.
859
860 This function could be moved into `parse_insn_normal', but keeping it
861 separate makes clear the interface between `parse_insn_normal' and each of
862 the handlers. */
863
864 const char *
865 m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
866 int opindex,
867 const char ** strp,
868 CGEN_FIELDS * fields)
869 {
870 const char * errmsg = NULL;
871 /* Used by scalar operands that still need to be parsed. */
872 long junk ATTRIBUTE_UNUSED;
873
874 switch (opindex)
875 {
876 case M32C_OPERAND_A0 :
877 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
878 break;
879 case M32C_OPERAND_A1 :
880 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
881 break;
882 case M32C_OPERAND_AN16_PUSH_S :
883 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
884 break;
885 case M32C_OPERAND_BIT16AN :
886 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
887 break;
888 case M32C_OPERAND_BIT16RN :
889 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
890 break;
891 case M32C_OPERAND_BIT32ANPREFIXED :
892 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
893 break;
894 case M32C_OPERAND_BIT32ANUNPREFIXED :
895 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
896 break;
897 case M32C_OPERAND_BIT32RNPREFIXED :
898 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
899 break;
900 case M32C_OPERAND_BIT32RNUNPREFIXED :
901 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
902 break;
903 case M32C_OPERAND_BITBASE16_16_S8 :
904 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
905 break;
906 case M32C_OPERAND_BITBASE16_16_U16 :
907 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
908 break;
909 case M32C_OPERAND_BITBASE16_16_U8 :
910 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
911 break;
912 case M32C_OPERAND_BITBASE16_8_U11_S :
913 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
914 break;
915 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
916 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
917 break;
918 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
919 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
920 break;
921 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
922 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
923 break;
924 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
925 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
926 break;
927 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
928 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
929 break;
930 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
931 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
932 break;
933 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
934 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
935 break;
936 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
937 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
938 break;
939 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
940 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
941 break;
942 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
943 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
944 break;
945 case M32C_OPERAND_BITNO16R :
946 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
947 break;
948 case M32C_OPERAND_BITNO32PREFIXED :
949 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
950 break;
951 case M32C_OPERAND_BITNO32UNPREFIXED :
952 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
953 break;
954 case M32C_OPERAND_DSP_10_U6 :
955 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
956 break;
957 case M32C_OPERAND_DSP_16_S16 :
958 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
959 break;
960 case M32C_OPERAND_DSP_16_S8 :
961 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
962 break;
963 case M32C_OPERAND_DSP_16_U16 :
964 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
965 break;
966 case M32C_OPERAND_DSP_16_U20 :
967 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
968 break;
969 case M32C_OPERAND_DSP_16_U24 :
970 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
971 break;
972 case M32C_OPERAND_DSP_16_U8 :
973 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
974 break;
975 case M32C_OPERAND_DSP_24_S16 :
976 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
977 break;
978 case M32C_OPERAND_DSP_24_S8 :
979 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
980 break;
981 case M32C_OPERAND_DSP_24_U16 :
982 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
983 break;
984 case M32C_OPERAND_DSP_24_U20 :
985 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
986 break;
987 case M32C_OPERAND_DSP_24_U24 :
988 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
989 break;
990 case M32C_OPERAND_DSP_24_U8 :
991 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
992 break;
993 case M32C_OPERAND_DSP_32_S16 :
994 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
995 break;
996 case M32C_OPERAND_DSP_32_S8 :
997 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
998 break;
999 case M32C_OPERAND_DSP_32_U16 :
1000 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1001 break;
1002 case M32C_OPERAND_DSP_32_U20 :
1003 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1004 break;
1005 case M32C_OPERAND_DSP_32_U24 :
1006 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1007 break;
1008 case M32C_OPERAND_DSP_32_U8 :
1009 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1010 break;
1011 case M32C_OPERAND_DSP_40_S16 :
1012 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1013 break;
1014 case M32C_OPERAND_DSP_40_S8 :
1015 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1016 break;
1017 case M32C_OPERAND_DSP_40_U16 :
1018 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1019 break;
1020 case M32C_OPERAND_DSP_40_U24 :
1021 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1022 break;
1023 case M32C_OPERAND_DSP_40_U8 :
1024 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1025 break;
1026 case M32C_OPERAND_DSP_48_S16 :
1027 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1028 break;
1029 case M32C_OPERAND_DSP_48_S8 :
1030 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1031 break;
1032 case M32C_OPERAND_DSP_48_U16 :
1033 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1034 break;
1035 case M32C_OPERAND_DSP_48_U24 :
1036 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1037 break;
1038 case M32C_OPERAND_DSP_48_U8 :
1039 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1040 break;
1041 case M32C_OPERAND_DSP_8_S8 :
1042 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1043 break;
1044 case M32C_OPERAND_DSP_8_U16 :
1045 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1046 break;
1047 case M32C_OPERAND_DSP_8_U24 :
1048 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1049 break;
1050 case M32C_OPERAND_DSP_8_U6 :
1051 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1052 break;
1053 case M32C_OPERAND_DSP_8_U8 :
1054 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1055 break;
1056 case M32C_OPERAND_DST16AN :
1057 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1058 break;
1059 case M32C_OPERAND_DST16AN_S :
1060 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1061 break;
1062 case M32C_OPERAND_DST16ANHI :
1063 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1064 break;
1065 case M32C_OPERAND_DST16ANQI :
1066 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1067 break;
1068 case M32C_OPERAND_DST16ANQI_S :
1069 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1070 break;
1071 case M32C_OPERAND_DST16ANSI :
1072 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1073 break;
1074 case M32C_OPERAND_DST16RNEXTQI :
1075 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1076 break;
1077 case M32C_OPERAND_DST16RNHI :
1078 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1079 break;
1080 case M32C_OPERAND_DST16RNQI :
1081 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1082 break;
1083 case M32C_OPERAND_DST16RNQI_S :
1084 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1085 break;
1086 case M32C_OPERAND_DST16RNSI :
1087 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1088 break;
1089 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1090 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1091 break;
1092 case M32C_OPERAND_DST32ANPREFIXED :
1093 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1094 break;
1095 case M32C_OPERAND_DST32ANPREFIXEDHI :
1096 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1097 break;
1098 case M32C_OPERAND_DST32ANPREFIXEDQI :
1099 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1100 break;
1101 case M32C_OPERAND_DST32ANPREFIXEDSI :
1102 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1103 break;
1104 case M32C_OPERAND_DST32ANUNPREFIXED :
1105 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1106 break;
1107 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1108 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1109 break;
1110 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1111 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1112 break;
1113 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1114 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1115 break;
1116 case M32C_OPERAND_DST32R0HI_S :
1117 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1118 break;
1119 case M32C_OPERAND_DST32R0QI_S :
1120 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1121 break;
1122 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1123 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1124 break;
1125 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1126 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1127 break;
1128 case M32C_OPERAND_DST32RNPREFIXEDHI :
1129 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1130 break;
1131 case M32C_OPERAND_DST32RNPREFIXEDQI :
1132 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1133 break;
1134 case M32C_OPERAND_DST32RNPREFIXEDSI :
1135 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1136 break;
1137 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1138 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1139 break;
1140 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1141 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1142 break;
1143 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1144 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1145 break;
1146 case M32C_OPERAND_G :
1147 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1148 break;
1149 case M32C_OPERAND_IMM_12_S4 :
1150 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1151 break;
1152 case M32C_OPERAND_IMM_13_U3 :
1153 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1154 break;
1155 case M32C_OPERAND_IMM_16_HI :
1156 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1157 break;
1158 case M32C_OPERAND_IMM_16_QI :
1159 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1160 break;
1161 case M32C_OPERAND_IMM_16_SI :
1162 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1163 break;
1164 case M32C_OPERAND_IMM_20_S4 :
1165 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1166 break;
1167 case M32C_OPERAND_IMM_24_HI :
1168 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1169 break;
1170 case M32C_OPERAND_IMM_24_QI :
1171 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1172 break;
1173 case M32C_OPERAND_IMM_24_SI :
1174 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1175 break;
1176 case M32C_OPERAND_IMM_32_HI :
1177 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1178 break;
1179 case M32C_OPERAND_IMM_32_QI :
1180 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1181 break;
1182 case M32C_OPERAND_IMM_32_SI :
1183 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1184 break;
1185 case M32C_OPERAND_IMM_40_HI :
1186 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1187 break;
1188 case M32C_OPERAND_IMM_40_QI :
1189 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1190 break;
1191 case M32C_OPERAND_IMM_40_SI :
1192 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1193 break;
1194 case M32C_OPERAND_IMM_48_HI :
1195 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1196 break;
1197 case M32C_OPERAND_IMM_48_QI :
1198 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1199 break;
1200 case M32C_OPERAND_IMM_48_SI :
1201 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1202 break;
1203 case M32C_OPERAND_IMM_56_HI :
1204 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1205 break;
1206 case M32C_OPERAND_IMM_56_QI :
1207 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1208 break;
1209 case M32C_OPERAND_IMM_64_HI :
1210 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1211 break;
1212 case M32C_OPERAND_IMM_8_HI :
1213 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1214 break;
1215 case M32C_OPERAND_IMM_8_QI :
1216 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1217 break;
1218 case M32C_OPERAND_IMM_8_S4 :
1219 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1220 break;
1221 case M32C_OPERAND_IMM_SH_12_S4 :
1222 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1223 break;
1224 case M32C_OPERAND_IMM_SH_20_S4 :
1225 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1226 break;
1227 case M32C_OPERAND_IMM_SH_8_S4 :
1228 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1229 break;
1230 case M32C_OPERAND_IMM1_S :
1231 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1232 break;
1233 case M32C_OPERAND_IMM3_S :
1234 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1235 break;
1236 case M32C_OPERAND_LAB_16_8 :
1237 {
1238 bfd_vma value = 0;
1239 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value);
1240 fields->f_lab_16_8 = value;
1241 }
1242 break;
1243 case M32C_OPERAND_LAB_24_8 :
1244 {
1245 bfd_vma value = 0;
1246 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value);
1247 fields->f_lab_24_8 = value;
1248 }
1249 break;
1250 case M32C_OPERAND_LAB_32_8 :
1251 {
1252 bfd_vma value = 0;
1253 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value);
1254 fields->f_lab_32_8 = value;
1255 }
1256 break;
1257 case M32C_OPERAND_LAB_40_8 :
1258 {
1259 bfd_vma value = 0;
1260 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value);
1261 fields->f_lab_40_8 = value;
1262 }
1263 break;
1264 case M32C_OPERAND_LAB_5_3 :
1265 {
1266 bfd_vma value = 0;
1267 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value);
1268 fields->f_lab_5_3 = value;
1269 }
1270 break;
1271 case M32C_OPERAND_LAB_8_16 :
1272 {
1273 bfd_vma value = 0;
1274 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value);
1275 fields->f_lab_8_16 = value;
1276 }
1277 break;
1278 case M32C_OPERAND_LAB_8_24 :
1279 {
1280 bfd_vma value = 0;
1281 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value);
1282 fields->f_lab_8_24 = value;
1283 }
1284 break;
1285 case M32C_OPERAND_LAB_8_8 :
1286 {
1287 bfd_vma value = 0;
1288 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value);
1289 fields->f_lab_8_8 = value;
1290 }
1291 break;
1292 case M32C_OPERAND_LAB32_JMP_S :
1293 {
1294 bfd_vma value = 0;
1295 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value);
1296 fields->f_lab32_jmp_s = value;
1297 }
1298 break;
1299 case M32C_OPERAND_Q :
1300 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1301 break;
1302 case M32C_OPERAND_R0 :
1303 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1304 break;
1305 case M32C_OPERAND_R0H :
1306 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1307 break;
1308 case M32C_OPERAND_R0L :
1309 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1310 break;
1311 case M32C_OPERAND_R1 :
1312 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1313 break;
1314 case M32C_OPERAND_R1R2R0 :
1315 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1316 break;
1317 case M32C_OPERAND_R2 :
1318 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1319 break;
1320 case M32C_OPERAND_R2R0 :
1321 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1322 break;
1323 case M32C_OPERAND_R3 :
1324 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1325 break;
1326 case M32C_OPERAND_R3R1 :
1327 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1328 break;
1329 case M32C_OPERAND_REGSETPOP :
1330 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1331 break;
1332 case M32C_OPERAND_REGSETPUSH :
1333 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1334 break;
1335 case M32C_OPERAND_RN16_PUSH_S :
1336 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1337 break;
1338 case M32C_OPERAND_S :
1339 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1340 break;
1341 case M32C_OPERAND_SRC16AN :
1342 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1343 break;
1344 case M32C_OPERAND_SRC16ANHI :
1345 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1346 break;
1347 case M32C_OPERAND_SRC16ANQI :
1348 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1349 break;
1350 case M32C_OPERAND_SRC16RNHI :
1351 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1352 break;
1353 case M32C_OPERAND_SRC16RNQI :
1354 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1355 break;
1356 case M32C_OPERAND_SRC32ANPREFIXED :
1357 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1358 break;
1359 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1360 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1361 break;
1362 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1363 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1364 break;
1365 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1366 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1367 break;
1368 case M32C_OPERAND_SRC32ANUNPREFIXED :
1369 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1370 break;
1371 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1372 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1373 break;
1374 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1375 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1376 break;
1377 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1378 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1379 break;
1380 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1381 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1382 break;
1383 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1384 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1385 break;
1386 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1387 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1388 break;
1389 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1390 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1391 break;
1392 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1393 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1394 break;
1395 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1396 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1397 break;
1398 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1399 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1400 break;
1401 case M32C_OPERAND_X :
1402 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1403 break;
1404 case M32C_OPERAND_Z :
1405 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1406 break;
1407 case M32C_OPERAND_COND16_16 :
1408 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1409 break;
1410 case M32C_OPERAND_COND16_24 :
1411 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1412 break;
1413 case M32C_OPERAND_COND16_32 :
1414 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1415 break;
1416 case M32C_OPERAND_COND16C :
1417 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1418 break;
1419 case M32C_OPERAND_COND16J :
1420 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1421 break;
1422 case M32C_OPERAND_COND16J5 :
1423 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1424 break;
1425 case M32C_OPERAND_COND32 :
1426 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1427 break;
1428 case M32C_OPERAND_COND32_16 :
1429 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1430 break;
1431 case M32C_OPERAND_COND32_24 :
1432 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1433 break;
1434 case M32C_OPERAND_COND32_32 :
1435 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1436 break;
1437 case M32C_OPERAND_COND32_40 :
1438 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1439 break;
1440 case M32C_OPERAND_COND32J :
1441 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1442 break;
1443 case M32C_OPERAND_CR1_PREFIXED_32 :
1444 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1445 break;
1446 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1447 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1448 break;
1449 case M32C_OPERAND_CR16 :
1450 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1451 break;
1452 case M32C_OPERAND_CR2_32 :
1453 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1454 break;
1455 case M32C_OPERAND_CR3_PREFIXED_32 :
1456 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1457 break;
1458 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1459 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1460 break;
1461 case M32C_OPERAND_FLAGS16 :
1462 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1463 break;
1464 case M32C_OPERAND_FLAGS32 :
1465 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1466 break;
1467 case M32C_OPERAND_SCCOND32 :
1468 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1469 break;
1470 case M32C_OPERAND_SIZE :
1471 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1472 break;
1473
1474 default :
1475 /* xgettext:c-format */
1476 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1477 abort ();
1478 }
1479
1480 return errmsg;
1481 }
1482
1483 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1484 {
1485 parse_insn_normal,
1486 };
1487
1488 void
1489 m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1490 {
1491 m32c_cgen_init_opcode_table (cd);
1492 m32c_cgen_init_ibld_table (cd);
1493 cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1494 cd->parse_operand = m32c_cgen_parse_operand;
1495 }
1496
1497 \f
1498
1499 /* Regex construction routine.
1500
1501 This translates an opcode syntax string into a regex string,
1502 by replacing any non-character syntax element (such as an
1503 opcode) with the pattern '.*'
1504
1505 It then compiles the regex and stores it in the opcode, for
1506 later use by m32c_cgen_assemble_insn
1507
1508 Returns NULL for success, an error message for failure. */
1509
1510 char *
1511 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1512 {
1513 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1514 const char *mnem = CGEN_INSN_MNEMONIC (insn);
1515 char rxbuf[CGEN_MAX_RX_ELEMENTS];
1516 char *rx = rxbuf;
1517 const CGEN_SYNTAX_CHAR_TYPE *syn;
1518 int reg_err;
1519
1520 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1521
1522 /* Mnemonics come first in the syntax string. */
1523 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1524 return _("missing mnemonic in syntax string");
1525 ++syn;
1526
1527 /* Generate a case sensitive regular expression that emulates case
1528 insensitive matching in the "C" locale. We cannot generate a case
1529 insensitive regular expression because in Turkish locales, 'i' and 'I'
1530 are not equal modulo case conversion. */
1531
1532 /* Copy the literal mnemonic out of the insn. */
1533 for (; *mnem; mnem++)
1534 {
1535 char c = *mnem;
1536
1537 if (ISALPHA (c))
1538 {
1539 *rx++ = '[';
1540 *rx++ = TOLOWER (c);
1541 *rx++ = TOUPPER (c);
1542 *rx++ = ']';
1543 }
1544 else
1545 *rx++ = c;
1546 }
1547
1548 /* Copy any remaining literals from the syntax string into the rx. */
1549 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1550 {
1551 if (CGEN_SYNTAX_CHAR_P (* syn))
1552 {
1553 char c = CGEN_SYNTAX_CHAR (* syn);
1554
1555 switch (c)
1556 {
1557 /* Escape any regex metacharacters in the syntax. */
1558 case '.': case '[': case '\\':
1559 case '*': case '^': case '$':
1560
1561 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1562 case '?': case '{': case '}':
1563 case '(': case ')': case '*':
1564 case '|': case '+': case ']':
1565 #endif
1566 *rx++ = '\\';
1567 *rx++ = c;
1568 break;
1569
1570 default:
1571 if (ISALPHA (c))
1572 {
1573 *rx++ = '[';
1574 *rx++ = TOLOWER (c);
1575 *rx++ = TOUPPER (c);
1576 *rx++ = ']';
1577 }
1578 else
1579 *rx++ = c;
1580 break;
1581 }
1582 }
1583 else
1584 {
1585 /* Replace non-syntax fields with globs. */
1586 *rx++ = '.';
1587 *rx++ = '*';
1588 }
1589 }
1590
1591 /* Trailing whitespace ok. */
1592 * rx++ = '[';
1593 * rx++ = ' ';
1594 * rx++ = '\t';
1595 * rx++ = ']';
1596 * rx++ = '*';
1597
1598 /* But anchor it after that. */
1599 * rx++ = '$';
1600 * rx = '\0';
1601
1602 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1603 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1604
1605 if (reg_err == 0)
1606 return NULL;
1607 else
1608 {
1609 static char msg[80];
1610
1611 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1612 regfree ((regex_t *) CGEN_INSN_RX (insn));
1613 free (CGEN_INSN_RX (insn));
1614 (CGEN_INSN_RX (insn)) = NULL;
1615 return msg;
1616 }
1617 }
1618
1619 \f
1620 /* Default insn parser.
1621
1622 The syntax string is scanned and operands are parsed and stored in FIELDS.
1623 Relocs are queued as we go via other callbacks.
1624
1625 ??? Note that this is currently an all-or-nothing parser. If we fail to
1626 parse the instruction, we return 0 and the caller will start over from
1627 the beginning. Backtracking will be necessary in parsing subexpressions,
1628 but that can be handled there. Not handling backtracking here may get
1629 expensive in the case of the m68k. Deal with later.
1630
1631 Returns NULL for success, an error message for failure. */
1632
1633 static const char *
1634 parse_insn_normal (CGEN_CPU_DESC cd,
1635 const CGEN_INSN *insn,
1636 const char **strp,
1637 CGEN_FIELDS *fields)
1638 {
1639 /* ??? Runtime added insns not handled yet. */
1640 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1641 const char *str = *strp;
1642 const char *errmsg;
1643 const char *p;
1644 const CGEN_SYNTAX_CHAR_TYPE * syn;
1645 #ifdef CGEN_MNEMONIC_OPERANDS
1646 /* FIXME: wip */
1647 int past_opcode_p;
1648 #endif
1649
1650 /* For now we assume the mnemonic is first (there are no leading operands).
1651 We can parse it without needing to set up operand parsing.
1652 GAS's input scrubber will ensure mnemonics are lowercase, but we may
1653 not be called from GAS. */
1654 p = CGEN_INSN_MNEMONIC (insn);
1655 while (*p && TOLOWER (*p) == TOLOWER (*str))
1656 ++p, ++str;
1657
1658 if (* p)
1659 return _("unrecognized instruction");
1660
1661 #ifndef CGEN_MNEMONIC_OPERANDS
1662 if (* str && ! ISSPACE (* str))
1663 return _("unrecognized instruction");
1664 #endif
1665
1666 CGEN_INIT_PARSE (cd);
1667 cgen_init_parse_operand (cd);
1668 #ifdef CGEN_MNEMONIC_OPERANDS
1669 past_opcode_p = 0;
1670 #endif
1671
1672 /* We don't check for (*str != '\0') here because we want to parse
1673 any trailing fake arguments in the syntax string. */
1674 syn = CGEN_SYNTAX_STRING (syntax);
1675
1676 /* Mnemonics come first for now, ensure valid string. */
1677 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1678 abort ();
1679
1680 ++syn;
1681
1682 while (* syn != 0)
1683 {
1684 /* Non operand chars must match exactly. */
1685 if (CGEN_SYNTAX_CHAR_P (* syn))
1686 {
1687 /* FIXME: While we allow for non-GAS callers above, we assume the
1688 first char after the mnemonic part is a space. */
1689 /* FIXME: We also take inappropriate advantage of the fact that
1690 GAS's input scrubber will remove extraneous blanks. */
1691 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1692 {
1693 #ifdef CGEN_MNEMONIC_OPERANDS
1694 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1695 past_opcode_p = 1;
1696 #endif
1697 ++ syn;
1698 ++ str;
1699 }
1700 else if (*str)
1701 {
1702 /* Syntax char didn't match. Can't be this insn. */
1703 static char msg [80];
1704
1705 /* xgettext:c-format */
1706 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1707 CGEN_SYNTAX_CHAR(*syn), *str);
1708 return msg;
1709 }
1710 else
1711 {
1712 /* Ran out of input. */
1713 static char msg [80];
1714
1715 /* xgettext:c-format */
1716 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1717 CGEN_SYNTAX_CHAR(*syn));
1718 return msg;
1719 }
1720 continue;
1721 }
1722
1723 /* We have an operand of some sort. */
1724 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1725 &str, fields);
1726 if (errmsg)
1727 return errmsg;
1728
1729 /* Done with this operand, continue with next one. */
1730 ++ syn;
1731 }
1732
1733 /* If we're at the end of the syntax string, we're done. */
1734 if (* syn == 0)
1735 {
1736 /* FIXME: For the moment we assume a valid `str' can only contain
1737 blanks now. IE: We needn't try again with a longer version of
1738 the insn and it is assumed that longer versions of insns appear
1739 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1740 while (ISSPACE (* str))
1741 ++ str;
1742
1743 if (* str != '\0')
1744 return _("junk at end of line"); /* FIXME: would like to include `str' */
1745
1746 return NULL;
1747 }
1748
1749 /* We couldn't parse it. */
1750 return _("unrecognized instruction");
1751 }
1752 \f
1753 /* Main entry point.
1754 This routine is called for each instruction to be assembled.
1755 STR points to the insn to be assembled.
1756 We assume all necessary tables have been initialized.
1757 The assembled instruction, less any fixups, is stored in BUF.
1758 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1759 still needs to be converted to target byte order, otherwise BUF is an array
1760 of bytes in target byte order.
1761 The result is a pointer to the insn's entry in the opcode table,
1762 or NULL if an error occured (an error message will have already been
1763 printed).
1764
1765 Note that when processing (non-alias) macro-insns,
1766 this function recurses.
1767
1768 ??? It's possible to make this cpu-independent.
1769 One would have to deal with a few minor things.
1770 At this point in time doing so would be more of a curiosity than useful
1771 [for example this file isn't _that_ big], but keeping the possibility in
1772 mind helps keep the design clean. */
1773
1774 const CGEN_INSN *
1775 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1776 const char *str,
1777 CGEN_FIELDS *fields,
1778 CGEN_INSN_BYTES_PTR buf,
1779 char **errmsg)
1780 {
1781 const char *start;
1782 CGEN_INSN_LIST *ilist;
1783 const char *parse_errmsg = NULL;
1784 const char *insert_errmsg = NULL;
1785 int recognized_mnemonic = 0;
1786
1787 /* Skip leading white space. */
1788 while (ISSPACE (* str))
1789 ++ str;
1790
1791 /* The instructions are stored in hashed lists.
1792 Get the first in the list. */
1793 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1794
1795 /* Keep looking until we find a match. */
1796 start = str;
1797 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1798 {
1799 const CGEN_INSN *insn = ilist->insn;
1800 recognized_mnemonic = 1;
1801
1802 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1803 /* Not usually needed as unsupported opcodes
1804 shouldn't be in the hash lists. */
1805 /* Is this insn supported by the selected cpu? */
1806 if (! m32c_cgen_insn_supported (cd, insn))
1807 continue;
1808 #endif
1809 /* If the RELAXED attribute is set, this is an insn that shouldn't be
1810 chosen immediately. Instead, it is used during assembler/linker
1811 relaxation if possible. */
1812 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1813 continue;
1814
1815 str = start;
1816
1817 /* Skip this insn if str doesn't look right lexically. */
1818 if (CGEN_INSN_RX (insn) != NULL &&
1819 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1820 continue;
1821
1822 /* Allow parse/insert handlers to obtain length of insn. */
1823 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1824
1825 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1826 if (parse_errmsg != NULL)
1827 continue;
1828
1829 /* ??? 0 is passed for `pc'. */
1830 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1831 (bfd_vma) 0);
1832 if (insert_errmsg != NULL)
1833 continue;
1834
1835 /* It is up to the caller to actually output the insn and any
1836 queued relocs. */
1837 return insn;
1838 }
1839
1840 {
1841 static char errbuf[150];
1842 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1843 const char *tmp_errmsg;
1844
1845 /* If requesting verbose error messages, use insert_errmsg.
1846 Failing that, use parse_errmsg. */
1847 tmp_errmsg = (insert_errmsg ? insert_errmsg :
1848 parse_errmsg ? parse_errmsg :
1849 recognized_mnemonic ?
1850 _("unrecognized form of instruction") :
1851 _("unrecognized instruction"));
1852
1853 if (strlen (start) > 50)
1854 /* xgettext:c-format */
1855 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1856 else
1857 /* xgettext:c-format */
1858 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1859 #else
1860 if (strlen (start) > 50)
1861 /* xgettext:c-format */
1862 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1863 else
1864 /* xgettext:c-format */
1865 sprintf (errbuf, _("bad instruction `%.50s'"), start);
1866 #endif
1867
1868 *errmsg = errbuf;
1869 return NULL;
1870 }
1871 }
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