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PR ld/11843
[binutils.git] / bfd / elf32-rx.c
blob7d9dbc125f7f726e556d5694b323c1794117ef74
1 /* Renesas RX specific support for 32-bit ELF.
2 Copyright (C) 2008, 2009, 2010
3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rx.h"
26 #include "libiberty.h"
27
28 #define RX_OPCODE_BIG_ENDIAN 0
29
30 #ifdef DEBUG
31 char * rx_get_reloc (long);
32 void dump_symtab (bfd *, void *, void *);
33 #endif
34
35 #define RXREL(n,sz,bit,shift,complain,pcrel) \
36 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
37 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
38
39 /* Note that the relocations around 0x7f are internal to this file;
40 feel free to move them as needed to avoid conflicts with published
41 relocation numbers. */
42
43 static reloc_howto_type rx_elf_howto_table [] =
44 {
45 RXREL (NONE, 0, 0, 0, dont, FALSE),
46 RXREL (DIR32, 2, 32, 0, signed, FALSE),
47 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
48 RXREL (DIR16, 1, 16, 0, dont, FALSE),
49 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
50 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
51 RXREL (DIR8, 0, 8, 0, dont, FALSE),
52 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
53 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
54 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
55 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
56 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
57 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
58 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
59 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
60 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
61 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
62 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
63 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
64
65 EMPTY_HOWTO (0x13),
66 EMPTY_HOWTO (0x14),
67 EMPTY_HOWTO (0x15),
68 EMPTY_HOWTO (0x16),
69 EMPTY_HOWTO (0x17),
70 EMPTY_HOWTO (0x18),
71 EMPTY_HOWTO (0x19),
72 EMPTY_HOWTO (0x1a),
73 EMPTY_HOWTO (0x1b),
74 EMPTY_HOWTO (0x1c),
75 EMPTY_HOWTO (0x1d),
76 EMPTY_HOWTO (0x1e),
77 EMPTY_HOWTO (0x1f),
78
79 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
80 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
81 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
82 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
83 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
84 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
85 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
86 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
87 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
88 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
89 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
90 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
91 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
92 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
93
94 EMPTY_HOWTO (0x2e),
95 EMPTY_HOWTO (0x2f),
96 EMPTY_HOWTO (0x30),
97 EMPTY_HOWTO (0x31),
98 EMPTY_HOWTO (0x32),
99 EMPTY_HOWTO (0x33),
100 EMPTY_HOWTO (0x34),
101 EMPTY_HOWTO (0x35),
102 EMPTY_HOWTO (0x36),
103 EMPTY_HOWTO (0x37),
104 EMPTY_HOWTO (0x38),
105 EMPTY_HOWTO (0x39),
106 EMPTY_HOWTO (0x3a),
107 EMPTY_HOWTO (0x3b),
108 EMPTY_HOWTO (0x3c),
109 EMPTY_HOWTO (0x3d),
110 EMPTY_HOWTO (0x3e),
111 EMPTY_HOWTO (0x3f),
112 EMPTY_HOWTO (0x40),
113
114 RXREL (ABS32, 2, 32, 0, dont, FALSE),
115 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
116 RXREL (ABS16, 1, 16, 0, dont, FALSE),
117 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
118 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
119 RXREL (ABS8, 0, 8, 0, dont, FALSE),
120 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
121 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
122 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
123 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
124 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
125 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
126 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
127 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
129 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
130 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
131
132 #define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
133
134 EMPTY_HOWTO (0x52),
135 EMPTY_HOWTO (0x53),
136 EMPTY_HOWTO (0x54),
137 EMPTY_HOWTO (0x55),
138 EMPTY_HOWTO (0x56),
139 EMPTY_HOWTO (0x57),
140 EMPTY_HOWTO (0x58),
141 EMPTY_HOWTO (0x59),
142 EMPTY_HOWTO (0x5a),
143 EMPTY_HOWTO (0x5b),
144 EMPTY_HOWTO (0x5c),
145 EMPTY_HOWTO (0x5d),
146 EMPTY_HOWTO (0x5e),
147 EMPTY_HOWTO (0x5f),
148 EMPTY_HOWTO (0x60),
149 EMPTY_HOWTO (0x61),
150 EMPTY_HOWTO (0x62),
151 EMPTY_HOWTO (0x63),
152 EMPTY_HOWTO (0x64),
153 EMPTY_HOWTO (0x65),
154 EMPTY_HOWTO (0x66),
155 EMPTY_HOWTO (0x67),
156 EMPTY_HOWTO (0x68),
157 EMPTY_HOWTO (0x69),
158 EMPTY_HOWTO (0x6a),
159 EMPTY_HOWTO (0x6b),
160 EMPTY_HOWTO (0x6c),
161 EMPTY_HOWTO (0x6d),
162 EMPTY_HOWTO (0x6e),
163 EMPTY_HOWTO (0x6f),
164 EMPTY_HOWTO (0x70),
165 EMPTY_HOWTO (0x71),
166 EMPTY_HOWTO (0x72),
167 EMPTY_HOWTO (0x73),
168 EMPTY_HOWTO (0x74),
169 EMPTY_HOWTO (0x75),
170 EMPTY_HOWTO (0x76),
171 EMPTY_HOWTO (0x77),
172
173 /* These are internal. */
174 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
175 /* ---- ---- 4--- 3210. */
176 #define R_RX_RH_ABS5p8B 0x78
177 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
178 #define R_RX_RH_ABS5p8W 0x79
179 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
180 #define R_RX_RH_ABS5p8L 0x7a
181 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
182 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
183 /* ---- -432 1--- 0---. */
184 #define R_RX_RH_ABS5p5B 0x7b
185 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
186 #define R_RX_RH_ABS5p5W 0x7c
187 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
188 #define R_RX_RH_ABS5p5L 0x7d
189 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
190 /* A 4-bit unsigned immediate at bit position 8. */
191 #define R_RX_RH_UIMM4p8 0x7e
192 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
193 /* A 4-bit negative unsigned immediate at bit position 8. */
194 #define R_RX_RH_UNEG4p8 0x7f
195 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
196 /* End of internal relocs. */
197
198 RXREL (SYM, 2, 32, 0, dont, FALSE),
199 RXREL (OPneg, 2, 32, 0, dont, FALSE),
200 RXREL (OPadd, 2, 32, 0, dont, FALSE),
201 RXREL (OPsub, 2, 32, 0, dont, FALSE),
202 RXREL (OPmul, 2, 32, 0, dont, FALSE),
203 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
204 RXREL (OPshla, 2, 32, 0, dont, FALSE),
205 RXREL (OPshra, 2, 32, 0, dont, FALSE),
206 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
207 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
208 RXREL (OPand, 2, 32, 0, dont, FALSE),
209 RXREL (OPor, 2, 32, 0, dont, FALSE),
210 RXREL (OPxor, 2, 32, 0, dont, FALSE),
211 RXREL (OPnot, 2, 32, 0, dont, FALSE),
212 RXREL (OPmod, 2, 32, 0, dont, FALSE),
213 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
214 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
215 };
216 \f
217 /* Map BFD reloc types to RX ELF reloc types. */
218
219 struct rx_reloc_map
220 {
221 bfd_reloc_code_real_type bfd_reloc_val;
222 unsigned int rx_reloc_val;
223 };
224
225 static const struct rx_reloc_map rx_reloc_map [] =
226 {
227 { BFD_RELOC_NONE, R_RX_NONE },
228 { BFD_RELOC_8, R_RX_DIR8S },
229 { BFD_RELOC_16, R_RX_DIR16S },
230 { BFD_RELOC_24, R_RX_DIR24S },
231 { BFD_RELOC_32, R_RX_DIR32 },
232 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
233 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
234 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
235 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
236 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
237 { BFD_RELOC_RX_8U, R_RX_DIR8U },
238 { BFD_RELOC_RX_16U, R_RX_DIR16U },
239 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
240 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
241 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
242 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
243 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
244 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
245 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
246 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
247 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
248 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
249 { BFD_RELOC_RX_SYM, R_RX_SYM },
250 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
251 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
252 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
253 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
254 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
255 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
256 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
257 };
258
259 #define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
260
261 static reloc_howto_type *
262 rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
263 bfd_reloc_code_real_type code)
264 {
265 unsigned int i;
266
267 if (code == BFD_RELOC_RX_32_OP)
268 return rx_elf_howto_table + R_RX_DIR32;
269
270 for (i = ARRAY_SIZE (rx_reloc_map); --i;)
271 if (rx_reloc_map [i].bfd_reloc_val == code)
272 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
273
274 return NULL;
275 }
276
277 static reloc_howto_type *
278 rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
279 {
280 unsigned int i;
281
282 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
283 if (rx_elf_howto_table[i].name != NULL
284 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
285 return rx_elf_howto_table + i;
286
287 return NULL;
288 }
289
290 /* Set the howto pointer for an RX ELF reloc. */
291
292 static void
293 rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
294 arelent * cache_ptr,
295 Elf_Internal_Rela * dst)
296 {
297 unsigned int r_type;
298
299 r_type = ELF32_R_TYPE (dst->r_info);
300 BFD_ASSERT (r_type < (unsigned int) R_RX_max);
301 cache_ptr->howto = rx_elf_howto_table + r_type;
302 }
303 \f
304 static bfd_vma
305 get_symbol_value (const char * name,
306 bfd_reloc_status_type * status,
307 struct bfd_link_info * info,
308 bfd * input_bfd,
309 asection * input_section,
310 int offset)
311 {
312 bfd_vma value = 0;
313 struct bfd_link_hash_entry * h;
314
315 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
316
317 if (h == NULL
318 || (h->type != bfd_link_hash_defined
319 && h->type != bfd_link_hash_defweak))
320 * status = info->callbacks->undefined_symbol
321 (info, name, input_bfd, input_section, offset, TRUE);
322 else
323 value = (h->u.def.value
324 + h->u.def.section->output_section->vma
325 + h->u.def.section->output_offset);
326
327 return value;
328 }
329
330 static bfd_vma
331 get_gp (bfd_reloc_status_type * status,
332 struct bfd_link_info * info,
333 bfd * abfd,
334 asection * sec,
335 int offset)
336 {
337 static bfd_boolean cached = FALSE;
338 static bfd_vma cached_value = 0;
339
340 if (!cached)
341 {
342 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
343 cached = TRUE;
344 }
345 return cached_value;
346 }
347
348 static bfd_vma
349 get_romstart (bfd_reloc_status_type * status,
350 struct bfd_link_info * info,
351 bfd * abfd,
352 asection * sec,
353 int offset)
354 {
355 static bfd_boolean cached = FALSE;
356 static bfd_vma cached_value = 0;
357
358 if (!cached)
359 {
360 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
361 cached = TRUE;
362 }
363 return cached_value;
364 }
365
366 static bfd_vma
367 get_ramstart (bfd_reloc_status_type * status,
368 struct bfd_link_info * info,
369 bfd * abfd,
370 asection * sec,
371 int offset)
372 {
373 static bfd_boolean cached = FALSE;
374 static bfd_vma cached_value = 0;
375
376 if (!cached)
377 {
378 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
379 cached = TRUE;
380 }
381 return cached_value;
382 }
383
384 #define NUM_STACK_ENTRIES 16
385 static int32_t rx_stack [ NUM_STACK_ENTRIES ];
386 static unsigned int rx_stack_top;
387
388 #define RX_STACK_PUSH(val) \
389 do \
390 { \
391 if (rx_stack_top < NUM_STACK_ENTRIES) \
392 rx_stack [rx_stack_top ++] = (val); \
393 else \
394 r = bfd_reloc_dangerous; \
395 } \
396 while (0)
397
398 #define RX_STACK_POP(dest) \
399 do \
400 { \
401 if (rx_stack_top > 0) \
402 (dest) = rx_stack [-- rx_stack_top]; \
403 else \
404 (dest) = 0, r = bfd_reloc_dangerous; \
405 } \
406 while (0)
407
408 /* Relocate an RX ELF section.
409 There is some attempt to make this function usable for many architectures,
410 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
411 if only to serve as a learning tool.
412
413 The RELOCATE_SECTION function is called by the new ELF backend linker
414 to handle the relocations for a section.
415
416 The relocs are always passed as Rela structures; if the section
417 actually uses Rel structures, the r_addend field will always be
418 zero.
419
420 This function is responsible for adjusting the section contents as
421 necessary, and (if using Rela relocs and generating a relocatable
422 output file) adjusting the reloc addend as necessary.
423
424 This function does not have to worry about setting the reloc
425 address or the reloc symbol index.
426
427 LOCAL_SYMS is a pointer to the swapped in local symbols.
428
429 LOCAL_SECTIONS is an array giving the section in the input file
430 corresponding to the st_shndx field of each local symbol.
431
432 The global hash table entry for the global symbols can be found
433 via elf_sym_hashes (input_bfd).
434
435 When generating relocatable output, this function must handle
436 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
437 going to be the section symbol corresponding to the output
438 section, which means that the addend must be adjusted
439 accordingly. */
440
441 static bfd_boolean
442 rx_elf_relocate_section
443 (bfd * output_bfd,
444 struct bfd_link_info * info,
445 bfd * input_bfd,
446 asection * input_section,
447 bfd_byte * contents,
448 Elf_Internal_Rela * relocs,
449 Elf_Internal_Sym * local_syms,
450 asection ** local_sections)
451 {
452 Elf_Internal_Shdr * symtab_hdr;
453 struct elf_link_hash_entry ** sym_hashes;
454 Elf_Internal_Rela * rel;
455 Elf_Internal_Rela * relend;
456
457 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
458 sym_hashes = elf_sym_hashes (input_bfd);
459 relend = relocs + input_section->reloc_count;
460 for (rel = relocs; rel < relend; rel ++)
461 {
462 reloc_howto_type * howto;
463 unsigned long r_symndx;
464 Elf_Internal_Sym * sym;
465 asection * sec;
466 struct elf_link_hash_entry * h;
467 bfd_vma relocation;
468 bfd_reloc_status_type r;
469 const char * name = NULL;
470 bfd_boolean unresolved_reloc = TRUE;
471 int r_type;
472
473 r_type = ELF32_R_TYPE (rel->r_info);
474 r_symndx = ELF32_R_SYM (rel->r_info);
475
476 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
477 h = NULL;
478 sym = NULL;
479 sec = NULL;
480 relocation = 0;
481
482 if (r_symndx < symtab_hdr->sh_info)
483 {
484 sym = local_syms + r_symndx;
485 sec = local_sections [r_symndx];
486 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
487
488 name = bfd_elf_string_from_elf_section
489 (input_bfd, symtab_hdr->sh_link, sym->st_name);
490 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
491 }
492 else
493 {
494 bfd_boolean warned;
495
496 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
497 r_symndx, symtab_hdr, sym_hashes, h,
498 sec, relocation, unresolved_reloc,
499 warned);
500
501 name = h->root.root.string;
502 }
503
504 if (sec != NULL && elf_discarded_section (sec))
505 {
506 /* For relocs against symbols from removed linkonce sections,
507 or sections discarded by a linker script, we just want the
508 section contents zeroed. Avoid any special processing. */
509 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
510 rel->r_info = 0;
511 rel->r_addend = 0;
512 continue;
513 }
514
515 if (info->relocatable)
516 {
517 /* This is a relocatable link. We don't have to change
518 anything, unless the reloc is against a section symbol,
519 in which case we have to adjust according to where the
520 section symbol winds up in the output section. */
521 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
522 rel->r_addend += sec->output_offset;
523 continue;
524 }
525
526 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
527 /* If the symbol is undefined and weak
528 then the relocation resolves to zero. */
529 relocation = 0;
530 else
531 {
532 if (howto->pc_relative)
533 {
534 relocation -= (input_section->output_section->vma
535 + input_section->output_offset
536 + rel->r_offset);
537 if (r_type != R_RX_RH_3_PCREL
538 && r_type != R_RX_DIR3U_PCREL)
539 relocation ++;
540 }
541
542 relocation += rel->r_addend;
543 }
544
545 r = bfd_reloc_ok;
546
547 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
548 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
549 #define OP(i) (contents[rel->r_offset + (i)])
550 #define WARN_REDHAT(type) \
551 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
552 input_bfd, input_section, name)
553
554 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
555 switch (r_type)
556 {
557 case R_RX_NONE:
558 break;
559
560 case R_RX_RH_RELAX:
561 break;
562
563 case R_RX_RH_3_PCREL:
564 WARN_REDHAT ("RX_RH_3_PCREL");
565 RANGE (3, 10);
566 OP (0) &= 0xf8;
567 OP (0) |= relocation & 0x07;
568 break;
569
570 case R_RX_RH_8_NEG:
571 WARN_REDHAT ("RX_RH_8_NEG");
572 relocation = - relocation;
573 case R_RX_DIR8S_PCREL:
574 RANGE (-128, 127);
575 OP (0) = relocation;
576 break;
577
578 case R_RX_DIR8S:
579 RANGE (-128, 255);
580 OP (0) = relocation;
581 break;
582
583 case R_RX_DIR8U:
584 RANGE (0, 255);
585 OP (0) = relocation;
586 break;
587
588 case R_RX_RH_16_NEG:
589 WARN_REDHAT ("RX_RH_16_NEG");
590 relocation = - relocation;
591 case R_RX_DIR16S_PCREL:
592 RANGE (-32768, 32767);
593 #if RX_OPCODE_BIG_ENDIAN
594 #else
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 #endif
598 break;
599
600 case R_RX_RH_16_OP:
601 WARN_REDHAT ("RX_RH_16_OP");
602 RANGE (-32768, 32767);
603 #if RX_OPCODE_BIG_ENDIAN
604 OP (1) = relocation;
605 OP (0) = relocation >> 8;
606 #else
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 #endif
610 break;
611
612 case R_RX_DIR16S:
613 RANGE (-32768, 65535);
614 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
615 {
616 OP (1) = relocation;
617 OP (0) = relocation >> 8;
618 }
619 else
620 {
621 OP (0) = relocation;
622 OP (1) = relocation >> 8;
623 }
624 break;
625
626 case R_RX_DIR16U:
627 RANGE (0, 65536);
628 #if RX_OPCODE_BIG_ENDIAN
629 OP (1) = relocation;
630 OP (0) = relocation >> 8;
631 #else
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 #endif
635 break;
636
637 case R_RX_DIR16:
638 RANGE (-32768, 65536);
639 #if RX_OPCODE_BIG_ENDIAN
640 OP (1) = relocation;
641 OP (0) = relocation >> 8;
642 #else
643 OP (0) = relocation;
644 OP (1) = relocation >> 8;
645 #endif
646 break;
647
648 case R_RX_DIR16_REV:
649 RANGE (-32768, 65536);
650 #if RX_OPCODE_BIG_ENDIAN
651 OP (0) = relocation;
652 OP (1) = relocation >> 8;
653 #else
654 OP (1) = relocation;
655 OP (0) = relocation >> 8;
656 #endif
657 break;
658
659 case R_RX_DIR3U_PCREL:
660 RANGE (3, 10);
661 OP (0) &= 0xf8;
662 OP (0) |= relocation & 0x07;
663 break;
664
665 case R_RX_RH_24_NEG:
666 WARN_REDHAT ("RX_RH_24_NEG");
667 relocation = - relocation;
668 case R_RX_DIR24S_PCREL:
669 RANGE (-0x800000, 0x7fffff);
670 #if RX_OPCODE_BIG_ENDIAN
671 OP (2) = relocation;
672 OP (1) = relocation >> 8;
673 OP (0) = relocation >> 16;
674 #else
675 OP (0) = relocation;
676 OP (1) = relocation >> 8;
677 OP (2) = relocation >> 16;
678 #endif
679 break;
680
681 case R_RX_RH_24_OP:
682 WARN_REDHAT ("RX_RH_24_OP");
683 RANGE (-0x800000, 0x7fffff);
684 #if RX_OPCODE_BIG_ENDIAN
685 OP (2) = relocation;
686 OP (1) = relocation >> 8;
687 OP (0) = relocation >> 16;
688 #else
689 OP (0) = relocation;
690 OP (1) = relocation >> 8;
691 OP (2) = relocation >> 16;
692 #endif
693 break;
694
695 case R_RX_DIR24S:
696 RANGE (-0x800000, 0x7fffff);
697 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
698 {
699 OP (2) = relocation;
700 OP (1) = relocation >> 8;
701 OP (0) = relocation >> 16;
702 }
703 else
704 {
705 OP (0) = relocation;
706 OP (1) = relocation >> 8;
707 OP (2) = relocation >> 16;
708 }
709 break;
710
711 case R_RX_RH_24_UNS:
712 WARN_REDHAT ("RX_RH_24_UNS");
713 RANGE (0, 0xffffff);
714 #if RX_OPCODE_BIG_ENDIAN
715 OP (2) = relocation;
716 OP (1) = relocation >> 8;
717 OP (0) = relocation >> 16;
718 #else
719 OP (0) = relocation;
720 OP (1) = relocation >> 8;
721 OP (2) = relocation >> 16;
722 #endif
723 break;
724
725 case R_RX_RH_32_NEG:
726 WARN_REDHAT ("RX_RH_32_NEG");
727 relocation = - relocation;
728 #if RX_OPCODE_BIG_ENDIAN
729 OP (3) = relocation;
730 OP (2) = relocation >> 8;
731 OP (1) = relocation >> 16;
732 OP (0) = relocation >> 24;
733 #else
734 OP (0) = relocation;
735 OP (1) = relocation >> 8;
736 OP (2) = relocation >> 16;
737 OP (3) = relocation >> 24;
738 #endif
739 break;
740
741 case R_RX_RH_32_OP:
742 WARN_REDHAT ("RX_RH_32_OP");
743 #if RX_OPCODE_BIG_ENDIAN
744 OP (3) = relocation;
745 OP (2) = relocation >> 8;
746 OP (1) = relocation >> 16;
747 OP (0) = relocation >> 24;
748 #else
749 OP (0) = relocation;
750 OP (1) = relocation >> 8;
751 OP (2) = relocation >> 16;
752 OP (3) = relocation >> 24;
753 #endif
754 break;
755
756 case R_RX_DIR32:
757 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
758 {
759 OP (3) = relocation;
760 OP (2) = relocation >> 8;
761 OP (1) = relocation >> 16;
762 OP (0) = relocation >> 24;
763 }
764 else
765 {
766 OP (0) = relocation;
767 OP (1) = relocation >> 8;
768 OP (2) = relocation >> 16;
769 OP (3) = relocation >> 24;
770 }
771 break;
772
773 case R_RX_DIR32_REV:
774 if (BIGE (output_bfd))
775 {
776 OP (0) = relocation;
777 OP (1) = relocation >> 8;
778 OP (2) = relocation >> 16;
779 OP (3) = relocation >> 24;
780 }
781 else
782 {
783 OP (3) = relocation;
784 OP (2) = relocation >> 8;
785 OP (1) = relocation >> 16;
786 OP (0) = relocation >> 24;
787 }
788 break;
789
790 case R_RX_RH_DIFF:
791 {
792 bfd_vma val;
793 WARN_REDHAT ("RX_RH_DIFF");
794 val = bfd_get_32 (output_bfd, & OP (0));
795 val -= relocation;
796 bfd_put_32 (output_bfd, val, & OP (0));
797 }
798 break;
799
800 case R_RX_RH_GPRELB:
801 WARN_REDHAT ("RX_RH_GPRELB");
802 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
803 RANGE (0, 65535);
804 #if RX_OPCODE_BIG_ENDIAN
805 OP (1) = relocation;
806 OP (0) = relocation >> 8;
807 #else
808 OP (0) = relocation;
809 OP (1) = relocation >> 8;
810 #endif
811 break;
812
813 case R_RX_RH_GPRELW:
814 WARN_REDHAT ("RX_RH_GPRELW");
815 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
816 ALIGN (1);
817 relocation >>= 1;
818 RANGE (0, 65535);
819 #if RX_OPCODE_BIG_ENDIAN
820 OP (1) = relocation;
821 OP (0) = relocation >> 8;
822 #else
823 OP (0) = relocation;
824 OP (1) = relocation >> 8;
825 #endif
826 break;
827
828 case R_RX_RH_GPRELL:
829 WARN_REDHAT ("RX_RH_GPRELL");
830 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
831 ALIGN (3);
832 relocation >>= 2;
833 RANGE (0, 65535);
834 #if RX_OPCODE_BIG_ENDIAN
835 OP (1) = relocation;
836 OP (0) = relocation >> 8;
837 #else
838 OP (0) = relocation;
839 OP (1) = relocation >> 8;
840 #endif
841 break;
842
843 /* Internal relocations just for relaxation: */
844 case R_RX_RH_ABS5p5B:
845 RX_STACK_POP (relocation);
846 RANGE (0, 31);
847 OP (0) &= 0xf8;
848 OP (0) |= relocation >> 2;
849 OP (1) &= 0x77;
850 OP (1) |= (relocation << 6) & 0x80;
851 OP (1) |= (relocation << 3) & 0x08;
852 break;
853
854 case R_RX_RH_ABS5p5W:
855 RX_STACK_POP (relocation);
856 RANGE (0, 62);
857 ALIGN (1);
858 relocation >>= 1;
859 OP (0) &= 0xf8;
860 OP (0) |= relocation >> 2;
861 OP (1) &= 0x77;
862 OP (1) |= (relocation << 6) & 0x80;
863 OP (1) |= (relocation << 3) & 0x08;
864 break;
865
866 case R_RX_RH_ABS5p5L:
867 RX_STACK_POP (relocation);
868 RANGE (0, 124);
869 ALIGN (3);
870 relocation >>= 2;
871 OP (0) &= 0xf8;
872 OP (0) |= relocation >> 2;
873 OP (1) &= 0x77;
874 OP (1) |= (relocation << 6) & 0x80;
875 OP (1) |= (relocation << 3) & 0x08;
876 break;
877
878 case R_RX_RH_ABS5p8B:
879 RX_STACK_POP (relocation);
880 RANGE (0, 31);
881 OP (0) &= 0x70;
882 OP (0) |= (relocation << 3) & 0x80;
883 OP (0) |= relocation & 0x0f;
884 break;
885
886 case R_RX_RH_ABS5p8W:
887 RX_STACK_POP (relocation);
888 RANGE (0, 62);
889 ALIGN (1);
890 relocation >>= 1;
891 OP (0) &= 0x70;
892 OP (0) |= (relocation << 3) & 0x80;
893 OP (0) |= relocation & 0x0f;
894 break;
895
896 case R_RX_RH_ABS5p8L:
897 RX_STACK_POP (relocation);
898 RANGE (0, 124);
899 ALIGN (3);
900 relocation >>= 2;
901 OP (0) &= 0x70;
902 OP (0) |= (relocation << 3) & 0x80;
903 OP (0) |= relocation & 0x0f;
904 break;
905
906 case R_RX_RH_UIMM4p8:
907 RANGE (0, 15);
908 OP (0) &= 0x0f;
909 OP (0) |= relocation << 4;
910 break;
911
912 case R_RX_RH_UNEG4p8:
913 RANGE (-15, 0);
914 OP (0) &= 0x0f;
915 OP (0) |= (-relocation) << 4;
916 break;
917
918 /* Complex reloc handling: */
919
920 case R_RX_ABS32:
921 RX_STACK_POP (relocation);
922 #if RX_OPCODE_BIG_ENDIAN
923 OP (3) = relocation;
924 OP (2) = relocation >> 8;
925 OP (1) = relocation >> 16;
926 OP (0) = relocation >> 24;
927 #else
928 OP (0) = relocation;
929 OP (1) = relocation >> 8;
930 OP (2) = relocation >> 16;
931 OP (3) = relocation >> 24;
932 #endif
933 break;
934
935 case R_RX_ABS32_REV:
936 RX_STACK_POP (relocation);
937 #if RX_OPCODE_BIG_ENDIAN
938 OP (0) = relocation;
939 OP (1) = relocation >> 8;
940 OP (2) = relocation >> 16;
941 OP (3) = relocation >> 24;
942 #else
943 OP (3) = relocation;
944 OP (2) = relocation >> 8;
945 OP (1) = relocation >> 16;
946 OP (0) = relocation >> 24;
947 #endif
948 break;
949
950 case R_RX_ABS24S_PCREL:
951 case R_RX_ABS24S:
952 RX_STACK_POP (relocation);
953 RANGE (-0x800000, 0x7fffff);
954 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
955 {
956 OP (2) = relocation;
957 OP (1) = relocation >> 8;
958 OP (0) = relocation >> 16;
959 }
960 else
961 {
962 OP (0) = relocation;
963 OP (1) = relocation >> 8;
964 OP (2) = relocation >> 16;
965 }
966 break;
967
968 case R_RX_ABS16:
969 RX_STACK_POP (relocation);
970 RANGE (-32768, 65535);
971 #if RX_OPCODE_BIG_ENDIAN
972 OP (1) = relocation;
973 OP (0) = relocation >> 8;
974 #else
975 OP (0) = relocation;
976 OP (1) = relocation >> 8;
977 #endif
978 break;
979
980 case R_RX_ABS16_REV:
981 RX_STACK_POP (relocation);
982 RANGE (-32768, 65535);
983 #if RX_OPCODE_BIG_ENDIAN
984 OP (0) = relocation;
985 OP (1) = relocation >> 8;
986 #else
987 OP (1) = relocation;
988 OP (0) = relocation >> 8;
989 #endif
990 break;
991
992 case R_RX_ABS16S_PCREL:
993 case R_RX_ABS16S:
994 RX_STACK_POP (relocation);
995 RANGE (-32768, 32767);
996 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
997 {
998 OP (1) = relocation;
999 OP (0) = relocation >> 8;
1000 }
1001 else
1002 {
1003 OP (0) = relocation;
1004 OP (1) = relocation >> 8;
1005 }
1006 break;
1007
1008 case R_RX_ABS16U:
1009 RX_STACK_POP (relocation);
1010 RANGE (0, 65536);
1011 #if RX_OPCODE_BIG_ENDIAN
1012 OP (1) = relocation;
1013 OP (0) = relocation >> 8;
1014 #else
1015 OP (0) = relocation;
1016 OP (1) = relocation >> 8;
1017 #endif
1018 break;
1019
1020 case R_RX_ABS16UL:
1021 RX_STACK_POP (relocation);
1022 relocation >>= 2;
1023 RANGE (0, 65536);
1024 #if RX_OPCODE_BIG_ENDIAN
1025 OP (1) = relocation;
1026 OP (0) = relocation >> 8;
1027 #else
1028 OP (0) = relocation;
1029 OP (1) = relocation >> 8;
1030 #endif
1031 break;
1032
1033 case R_RX_ABS16UW:
1034 RX_STACK_POP (relocation);
1035 relocation >>= 1;
1036 RANGE (0, 65536);
1037 #if RX_OPCODE_BIG_ENDIAN
1038 OP (1) = relocation;
1039 OP (0) = relocation >> 8;
1040 #else
1041 OP (0) = relocation;
1042 OP (1) = relocation >> 8;
1043 #endif
1044 break;
1045
1046 case R_RX_ABS8:
1047 RX_STACK_POP (relocation);
1048 RANGE (-128, 255);
1049 OP (0) = relocation;
1050 break;
1051
1052 case R_RX_ABS8U:
1053 RX_STACK_POP (relocation);
1054 RANGE (0, 255);
1055 OP (0) = relocation;
1056 break;
1057
1058 case R_RX_ABS8UL:
1059 RX_STACK_POP (relocation);
1060 relocation >>= 2;
1061 RANGE (0, 255);
1062 OP (0) = relocation;
1063 break;
1064
1065 case R_RX_ABS8UW:
1066 RX_STACK_POP (relocation);
1067 relocation >>= 1;
1068 RANGE (0, 255);
1069 OP (0) = relocation;
1070 break;
1071
1072 case R_RX_ABS8S_PCREL:
1073 case R_RX_ABS8S:
1074 RX_STACK_POP (relocation);
1075 RANGE (-128, 127);
1076 OP (0) = relocation;
1077 break;
1078
1079 case R_RX_SYM:
1080 if (r_symndx < symtab_hdr->sh_info)
1081 RX_STACK_PUSH (sec->output_section->vma
1082 + sec->output_offset
1083 + sym->st_value);
1084 else
1085 {
1086 if (h != NULL
1087 && (h->root.type == bfd_link_hash_defined
1088 || h->root.type == bfd_link_hash_defweak))
1089 RX_STACK_PUSH (h->root.u.def.value
1090 + sec->output_section->vma
1091 + sec->output_offset);
1092 else
1093 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1094 }
1095 break;
1096
1097 case R_RX_OPneg:
1098 {
1099 int32_t tmp;
1100
1101 RX_STACK_POP (tmp);
1102 tmp = - tmp;
1103 RX_STACK_PUSH (tmp);
1104 }
1105 break;
1106
1107 case R_RX_OPadd:
1108 {
1109 int32_t tmp1, tmp2;
1110
1111 RX_STACK_POP (tmp1);
1112 RX_STACK_POP (tmp2);
1113 tmp1 += tmp2;
1114 RX_STACK_PUSH (tmp1);
1115 }
1116 break;
1117
1118 case R_RX_OPsub:
1119 {
1120 int32_t tmp1, tmp2;
1121
1122 RX_STACK_POP (tmp1);
1123 RX_STACK_POP (tmp2);
1124 tmp2 -= tmp1;
1125 RX_STACK_PUSH (tmp2);
1126 }
1127 break;
1128
1129 case R_RX_OPmul:
1130 {
1131 int32_t tmp1, tmp2;
1132
1133 RX_STACK_POP (tmp1);
1134 RX_STACK_POP (tmp2);
1135 tmp1 *= tmp2;
1136 RX_STACK_PUSH (tmp1);
1137 }
1138 break;
1139
1140 case R_RX_OPdiv:
1141 {
1142 int32_t tmp1, tmp2;
1143
1144 RX_STACK_POP (tmp1);
1145 RX_STACK_POP (tmp2);
1146 tmp1 /= tmp2;
1147 RX_STACK_PUSH (tmp1);
1148 }
1149 break;
1150
1151 case R_RX_OPshla:
1152 {
1153 int32_t tmp1, tmp2;
1154
1155 RX_STACK_POP (tmp1);
1156 RX_STACK_POP (tmp2);
1157 tmp1 <<= tmp2;
1158 RX_STACK_PUSH (tmp1);
1159 }
1160 break;
1161
1162 case R_RX_OPshra:
1163 {
1164 int32_t tmp1, tmp2;
1165
1166 RX_STACK_POP (tmp1);
1167 RX_STACK_POP (tmp2);
1168 tmp1 >>= tmp2;
1169 RX_STACK_PUSH (tmp1);
1170 }
1171 break;
1172
1173 case R_RX_OPsctsize:
1174 RX_STACK_PUSH (input_section->size);
1175 break;
1176
1177 case R_RX_OPscttop:
1178 RX_STACK_PUSH (input_section->output_section->vma);
1179 break;
1180
1181 case R_RX_OPand:
1182 {
1183 int32_t tmp1, tmp2;
1184
1185 RX_STACK_POP (tmp1);
1186 RX_STACK_POP (tmp2);
1187 tmp1 &= tmp2;
1188 RX_STACK_PUSH (tmp1);
1189 }
1190 break;
1191
1192 case R_RX_OPor:
1193 {
1194 int32_t tmp1, tmp2;
1195
1196 RX_STACK_POP (tmp1);
1197 RX_STACK_POP (tmp2);
1198 tmp1 |= tmp2;
1199 RX_STACK_PUSH (tmp1);
1200 }
1201 break;
1202
1203 case R_RX_OPxor:
1204 {
1205 int32_t tmp1, tmp2;
1206
1207 RX_STACK_POP (tmp1);
1208 RX_STACK_POP (tmp2);
1209 tmp1 ^= tmp2;
1210 RX_STACK_PUSH (tmp1);
1211 }
1212 break;
1213
1214 case R_RX_OPnot:
1215 {
1216 int32_t tmp;
1217
1218 RX_STACK_POP (tmp);
1219 tmp = ~ tmp;
1220 RX_STACK_PUSH (tmp);
1221 }
1222 break;
1223
1224 case R_RX_OPmod:
1225 {
1226 int32_t tmp1, tmp2;
1227
1228 RX_STACK_POP (tmp1);
1229 RX_STACK_POP (tmp2);
1230 tmp1 %= tmp2;
1231 RX_STACK_PUSH (tmp1);
1232 }
1233 break;
1234
1235 case R_RX_OPromtop:
1236 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1237 break;
1238
1239 case R_RX_OPramtop:
1240 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1241 break;
1242
1243 default:
1244 r = bfd_reloc_notsupported;
1245 break;
1246 }
1247
1248 if (r != bfd_reloc_ok)
1249 {
1250 const char * msg = NULL;
1251
1252 switch (r)
1253 {
1254 case bfd_reloc_overflow:
1255 /* Catch the case of a missing function declaration
1256 and emit a more helpful error message. */
1257 if (r_type == R_RX_DIR24S_PCREL)
1258 msg = _("%B(%A): error: call to undefined function '%s'");
1259 else
1260 r = info->callbacks->reloc_overflow
1261 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1262 input_bfd, input_section, rel->r_offset);
1263 break;
1264
1265 case bfd_reloc_undefined:
1266 r = info->callbacks->undefined_symbol
1267 (info, name, input_bfd, input_section, rel->r_offset,
1268 TRUE);
1269 break;
1270
1271 case bfd_reloc_other:
1272 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1273 break;
1274
1275 case bfd_reloc_outofrange:
1276 msg = _("%B(%A): internal error: out of range error");
1277 break;
1278
1279 case bfd_reloc_notsupported:
1280 msg = _("%B(%A): internal error: unsupported relocation error");
1281 break;
1282
1283 case bfd_reloc_dangerous:
1284 msg = _("%B(%A): internal error: dangerous relocation");
1285 break;
1286
1287 default:
1288 msg = _("%B(%A): internal error: unknown error");
1289 break;
1290 }
1291
1292 if (msg)
1293 _bfd_error_handler (msg, input_bfd, input_section, name);
1294
1295 if (! r)
1296 return FALSE;
1297 }
1298 }
1299
1300 return TRUE;
1301 }
1302 \f
1303 /* Relaxation Support. */
1304
1305 /* Progression of relocations from largest operand size to smallest
1306 operand size. */
1307
1308 static int
1309 next_smaller_reloc (int r)
1310 {
1311 switch (r)
1312 {
1313 case R_RX_DIR32: return R_RX_DIR24S;
1314 case R_RX_DIR24S: return R_RX_DIR16S;
1315 case R_RX_DIR16S: return R_RX_DIR8S;
1316 case R_RX_DIR8S: return R_RX_NONE;
1317
1318 case R_RX_DIR16: return R_RX_DIR8;
1319 case R_RX_DIR8: return R_RX_NONE;
1320
1321 case R_RX_DIR16U: return R_RX_DIR8U;
1322 case R_RX_DIR8U: return R_RX_NONE;
1323
1324 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1325 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1326 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1327
1328 case R_RX_DIR16UL: return R_RX_DIR8UL;
1329 case R_RX_DIR8UL: return R_RX_NONE;
1330 case R_RX_DIR16UW: return R_RX_DIR8UW;
1331 case R_RX_DIR8UW: return R_RX_NONE;
1332
1333 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1334 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1335 case R_RX_RH_16_OP: return R_RX_DIR8;
1336
1337 case R_RX_ABS32: return R_RX_ABS24S;
1338 case R_RX_ABS24S: return R_RX_ABS16S;
1339 case R_RX_ABS16: return R_RX_ABS8;
1340 case R_RX_ABS16U: return R_RX_ABS8U;
1341 case R_RX_ABS16S: return R_RX_ABS8S;
1342 case R_RX_ABS8: return R_RX_NONE;
1343 case R_RX_ABS8U: return R_RX_NONE;
1344 case R_RX_ABS8S: return R_RX_NONE;
1345 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1346 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1347 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1348 case R_RX_ABS16UL: return R_RX_ABS8UL;
1349 case R_RX_ABS16UW: return R_RX_ABS8UW;
1350 case R_RX_ABS8UL: return R_RX_NONE;
1351 case R_RX_ABS8UW: return R_RX_NONE;
1352 }
1353 return r;
1354 };
1355
1356 /* Delete some bytes from a section while relaxing. */
1357
1358 static bfd_boolean
1359 elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1360 Elf_Internal_Rela *alignment_rel, int force_snip)
1361 {
1362 Elf_Internal_Shdr * symtab_hdr;
1363 unsigned int sec_shndx;
1364 bfd_byte * contents;
1365 Elf_Internal_Rela * irel;
1366 Elf_Internal_Rela * irelend;
1367 Elf_Internal_Sym * isym;
1368 Elf_Internal_Sym * isymend;
1369 bfd_vma toaddr;
1370 unsigned int symcount;
1371 struct elf_link_hash_entry ** sym_hashes;
1372 struct elf_link_hash_entry ** end_hashes;
1373
1374 if (!alignment_rel)
1375 force_snip = 1;
1376
1377 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1378
1379 contents = elf_section_data (sec)->this_hdr.contents;
1380
1381 /* The deletion must stop at the next alignment boundary, if
1382 ALIGNMENT_REL is non-NULL. */
1383 toaddr = sec->size;
1384 if (alignment_rel)
1385 toaddr = alignment_rel->r_offset;
1386
1387 irel = elf_section_data (sec)->relocs;
1388 irelend = irel + sec->reloc_count;
1389
1390 /* Actually delete the bytes. */
1391 memmove (contents + addr, contents + addr + count,
1392 (size_t) (toaddr - addr - count));
1393
1394 /* If we don't have an alignment marker to worry about, we can just
1395 shrink the section. Otherwise, we have to fill in the newly
1396 created gap with NOP insns (0x03). */
1397 if (force_snip)
1398 sec->size -= count;
1399 else
1400 memset (contents + toaddr - count, 0x03, count);
1401
1402 /* Adjust all the relocs. */
1403 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1404 {
1405 /* Get the new reloc address. */
1406 if (irel->r_offset > addr
1407 && (irel->r_offset < toaddr
1408 || (force_snip && irel->r_offset == toaddr)))
1409 irel->r_offset -= count;
1410
1411 /* If we see an ALIGN marker at the end of the gap, we move it
1412 to the beginning of the gap, since marking these gaps is what
1413 they're for. */
1414 if (irel->r_offset == toaddr
1415 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1416 && irel->r_addend & RX_RELAXA_ALIGN)
1417 irel->r_offset -= count;
1418 }
1419
1420 /* Adjust the local symbols defined in this section. */
1421 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1422 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1423 isymend = isym + symtab_hdr->sh_info;
1424
1425 for (; isym < isymend; isym++)
1426 {
1427 /* If the symbol is in the range of memory we just moved, we
1428 have to adjust its value. */
1429 if (isym->st_shndx == sec_shndx
1430 && isym->st_value > addr
1431 && isym->st_value < toaddr)
1432 isym->st_value -= count;
1433
1434 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1435 *end* is in the moved bytes but it's *start* isn't), then we
1436 must adjust its size. */
1437 if (isym->st_shndx == sec_shndx
1438 && isym->st_value < addr
1439 && isym->st_value + isym->st_size > addr
1440 && isym->st_value + isym->st_size < toaddr)
1441 isym->st_size -= count;
1442 }
1443
1444 /* Now adjust the global symbols defined in this section. */
1445 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1446 - symtab_hdr->sh_info);
1447 sym_hashes = elf_sym_hashes (abfd);
1448 end_hashes = sym_hashes + symcount;
1449
1450 for (; sym_hashes < end_hashes; sym_hashes++)
1451 {
1452 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1453
1454 if ((sym_hash->root.type == bfd_link_hash_defined
1455 || sym_hash->root.type == bfd_link_hash_defweak)
1456 && sym_hash->root.u.def.section == sec)
1457 {
1458 /* As above, adjust the value if needed. */
1459 if (sym_hash->root.u.def.value > addr
1460 && sym_hash->root.u.def.value < toaddr)
1461 sym_hash->root.u.def.value -= count;
1462
1463 /* As above, adjust the size if needed. */
1464 if (sym_hash->root.u.def.value < addr
1465 && sym_hash->root.u.def.value + sym_hash->size > addr
1466 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1467 sym_hash->size -= count;
1468 }
1469 }
1470
1471 return TRUE;
1472 }
1473
1474 /* Used to sort relocs by address. If relocs have the same address,
1475 we maintain their relative order, except that R_RX_RH_RELAX
1476 alignment relocs must be the first reloc for any given address. */
1477
1478 static void
1479 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1480 {
1481 int i;
1482 bfd_boolean again;
1483 bfd_boolean swappit;
1484
1485 /* This is almost a classic bubblesort. It's the slowest sort, but
1486 we're taking advantage of the fact that the relocations are
1487 mostly in order already (the assembler emits them that way) and
1488 we need relocs with the same address to remain in the same
1489 relative order. */
1490 again = TRUE;
1491 while (again)
1492 {
1493 again = FALSE;
1494 for (i = 0; i < count - 1; i ++)
1495 {
1496 if (r[i].r_offset > r[i + 1].r_offset)
1497 swappit = TRUE;
1498 else if (r[i].r_offset < r[i + 1].r_offset)
1499 swappit = FALSE;
1500 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1501 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1502 swappit = TRUE;
1503 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1504 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1505 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1506 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1507 swappit = TRUE;
1508 else
1509 swappit = FALSE;
1510
1511 if (swappit)
1512 {
1513 Elf_Internal_Rela tmp;
1514
1515 tmp = r[i];
1516 r[i] = r[i + 1];
1517 r[i + 1] = tmp;
1518 /* If we do move a reloc back, re-scan to see if it
1519 needs to be moved even further back. This avoids
1520 most of the O(n^2) behavior for our cases. */
1521 if (i > 0)
1522 i -= 2;
1523 again = TRUE;
1524 }
1525 }
1526 }
1527 }
1528
1529
1530 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1531 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1532 lrel, abfd, sec, link_info, scale)
1533
1534 static bfd_vma
1535 rx_offset_for_reloc (bfd * abfd,
1536 Elf_Internal_Rela * rel,
1537 Elf_Internal_Shdr * symtab_hdr,
1538 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1539 Elf_Internal_Sym * intsyms,
1540 Elf_Internal_Rela ** lrel,
1541 bfd * input_bfd,
1542 asection * input_section,
1543 struct bfd_link_info * info,
1544 int * scale)
1545 {
1546 bfd_vma symval;
1547 bfd_reloc_status_type r;
1548
1549 *scale = 1;
1550
1551 /* REL is the first of 1..N relocations. We compute the symbol
1552 value for each relocation, then combine them if needed. LREL
1553 gets a pointer to the last relocation used. */
1554 while (1)
1555 {
1556 int32_t tmp1, tmp2;
1557
1558 /* Get the value of the symbol referred to by the reloc. */
1559 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1560 {
1561 /* A local symbol. */
1562 Elf_Internal_Sym *isym;
1563 asection *ssec;
1564
1565 isym = intsyms + ELF32_R_SYM (rel->r_info);
1566
1567 if (isym->st_shndx == SHN_UNDEF)
1568 ssec = bfd_und_section_ptr;
1569 else if (isym->st_shndx == SHN_ABS)
1570 ssec = bfd_abs_section_ptr;
1571 else if (isym->st_shndx == SHN_COMMON)
1572 ssec = bfd_com_section_ptr;
1573 else
1574 ssec = bfd_section_from_elf_index (abfd,
1575 isym->st_shndx);
1576
1577 /* Initial symbol value. */
1578 symval = isym->st_value;
1579
1580 /* GAS may have made this symbol relative to a section, in
1581 which case, we have to add the addend to find the
1582 symbol. */
1583 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1584 symval += rel->r_addend;
1585
1586 if (ssec)
1587 {
1588 if ((ssec->flags & SEC_MERGE)
1589 && ssec->sec_info_type == ELF_INFO_TYPE_MERGE)
1590 symval = _bfd_merged_section_offset (abfd, & ssec,
1591 elf_section_data (ssec)->sec_info,
1592 symval);
1593 }
1594
1595 /* Now make the offset relative to where the linker is putting it. */
1596 if (ssec)
1597 symval +=
1598 ssec->output_section->vma + ssec->output_offset;
1599
1600 symval += rel->r_addend;
1601 }
1602 else
1603 {
1604 unsigned long indx;
1605 struct elf_link_hash_entry * h;
1606
1607 /* An external symbol. */
1608 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1609 h = elf_sym_hashes (abfd)[indx];
1610 BFD_ASSERT (h != NULL);
1611
1612 if (h->root.type != bfd_link_hash_defined
1613 && h->root.type != bfd_link_hash_defweak)
1614 {
1615 /* This appears to be a reference to an undefined
1616 symbol. Just ignore it--it will be caught by the
1617 regular reloc processing. */
1618 if (lrel)
1619 *lrel = rel;
1620 return 0;
1621 }
1622
1623 symval = (h->root.u.def.value
1624 + h->root.u.def.section->output_section->vma
1625 + h->root.u.def.section->output_offset);
1626
1627 symval += rel->r_addend;
1628 }
1629
1630 switch (ELF32_R_TYPE (rel->r_info))
1631 {
1632 case R_RX_SYM:
1633 RX_STACK_PUSH (symval);
1634 break;
1635
1636 case R_RX_OPneg:
1637 RX_STACK_POP (tmp1);
1638 tmp1 = - tmp1;
1639 RX_STACK_PUSH (tmp1);
1640 break;
1641
1642 case R_RX_OPadd:
1643 RX_STACK_POP (tmp1);
1644 RX_STACK_POP (tmp2);
1645 tmp1 += tmp2;
1646 RX_STACK_PUSH (tmp1);
1647 break;
1648
1649 case R_RX_OPsub:
1650 RX_STACK_POP (tmp1);
1651 RX_STACK_POP (tmp2);
1652 tmp2 -= tmp1;
1653 RX_STACK_PUSH (tmp2);
1654 break;
1655
1656 case R_RX_OPmul:
1657 RX_STACK_POP (tmp1);
1658 RX_STACK_POP (tmp2);
1659 tmp1 *= tmp2;
1660 RX_STACK_PUSH (tmp1);
1661 break;
1662
1663 case R_RX_OPdiv:
1664 RX_STACK_POP (tmp1);
1665 RX_STACK_POP (tmp2);
1666 tmp1 /= tmp2;
1667 RX_STACK_PUSH (tmp1);
1668 break;
1669
1670 case R_RX_OPshla:
1671 RX_STACK_POP (tmp1);
1672 RX_STACK_POP (tmp2);
1673 tmp1 <<= tmp2;
1674 RX_STACK_PUSH (tmp1);
1675 break;
1676
1677 case R_RX_OPshra:
1678 RX_STACK_POP (tmp1);
1679 RX_STACK_POP (tmp2);
1680 tmp1 >>= tmp2;
1681 RX_STACK_PUSH (tmp1);
1682 break;
1683
1684 case R_RX_OPsctsize:
1685 RX_STACK_PUSH (input_section->size);
1686 break;
1687
1688 case R_RX_OPscttop:
1689 RX_STACK_PUSH (input_section->output_section->vma);
1690 break;
1691
1692 case R_RX_OPand:
1693 RX_STACK_POP (tmp1);
1694 RX_STACK_POP (tmp2);
1695 tmp1 &= tmp2;
1696 RX_STACK_PUSH (tmp1);
1697 break;
1698
1699 case R_RX_OPor:
1700 RX_STACK_POP (tmp1);
1701 RX_STACK_POP (tmp2);
1702 tmp1 |= tmp2;
1703 RX_STACK_PUSH (tmp1);
1704 break;
1705
1706 case R_RX_OPxor:
1707 RX_STACK_POP (tmp1);
1708 RX_STACK_POP (tmp2);
1709 tmp1 ^= tmp2;
1710 RX_STACK_PUSH (tmp1);
1711 break;
1712
1713 case R_RX_OPnot:
1714 RX_STACK_POP (tmp1);
1715 tmp1 = ~ tmp1;
1716 RX_STACK_PUSH (tmp1);
1717 break;
1718
1719 case R_RX_OPmod:
1720 RX_STACK_POP (tmp1);
1721 RX_STACK_POP (tmp2);
1722 tmp1 %= tmp2;
1723 RX_STACK_PUSH (tmp1);
1724 break;
1725
1726 case R_RX_OPromtop:
1727 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1728 break;
1729
1730 case R_RX_OPramtop:
1731 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1732 break;
1733
1734 case R_RX_DIR16UL:
1735 case R_RX_DIR8UL:
1736 case R_RX_ABS16UL:
1737 case R_RX_ABS8UL:
1738 if (rx_stack_top)
1739 RX_STACK_POP (symval);
1740 if (lrel)
1741 *lrel = rel;
1742 *scale = 4;
1743 return symval;
1744
1745 case R_RX_DIR16UW:
1746 case R_RX_DIR8UW:
1747 case R_RX_ABS16UW:
1748 case R_RX_ABS8UW:
1749 if (rx_stack_top)
1750 RX_STACK_POP (symval);
1751 if (lrel)
1752 *lrel = rel;
1753 *scale = 2;
1754 return symval;
1755
1756 default:
1757 if (rx_stack_top)
1758 RX_STACK_POP (symval);
1759 if (lrel)
1760 *lrel = rel;
1761 return symval;
1762 }
1763
1764 rel ++;
1765 }
1766 }
1767
1768 static void
1769 move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1770 {
1771 bfd_vma old_offset = srel->r_offset;
1772
1773 irel ++;
1774 while (irel <= srel)
1775 {
1776 if (irel->r_offset == old_offset)
1777 irel->r_offset += delta;
1778 irel ++;
1779 }
1780 }
1781
1782 /* Relax one section. */
1783
1784 static bfd_boolean
1785 elf32_rx_relax_section (bfd * abfd,
1786 asection * sec,
1787 struct bfd_link_info * link_info,
1788 bfd_boolean * again,
1789 bfd_boolean allow_pcrel3)
1790 {
1791 Elf_Internal_Shdr * symtab_hdr;
1792 Elf_Internal_Shdr * shndx_hdr;
1793 Elf_Internal_Rela * internal_relocs;
1794 Elf_Internal_Rela * free_relocs = NULL;
1795 Elf_Internal_Rela * irel;
1796 Elf_Internal_Rela * srel;
1797 Elf_Internal_Rela * irelend;
1798 Elf_Internal_Rela * next_alignment;
1799 Elf_Internal_Rela * prev_alignment;
1800 bfd_byte * contents = NULL;
1801 bfd_byte * free_contents = NULL;
1802 Elf_Internal_Sym * intsyms = NULL;
1803 Elf_Internal_Sym * free_intsyms = NULL;
1804 Elf_External_Sym_Shndx * shndx_buf = NULL;
1805 bfd_vma pc;
1806 bfd_vma sec_start;
1807 bfd_vma symval = 0;
1808 int pcrel = 0;
1809 int code = 0;
1810 int section_alignment_glue;
1811 /* how much to scale the relocation by - 1, 2, or 4. */
1812 int scale;
1813
1814 /* Assume nothing changes. */
1815 *again = FALSE;
1816
1817 /* We don't have to do anything for a relocatable link, if
1818 this section does not have relocs, or if this is not a
1819 code section. */
1820 if (link_info->relocatable
1821 || (sec->flags & SEC_RELOC) == 0
1822 || sec->reloc_count == 0
1823 || (sec->flags & SEC_CODE) == 0)
1824 return TRUE;
1825
1826 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1827 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1828
1829 sec_start = sec->output_section->vma + sec->output_offset;
1830
1831 /* Get the section contents. */
1832 if (elf_section_data (sec)->this_hdr.contents != NULL)
1833 contents = elf_section_data (sec)->this_hdr.contents;
1834 /* Go get them off disk. */
1835 else
1836 {
1837 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
1838 goto error_return;
1839 elf_section_data (sec)->this_hdr.contents = contents;
1840 }
1841
1842 /* Read this BFD's symbols. */
1843 /* Get cached copy if it exists. */
1844 if (symtab_hdr->contents != NULL)
1845 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
1846 else
1847 {
1848 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
1849 symtab_hdr->contents = (bfd_byte *) intsyms;
1850 }
1851
1852 if (shndx_hdr->sh_size != 0)
1853 {
1854 bfd_size_type amt;
1855
1856 amt = symtab_hdr->sh_info;
1857 amt *= sizeof (Elf_External_Sym_Shndx);
1858 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
1859 if (shndx_buf == NULL)
1860 goto error_return;
1861 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
1862 || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
1863 goto error_return;
1864 shndx_hdr->contents = (bfd_byte *) shndx_buf;
1865 }
1866
1867 /* Get a copy of the native relocations. */
1868 internal_relocs = (_bfd_elf_link_read_relocs
1869 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1870 link_info->keep_memory));
1871 if (internal_relocs == NULL)
1872 goto error_return;
1873 if (! link_info->keep_memory)
1874 free_relocs = internal_relocs;
1875
1876 /* The RL_ relocs must be just before the operand relocs they go
1877 with, so we must sort them to guarantee this. We use bubblesort
1878 instead of qsort so we can guarantee that relocs with the same
1879 address remain in the same relative order. */
1880 reloc_bubblesort (internal_relocs, sec->reloc_count);
1881
1882 /* Walk through them looking for relaxing opportunities. */
1883 irelend = internal_relocs + sec->reloc_count;
1884
1885 /* This will either be NULL or a pointer to the next alignment
1886 relocation. */
1887 next_alignment = internal_relocs;
1888 /* This will be the previous alignment, although at first it points
1889 to the first real relocation. */
1890 prev_alignment = internal_relocs;
1891
1892 /* We calculate worst case shrinkage caused by alignment directives.
1893 No fool-proof, but better than either ignoring the problem or
1894 doing heavy duty analysis of all the alignment markers in all
1895 input sections. */
1896 section_alignment_glue = 0;
1897 for (irel = internal_relocs; irel < irelend; irel++)
1898 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1899 && irel->r_addend & RX_RELAXA_ALIGN)
1900 {
1901 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1902
1903 if (section_alignment_glue < this_glue)
1904 section_alignment_glue = this_glue;
1905 }
1906 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
1907 shrinkage. */
1908 section_alignment_glue *= 2;
1909
1910 for (irel = internal_relocs; irel < irelend; irel++)
1911 {
1912 unsigned char *insn;
1913 int nrelocs;
1914
1915 /* The insns we care about are all marked with one of these. */
1916 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
1917 continue;
1918
1919 if (irel->r_addend & RX_RELAXA_ALIGN
1920 || next_alignment == internal_relocs)
1921 {
1922 /* When we delete bytes, we need to maintain all the alignments
1923 indicated. In addition, we need to be careful about relaxing
1924 jumps across alignment boundaries - these displacements
1925 *grow* when we delete bytes. For now, don't shrink
1926 displacements across an alignment boundary, just in case.
1927 Note that this only affects relocations to the same
1928 section. */
1929 prev_alignment = next_alignment;
1930 next_alignment += 2;
1931 while (next_alignment < irelend
1932 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
1933 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
1934 next_alignment ++;
1935 if (next_alignment >= irelend || next_alignment->r_offset == 0)
1936 next_alignment = NULL;
1937 }
1938
1939 /* When we hit alignment markers, see if we've shrunk enough
1940 before them to reduce the gap without violating the alignment
1941 requirements. */
1942 if (irel->r_addend & RX_RELAXA_ALIGN)
1943 {
1944 /* At this point, the next relocation *should* be the ELIGN
1945 end marker. */
1946 Elf_Internal_Rela *erel = irel + 1;
1947 unsigned int alignment, nbytes;
1948
1949 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
1950 continue;
1951 if (!(erel->r_addend & RX_RELAXA_ELIGN))
1952 continue;
1953
1954 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1955
1956 if (erel->r_offset - irel->r_offset < alignment)
1957 continue;
1958
1959 nbytes = erel->r_offset - irel->r_offset;
1960 nbytes /= alignment;
1961 nbytes *= alignment;
1962
1963 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
1964 erel->r_offset == sec->size);
1965 *again = TRUE;
1966
1967 continue;
1968 }
1969
1970 if (irel->r_addend & RX_RELAXA_ELIGN)
1971 continue;
1972
1973 insn = contents + irel->r_offset;
1974
1975 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
1976
1977 /* At this point, we have an insn that is a candidate for linker
1978 relaxation. There are NRELOCS relocs following that may be
1979 relaxed, although each reloc may be made of more than one
1980 reloc entry (such as gp-rel symbols). */
1981
1982 /* Get the value of the symbol referred to by the reloc. Just
1983 in case this is the last reloc in the list, use the RL's
1984 addend to choose between this reloc (no addend) or the next
1985 (yes addend, which means at least one following reloc). */
1986
1987 /* srel points to the "current" reloction for this insn -
1988 actually the last reloc for a given operand, which is the one
1989 we need to update. We check the relaxations in the same
1990 order that the relocations happen, so we'll just push it
1991 along as we go. */
1992 srel = irel;
1993
1994 pc = sec->output_section->vma + sec->output_offset
1995 + srel->r_offset;
1996
1997 #define GET_RELOC \
1998 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
1999 pcrel = symval - pc + srel->r_addend; \
2000 nrelocs --;
2001
2002 #define SNIPNR(offset, nbytes) \
2003 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2004 #define SNIP(offset, nbytes, newtype) \
2005 SNIPNR (offset, nbytes); \
2006 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2007
2008 /* The order of these bit tests must match the order that the
2009 relocs appear in. Since we sorted those by offset, we can
2010 predict them. */
2011
2012 /* Note that the numbers in, say, DSP6 are the bit offsets of
2013 the code fields that describe the operand. Bits number 0 for
2014 the MSB of insn[0]. */
2015
2016 /* DSP* codes:
2017 0 00 [reg]
2018 1 01 dsp:8[reg]
2019 2 10 dsp:16[reg]
2020 3 11 reg */
2021 if (irel->r_addend & RX_RELAXA_DSP6)
2022 {
2023 GET_RELOC;
2024
2025 code = insn[0] & 3;
2026 if (code == 2 && symval/scale <= 255)
2027 {
2028 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2029 insn[0] &= 0xfc;
2030 insn[0] |= 0x01;
2031 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2032 if (newrel != ELF32_R_TYPE (srel->r_info))
2033 {
2034 SNIP (3, 1, newrel);
2035 *again = TRUE;
2036 }
2037 }
2038
2039 else if (code == 1 && symval == 0)
2040 {
2041 insn[0] &= 0xfc;
2042 SNIP (2, 1, R_RX_NONE);
2043 *again = TRUE;
2044 }
2045
2046 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2047 else if (code == 1 && symval/scale <= 31
2048 /* Decodable bits. */
2049 && (insn[0] & 0xcc) == 0xcc
2050 /* Width. */
2051 && (insn[0] & 0x30) != 3
2052 /* Register MSBs. */
2053 && (insn[1] & 0x88) == 0x00)
2054 {
2055 int newrel = 0;
2056
2057 insn[0] = 0x88 | (insn[0] & 0x30);
2058 /* The register fields are in the right place already. */
2059
2060 /* We can't relax this new opcode. */
2061 irel->r_addend = 0;
2062
2063 switch ((insn[0] & 0x30) >> 4)
2064 {
2065 case 0:
2066 newrel = R_RX_RH_ABS5p5B;
2067 break;
2068 case 1:
2069 newrel = R_RX_RH_ABS5p5W;
2070 break;
2071 case 2:
2072 newrel = R_RX_RH_ABS5p5L;
2073 break;
2074 }
2075
2076 move_reloc (irel, srel, -2);
2077 SNIP (2, 1, newrel);
2078 }
2079
2080 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2081 else if (code == 1 && symval/scale <= 31
2082 /* Decodable bits. */
2083 && (insn[0] & 0xf8) == 0x58
2084 /* Register MSBs. */
2085 && (insn[1] & 0x88) == 0x00)
2086 {
2087 int newrel = 0;
2088
2089 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2090 /* The register fields are in the right place already. */
2091
2092 /* We can't relax this new opcode. */
2093 irel->r_addend = 0;
2094
2095 switch ((insn[0] & 0x08) >> 3)
2096 {
2097 case 0:
2098 newrel = R_RX_RH_ABS5p5B;
2099 break;
2100 case 1:
2101 newrel = R_RX_RH_ABS5p5W;
2102 break;
2103 }
2104
2105 move_reloc (irel, srel, -2);
2106 SNIP (2, 1, newrel);
2107 }
2108 }
2109
2110 /* A DSP4 operand always follows a DSP6 operand, even if there's
2111 no relocation for it. We have to read the code out of the
2112 opcode to calculate the offset of the operand. */
2113 if (irel->r_addend & RX_RELAXA_DSP4)
2114 {
2115 int code6, offset = 0;
2116
2117 GET_RELOC;
2118
2119 code6 = insn[0] & 0x03;
2120 switch (code6)
2121 {
2122 case 0: offset = 2; break;
2123 case 1: offset = 3; break;
2124 case 2: offset = 4; break;
2125 case 3: offset = 2; break;
2126 }
2127
2128 code = (insn[0] & 0x0c) >> 2;
2129
2130 if (code == 2 && symval / scale <= 255)
2131 {
2132 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2133
2134 insn[0] &= 0xf3;
2135 insn[0] |= 0x04;
2136 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2137 if (newrel != ELF32_R_TYPE (srel->r_info))
2138 {
2139 SNIP (offset+1, 1, newrel);
2140 *again = TRUE;
2141 }
2142 }
2143
2144 else if (code == 1 && symval == 0)
2145 {
2146 insn[0] &= 0xf3;
2147 SNIP (offset, 1, R_RX_NONE);
2148 *again = TRUE;
2149 }
2150 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2151 else if (code == 1 && symval/scale <= 31
2152 /* Decodable bits. */
2153 && (insn[0] & 0xc3) == 0xc3
2154 /* Width. */
2155 && (insn[0] & 0x30) != 3
2156 /* Register MSBs. */
2157 && (insn[1] & 0x88) == 0x00)
2158 {
2159 int newrel = 0;
2160
2161 insn[0] = 0x80 | (insn[0] & 0x30);
2162 /* The register fields are in the right place already. */
2163
2164 /* We can't relax this new opcode. */
2165 irel->r_addend = 0;
2166
2167 switch ((insn[0] & 0x30) >> 4)
2168 {
2169 case 0:
2170 newrel = R_RX_RH_ABS5p5B;
2171 break;
2172 case 1:
2173 newrel = R_RX_RH_ABS5p5W;
2174 break;
2175 case 2:
2176 newrel = R_RX_RH_ABS5p5L;
2177 break;
2178 }
2179
2180 move_reloc (irel, srel, -2);
2181 SNIP (2, 1, newrel);
2182 }
2183 }
2184
2185 /* These always occur alone, but the offset depends on whether
2186 it's a MEMEX opcode (0x06) or not. */
2187 if (irel->r_addend & RX_RELAXA_DSP14)
2188 {
2189 int offset;
2190 GET_RELOC;
2191
2192 if (insn[0] == 0x06)
2193 offset = 3;
2194 else
2195 offset = 4;
2196
2197 code = insn[1] & 3;
2198
2199 if (code == 2 && symval / scale <= 255)
2200 {
2201 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2202
2203 insn[1] &= 0xfc;
2204 insn[1] |= 0x01;
2205 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2206 if (newrel != ELF32_R_TYPE (srel->r_info))
2207 {
2208 SNIP (offset, 1, newrel);
2209 *again = TRUE;
2210 }
2211 }
2212 else if (code == 1 && symval == 0)
2213 {
2214 insn[1] &= 0xfc;
2215 SNIP (offset, 1, R_RX_NONE);
2216 *again = TRUE;
2217 }
2218 }
2219
2220 /* IMM* codes:
2221 0 00 imm:32
2222 1 01 simm:8
2223 2 10 simm:16
2224 3 11 simm:24. */
2225
2226 /* These always occur alone. */
2227 if (irel->r_addend & RX_RELAXA_IMM6)
2228 {
2229 long ssymval;
2230
2231 GET_RELOC;
2232
2233 /* These relocations sign-extend, so we must do signed compares. */
2234 ssymval = (long) symval;
2235
2236 code = insn[0] & 0x03;
2237
2238 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2239 {
2240 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2241
2242 insn[0] &= 0xfc;
2243 insn[0] |= 0x03;
2244 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2245 if (newrel != ELF32_R_TYPE (srel->r_info))
2246 {
2247 SNIP (2, 1, newrel);
2248 *again = TRUE;
2249 }
2250 }
2251
2252 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2253 {
2254 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2255
2256 insn[0] &= 0xfc;
2257 insn[0] |= 0x02;
2258 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2259 if (newrel != ELF32_R_TYPE (srel->r_info))
2260 {
2261 SNIP (2, 1, newrel);
2262 *again = TRUE;
2263 }
2264 }
2265
2266 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2267 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2268 /* Decodable bits. */
2269 && (insn[0] & 0xfc) == 0x74
2270 /* Decodable bits. */
2271 && ((insn[1] & 0xf0) == 0x00))
2272 {
2273 int newrel;
2274
2275 insn[0] = 0x75;
2276 insn[1] = 0x50 | (insn[1] & 0x0f);
2277
2278 /* We can't relax this new opcode. */
2279 irel->r_addend = 0;
2280
2281 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2282 newrel = R_RX_ABS8U;
2283 else
2284 newrel = R_RX_DIR8U;
2285
2286 SNIP (2, 1, newrel);
2287 *again = TRUE;
2288 }
2289
2290 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2291 {
2292 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2293
2294 insn[0] &= 0xfc;
2295 insn[0] |= 0x01;
2296 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2297 if (newrel != ELF32_R_TYPE (srel->r_info))
2298 {
2299 SNIP (2, 1, newrel);
2300 *again = TRUE;
2301 }
2302 }
2303
2304 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2305 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2306 /* Decodable bits and immediate type. */
2307 && insn[0] == 0x75
2308 /* Decodable bits. */
2309 && (insn[1] & 0xc0) == 0x00)
2310 {
2311 static const int newop[4] = { 1, 3, 4, 5 };
2312
2313 insn[0] = 0x60 | newop[insn[1] >> 4];
2314 /* The register number doesn't move. */
2315
2316 /* We can't relax this new opcode. */
2317 irel->r_addend = 0;
2318
2319 move_reloc (irel, srel, -1);
2320
2321 SNIP (2, 1, R_RX_RH_UIMM4p8);
2322 *again = TRUE;
2323 }
2324
2325 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2326 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2327 /* Decodable bits and immediate type. */
2328 && insn[0] == 0x71
2329 /* Same register for source and destination. */
2330 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2331 {
2332 int newrel;
2333
2334 /* Note that we can't turn "add $0,Rs" into a NOP
2335 because the flags need to be set right. */
2336
2337 if (ssymval < 0)
2338 {
2339 insn[0] = 0x60; /* Subtract. */
2340 newrel = R_RX_RH_UNEG4p8;
2341 }
2342 else
2343 {
2344 insn[0] = 0x62; /* Add. */
2345 newrel = R_RX_RH_UIMM4p8;
2346 }
2347
2348 /* The register number is in the right place. */
2349
2350 /* We can't relax this new opcode. */
2351 irel->r_addend = 0;
2352
2353 move_reloc (irel, srel, -1);
2354
2355 SNIP (2, 1, newrel);
2356 *again = TRUE;
2357 }
2358 }
2359
2360 /* These are either matched with a DSP6 (2-byte base) or an id24
2361 (3-byte base). */
2362 if (irel->r_addend & RX_RELAXA_IMM12)
2363 {
2364 int dspcode, offset = 0;
2365 long ssymval;
2366
2367 GET_RELOC;
2368
2369 if ((insn[0] & 0xfc) == 0xfc)
2370 dspcode = 1; /* Just something with one byte operand. */
2371 else
2372 dspcode = insn[0] & 3;
2373 switch (dspcode)
2374 {
2375 case 0: offset = 2; break;
2376 case 1: offset = 3; break;
2377 case 2: offset = 4; break;
2378 case 3: offset = 2; break;
2379 }
2380
2381 /* These relocations sign-extend, so we must do signed compares. */
2382 ssymval = (long) symval;
2383
2384 code = (insn[1] >> 2) & 3;
2385 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2386 {
2387 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2388
2389 insn[1] &= 0xf3;
2390 insn[1] |= 0x0c;
2391 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2392 if (newrel != ELF32_R_TYPE (srel->r_info))
2393 {
2394 SNIP (offset, 1, newrel);
2395 *again = TRUE;
2396 }
2397 }
2398
2399 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2400 {
2401 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2402
2403 insn[1] &= 0xf3;
2404 insn[1] |= 0x08;
2405 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2406 if (newrel != ELF32_R_TYPE (srel->r_info))
2407 {
2408 SNIP (offset, 1, newrel);
2409 *again = TRUE;
2410 }
2411 }
2412
2413 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2414 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2415 /* Decodable bits. */
2416 && insn[0] == 0xfb
2417 /* Decodable bits. */
2418 && ((insn[1] & 0x03) == 0x02))
2419 {
2420 int newrel;
2421
2422 insn[0] = 0x75;
2423 insn[1] = 0x40 | (insn[1] >> 4);
2424
2425 /* We can't relax this new opcode. */
2426 irel->r_addend = 0;
2427
2428 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2429 newrel = R_RX_ABS8U;
2430 else
2431 newrel = R_RX_DIR8U;
2432
2433 SNIP (2, 1, newrel);
2434 *again = TRUE;
2435 }
2436
2437 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2438 {
2439 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2440
2441 insn[1] &= 0xf3;
2442 insn[1] |= 0x04;
2443 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2444 if (newrel != ELF32_R_TYPE(srel->r_info))
2445 {
2446 SNIP (offset, 1, newrel);
2447 *again = TRUE;
2448 }
2449 }
2450
2451 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2452 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2453 /* Decodable bits. */
2454 && insn[0] == 0xfb
2455 /* Decodable bits. */
2456 && ((insn[1] & 0x03) == 0x02))
2457 {
2458 insn[0] = 0x66;
2459 insn[1] = insn[1] >> 4;
2460
2461 /* We can't relax this new opcode. */
2462 irel->r_addend = 0;
2463
2464 move_reloc (irel, srel, -1);
2465
2466 SNIP (2, 1, R_RX_RH_UIMM4p8);
2467 *again = TRUE;
2468 }
2469 }
2470
2471 if (irel->r_addend & RX_RELAXA_BRA)
2472 {
2473 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2474 int max_pcrel3 = 4;
2475 int alignment_glue = 0;
2476
2477 GET_RELOC;
2478
2479 /* Branches over alignment chunks are problematic, as
2480 deleting bytes here makes the branch *further* away. We
2481 can be agressive with branches within this alignment
2482 block, but not branches outside it. */
2483 if ((prev_alignment == NULL
2484 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2485 && (next_alignment == NULL
2486 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2487 alignment_glue = section_alignment_glue;
2488
2489 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2490 && srel[1].r_addend & RX_RELAXA_BRA
2491 && srel[1].r_offset < irel->r_offset + pcrel)
2492 max_pcrel3 ++;
2493
2494 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2495
2496 /* The values we compare PCREL with are not what you'd
2497 expect; they're off by a little to compensate for (1)
2498 where the reloc is relative to the insn, and (2) how much
2499 the insn is going to change when we relax it. */
2500
2501 /* These we have to decode. */
2502 switch (insn[0])
2503 {
2504 case 0x04: /* BRA pcdsp:24 */
2505 if (-32768 + alignment_glue <= pcrel
2506 && pcrel <= 32765 - alignment_glue)
2507 {
2508 insn[0] = 0x38;
2509 SNIP (3, 1, newrel);
2510 *again = TRUE;
2511 }
2512 break;
2513
2514 case 0x38: /* BRA pcdsp:16 */
2515 if (-128 + alignment_glue <= pcrel
2516 && pcrel <= 127 - alignment_glue)
2517 {
2518 insn[0] = 0x2e;
2519 SNIP (2, 1, newrel);
2520 *again = TRUE;
2521 }
2522 break;
2523
2524 case 0x2e: /* BRA pcdsp:8 */
2525 /* Note that there's a risk here of shortening things so
2526 much that we no longer fit this reloc; it *should*
2527 only happen when you branch across a branch, and that
2528 branch also devolves into BRA.S. "Real" code should
2529 be OK. */
2530 if (max_pcrel3 + alignment_glue <= pcrel
2531 && pcrel <= 10 - alignment_glue
2532 && allow_pcrel3)
2533 {
2534 insn[0] = 0x08;
2535 SNIP (1, 1, newrel);
2536 move_reloc (irel, srel, -1);
2537 *again = TRUE;
2538 }
2539 break;
2540
2541 case 0x05: /* BSR pcdsp:24 */
2542 if (-32768 + alignment_glue <= pcrel
2543 && pcrel <= 32765 - alignment_glue)
2544 {
2545 insn[0] = 0x39;
2546 SNIP (1, 1, newrel);
2547 *again = TRUE;
2548 }
2549 break;
2550
2551 case 0x3a: /* BEQ.W pcdsp:16 */
2552 case 0x3b: /* BNE.W pcdsp:16 */
2553 if (-128 + alignment_glue <= pcrel
2554 && pcrel <= 127 - alignment_glue)
2555 {
2556 insn[0] = 0x20 | (insn[0] & 1);
2557 SNIP (1, 1, newrel);
2558 *again = TRUE;
2559 }
2560 break;
2561
2562 case 0x20: /* BEQ.B pcdsp:8 */
2563 case 0x21: /* BNE.B pcdsp:8 */
2564 if (max_pcrel3 + alignment_glue <= pcrel
2565 && pcrel - alignment_glue <= 10
2566 && allow_pcrel3)
2567 {
2568 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2569 SNIP (1, 1, newrel);
2570 move_reloc (irel, srel, -1);
2571 *again = TRUE;
2572 }
2573 break;
2574
2575 case 0x16: /* synthetic BNE dsp24 */
2576 case 0x1e: /* synthetic BEQ dsp24 */
2577 if (-32767 + alignment_glue <= pcrel
2578 && pcrel <= 32766 - alignment_glue
2579 && insn[1] == 0x04)
2580 {
2581 if (insn[0] == 0x16)
2582 insn[0] = 0x3b;
2583 else
2584 insn[0] = 0x3a;
2585 /* We snip out the bytes at the end else the reloc
2586 will get moved too, and too much. */
2587 SNIP (3, 2, newrel);
2588 move_reloc (irel, srel, -1);
2589 *again = TRUE;
2590 }
2591 break;
2592 }
2593
2594 /* Special case - synthetic conditional branches, pcrel24.
2595 Note that EQ and NE have been handled above. */
2596 if ((insn[0] & 0xf0) == 0x20
2597 && insn[1] == 0x06
2598 && insn[2] == 0x04
2599 && srel->r_offset != irel->r_offset + 1
2600 && -32767 + alignment_glue <= pcrel
2601 && pcrel <= 32766 - alignment_glue)
2602 {
2603 insn[1] = 0x05;
2604 insn[2] = 0x38;
2605 SNIP (5, 1, newrel);
2606 *again = TRUE;
2607 }
2608
2609 /* Special case - synthetic conditional branches, pcrel16 */
2610 if ((insn[0] & 0xf0) == 0x20
2611 && insn[1] == 0x05
2612 && insn[2] == 0x38
2613 && srel->r_offset != irel->r_offset + 1
2614 && -127 + alignment_glue <= pcrel
2615 && pcrel <= 126 - alignment_glue)
2616 {
2617 int cond = (insn[0] & 0x0f) ^ 0x01;
2618
2619 insn[0] = 0x20 | cond;
2620 /* By moving the reloc first, we avoid having
2621 delete_bytes move it also. */
2622 move_reloc (irel, srel, -2);
2623 SNIP (2, 3, newrel);
2624 *again = TRUE;
2625 }
2626 }
2627
2628 BFD_ASSERT (nrelocs == 0);
2629
2630 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2631 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2632 because it may have one or two relocations. */
2633 if ((insn[0] & 0xfc) == 0xf8
2634 && (insn[1] & 0x80) == 0x00
2635 && (insn[0] & 0x03) != 0x03)
2636 {
2637 int dcode, icode, reg, ioff, dscale, ilen;
2638 bfd_vma disp_val = 0;
2639 long imm_val = 0;
2640 Elf_Internal_Rela * disp_rel = 0;
2641 Elf_Internal_Rela * imm_rel = 0;
2642
2643 /* Reset this. */
2644 srel = irel;
2645
2646 dcode = insn[0] & 0x03;
2647 icode = (insn[1] >> 2) & 0x03;
2648 reg = (insn[1] >> 4) & 0x0f;
2649
2650 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2651
2652 /* Figure out what the dispacement is. */
2653 if (dcode == 1 || dcode == 2)
2654 {
2655 /* There's a displacement. See if there's a reloc for it. */
2656 if (srel[1].r_offset == irel->r_offset + 2)
2657 {
2658 GET_RELOC;
2659 disp_val = symval;
2660 disp_rel = srel;
2661 }
2662 else
2663 {
2664 if (dcode == 1)
2665 disp_val = insn[2];
2666 else
2667 {
2668 #if RX_OPCODE_BIG_ENDIAN
2669 disp_val = insn[2] * 256 + insn[3];
2670 #else
2671 disp_val = insn[2] + insn[3] * 256;
2672 #endif
2673 }
2674 switch (insn[1] & 3)
2675 {
2676 case 1:
2677 disp_val *= 2;
2678 scale = 2;
2679 break;
2680 case 2:
2681 disp_val *= 4;
2682 scale = 4;
2683 break;
2684 }
2685 }
2686 }
2687
2688 dscale = scale;
2689
2690 /* Figure out what the immediate is. */
2691 if (srel[1].r_offset == irel->r_offset + ioff)
2692 {
2693 GET_RELOC;
2694 imm_val = (long) symval;
2695 imm_rel = srel;
2696 }
2697 else
2698 {
2699 unsigned char * ip = insn + ioff;
2700
2701 switch (icode)
2702 {
2703 case 1:
2704 /* For byte writes, we don't sign extend. Makes the math easier later. */
2705 if (scale == 1)
2706 imm_val = ip[0];
2707 else
2708 imm_val = (char) ip[0];
2709 break;
2710 case 2:
2711 #if RX_OPCODE_BIG_ENDIAN
2712 imm_val = ((char) ip[0] << 8) | ip[1];
2713 #else
2714 imm_val = ((char) ip[1] << 8) | ip[0];
2715 #endif
2716 break;
2717 case 3:
2718 #if RX_OPCODE_BIG_ENDIAN
2719 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2720 #else
2721 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2722 #endif
2723 break;
2724 case 0:
2725 #if RX_OPCODE_BIG_ENDIAN
2726 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2727 #else
2728 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2729 #endif
2730 break;
2731 }
2732 }
2733
2734 ilen = 2;
2735
2736 switch (dcode)
2737 {
2738 case 1:
2739 ilen += 1;
2740 break;
2741 case 2:
2742 ilen += 2;
2743 break;
2744 }
2745
2746 switch (icode)
2747 {
2748 case 1:
2749 ilen += 1;
2750 break;
2751 case 2:
2752 ilen += 2;
2753 break;
2754 case 3:
2755 ilen += 3;
2756 break;
2757 case 4:
2758 ilen += 4;
2759 break;
2760 }
2761
2762 /* The shortcut happens when the immediate is 0..255,
2763 register r0 to r7, and displacement (scaled) 0..31. */
2764
2765 if (0 <= imm_val && imm_val <= 255
2766 && 0 <= reg && reg <= 7
2767 && disp_val / dscale <= 31)
2768 {
2769 insn[0] = 0x3c | (insn[1] & 0x03);
2770 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2771 insn[2] = imm_val;
2772
2773 if (disp_rel)
2774 {
2775 int newrel = R_RX_NONE;
2776
2777 switch (dscale)
2778 {
2779 case 1:
2780 newrel = R_RX_RH_ABS5p8B;
2781 break;
2782 case 2:
2783 newrel = R_RX_RH_ABS5p8W;
2784 break;
2785 case 4:
2786 newrel = R_RX_RH_ABS5p8L;
2787 break;
2788 }
2789 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2790 move_reloc (irel, disp_rel, -1);
2791 }
2792 if (imm_rel)
2793 {
2794 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2795 move_reloc (disp_rel ? disp_rel : irel,
2796 imm_rel,
2797 irel->r_offset - imm_rel->r_offset + 2);
2798 }
2799
2800 SNIPNR (3, ilen - 3);
2801 *again = TRUE;
2802
2803 /* We can't relax this new opcode. */
2804 irel->r_addend = 0;
2805 }
2806 }
2807 }
2808
2809 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2810 whatever they're branching over won't shrink any more. If we're
2811 basically done here, do one more pass just for branches - but
2812 don't request a pass after that one! */
2813 if (!*again && !allow_pcrel3)
2814 {
2815 bfd_boolean ignored;
2816
2817 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
2818 }
2819
2820 return TRUE;
2821
2822 error_return:
2823 if (free_relocs != NULL)
2824 free (free_relocs);
2825
2826 if (free_contents != NULL)
2827 free (free_contents);
2828
2829 if (shndx_buf != NULL)
2830 {
2831 shndx_hdr->contents = NULL;
2832 free (shndx_buf);
2833 }
2834
2835 if (free_intsyms != NULL)
2836 free (free_intsyms);
2837
2838 return FALSE;
2839 }
2840
2841 static bfd_boolean
2842 elf32_rx_relax_section_wrapper (bfd * abfd,
2843 asection * sec,
2844 struct bfd_link_info * link_info,
2845 bfd_boolean * again)
2846 {
2847 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
2848 }
2849 \f
2850 /* Function to set the ELF flag bits. */
2851
2852 static bfd_boolean
2853 rx_elf_set_private_flags (bfd * abfd, flagword flags)
2854 {
2855 elf_elfheader (abfd)->e_flags = flags;
2856 elf_flags_init (abfd) = TRUE;
2857 return TRUE;
2858 }
2859
2860 static bfd_boolean no_warn_mismatch = FALSE;
2861
2862 void bfd_elf32_rx_set_target_flags (bfd_boolean);
2863
2864 void
2865 bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch)
2866 {
2867 no_warn_mismatch = user_no_warn_mismatch;
2868 }
2869
2870 /* Merge backend specific data from an object file to the output
2871 object file when linking. */
2872
2873 static bfd_boolean
2874 rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2875 {
2876 flagword old_flags;
2877 flagword new_flags;
2878 bfd_boolean error = FALSE;
2879
2880 new_flags = elf_elfheader (ibfd)->e_flags;
2881 old_flags = elf_elfheader (obfd)->e_flags;
2882
2883 if (!elf_flags_init (obfd))
2884 {
2885 /* First call, no flags set. */
2886 elf_flags_init (obfd) = TRUE;
2887 elf_elfheader (obfd)->e_flags = new_flags;
2888 }
2889 else if (old_flags != new_flags)
2890 {
2891 flagword known_flags = E_FLAG_RX_64BIT_DOUBLES | E_FLAG_RX_DSP;
2892
2893 if ((old_flags ^ new_flags) & known_flags)
2894 {
2895 /* Only complain if flag bits we care about do not match.
2896 Other bits may be set, since older binaries did use some
2897 deprecated flags. */
2898 if (no_warn_mismatch)
2899 {
2900 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
2901 }
2902 else
2903 {
2904 (*_bfd_error_handler)
2905 ("ELF header flags mismatch: old_flags = 0x%.8lx, new_flags = 0x%.8lx, filename = %s",
2906 old_flags, new_flags, bfd_get_filename (ibfd));
2907 error = TRUE;
2908 }
2909 }
2910 else
2911 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
2912 }
2913
2914 if (error)
2915 bfd_set_error (bfd_error_bad_value);
2916
2917 return !error;
2918 }
2919 \f
2920 static bfd_boolean
2921 rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
2922 {
2923 FILE * file = (FILE *) ptr;
2924 flagword flags;
2925
2926 BFD_ASSERT (abfd != NULL && ptr != NULL);
2927
2928 /* Print normal ELF private data. */
2929 _bfd_elf_print_private_bfd_data (abfd, ptr);
2930
2931 flags = elf_elfheader (abfd)->e_flags;
2932 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
2933
2934 if (flags & E_FLAG_RX_64BIT_DOUBLES)
2935 fprintf (file, _(" [64-bit doubles]"));
2936 if (flags & E_FLAG_RX_DSP)
2937 fprintf (file, _(" [dsp]"));
2938
2939 fputc ('\n', file);
2940 return TRUE;
2941 }
2942
2943 /* Return the MACH for an e_flags value. */
2944
2945 static int
2946 elf32_rx_machine (bfd * abfd)
2947 {
2948 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
2949 return bfd_mach_rx;
2950
2951 return 0;
2952 }
2953
2954 static bfd_boolean
2955 rx_elf_object_p (bfd * abfd)
2956 {
2957 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
2958 elf32_rx_machine (abfd));
2959 return TRUE;
2960 }
2961 \f
2962
2963 #ifdef DEBUG
2964 void
2965 dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
2966 {
2967 size_t locsymcount;
2968 Elf_Internal_Sym * isymbuf;
2969 Elf_Internal_Sym * isymend;
2970 Elf_Internal_Sym * isym;
2971 Elf_Internal_Shdr * symtab_hdr;
2972 bfd_boolean free_internal = FALSE, free_external = FALSE;
2973 char * st_info_str;
2974 char * st_info_stb_str;
2975 char * st_other_str;
2976 char * st_shndx_str;
2977
2978 if (! internal_syms)
2979 {
2980 internal_syms = bfd_malloc (1000);
2981 free_internal = 1;
2982 }
2983 if (! external_syms)
2984 {
2985 external_syms = bfd_malloc (1000);
2986 free_external = 1;
2987 }
2988
2989 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2990 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
2991 if (free_internal)
2992 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2993 symtab_hdr->sh_info, 0,
2994 internal_syms, external_syms, NULL);
2995 else
2996 isymbuf = internal_syms;
2997 isymend = isymbuf + locsymcount;
2998
2999 for (isym = isymbuf ; isym < isymend ; isym++)
3000 {
3001 switch (ELF_ST_TYPE (isym->st_info))
3002 {
3003 case STT_FUNC: st_info_str = "STT_FUNC";
3004 case STT_SECTION: st_info_str = "STT_SECTION";
3005 case STT_FILE: st_info_str = "STT_FILE";
3006 case STT_OBJECT: st_info_str = "STT_OBJECT";
3007 case STT_TLS: st_info_str = "STT_TLS";
3008 default: st_info_str = "";
3009 }
3010 switch (ELF_ST_BIND (isym->st_info))
3011 {
3012 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
3013 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
3014 default: st_info_stb_str = "";
3015 }
3016 switch (ELF_ST_VISIBILITY (isym->st_other))
3017 {
3018 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
3019 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
3020 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
3021 default: st_other_str = "";
3022 }
3023 switch (isym->st_shndx)
3024 {
3025 case SHN_ABS: st_shndx_str = "SHN_ABS";
3026 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
3027 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
3028 default: st_shndx_str = "";
3029 }
3030
3031 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3032 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3033 isym,
3034 (unsigned long) isym->st_value,
3035 (unsigned long) isym->st_size,
3036 isym->st_name,
3037 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3038 isym->st_name),
3039 isym->st_info, st_info_str, st_info_stb_str,
3040 isym->st_other, st_other_str,
3041 isym->st_shndx, st_shndx_str);
3042 }
3043 if (free_internal)
3044 free (internal_syms);
3045 if (free_external)
3046 free (external_syms);
3047 }
3048
3049 char *
3050 rx_get_reloc (long reloc)
3051 {
3052 if (0 <= reloc && reloc < R_RX_max)
3053 return rx_elf_howto_table[reloc].name;
3054 return "";
3055 }
3056 #endif /* DEBUG */
3057
3058 \f
3059 /* We must take care to keep the on-disk copy of any code sections
3060 that are fully linked swapped if the target is big endian, to match
3061 the Renesas tools. */
3062
3063 /* The rule is: big endian object that are final-link executables,
3064 have code sections stored with 32-bit words swapped relative to
3065 what you'd get by default. */
3066
3067 static bfd_boolean
3068 rx_get_section_contents (bfd * abfd,
3069 sec_ptr section,
3070 void * location,
3071 file_ptr offset,
3072 bfd_size_type count)
3073 {
3074 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3075 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3076 bfd_boolean rv;
3077
3078 #ifdef DJDEBUG
3079 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3080 (long) offset, (long) count, section->name,
3081 bfd_big_endian(abfd) ? "be" : "le",
3082 exec, s_code, (long unsigned) section->filepos,
3083 (long unsigned) offset);
3084 #endif
3085
3086 if (exec && s_code && bfd_big_endian (abfd))
3087 {
3088 char * cloc = (char *) location;
3089 bfd_size_type cnt, end_cnt;
3090
3091 rv = TRUE;
3092
3093 /* Fetch and swap unaligned bytes at the beginning. */
3094 if (offset % 4)
3095 {
3096 char buf[4];
3097
3098 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3099 (offset & -4), 4);
3100 if (!rv)
3101 return FALSE;
3102
3103 bfd_putb32 (bfd_getl32 (buf), buf);
3104
3105 cnt = 4 - (offset % 4);
3106 if (cnt > count)
3107 cnt = count;
3108
3109 memcpy (location, buf + (offset % 4), cnt);
3110
3111 count -= cnt;
3112 offset += cnt;
3113 cloc += count;
3114 }
3115
3116 end_cnt = count % 4;
3117
3118 /* Fetch and swap the middle bytes. */
3119 if (count >= 4)
3120 {
3121 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3122 count - end_cnt);
3123 if (!rv)
3124 return FALSE;
3125
3126 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3127 bfd_putb32 (bfd_getl32 (cloc), cloc);
3128 }
3129
3130 /* Fetch and swap the end bytes. */
3131 if (end_cnt > 0)
3132 {
3133 char buf[4];
3134
3135 /* Fetch the end bytes. */
3136 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3137 offset + count - end_cnt, 4);
3138 if (!rv)
3139 return FALSE;
3140
3141 bfd_putb32 (bfd_getl32 (buf), buf);
3142 memcpy (cloc, buf, end_cnt);
3143 }
3144 }
3145 else
3146 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3147
3148 return rv;
3149 }
3150
3151 #ifdef DJDEBUG
3152 static bfd_boolean
3153 rx2_set_section_contents (bfd * abfd,
3154 sec_ptr section,
3155 const void * location,
3156 file_ptr offset,
3157 bfd_size_type count)
3158 {
3159 bfd_size_type i;
3160
3161 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3162 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3163 for (i = 0; i < count; i++)
3164 {
3165 if (i % 16 == 0 && i > 0)
3166 fprintf (stderr, "\n");
3167
3168 if (i % 16 && i % 4 == 0)
3169 fprintf (stderr, " ");
3170
3171 if (i % 16 == 0)
3172 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3173
3174 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3175 }
3176 fprintf (stderr, "\n");
3177
3178 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3179 }
3180 #define _bfd_elf_set_section_contents rx2_set_section_contents
3181 #endif
3182
3183 static bfd_boolean
3184 rx_set_section_contents (bfd * abfd,
3185 sec_ptr section,
3186 const void * location,
3187 file_ptr offset,
3188 bfd_size_type count)
3189 {
3190 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3191 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3192 bfd_boolean rv;
3193 char * swapped_data = NULL;
3194 bfd_size_type i;
3195 bfd_vma caddr = section->vma + offset;
3196 file_ptr faddr = 0;
3197 bfd_size_type scount;
3198
3199 #ifdef DJDEBUG
3200 bfd_size_type i;
3201
3202 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3203 (long) offset, (long) count, section->name,
3204 bfd_big_endian (abfd) ? "be" : "le",
3205 exec, s_code);
3206
3207 for (i = 0; i < count; i++)
3208 {
3209 int a = section->vma + offset + i;
3210
3211 if (a % 16 == 0 && a > 0)
3212 fprintf (stderr, "\n");
3213
3214 if (a % 16 && a % 4 == 0)
3215 fprintf (stderr, " ");
3216
3217 if (a % 16 == 0 || i == 0)
3218 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3219
3220 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3221 }
3222
3223 fprintf (stderr, "\n");
3224 #endif
3225
3226 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3227 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3228
3229 while (count > 0 && caddr > 0 && caddr % 4)
3230 {
3231 switch (caddr % 4)
3232 {
3233 case 0: faddr = offset + 3; break;
3234 case 1: faddr = offset + 1; break;
3235 case 2: faddr = offset - 1; break;
3236 case 3: faddr = offset - 3; break;
3237 }
3238
3239 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3240 if (! rv)
3241 return rv;
3242
3243 location ++;
3244 offset ++;
3245 count --;
3246 caddr ++;
3247 }
3248
3249 scount = (int)(count / 4) * 4;
3250 if (scount > 0)
3251 {
3252 char * cloc = (char *) location;
3253
3254 swapped_data = (char *) bfd_alloc (abfd, count);
3255
3256 for (i = 0; i < count; i += 4)
3257 {
3258 bfd_vma v = bfd_getl32 (cloc + i);
3259 bfd_putb32 (v, swapped_data + i);
3260 }
3261
3262 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3263
3264 if (!rv)
3265 return rv;
3266 }
3267
3268 count -= scount;
3269 location += scount;
3270 offset += scount;
3271
3272 if (count > 0)
3273 {
3274 caddr = section->vma + offset;
3275 while (count > 0)
3276 {
3277 switch (caddr % 4)
3278 {
3279 case 0: faddr = offset + 3; break;
3280 case 1: faddr = offset + 1; break;
3281 case 2: faddr = offset - 1; break;
3282 case 3: faddr = offset - 3; break;
3283 }
3284 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3285 if (! rv)
3286 return rv;
3287
3288 location ++;
3289 offset ++;
3290 count --;
3291 caddr ++;
3292 }
3293 }
3294
3295 return TRUE;
3296 }
3297
3298 static bfd_boolean
3299 rx_final_link (bfd * abfd, struct bfd_link_info * info)
3300 {
3301 asection * o;
3302
3303 for (o = abfd->sections; o != NULL; o = o->next)
3304 {
3305 #ifdef DJDEBUG
3306 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3307 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3308 #endif
3309 if (o->flags & SEC_CODE
3310 && bfd_big_endian (abfd)
3311 && (o->size % 4 || o->rawsize % 4))
3312 {
3313 #ifdef DJDEBUG
3314 fprintf (stderr, "adjusting...\n");
3315 #endif
3316 o->size += 4 - (o->size % 4);
3317 o->rawsize += 4 - (o->rawsize % 4);
3318 }
3319 }
3320
3321 return bfd_elf_final_link (abfd, info);
3322 }
3323
3324 static bfd_boolean
3325 elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3326 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3327 {
3328 const struct elf_backend_data * bed;
3329 struct elf_obj_tdata * tdata;
3330 Elf_Internal_Phdr * phdr;
3331 unsigned int count;
3332 unsigned int i;
3333
3334 bed = get_elf_backend_data (abfd);
3335 tdata = elf_tdata (abfd);
3336 phdr = tdata->phdr;
3337 count = tdata->program_header_size / bed->s->sizeof_phdr;
3338
3339 for (i = count; i-- != 0; )
3340 if (phdr[i].p_type == PT_LOAD)
3341 {
3342 /* The Renesas tools expect p_paddr to be zero. However,
3343 there is no other way to store the writable data in ROM for
3344 startup initialization. So, we let the linker *think*
3345 we're using paddr and vaddr the "usual" way, but at the
3346 last minute we move the paddr into the vaddr (which is what
3347 the simulator uses) and zero out paddr. Note that this
3348 does not affect the section headers, just the program
3349 headers. We hope. */
3350 phdr[i].p_vaddr = phdr[i].p_paddr;
3351 /* If we zero out p_paddr, then the LMA in the section table
3352 becomes wrong. */
3353 /*phdr[i].p_paddr = 0;*/
3354 }
3355
3356 return TRUE;
3357 }
3358 \f
3359 #define ELF_ARCH bfd_arch_rx
3360 #define ELF_MACHINE_CODE EM_RX
3361 #define ELF_MAXPAGESIZE 0x1000
3362
3363 #define TARGET_BIG_SYM bfd_elf32_rx_be_vec
3364 #define TARGET_BIG_NAME "elf32-rx-be"
3365
3366 #define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec
3367 #define TARGET_LITTLE_NAME "elf32-rx-le"
3368
3369 #define elf_info_to_howto_rel NULL
3370 #define elf_info_to_howto rx_info_to_howto_rela
3371 #define elf_backend_object_p rx_elf_object_p
3372 #define elf_backend_relocate_section rx_elf_relocate_section
3373 #define elf_symbol_leading_char ('_')
3374 #define elf_backend_can_gc_sections 1
3375 #define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3376
3377 #define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3378 #define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3379 #define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3380 #define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3381 #define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3382 #define bfd_elf32_get_section_contents rx_get_section_contents
3383 #define bfd_elf32_set_section_contents rx_set_section_contents
3384 #define bfd_elf32_bfd_final_link rx_final_link
3385 #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
3386
3387 #include "elf32-target.h"
git-cvsimport of binutils cvsroot