1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "safe-ctype.h"
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
27 #include "libiberty.h"
29 /* Structure to hold information about predefined registers. */
36 /* Generic assembler global variables which must be defined by all
39 /* Characters which always start a comment. */
40 const char comment_chars
[] = "#";
42 /* Characters which start a comment at the beginning of a line. */
43 const char line_comment_chars
[] = ";#";
45 /* Characters which may be used to separate multiple commands on a
47 const char line_separator_chars
[] = ";";
49 /* Characters which are used to indicate an exponent in a floating
51 const char EXP_CHARS
[] = "eE";
53 /* Characters which mean that a number is a floating point constant,
55 const char FLT_CHARS
[] = "dD";
57 const relax_typeS md_relax_table
[] =
59 /* The plus values for the bCC and fBCC instructions in the table below
60 are because the branch instruction is translated into a jump
61 instruction that is now +2 or +3 bytes further on in memory, and the
62 correct size of jump instruction must be selected. */
65 {0x7fff + 2, -0x8000 + 2, 5, 2},
66 {0x7fffffff, -0x80000000, 7, 0},
68 /* bCC relaxing (uncommon cases for 3byte length instructions) */
70 {0x7fff + 3, -0x8000 + 3, 6, 5},
71 {0x7fffffff, -0x80000000, 8, 0},
74 {0x7fff, -0x8000, 5, 7},
75 {0x7fffffff, -0x80000000, 7, 0},
78 {0x7fff, -0x8000, 4, 9},
79 {0x7fffffff, -0x80000000, 6, 0},
83 {0x7fff, -0x8000, 3, 12},
84 {0x7fffffff, -0x80000000, 5, 0},
88 {0x7fff + 3, -0x8000 + 3, 6, 15},
89 {0x7fffffff, -0x80000000, 8, 0},
93 /* Set linkrelax here to avoid fixups in most sections. */
96 static int current_machine
;
99 #define MAX_INSN_FIXUPS 5
105 bfd_reloc_code_real_type reloc
;
107 struct mn10300_fixup fixups
[MAX_INSN_FIXUPS
];
110 /* We must store the value of each register operand so that we can
111 verify that certain registers do not match. */
112 int mn10300_reg_operands
[MN10300_MAX_OPERANDS
];
114 const char *md_shortopts
= "";
116 struct option md_longopts
[] =
118 {NULL
, no_argument
, NULL
, 0}
121 size_t md_longopts_size
= sizeof (md_longopts
);
123 #define HAVE_AM33_2 (current_machine == AM33_2)
124 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
125 #define HAVE_AM30 (current_machine == AM30)
127 /* Opcode hash table. */
128 static struct hash_control
*mn10300_hash
;
130 /* This table is sorted. Suitable for searching by a binary search. */
131 static const struct reg_name data_registers
[] =
139 static const struct reg_name address_registers
[] =
147 static const struct reg_name r_registers
[] =
191 static const struct reg_name xr_registers
[] =
216 static const struct reg_name float_registers
[] =
252 static const struct reg_name double_registers
[] =
272 /* We abuse the `value' field, that would be otherwise unused, to
273 encode the architecture on which (access to) the register was
274 introduced. FIXME: we should probably warn when we encounter a
275 register name when assembling for an architecture that doesn't
276 support it, before parsing it as a symbol name. */
277 static const struct reg_name other_registers
[] =
286 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
288 /* Perform a binary search of the given register table REGS to see
289 if NAME is a valid regiter name. Returns the register number from
290 the array on success, or -1 on failure. */
293 reg_name_search (const struct reg_name
*regs
,
306 middle
= (low
+ high
) / 2;
307 cmp
= strcasecmp (name
, regs
[middle
].name
);
313 return regs
[middle
].value
;
320 /* Looks at the current position in the input line to see if it is
321 the name of a register in TABLE. If it is, then the name is
322 converted into an expression returned in EXPRESSIONP (with X_op
323 set to O_register and X_add_number set to the register number), the
324 input pointer is left pointing at the first non-blank character after
325 the name and the function returns TRUE. Otherwise the input pointer
326 is left alone and the function returns FALSE. */
329 get_register_name (expressionS
* expressionP
,
330 const struct reg_name
* table
,
338 /* Find the spelling of the operand. */
339 start
= name
= input_line_pointer
;
341 c
= get_symbol_end ();
342 reg_number
= reg_name_search (table
, table_length
, name
);
344 /* Put back the delimiting char. */
345 *input_line_pointer
= c
;
347 /* Look to see if it's in the register table. */
350 expressionP
->X_op
= O_register
;
351 expressionP
->X_add_number
= reg_number
;
353 /* Make the rest nice. */
354 expressionP
->X_add_symbol
= NULL
;
355 expressionP
->X_op_symbol
= NULL
;
360 /* Reset the line as if we had not done anything. */
361 input_line_pointer
= start
;
366 r_register_name (expressionS
*expressionP
)
368 return get_register_name (expressionP
, r_registers
, ARRAY_SIZE (r_registers
));
373 xr_register_name (expressionS
*expressionP
)
375 return get_register_name (expressionP
, xr_registers
, ARRAY_SIZE (xr_registers
));
379 data_register_name (expressionS
*expressionP
)
381 return get_register_name (expressionP
, data_registers
, ARRAY_SIZE (data_registers
));
385 address_register_name (expressionS
*expressionP
)
387 return get_register_name (expressionP
, address_registers
, ARRAY_SIZE (address_registers
));
391 float_register_name (expressionS
*expressionP
)
393 return get_register_name (expressionP
, float_registers
, ARRAY_SIZE (float_registers
));
397 double_register_name (expressionS
*expressionP
)
399 return get_register_name (expressionP
, double_registers
, ARRAY_SIZE (double_registers
));
403 other_register_name (expressionS
*expressionP
)
410 /* Find the spelling of the operand. */
411 start
= name
= input_line_pointer
;
413 c
= get_symbol_end ();
414 reg_number
= reg_name_search (other_registers
, ARRAY_SIZE (other_registers
), name
);
416 /* Put back the delimiting char. */
417 *input_line_pointer
= c
;
419 /* Look to see if it's in the register table. */
421 || (reg_number
== AM33
&& HAVE_AM33
))
423 expressionP
->X_op
= O_register
;
424 expressionP
->X_add_number
= 0;
426 /* Make the rest nice. */
427 expressionP
->X_add_symbol
= NULL
;
428 expressionP
->X_op_symbol
= NULL
;
433 /* Reset the line as if we had not done anything. */
434 input_line_pointer
= start
;
439 md_show_usage (FILE *stream
)
441 fprintf (stream
, _("MN10300 assembler options:\n\
446 md_parse_option (int c ATTRIBUTE_UNUSED
, char *arg ATTRIBUTE_UNUSED
)
452 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
458 md_atof (int type
, char *litp
, int *sizep
)
460 return ieee_md_atof (type
, litp
, sizep
, FALSE
);
464 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
468 static unsigned long label_count
= 0;
471 subseg_change (sec
, 0);
472 if (fragP
->fr_subtype
== 0)
474 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
475 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
479 else if (fragP
->fr_subtype
== 1)
481 /* Reverse the condition of the first branch. */
482 int offset
= fragP
->fr_fix
;
483 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
520 fragP
->fr_literal
[offset
] = opcode
;
522 /* Create a fixup for the reversed conditional branch. */
523 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
524 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
525 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
526 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
528 /* Now create the unconditional branch + fixup to the
530 fragP
->fr_literal
[offset
+ 2] = 0xcc;
531 fix_new (fragP
, fragP
->fr_fix
+ 3, 2, fragP
->fr_symbol
,
532 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
536 else if (fragP
->fr_subtype
== 2)
538 /* Reverse the condition of the first branch. */
539 int offset
= fragP
->fr_fix
;
540 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
577 fragP
->fr_literal
[offset
] = opcode
;
579 /* Create a fixup for the reversed conditional branch. */
580 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
581 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
582 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
583 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
585 /* Now create the unconditional branch + fixup to the
587 fragP
->fr_literal
[offset
+ 2] = 0xdc;
588 fix_new (fragP
, fragP
->fr_fix
+ 3, 4, fragP
->fr_symbol
,
589 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
593 else if (fragP
->fr_subtype
== 3)
595 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
596 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
600 else if (fragP
->fr_subtype
== 4)
602 /* Reverse the condition of the first branch. */
603 int offset
= fragP
->fr_fix
;
604 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
623 fragP
->fr_literal
[offset
+ 1] = opcode
;
625 /* Create a fixup for the reversed conditional branch. */
626 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
627 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
628 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
629 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
631 /* Now create the unconditional branch + fixup to the
633 fragP
->fr_literal
[offset
+ 3] = 0xcc;
634 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
635 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
639 else if (fragP
->fr_subtype
== 5)
641 /* Reverse the condition of the first branch. */
642 int offset
= fragP
->fr_fix
;
643 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
659 fragP
->fr_literal
[offset
+ 1] = opcode
;
661 /* Create a fixup for the reversed conditional branch. */
662 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
663 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
664 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
665 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
667 /* Now create the unconditional branch + fixup to the
669 fragP
->fr_literal
[offset
+ 3] = 0xdc;
670 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
671 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
675 else if (fragP
->fr_subtype
== 6)
677 int offset
= fragP
->fr_fix
;
679 fragP
->fr_literal
[offset
] = 0xcd;
680 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
681 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
685 else if (fragP
->fr_subtype
== 7)
687 int offset
= fragP
->fr_fix
;
689 fragP
->fr_literal
[offset
] = 0xdd;
690 fragP
->fr_literal
[offset
+ 5] = fragP
->fr_literal
[offset
+ 3];
691 fragP
->fr_literal
[offset
+ 6] = fragP
->fr_literal
[offset
+ 4];
693 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
694 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
698 else if (fragP
->fr_subtype
== 8)
700 int offset
= fragP
->fr_fix
;
702 fragP
->fr_literal
[offset
] = 0xfa;
703 fragP
->fr_literal
[offset
+ 1] = 0xff;
704 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
705 fragP
->fr_offset
+ 2, 1, BFD_RELOC_16_PCREL
);
709 else if (fragP
->fr_subtype
== 9)
711 int offset
= fragP
->fr_fix
;
713 fragP
->fr_literal
[offset
] = 0xfc;
714 fragP
->fr_literal
[offset
+ 1] = 0xff;
716 fix_new (fragP
, fragP
->fr_fix
+ 2, 4, fragP
->fr_symbol
,
717 fragP
->fr_offset
+ 2, 1, BFD_RELOC_32_PCREL
);
721 else if (fragP
->fr_subtype
== 10)
723 fragP
->fr_literal
[fragP
->fr_fix
] = 0xca;
724 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
725 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
729 else if (fragP
->fr_subtype
== 11)
731 int offset
= fragP
->fr_fix
;
733 fragP
->fr_literal
[offset
] = 0xcc;
735 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
736 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
740 else if (fragP
->fr_subtype
== 12)
742 int offset
= fragP
->fr_fix
;
744 fragP
->fr_literal
[offset
] = 0xdc;
746 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
747 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
751 else if (fragP
->fr_subtype
== 13)
753 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
754 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
758 else if (fragP
->fr_subtype
== 14)
760 /* Reverse the condition of the first branch. */
761 int offset
= fragP
->fr_fix
;
762 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
811 fragP
->fr_literal
[offset
+ 1] = opcode
;
813 /* Create a fixup for the reversed conditional branch. */
814 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
815 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
816 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
817 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
819 /* Now create the unconditional branch + fixup to the
821 fragP
->fr_literal
[offset
+ 3] = 0xcc;
822 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
823 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
827 else if (fragP
->fr_subtype
== 15)
829 /* Reverse the condition of the first branch. */
830 int offset
= fragP
->fr_fix
;
831 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
880 fragP
->fr_literal
[offset
+ 1] = opcode
;
882 /* Create a fixup for the reversed conditional branch. */
883 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
884 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
885 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
886 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
888 /* Now create the unconditional branch + fixup to the
890 fragP
->fr_literal
[offset
+ 3] = 0xdc;
891 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
892 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
901 md_section_align (asection
*seg
, valueT addr
)
903 int align
= bfd_get_section_alignment (stdoutput
, seg
);
905 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
911 char *prev_name
= "";
912 const struct mn10300_opcode
*op
;
914 mn10300_hash
= hash_new ();
916 /* Insert unique names into hash table. The MN10300 instruction set
917 has many identical opcode names that have different opcodes based
918 on the operands. This hash table then provides a quick index to
919 the first opcode with a particular name in the opcode table. */
921 op
= mn10300_opcodes
;
924 if (strcmp (prev_name
, op
->name
))
926 prev_name
= (char *) op
->name
;
927 hash_insert (mn10300_hash
, op
->name
, (char *) op
);
932 /* Set the default machine type. */
934 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, AM33_2
))
935 as_warn (_("could not set architecture and machine"));
937 current_machine
= AM33_2
;
939 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, MN103
))
940 as_warn (_("could not set architecture and machine"));
942 current_machine
= MN103
;
946 static symbolS
*GOT_symbol
;
949 mn10300_PIC_related_p (symbolS
*sym
)
956 if (sym
== GOT_symbol
)
959 exp
= symbol_get_value_expression (sym
);
961 return (exp
->X_op
== O_PIC_reloc
962 || mn10300_PIC_related_p (exp
->X_add_symbol
)
963 || mn10300_PIC_related_p (exp
->X_op_symbol
));
967 mn10300_check_fixup (struct mn10300_fixup
*fixup
)
969 expressionS
*exp
= &fixup
->exp
;
975 case O_subtract
: /* If we're sufficiently unlucky that the label
976 and the expression that references it happen
977 to end up in different frags, the subtract
978 won't be simplified within expression(). */
979 /* The PIC-related operand must be the first operand of a sum. */
980 if (exp
!= &fixup
->exp
|| mn10300_PIC_related_p (exp
->X_op_symbol
))
983 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
984 fixup
->reloc
= BFD_RELOC_32_GOT_PCREL
;
986 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
990 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
991 fixup
->reloc
= BFD_RELOC_32_GOT_PCREL
;
995 fixup
->reloc
= exp
->X_md
;
996 exp
->X_op
= O_symbol
;
997 if (fixup
->reloc
== BFD_RELOC_32_PLT_PCREL
998 && fixup
->opindex
>= 0
999 && (mn10300_operands
[fixup
->opindex
].flags
1000 & MN10300_OPERAND_RELAX
))
1005 return (mn10300_PIC_related_p (exp
->X_add_symbol
)
1006 || mn10300_PIC_related_p (exp
->X_op_symbol
));
1013 mn10300_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
1015 struct mn10300_fixup fixup
;
1019 fixup
.reloc
= BFD_RELOC_UNUSED
;
1021 mn10300_check_fixup (&fixup
);
1023 if (fixup
.reloc
== BFD_RELOC_MN10300_GOT32
)
1027 fixup
.reloc
= BFD_RELOC_MN10300_GOT16
;
1031 fixup
.reloc
= BFD_RELOC_MN10300_GOT24
;
1040 else if (fixup
.reloc
== BFD_RELOC_UNUSED
)
1044 fixup
.reloc
= BFD_RELOC_8
;
1048 fixup
.reloc
= BFD_RELOC_16
;
1052 fixup
.reloc
= BFD_RELOC_24
;
1056 fixup
.reloc
= BFD_RELOC_32
;
1065 as_bad (_("unsupported BFD relocation size %u"), size
);
1066 fixup
.reloc
= BFD_RELOC_UNUSED
;
1069 fix_new_exp (frag
, off
, size
, &fixup
.exp
, 0, fixup
.reloc
);
1073 check_operand (const struct mn10300_operand
*operand
,
1076 /* No need to check 32bit operands for a bit. Note that
1077 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1078 if (operand
->bits
!= 32
1079 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1085 bits
= operand
->bits
;
1086 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1089 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1091 max
= (1 << (bits
- 1)) - 1;
1092 min
= - (1 << (bits
- 1));
1096 max
= (1 << bits
) - 1;
1102 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1108 /* Insert an operand value into an instruction. */
1111 mn10300_insert_operand (unsigned long *insnp
,
1112 unsigned long *extensionp
,
1113 const struct mn10300_operand
*operand
,
1119 /* No need to check 32bit operands for a bit. Note that
1120 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1121 if (operand
->bits
!= 32
1122 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1128 bits
= operand
->bits
;
1129 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1132 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1134 max
= (1 << (bits
- 1)) - 1;
1135 min
= - (1 << (bits
- 1));
1139 max
= (1 << bits
) - 1;
1145 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1146 as_warn_value_out_of_range (_("operand"), test
, (offsetT
) min
, (offsetT
) max
, file
, line
);
1149 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
1151 *insnp
|= (val
>> (32 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1152 *extensionp
|= ((val
& ((1 << (32 - operand
->bits
)) - 1))
1155 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
1157 *insnp
|= (val
>> (24 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1158 *extensionp
|= ((val
& ((1 << (24 - operand
->bits
)) - 1))
1161 else if ((operand
->flags
& (MN10300_OPERAND_FSREG
| MN10300_OPERAND_FDREG
)))
1163 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1164 explanation of these variables. Note that FMT-implied shifts
1165 are not taken into account for FP registers. */
1166 unsigned long mask_low
, mask_high
;
1167 int shl_low
, shr_high
, shl_high
;
1169 switch (operand
->bits
)
1172 /* Handle regular FP registers. */
1173 if (operand
->shift
>= 0)
1175 /* This is an `m' register. */
1176 shl_low
= operand
->shift
;
1177 shl_high
= 8 + (8 & shl_low
) + (shl_low
& 4) / 4;
1181 /* This is an `n' register. */
1182 shl_low
= -operand
->shift
;
1183 shl_high
= shl_low
/ 4;
1192 /* Handle accumulators. */
1193 shl_low
= -operand
->shift
;
1203 *insnp
|= ((((val
& mask_high
) >> shr_high
) << shl_high
)
1204 | ((val
& mask_low
) << shl_low
));
1206 else if ((operand
->flags
& MN10300_OPERAND_EXTENDED
) == 0)
1208 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1209 << (operand
->shift
+ shift
));
1211 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1212 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1213 << (operand
->shift
+ shift
+ operand
->bits
));
1217 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1218 << (operand
->shift
+ shift
));
1220 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1221 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1222 << (operand
->shift
+ shift
+ operand
->bits
));
1227 md_assemble (char *str
)
1230 struct mn10300_opcode
*opcode
;
1231 struct mn10300_opcode
*next_opcode
;
1232 const unsigned char *opindex_ptr
;
1233 int next_opindex
, relaxable
;
1234 unsigned long insn
, extension
, size
= 0;
1239 /* Get the opcode. */
1240 for (s
= str
; *s
!= '\0' && !ISSPACE (*s
); s
++)
1245 /* Find the first opcode with the proper name. */
1246 opcode
= (struct mn10300_opcode
*) hash_find (mn10300_hash
, str
);
1249 as_bad (_("Unrecognized opcode: `%s'"), str
);
1254 while (ISSPACE (*str
))
1257 input_line_pointer
= str
;
1264 int extra_shift
= 0;
1266 errmsg
= _("Invalid opcode/operands");
1268 /* Reset the array of register operands. */
1269 memset (mn10300_reg_operands
, -1, sizeof (mn10300_reg_operands
));
1275 insn
= opcode
->opcode
;
1278 /* If the instruction is not available on the current machine
1279 then it can not possibly match. */
1281 && !(opcode
->machine
== AM33_2
&& HAVE_AM33_2
)
1282 && !(opcode
->machine
== AM33
&& HAVE_AM33
)
1283 && !(opcode
->machine
== AM30
&& HAVE_AM30
))
1286 for (op_idx
= 1, opindex_ptr
= opcode
->operands
;
1288 opindex_ptr
++, op_idx
++)
1290 const struct mn10300_operand
*operand
;
1293 if (next_opindex
== 0)
1295 operand
= &mn10300_operands
[*opindex_ptr
];
1299 operand
= &mn10300_operands
[next_opindex
];
1303 while (*str
== ' ' || *str
== ',')
1306 if (operand
->flags
& MN10300_OPERAND_RELAX
)
1309 /* Gather the operand. */
1310 hold
= input_line_pointer
;
1311 input_line_pointer
= str
;
1313 if (operand
->flags
& MN10300_OPERAND_PAREN
)
1315 if (*input_line_pointer
!= ')' && *input_line_pointer
!= '(')
1317 input_line_pointer
= hold
;
1321 input_line_pointer
++;
1324 /* See if we can match the operands. */
1325 else if (operand
->flags
& MN10300_OPERAND_DREG
)
1327 if (!data_register_name (&ex
))
1329 input_line_pointer
= hold
;
1334 else if (operand
->flags
& MN10300_OPERAND_AREG
)
1336 if (!address_register_name (&ex
))
1338 input_line_pointer
= hold
;
1343 else if (operand
->flags
& MN10300_OPERAND_SP
)
1345 char *start
= input_line_pointer
;
1346 char c
= get_symbol_end ();
1348 if (strcasecmp (start
, "sp") != 0)
1350 *input_line_pointer
= c
;
1351 input_line_pointer
= hold
;
1355 *input_line_pointer
= c
;
1358 else if (operand
->flags
& MN10300_OPERAND_RREG
)
1360 if (!r_register_name (&ex
))
1362 input_line_pointer
= hold
;
1367 else if (operand
->flags
& MN10300_OPERAND_XRREG
)
1369 if (!xr_register_name (&ex
))
1371 input_line_pointer
= hold
;
1376 else if (operand
->flags
& MN10300_OPERAND_FSREG
)
1378 if (!float_register_name (&ex
))
1380 input_line_pointer
= hold
;
1385 else if (operand
->flags
& MN10300_OPERAND_FDREG
)
1387 if (!double_register_name (&ex
))
1389 input_line_pointer
= hold
;
1394 else if (operand
->flags
& MN10300_OPERAND_FPCR
)
1396 char *start
= input_line_pointer
;
1397 char c
= get_symbol_end ();
1399 if (strcasecmp (start
, "fpcr") != 0)
1401 *input_line_pointer
= c
;
1402 input_line_pointer
= hold
;
1406 *input_line_pointer
= c
;
1409 else if (operand
->flags
& MN10300_OPERAND_USP
)
1411 char *start
= input_line_pointer
;
1412 char c
= get_symbol_end ();
1414 if (strcasecmp (start
, "usp") != 0)
1416 *input_line_pointer
= c
;
1417 input_line_pointer
= hold
;
1421 *input_line_pointer
= c
;
1424 else if (operand
->flags
& MN10300_OPERAND_SSP
)
1426 char *start
= input_line_pointer
;
1427 char c
= get_symbol_end ();
1429 if (strcasecmp (start
, "ssp") != 0)
1431 *input_line_pointer
= c
;
1432 input_line_pointer
= hold
;
1436 *input_line_pointer
= c
;
1439 else if (operand
->flags
& MN10300_OPERAND_MSP
)
1441 char *start
= input_line_pointer
;
1442 char c
= get_symbol_end ();
1444 if (strcasecmp (start
, "msp") != 0)
1446 *input_line_pointer
= c
;
1447 input_line_pointer
= hold
;
1451 *input_line_pointer
= c
;
1454 else if (operand
->flags
& MN10300_OPERAND_PC
)
1456 char *start
= input_line_pointer
;
1457 char c
= get_symbol_end ();
1459 if (strcasecmp (start
, "pc") != 0)
1461 *input_line_pointer
= c
;
1462 input_line_pointer
= hold
;
1466 *input_line_pointer
= c
;
1469 else if (operand
->flags
& MN10300_OPERAND_EPSW
)
1471 char *start
= input_line_pointer
;
1472 char c
= get_symbol_end ();
1474 if (strcasecmp (start
, "epsw") != 0)
1476 *input_line_pointer
= c
;
1477 input_line_pointer
= hold
;
1481 *input_line_pointer
= c
;
1484 else if (operand
->flags
& MN10300_OPERAND_PLUS
)
1486 if (*input_line_pointer
!= '+')
1488 input_line_pointer
= hold
;
1492 input_line_pointer
++;
1495 else if (operand
->flags
& MN10300_OPERAND_PSW
)
1497 char *start
= input_line_pointer
;
1498 char c
= get_symbol_end ();
1500 if (strcasecmp (start
, "psw") != 0)
1502 *input_line_pointer
= c
;
1503 input_line_pointer
= hold
;
1507 *input_line_pointer
= c
;
1510 else if (operand
->flags
& MN10300_OPERAND_MDR
)
1512 char *start
= input_line_pointer
;
1513 char c
= get_symbol_end ();
1515 if (strcasecmp (start
, "mdr") != 0)
1517 *input_line_pointer
= c
;
1518 input_line_pointer
= hold
;
1522 *input_line_pointer
= c
;
1525 else if (operand
->flags
& MN10300_OPERAND_REG_LIST
)
1527 unsigned int value
= 0;
1528 if (*input_line_pointer
!= '[')
1530 input_line_pointer
= hold
;
1536 input_line_pointer
++;
1538 /* We used to reject a null register list here; however,
1539 we accept it now so the compiler can emit "call"
1540 instructions for all calls to named functions.
1542 The linker can then fill in the appropriate bits for the
1543 register list and stack size or change the instruction
1544 into a "calls" if using "call" is not profitable. */
1545 while (*input_line_pointer
!= ']')
1550 if (*input_line_pointer
== ',')
1551 input_line_pointer
++;
1553 start
= input_line_pointer
;
1554 c
= get_symbol_end ();
1556 if (strcasecmp (start
, "d2") == 0)
1559 *input_line_pointer
= c
;
1561 else if (strcasecmp (start
, "d3") == 0)
1564 *input_line_pointer
= c
;
1566 else if (strcasecmp (start
, "a2") == 0)
1569 *input_line_pointer
= c
;
1571 else if (strcasecmp (start
, "a3") == 0)
1574 *input_line_pointer
= c
;
1576 else if (strcasecmp (start
, "other") == 0)
1579 *input_line_pointer
= c
;
1582 && strcasecmp (start
, "exreg0") == 0)
1585 *input_line_pointer
= c
;
1588 && strcasecmp (start
, "exreg1") == 0)
1591 *input_line_pointer
= c
;
1594 && strcasecmp (start
, "exother") == 0)
1597 *input_line_pointer
= c
;
1600 && strcasecmp (start
, "all") == 0)
1603 *input_line_pointer
= c
;
1607 input_line_pointer
= hold
;
1612 input_line_pointer
++;
1613 mn10300_insert_operand (& insn
, & extension
, operand
,
1618 else if (data_register_name (&ex
))
1620 input_line_pointer
= hold
;
1624 else if (address_register_name (&ex
))
1626 input_line_pointer
= hold
;
1630 else if (other_register_name (&ex
))
1632 input_line_pointer
= hold
;
1636 else if (HAVE_AM33
&& r_register_name (&ex
))
1638 input_line_pointer
= hold
;
1642 else if (HAVE_AM33
&& xr_register_name (&ex
))
1644 input_line_pointer
= hold
;
1648 else if (HAVE_AM33_2
&& float_register_name (&ex
))
1650 input_line_pointer
= hold
;
1654 else if (HAVE_AM33_2
&& double_register_name (&ex
))
1656 input_line_pointer
= hold
;
1660 else if (*str
== ')' || *str
== '(')
1662 input_line_pointer
= hold
;
1674 errmsg
= _("illegal operand");
1677 errmsg
= _("missing operand");
1683 mask
= MN10300_OPERAND_DREG
| MN10300_OPERAND_AREG
;
1685 mask
|= MN10300_OPERAND_RREG
| MN10300_OPERAND_XRREG
;
1687 mask
|= MN10300_OPERAND_FSREG
| MN10300_OPERAND_FDREG
;
1688 if ((operand
->flags
& mask
) == 0)
1690 input_line_pointer
= hold
;
1695 if (opcode
->format
== FMT_D1
|| opcode
->format
== FMT_S1
)
1697 else if (opcode
->format
== FMT_D2
1698 || opcode
->format
== FMT_D4
1699 || opcode
->format
== FMT_S2
1700 || opcode
->format
== FMT_S4
1701 || opcode
->format
== FMT_S6
1702 || opcode
->format
== FMT_D5
)
1704 else if (opcode
->format
== FMT_D7
)
1706 else if (opcode
->format
== FMT_D8
|| opcode
->format
== FMT_D9
)
1711 mn10300_insert_operand (& insn
, & extension
, operand
,
1712 ex
.X_add_number
, NULL
,
1715 /* And note the register number in the register array. */
1716 mn10300_reg_operands
[op_idx
- 1] = ex
.X_add_number
;
1721 /* If this operand can be promoted, and it doesn't
1722 fit into the allocated bitfield for this insn,
1723 then promote it (ie this opcode does not match). */
1725 & (MN10300_OPERAND_PROMOTE
| MN10300_OPERAND_RELAX
)
1726 && !check_operand (operand
, ex
.X_add_number
))
1728 input_line_pointer
= hold
;
1733 mn10300_insert_operand (& insn
, & extension
, operand
,
1734 ex
.X_add_number
, NULL
, 0, 0);
1738 /* If this operand can be promoted, then this opcode didn't
1739 match since we can't know if it needed promotion! */
1740 if (operand
->flags
& MN10300_OPERAND_PROMOTE
)
1742 input_line_pointer
= hold
;
1747 /* We need to generate a fixup for this expression. */
1748 if (fc
>= MAX_INSN_FIXUPS
)
1749 as_fatal (_("too many fixups"));
1750 fixups
[fc
].exp
= ex
;
1751 fixups
[fc
].opindex
= *opindex_ptr
;
1752 fixups
[fc
].reloc
= BFD_RELOC_UNUSED
;
1753 if (mn10300_check_fixup (& fixups
[fc
]))
1760 str
= input_line_pointer
;
1761 input_line_pointer
= hold
;
1763 while (*str
== ' ' || *str
== ',')
1767 /* Make sure we used all the operands! */
1771 /* If this instruction has registers that must not match, verify
1772 that they do indeed not match. */
1773 if (opcode
->no_match_operands
)
1775 /* Look at each operand to see if it's marked. */
1776 for (i
= 0; i
< MN10300_MAX_OPERANDS
; i
++)
1778 if ((1 << i
) & opcode
->no_match_operands
)
1782 /* operand I is marked. Check that it does not match any
1783 operands > I which are marked. */
1784 for (j
= i
+ 1; j
< MN10300_MAX_OPERANDS
; j
++)
1786 if (((1 << j
) & opcode
->no_match_operands
)
1787 && mn10300_reg_operands
[i
] == mn10300_reg_operands
[j
])
1789 errmsg
= _("Invalid register specification.");
1801 next_opcode
= opcode
+ 1;
1802 if (!strcmp (next_opcode
->name
, opcode
->name
))
1804 opcode
= next_opcode
;
1808 as_bad ("%s", errmsg
);
1814 while (ISSPACE (*str
))
1818 as_bad (_("junk at end of line: `%s'"), str
);
1820 input_line_pointer
= str
;
1822 /* Determine the size of the instruction. */
1823 if (opcode
->format
== FMT_S0
)
1826 if (opcode
->format
== FMT_S1
|| opcode
->format
== FMT_D0
)
1829 if (opcode
->format
== FMT_S2
|| opcode
->format
== FMT_D1
)
1832 if (opcode
->format
== FMT_D6
)
1835 if (opcode
->format
== FMT_D7
|| opcode
->format
== FMT_D10
)
1838 if (opcode
->format
== FMT_D8
)
1841 if (opcode
->format
== FMT_D9
)
1844 if (opcode
->format
== FMT_S4
)
1847 if (opcode
->format
== FMT_S6
|| opcode
->format
== FMT_D5
)
1850 if (opcode
->format
== FMT_D2
)
1853 if (opcode
->format
== FMT_D3
)
1856 if (opcode
->format
== FMT_D4
)
1859 if (relaxable
&& fc
> 0)
1861 /* On a 64-bit host the size of an 'int' is not the same
1862 as the size of a pointer, so we need a union to convert
1863 the opindex field of the fr_cgen structure into a char *
1864 so that it can be stored in the frag. We do not have
1865 to worry about loosing accuracy as we are not going to
1866 be even close to the 32bit limit of the int. */
1875 /* We want to anchor the line info to the previous frag (if
1876 there isn't one, create it), so that, when the insn is
1877 resized, we still get the right address for the beginning of
1880 dwarf2_emit_insn (0);
1885 /* Handle bra specially. Basically treat it like jmp so
1886 that we automatically handle 8, 16 and 32 bit offsets
1887 correctly as well as jumps to an undefined address.
1889 It is also important to not treat it like other bCC
1890 instructions since the long forms of bra is different
1891 from other bCC instructions. */
1892 if (opcode
->opcode
== 0xca00)
1904 else if (size
== 3 && opcode
->opcode
== 0xcc0000)
1906 else if (size
== 3 && (opcode
->opcode
& 0xfff000) == 0xf8d000)
1908 /* bCC (uncommon cases) */
1912 opindex_converter
.opindex
= fixups
[0].opindex
;
1913 f
= frag_var (rs_machine_dependent
, 8, 8 - size
, type
,
1914 fixups
[0].exp
.X_add_symbol
,
1915 fixups
[0].exp
.X_add_number
,
1916 opindex_converter
.ptr
);
1918 /* This is pretty hokey. We basically just care about the
1919 opcode, so we have to write out the first word big endian.
1921 The exception is "call", which has two operands that we
1924 The first operand (the register list) happens to be in the
1925 first instruction word, and will be in the right place if
1926 we output the first word in big endian mode.
1928 The second operand (stack size) is in the extension word,
1929 and we want it to appear as the first character in the extension
1930 word (as it appears in memory). Luckily, writing the extension
1931 word in big endian format will do what we want. */
1932 number_to_chars_bigendian (f
, insn
, size
> 4 ? 4 : size
);
1935 number_to_chars_bigendian (f
+ 4, extension
, 4);
1936 number_to_chars_bigendian (f
+ 8, 0, size
- 8);
1939 number_to_chars_bigendian (f
+ 4, extension
, size
- 4);
1943 /* Allocate space for the instruction. */
1944 f
= frag_more (size
);
1946 /* Fill in bytes for the instruction. Note that opcode fields
1947 are written big-endian, 16 & 32bit immediates are written
1948 little endian. Egad. */
1949 if (opcode
->format
== FMT_S0
1950 || opcode
->format
== FMT_S1
1951 || opcode
->format
== FMT_D0
1952 || opcode
->format
== FMT_D6
1953 || opcode
->format
== FMT_D7
1954 || opcode
->format
== FMT_D10
1955 || opcode
->format
== FMT_D1
)
1957 number_to_chars_bigendian (f
, insn
, size
);
1959 else if (opcode
->format
== FMT_S2
1960 && opcode
->opcode
!= 0xdf0000
1961 && opcode
->opcode
!= 0xde0000)
1963 /* A format S2 instruction that is _not_ "ret" and "retf". */
1964 number_to_chars_bigendian (f
, (insn
>> 16) & 0xff, 1);
1965 number_to_chars_littleendian (f
+ 1, insn
& 0xffff, 2);
1967 else if (opcode
->format
== FMT_S2
)
1969 /* This must be a ret or retf, which is written entirely in
1970 big-endian format. */
1971 number_to_chars_bigendian (f
, insn
, 3);
1973 else if (opcode
->format
== FMT_S4
1974 && opcode
->opcode
!= 0xdc000000)
1976 /* This must be a format S4 "call" instruction. What a pain. */
1977 unsigned long temp
= (insn
>> 8) & 0xffff;
1978 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1979 number_to_chars_littleendian (f
+ 1, temp
, 2);
1980 number_to_chars_bigendian (f
+ 3, insn
& 0xff, 1);
1981 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
1983 else if (opcode
->format
== FMT_S4
)
1985 /* This must be a format S4 "jmp" instruction. */
1986 unsigned long temp
= ((insn
& 0xffffff) << 8) | (extension
& 0xff);
1987 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1988 number_to_chars_littleendian (f
+ 1, temp
, 4);
1990 else if (opcode
->format
== FMT_S6
)
1992 unsigned long temp
= ((insn
& 0xffffff) << 8)
1993 | ((extension
>> 16) & 0xff);
1994 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1995 number_to_chars_littleendian (f
+ 1, temp
, 4);
1996 number_to_chars_bigendian (f
+ 5, (extension
>> 8) & 0xff, 1);
1997 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
1999 else if (opcode
->format
== FMT_D2
2000 && opcode
->opcode
!= 0xfaf80000
2001 && opcode
->opcode
!= 0xfaf00000
2002 && opcode
->opcode
!= 0xfaf40000)
2004 /* A format D2 instruction where the 16bit immediate is
2005 really a single 16bit value, not two 8bit values. */
2006 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2007 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
2009 else if (opcode
->format
== FMT_D2
)
2011 /* A format D2 instruction where the 16bit immediate
2012 is really two 8bit immediates. */
2013 number_to_chars_bigendian (f
, insn
, 4);
2015 else if (opcode
->format
== FMT_D3
)
2017 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2018 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
2019 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
2021 else if (opcode
->format
== FMT_D4
)
2023 unsigned long temp
= ((insn
& 0xffff) << 16) | (extension
& 0xffff);
2025 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2026 number_to_chars_littleendian (f
+ 2, temp
, 4);
2028 else if (opcode
->format
== FMT_D5
)
2030 unsigned long temp
= (((insn
& 0xffff) << 16)
2031 | ((extension
>> 8) & 0xffff));
2033 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2034 number_to_chars_littleendian (f
+ 2, temp
, 4);
2035 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
2037 else if (opcode
->format
== FMT_D8
)
2039 unsigned long temp
= ((insn
& 0xff) << 16) | (extension
& 0xffff);
2041 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
2042 number_to_chars_bigendian (f
+ 3, (temp
& 0xff), 1);
2043 number_to_chars_littleendian (f
+ 4, temp
>> 8, 2);
2045 else if (opcode
->format
== FMT_D9
)
2047 unsigned long temp
= ((insn
& 0xff) << 24) | (extension
& 0xffffff);
2049 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
2050 number_to_chars_littleendian (f
+ 3, temp
, 4);
2053 /* Create any fixups. */
2054 for (i
= 0; i
< fc
; i
++)
2056 const struct mn10300_operand
*operand
;
2059 operand
= &mn10300_operands
[fixups
[i
].opindex
];
2060 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
2061 && fixups
[i
].reloc
!= BFD_RELOC_32_GOT_PCREL
2062 && fixups
[i
].reloc
!= BFD_RELOC_32_GOTOFF
2063 && fixups
[i
].reloc
!= BFD_RELOC_32_PLT_PCREL
2064 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_GOT32
)
2066 reloc_howto_type
*reloc_howto
;
2070 reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
2076 reloc_size
= bfd_get_reloc_size (reloc_howto
);
2078 if (reloc_size
< 1 || reloc_size
> 4)
2082 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2083 reloc_size
, &fixups
[i
].exp
,
2084 reloc_howto
->pc_relative
,
2089 int reloc
, pcrel
, offset
;
2092 reloc
= BFD_RELOC_NONE
;
2093 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
)
2094 reloc
= fixups
[i
].reloc
;
2095 /* How big is the reloc? Remember SPLIT relocs are
2096 implicitly 32bits. */
2097 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
2099 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
2102 reloc_size
= operand
->bits
;
2104 /* Is the reloc pc-relative? */
2105 pcrel
= (operand
->flags
& MN10300_OPERAND_PCREL
) != 0;
2106 if (reloc
!= BFD_RELOC_NONE
)
2107 pcrel
= bfd_reloc_type_lookup (stdoutput
, reloc
)->pc_relative
;
2109 offset
= size
- (reloc_size
+ operand
->shift
) / 8;
2111 /* Choose a proper BFD relocation type. */
2112 if (reloc
!= BFD_RELOC_NONE
)
2116 if (reloc_size
== 32)
2117 reloc
= BFD_RELOC_32_PCREL
;
2118 else if (reloc_size
== 16)
2119 reloc
= BFD_RELOC_16_PCREL
;
2120 else if (reloc_size
== 8)
2121 reloc
= BFD_RELOC_8_PCREL
;
2127 if (reloc_size
== 32)
2128 reloc
= BFD_RELOC_32
;
2129 else if (reloc_size
== 16)
2130 reloc
= BFD_RELOC_16
;
2131 else if (reloc_size
== 8)
2132 reloc
= BFD_RELOC_8
;
2137 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2138 reloc_size
/ 8, &fixups
[i
].exp
, pcrel
,
2139 ((bfd_reloc_code_real_type
) reloc
));
2142 fixP
->fx_offset
+= offset
;
2146 dwarf2_emit_insn (size
);
2149 /* Label this frag as one that contains instructions. */
2150 frag_now
->tc_frag_data
= TRUE
;
2153 /* If while processing a fixup, a reloc really needs to be created
2154 then it is done here. */
2157 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
2159 static arelent
* no_relocs
= NULL
;
2160 static arelent
* relocs
[MAX_RELOC_EXPANSION
+ 1];
2163 reloc
= xmalloc (sizeof (arelent
));
2165 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
2166 if (reloc
->howto
== NULL
)
2168 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2169 _("reloc %d not supported by object file format"),
2170 (int) fixp
->fx_r_type
);
2175 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2180 && S_GET_SEGMENT (fixp
->fx_subsy
) == absolute_section
)
2182 fixp
->fx_offset
-= S_GET_VALUE (fixp
->fx_subsy
);
2183 fixp
->fx_subsy
= NULL
;
2186 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2188 asection
*asec
, *ssec
;
2190 asec
= S_GET_SEGMENT (fixp
->fx_addsy
);
2191 ssec
= S_GET_SEGMENT (fixp
->fx_subsy
);
2193 reloc
->sym_ptr_ptr
= NULL
;
2195 /* If we have a difference between two (non-absolute) symbols we must
2196 generate two relocs (one for each symbol) and allow the linker to
2197 resolve them - relaxation may change the distances between symbols,
2198 even local symbols defined in the same section. */
2199 if (ssec
!= absolute_section
|| asec
!= absolute_section
)
2201 arelent
* reloc2
= xmalloc (sizeof * reloc
);
2206 reloc2
->address
= reloc
->address
;
2207 reloc2
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_MN10300_SYM_DIFF
);
2208 reloc2
->addend
= - S_GET_VALUE (fixp
->fx_subsy
);
2209 reloc2
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2210 *reloc2
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
2212 reloc
->addend
= fixp
->fx_offset
;
2213 if (asec
== absolute_section
)
2214 reloc
->addend
+= S_GET_VALUE (fixp
->fx_addsy
);
2216 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2217 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2225 char *fixpos
= fixp
->fx_where
+ fixp
->fx_frag
->fr_literal
;
2227 reloc
->addend
= (S_GET_VALUE (fixp
->fx_addsy
)
2228 - S_GET_VALUE (fixp
->fx_subsy
) + fixp
->fx_offset
);
2230 switch (fixp
->fx_r_type
)
2233 md_number_to_chars (fixpos
, reloc
->addend
, 1);
2237 md_number_to_chars (fixpos
, reloc
->addend
, 2);
2241 md_number_to_chars (fixpos
, reloc
->addend
, 3);
2245 md_number_to_chars (fixpos
, reloc
->addend
, 4);
2250 = (asymbol
**) bfd_abs_section_ptr
->symbol_ptr_ptr
;
2254 if (reloc
->sym_ptr_ptr
)
2255 free (reloc
->sym_ptr_ptr
);
2262 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2263 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2264 reloc
->addend
= fixp
->fx_offset
;
2269 /* Returns true iff the symbol attached to the frag is at a known location
2270 in the given section, (and hence the relocation to it can be relaxed by
2272 static inline bfd_boolean
2273 has_known_symbol_location (fragS
* fragp
, asection
* sec
)
2275 symbolS
* sym
= fragp
->fr_symbol
;
2278 && S_IS_DEFINED (sym
)
2279 && ! S_IS_WEAK (sym
)
2280 && S_GET_SEGMENT (sym
) == sec
;
2284 md_estimate_size_before_relax (fragS
*fragp
, asection
*seg
)
2286 if (fragp
->fr_subtype
== 6
2287 && ! has_known_symbol_location (fragp
, seg
))
2288 fragp
->fr_subtype
= 7;
2289 else if (fragp
->fr_subtype
== 8
2290 && ! has_known_symbol_location (fragp
, seg
))
2291 fragp
->fr_subtype
= 9;
2292 else if (fragp
->fr_subtype
== 10
2293 && ! has_known_symbol_location (fragp
, seg
))
2294 fragp
->fr_subtype
= 12;
2296 if (fragp
->fr_subtype
== 13)
2299 if (fragp
->fr_subtype
>= sizeof (md_relax_table
) / sizeof (md_relax_table
[0]))
2302 return md_relax_table
[fragp
->fr_subtype
].rlx_length
;
2306 md_pcrel_from (fixS
*fixp
)
2308 if (fixp
->fx_addsy
!= (symbolS
*) NULL
2309 && (!S_IS_DEFINED (fixp
->fx_addsy
) || S_IS_WEAK (fixp
->fx_addsy
)))
2310 /* The symbol is undefined or weak. Let the linker figure it out. */
2313 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2317 md_apply_fix (fixS
* fixP
, valueT
* valP
, segT seg
)
2319 char * fixpos
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2321 int value
= (int) * valP
;
2323 gas_assert (fixP
->fx_r_type
< BFD_RELOC_UNUSED
);
2325 /* This should never happen. */
2326 if (seg
->flags
& SEC_ALLOC
)
2329 /* The value we are passed in *valuep includes the symbol values.
2330 If we are doing this relocation the code in write.c is going to
2331 call bfd_install_relocation, which is also going to use the symbol
2332 value. That means that if the reloc is fully resolved we want to
2333 use *valuep since bfd_install_relocation is not being used.
2335 However, if the reloc is not fully resolved we do not want to use
2336 *valuep, and must use fx_offset instead. However, if the reloc
2337 is PC relative, we do want to use *valuep since it includes the
2338 result of md_pcrel_from. */
2339 if (fixP
->fx_addsy
!= NULL
&& ! fixP
->fx_pcrel
)
2340 value
= fixP
->fx_offset
;
2342 /* If the fix is relative to a symbol which is not defined, or not
2343 in the same segment as the fix, we cannot resolve it here. */
2344 if (fixP
->fx_addsy
!= NULL
2345 && (! S_IS_DEFINED (fixP
->fx_addsy
)
2346 || (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)))
2352 switch (fixP
->fx_r_type
)
2355 case BFD_RELOC_8_PCREL
:
2360 case BFD_RELOC_16_PCREL
:
2365 case BFD_RELOC_32_PCREL
:
2369 case BFD_RELOC_VTABLE_INHERIT
:
2370 case BFD_RELOC_VTABLE_ENTRY
:
2374 case BFD_RELOC_MN10300_ALIGN
:
2378 case BFD_RELOC_NONE
:
2380 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
2381 _("Bad relocation fixup type (%d)"), fixP
->fx_r_type
);
2384 md_number_to_chars (fixpos
, value
, size
);
2386 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2387 if (fixP
->fx_addsy
== NULL
)
2391 /* Return zero if the fixup in fixp should be left alone and not
2395 mn10300_fix_adjustable (struct fix
*fixp
)
2399 if (TC_FORCE_RELOCATION_LOCAL (fixp
))
2402 /* Non-relative relocs can (and must) be adjusted if they do
2403 not meet the criteria below, or the generic criteria. */
2404 else if (TC_FORCE_RELOCATION (fixp
))
2407 /* Do not adjust relocations involving symbols in code sections,
2408 because it breaks linker relaxations. This could be fixed in the
2409 linker, but this fix is simpler, and it pretty much only affects
2410 object size a little bit. */
2411 if (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_CODE
)
2414 /* Likewise, do not adjust symbols that won't be merged, or debug
2415 symbols, because they too break relaxation. We do want to adjust
2416 other mergable symbols, like .rodata, because code relaxations
2417 need section-relative symbols to properly relax them. */
2418 if (! (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_MERGE
))
2421 if (strncmp (S_GET_SEGMENT (fixp
->fx_addsy
)->name
, ".debug", 6) == 0)
2428 set_arch_mach (int mach
)
2430 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, mach
))
2431 as_warn (_("could not set architecture and machine"));
2433 current_machine
= mach
;
2436 static inline char *
2437 mn10300_end_of_match (char *cont
, char *what
)
2439 int len
= strlen (what
);
2441 if (strncmp (cont
, what
, strlen (what
)) == 0
2442 && ! is_part_of_name (cont
[len
]))
2449 mn10300_parse_name (char const *name
,
2451 enum expr_mode mode
,
2454 char *next
= input_line_pointer
;
2459 exprP
->X_op_symbol
= NULL
;
2461 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2464 GOT_symbol
= symbol_find_or_make (name
);
2466 exprP
->X_add_symbol
= GOT_symbol
;
2468 /* If we have an absolute symbol or a reg,
2469 then we know its value now. */
2470 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
2471 if (mode
!= expr_defer
&& segment
== absolute_section
)
2473 exprP
->X_op
= O_constant
;
2474 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
2475 exprP
->X_add_symbol
= NULL
;
2477 else if (mode
!= expr_defer
&& segment
== reg_section
)
2479 exprP
->X_op
= O_register
;
2480 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
2481 exprP
->X_add_symbol
= NULL
;
2485 exprP
->X_op
= O_symbol
;
2486 exprP
->X_add_number
= 0;
2492 exprP
->X_add_symbol
= symbol_find_or_make (name
);
2494 if (*nextcharP
!= '@')
2496 else if ((next_end
= mn10300_end_of_match (next
+ 1, "GOTOFF")))
2497 reloc_type
= BFD_RELOC_32_GOTOFF
;
2498 else if ((next_end
= mn10300_end_of_match (next
+ 1, "GOT")))
2499 reloc_type
= BFD_RELOC_MN10300_GOT32
;
2500 else if ((next_end
= mn10300_end_of_match (next
+ 1, "PLT")))
2501 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
2505 *input_line_pointer
= *nextcharP
;
2506 input_line_pointer
= next_end
;
2507 *nextcharP
= *input_line_pointer
;
2508 *input_line_pointer
= '\0';
2510 exprP
->X_op
= O_PIC_reloc
;
2511 exprP
->X_add_number
= 0;
2512 exprP
->X_md
= reloc_type
;
2517 /* The target specific pseudo-ops which we support. */
2518 const pseudo_typeS md_pseudo_table
[] =
2520 { "am30", set_arch_mach
, AM30
},
2521 { "am33", set_arch_mach
, AM33
},
2522 { "am33_2", set_arch_mach
, AM33_2
},
2523 { "mn10300", set_arch_mach
, MN103
},
2527 /* Returns FALSE if there is some mn10300 specific reason why the
2528 subtraction of two same-section symbols cannot be computed by
2532 mn10300_allow_local_subtract (expressionS
* left
, expressionS
* right
, segT section
)
2539 /* If we are not performing linker relaxation then we have nothing
2544 /* If the symbols are not in a code section then they are OK. */
2545 if ((section
->flags
& SEC_CODE
) == 0)
2548 /* Otherwise we have to scan the fragments between the two symbols.
2549 If any instructions are found then we have to assume that linker
2550 relaxation may change their size and so we must delay resolving
2551 the subtraction until the final link. */
2552 left_frag
= symbol_get_frag (left
->X_add_symbol
);
2553 right_frag
= symbol_get_frag (right
->X_add_symbol
);
2555 if (left_frag
== right_frag
)
2556 return ! left_frag
->tc_frag_data
;
2559 for (frag
= left_frag
; frag
!= NULL
; frag
= frag
->fr_next
)
2561 if (frag
->tc_frag_data
)
2563 if (frag
== right_frag
)
2568 for (frag
= right_frag
; frag
!= NULL
; frag
= frag
->fr_next
)
2570 if (frag
->tc_frag_data
)
2572 if (frag
== left_frag
)
2577 /* The two symbols are on disjoint fragment chains
2578 - we cannot possibly compute their difference. */
2584 /* When relaxing, we need to output a reloc for any .align directive
2585 that requests alignment to a two byte boundary or larger. */
2588 mn10300_handle_align (fragS
*frag
)
2591 && (frag
->fr_type
== rs_align
2592 || frag
->fr_type
== rs_align_code
)
2593 && frag
->fr_address
+ frag
->fr_fix
> 0
2594 && frag
->fr_offset
> 1
2595 && now_seg
!= bss_section
2596 /* Do not create relocs for the merging sections - such
2597 relocs will prevent the contents from being merged. */
2598 && (bfd_get_section_flags (now_seg
->owner
, now_seg
) & SEC_MERGE
) == 0)
2599 /* Create a new fixup to record the alignment request. The symbol is
2600 irrelevent but must be present so we use the absolute section symbol.
2601 The offset from the symbol is used to record the power-of-two alignment
2602 value. The size is set to 0 because the frag may already be aligned,
2603 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2604 fix_new (frag
, frag
->fr_fix
, 0, & abs_symbol
, frag
->fr_offset
, FALSE
,
2605 BFD_RELOC_MN10300_ALIGN
);
2609 mn10300_force_relocation (struct fix
* fixp
)
2613 || fixp
->fx_r_type
== BFD_RELOC_MN10300_ALIGN
))
2616 return generic_force_reloc (fixp
);