| blob | 07c02c14687d4397640f757685e9b92e56ed9664 |
1 2006-08-08 Bob Wilson <bob.wilson@acm.org>
3 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
4 (out_sleb128): New.
5 (out_fixed_inc_line_addr): New.
6 (process_entries): Use out_fixed_inc_line_addr when
7 DWARF2_USE_FIXED_ADVANCE_PC is set.
8 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
10 2006-08-08 DJ Delorie <dj@redhat.com>
12 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
13 vs full symbols so that we never have more than one pointer value
14 for any given symbol in our symbol table.
16 2006-08-08 Sterling Augustine <sterling@tensilica.com>
18 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
19 and emit DW_AT_ranges when code in compilation unit is not
20 contiguous.
21 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
22 is not contiguous.
23 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
24 (out_debug_ranges): New function to emit .debug_ranges section
25 when code is not contiguous.
27 2006-08-08 Nick Clifton <nickc@redhat.com>
29 * config/tc-arm.c (WARN_DEPRECATED): Enable.
31 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
33 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
34 only block.
35 (pe_directive_secrel) [TE_PE]: New function.
36 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
37 loc, loc_mark_labels.
38 [TE_PE]: Handle secrel32.
39 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
40 call.
41 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
42 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
43 (md_section_align): Only round section sizes here for AOUT
44 targets.
45 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
46 (tc_pe_dwarf2_emit_offset): New function.
47 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
48 (cons_fix_new_arm): Handle O_secrel.
49 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
50 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
51 of OBJ_ELF only block.
52 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
53 tc_pe_dwarf2_emit_offset.
55 2006-08-04 Richard Sandiford <richard@codesourcery.com>
57 * config/tc-sh.c (apply_full_field_fix): New function.
58 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
59 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
60 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
61 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
63 2006-08-03 Nick Clifton <nickc@redhat.com>
65 PR gas/2991
66 * config.in: Regenerate.
68 2006-08-03 Joseph Myers <joseph@codesourcery.com>
70 * config/tc-arm.c (parse_operands): Handle invalid register name
71 for OP_RIWR_RIWC.
73 2006-08-03 Joseph Myers <joseph@codesourcery.com>
75 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
76 (parse_operands): Handle it.
77 (insns): Use it for tmcr and tmrc.
79 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
81 PR binutils/2983
82 * config/tc-i386.c (md_parse_option): Treat any target starting
83 with elf64_x86_64 as a viable target for the -64 switch.
84 (i386_target_format): For 64-bit ELF flavoured output use
85 ELF_TARGET_FORMAT64.
86 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
88 2006-08-02 Nick Clifton <nickc@redhat.com>
90 PR gas/2991
91 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
92 bfd/aclocal.m4.
93 * configure.in: Run BFD_BINARY_FOPEN.
94 * configure: Regenerate.
95 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
96 file to include.
98 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
100 * config/tc-i386.c (md_assemble): Don't update
101 cpu_arch_isa_flags.
103 2006-08-01 Thiemo Seufer <ths@mips.com>
105 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
107 2006-08-01 Thiemo Seufer <ths@mips.com>
109 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
110 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
111 BFD_RELOC_32 and BFD_RELOC_16.
112 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
113 md_convert_frag, md_obj_end): Fix comment formatting.
115 2006-07-31 Thiemo Seufer <ths@mips.com>
117 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
118 handling for BFD_RELOC_MIPS16_JMP.
120 2006-07-24 Andreas Schwab <schwab@suse.de>
122 PR/2756
123 * read.c (read_a_source_file): Ignore unknown text after line
124 comment character. Fix misleading comment.
126 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
128 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
129 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
130 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
131 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
132 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
133 doc/c-z80.texi, doc/internals.texi: Fix some typos.
135 2006-07-21 Nick Clifton <nickc@redhat.com>
137 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
138 linker testsuite.
140 2006-07-20 Thiemo Seufer <ths@mips.com>
141 Nigel Stephens <nigel@mips.com>
143 * config/tc-mips.c (md_parse_option): Don't infer optimisation
144 options from debug options.
146 2006-07-20 Thiemo Seufer <ths@mips.com>
148 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
149 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
151 2006-07-19 Paul Brook <paul@codesourcery.com>
153 * config/tc-arm.c (insns): Fix rbit Arm opcode.
155 2006-07-18 Paul Brook <paul@codesourcery.com>
157 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
158 (md_convert_frag): Use correct reloc for add_pc. Use
159 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
160 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
161 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
163 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
165 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
166 when file and line unknown.
168 2006-07-17 Thiemo Seufer <ths@mips.com>
170 * read.c (s_struct): Use IS_ELF.
171 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
172 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
173 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
174 s_mips_mask): Likewise.
176 2006-07-16 Thiemo Seufer <ths@mips.com>
177 David Ung <davidu@mips.com>
179 * read.c (s_struct): Handle ELF section changing.
180 * config/tc-mips.c (s_align): Leave enabling auto-align to the
181 generic code.
182 (s_change_sec): Try section changing only if we output ELF.
184 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
186 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
187 CpuAmdFam10.
188 (smallest_imm_type): Remove Cpu086.
189 (i386_target_format): Likewise.
191 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
192 Update CpuXXX.
194 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
195 Michael Meissner <michael.meissner@amd.com>
197 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
198 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
199 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
200 architecture.
201 (i386_align_code): Ditto.
202 (md_assemble_code): Add support for insertq/extrq instructions,
203 swapping as needed for intel syntax.
204 (swap_imm_operands): New function to swap immediate operands.
205 (swap_operands): Deal with 4 operand instructions.
206 (build_modrm_byte): Add support for insertq instruction.
208 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
210 * config/tc-i386.h (Size64): Fix a typo in comment.
212 2006-07-12 Nick Clifton <nickc@redhat.com>
214 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
215 fixup_segment() to repeat a range check on a value that has
216 already been checked here.
218 2006-07-07 James E Wilson <wilson@specifix.com>
220 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
222 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
223 Nick Clifton <nickc@redhat.com>
225 PR binutils/2877
226 * doc/as.texi: Fix spelling typo: branchs => branches.
227 * doc/c-m68hc11.texi: Likewise.
228 * config/tc-m68hc11.c: Likewise.
229 Support old spelling of command line switch for backwards
230 compatibility.
232 2006-07-04 Thiemo Seufer <ths@mips.com>
233 David Ung <davidu@mips.com>
235 * config/tc-mips.c (s_is_linkonce): New function.
236 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
237 weak, external, and linkonce symbols.
238 (pic_need_relax): Use s_is_linkonce.
240 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
242 * doc/as.texinfo (Org): Remove space.
243 (P2align): Add "@var{abs-expr},".
245 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
247 * config/tc-i386.c (cpu_arch_tune_set): New.
248 (cpu_arch_isa): Likewise.
249 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
250 nops with short or long nop sequences based on -march=/.arch
251 and -mtune=.
252 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
253 set cpu_arch_tune and cpu_arch_tune_flags.
254 (md_parse_option): For -march=, set cpu_arch_isa and set
255 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
256 0. Set cpu_arch_tune_set to 1 for -mtune=.
257 (i386_target_format): Don't set cpu_arch_tune.
259 2006-06-23 Nigel Stephens <nigel@mips.com>
261 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
262 generated .sbss.* and .gnu.linkonce.sb.*.
264 2006-06-23 Thiemo Seufer <ths@mips.com>
265 David Ung <davidu@mips.com>
267 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
268 label_list.
269 * config/tc-mips.c (label_list): Define per-segment label_list.
270 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
271 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
272 mips_from_file_after_relocs, mips_define_label): Use per-segment
273 label_list.
275 2006-06-22 Thiemo Seufer <ths@mips.com>
277 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
278 (append_insn): Use it.
279 (md_apply_fix): Whitespace formatting.
280 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
281 mips16_extended_frag): Remove register specifier.
282 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
283 constants.
285 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
287 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
288 a directive saving VFP registers for ARMv6 or later.
289 (s_arm_unwind_save): Add parameter arch_v6 and call
290 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
291 appropriate.
292 (md_pseudo_table): Add entry for new "vsave" directive.
293 * doc/c-arm.texi: Correct error in example for "save"
294 directive (fstmdf -> fstmdx). Also document "vsave" directive.
296 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
297 Anatoly Sokolov <aesok@post.ru>
299 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
300 and atmega644p devices. Rename atmega164/atmega324 devices to
301 atmega164p/atmega324p.
302 * doc/c-avr.texi: Document new mcu and arch options.
304 2006-06-17 Nick Clifton <nickc@redhat.com>
306 * config/tc-arm.c (enum parse_operand_result): Move outside of
307 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
309 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
311 * config/tc-i386.h (processor_type): New.
312 (arch_entry): Add type.
314 * config/tc-i386.c (cpu_arch_tune): New.
315 (cpu_arch_tune_flags): Likewise.
316 (cpu_arch_isa_flags): Likewise.
317 (cpu_arch): Updated.
318 (set_cpu_arch): Also update cpu_arch_isa_flags.
319 (md_assemble): Update cpu_arch_isa_flags.
320 (OPTION_MARCH): New.
321 (OPTION_MTUNE): Likewise.
322 (md_longopts): Add -march= and -mtune=.
323 (md_parse_option): Support -march= and -mtune=.
324 (md_show_usage): Add -march=CPU/-mtune=CPU.
325 (i386_target_format): Also update cpu_arch_isa_flags,
326 cpu_arch_tune and cpu_arch_tune_flags.
328 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
330 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
332 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
334 * config/tc-arm.c (enum parse_operand_result): New.
335 (struct group_reloc_table_entry): New.
336 (enum group_reloc_type): New.
337 (group_reloc_table): New array.
338 (find_group_reloc_table_entry): New function.
339 (parse_shifter_operand_group_reloc): New function.
340 (parse_address_main): New function, incorporating code
341 from the old parse_address function. To be used via...
342 (parse_address): wrapper for parse_address_main; and
343 (parse_address_group_reloc): new function, likewise.
344 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
345 OP_ADDRGLDRS, OP_ADDRGLDC.
346 (parse_operands): Support for these new operand codes.
347 New macro po_misc_or_fail_no_backtrack.
348 (encode_arm_cp_address): Preserve group relocations.
349 (insns): Modify to use the above operand codes where group
350 relocations are permitted.
351 (md_apply_fix): Handle the group relocations
352 ALU_PC_G0_NC through LDC_SB_G2.
353 (tc_gen_reloc): Likewise.
354 (arm_force_relocation): Leave group relocations for the linker.
355 (arm_fix_adjustable): Likewise.
357 2006-06-15 Julian Brown <julian@codesourcery.com>
359 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
360 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
361 relocs properly.
363 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
365 * config/tc-i386.c (process_suffix): Don't add rex64 for
366 "xchg %rax,%rax".
368 2006-06-09 Thiemo Seufer <ths@mips.com>
370 * config/tc-mips.c (mips_ip): Maintain argument count.
372 2006-06-09 Alan Modra <amodra@bigpond.net.au>
374 * config/tc-iq2000.c: Include sb.h.
376 2006-06-08 Nigel Stephens <nigel@mips.com>
378 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
379 aliases for better compatibility with SGI tools.
381 2006-06-08 Alan Modra <amodra@bigpond.net.au>
383 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
384 * Makefile.am (GASLIBS): Expand @BFDLIB@.
385 (BFDVER_H): Delete.
386 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
387 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
388 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
389 Run "make dep-am".
390 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
391 * Makefile.in: Regenerate.
392 * doc/Makefile.in: Regenerate.
393 * configure: Regenerate.
395 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
397 * po/Make-in (pdf, ps): New dummy targets.
399 2006-06-07 Julian Brown <julian@codesourcery.com>
401 * config/tc-arm.c (stdarg.h): include.
402 (arm_it): Add uncond_value field. Add isvec and issingle to operand
403 array.
404 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
405 REG_TYPE_NSDQ (single, double or quad vector reg).
406 (reg_expected_msgs): Update.
407 (BAD_FPU): Add macro for unsupported FPU instruction error.
408 (parse_neon_type): Support 'd' as an alias for .f64.
409 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
410 sets of registers.
411 (parse_vfp_reg_list): Don't update first arg on error.
412 (parse_neon_mov): Support extra syntax for VFP moves.
413 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
414 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
415 (parse_operands): Support isvec, issingle operands fields, new parse
416 codes above.
417 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
418 msr variants.
419 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
420 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
421 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
422 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
423 shapes.
424 (neon_shape): Redefine in terms of above.
425 (neon_shape_class): New enumeration, table of shape classes.
426 (neon_shape_el): New enumeration. One element of a shape.
427 (neon_shape_el_size): Register widths of above, where appropriate.
428 (neon_shape_info): New struct. Info for shape table.
429 (neon_shape_tab): New array.
430 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
431 (neon_check_shape): Rewrite as...
432 (neon_select_shape): New function to classify instruction shapes,
433 driven by new table neon_shape_tab array.
434 (neon_quad): New function. Return 1 if shape should set Q flag in
435 instructions (or equivalent), 0 otherwise.
436 (type_chk_of_el_type): Support F64.
437 (el_type_of_type_chk): Likewise.
438 (neon_check_type): Add support for VFP type checking (VFP data
439 elements fill their containing registers).
440 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
441 in thumb mode for VFP instructions.
442 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
443 and encode the current instruction as if it were that opcode.
444 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
445 arguments, call function in PFN.
446 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
447 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
448 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
449 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
450 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
451 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
452 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
453 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
454 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
455 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
456 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
457 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
458 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
459 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
460 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
461 neon_quad.
462 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
463 between VFP and Neon turns out to belong to Neon. Perform
464 architecture check and fill in condition field if appropriate.
465 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
466 (do_neon_cvt): Add support for VFP variants of instructions.
467 (neon_cvt_flavour): Extend to cover VFP conversions.
468 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
469 vmov variants.
470 (do_neon_ldr_str): Handle single-precision VFP load/store.
471 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
472 NS_NULL not NS_IGNORE.
473 (opcode_tag): Add OT_csuffixF for operands which either take a
474 conditional suffix, or have 0xF in the condition field.
475 (md_assemble): Add support for OT_csuffixF.
476 (NCE): Replace macro with...
477 (NCE_tag, NCE, NCEF): New macros.
478 (nCE): Replace macro with...
479 (nCE_tag, nCE, nCEF): New macros.
480 (insns): Add support for VFP insns or VFP versions of insns msr,
481 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
482 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
483 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
484 VFP/Neon insns together.
486 2006-06-07 Alan Modra <amodra@bigpond.net.au>
487 Ladislav Michl <ladis@linux-mips.org>
489 * app.c: Don't include headers already included by as.h.
490 * as.c: Likewise.
491 * atof-generic.c: Likewise.
492 * cgen.c: Likewise.
493 * dwarf2dbg.c: Likewise.
494 * expr.c: Likewise.
495 * input-file.c: Likewise.
496 * input-scrub.c: Likewise.
497 * macro.c: Likewise.
498 * output-file.c: Likewise.
499 * read.c: Likewise.
500 * sb.c: Likewise.
501 * config/bfin-lex.l: Likewise.
502 * config/obj-coff.h: Likewise.
503 * config/obj-elf.h: Likewise.
504 * config/obj-som.h: Likewise.
505 * config/tc-arc.c: Likewise.
506 * config/tc-arm.c: Likewise.
507 * config/tc-avr.c: Likewise.
508 * config/tc-bfin.c: Likewise.
509 * config/tc-cris.c: Likewise.
510 * config/tc-d10v.c: Likewise.
511 * config/tc-d30v.c: Likewise.
512 * config/tc-dlx.h: Likewise.
513 * config/tc-fr30.c: Likewise.
514 * config/tc-frv.c: Likewise.
515 * config/tc-h8300.c: Likewise.
516 * config/tc-hppa.c: Likewise.
517 * config/tc-i370.c: Likewise.
518 * config/tc-i860.c: Likewise.
519 * config/tc-i960.c: Likewise.
520 * config/tc-ip2k.c: Likewise.
521 * config/tc-iq2000.c: Likewise.
522 * config/tc-m32c.c: Likewise.
523 * config/tc-m32r.c: Likewise.
524 * config/tc-maxq.c: Likewise.
525 * config/tc-mcore.c: Likewise.
526 * config/tc-mips.c: Likewise.
527 * config/tc-mmix.c: Likewise.
528 * config/tc-mn10200.c: Likewise.
529 * config/tc-mn10300.c: Likewise.
530 * config/tc-msp430.c: Likewise.
531 * config/tc-mt.c: Likewise.
532 * config/tc-ns32k.c: Likewise.
533 * config/tc-openrisc.c: Likewise.
534 * config/tc-ppc.c: Likewise.
535 * config/tc-s390.c: Likewise.
536 * config/tc-sh.c: Likewise.
537 * config/tc-sh64.c: Likewise.
538 * config/tc-sparc.c: Likewise.
539 * config/tc-tic30.c: Likewise.
540 * config/tc-tic4x.c: Likewise.
541 * config/tc-tic54x.c: Likewise.
542 * config/tc-v850.c: Likewise.
543 * config/tc-vax.c: Likewise.
544 * config/tc-xc16x.c: Likewise.
545 * config/tc-xstormy16.c: Likewise.
546 * config/tc-xtensa.c: Likewise.
547 * config/tc-z80.c: Likewise.
548 * config/tc-z8k.c: Likewise.
549 * macro.h: Don't include sb.h or ansidecl.h.
550 * sb.h: Don't include stdio.h or ansidecl.h.
551 * cond.c: Include sb.h.
552 * itbl-lex.l: Include as.h instead of other system headers.
553 * itbl-parse.y: Likewise.
554 * itbl-ops.c: Similarly.
555 * itbl-ops.h: Don't include as.h or ansidecl.h.
556 * config/bfin-defs.h: Don't include bfd.h or as.h.
557 * config/bfin-parse.y: Include as.h instead of other system headers.
559 2006-06-06 Ben Elliston <bje@au.ibm.com>
560 Anton Blanchard <anton@samba.org>
562 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
563 (md_show_usage): Document it.
564 (ppc_setup_opcodes): Test power6 opcode flag bits.
565 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
567 2006-06-06 Thiemo Seufer <ths@mips.com>
568 Chao-ying Fu <fu@mips.com>
570 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
571 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
572 (macro_build): Update comment.
573 (mips_ip): Allow DSP64 instructions for MIPS64R2.
574 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
575 CPU_HAS_MDMX.
576 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
577 MIPS_CPU_ASE_MDMX flags for sb1.
579 2006-06-05 Thiemo Seufer <ths@mips.com>
581 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
582 appropriate.
583 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
584 (mips_ip): Make overflowed/underflowed constant arguments in DSP
585 and MT instructions a fatal error. Use INSERT_OPERAND where
586 appropriate. Improve warnings for break and wait code overflows.
587 Use symbolic constant of OP_MASK_COPZ.
588 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
590 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
592 * po/Make-in (top_builddir): Define.
594 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
596 * doc/Makefile.am (TEXI2DVI): Define.
597 * doc/Makefile.in: Regenerate.
598 * doc/c-arc.texi: Fix typo.
600 2006-06-01 Alan Modra <amodra@bigpond.net.au>
602 * config/obj-ieee.c: Delete.
603 * config/obj-ieee.h: Delete.
604 * Makefile.am (OBJ_FORMATS): Remove ieee.
605 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
606 (obj-ieee.o): Remove rule.
607 * Makefile.in: Regenerate.
608 * configure.in (atof): Remove tahoe.
609 (OBJ_MAYBE_IEEE): Don't define.
610 * configure: Regenerate.
611 * config.in: Regenerate.
612 * doc/Makefile.in: Regenerate.
613 * po/POTFILES.in: Regenerate.
615 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
617 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
618 and LIBINTL_DEP everywhere.
619 (INTLLIBS): Remove.
620 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
621 * acinclude.m4: Include new gettext macros.
622 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
623 Remove local code for po/Makefile.
624 * Makefile.in, configure, doc/Makefile.in: Regenerated.
626 2006-05-30 Nick Clifton <nickc@redhat.com>
628 * po/es.po: Updated Spanish translation.
630 2006-05-06 Denis Chertykov <denisc@overta.ru>
632 * doc/c-avr.texi: New file.
633 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
634 * doc/all.texi: Set AVR
635 * doc/as.texinfo: Include c-avr.texi
637 2006-05-28 Jie Zhang <jie.zhang@analog.com>
639 * config/bfin-parse.y (check_macfunc): Loose the condition of
640 calling check_multiply_halfregs ().
642 2006-05-25 Jie Zhang <jie.zhang@analog.com>
644 * config/bfin-parse.y (asm_1): Better check and deal with
645 vector and scalar Multiply 16-Bit Operands instructions.
647 2006-05-24 Nick Clifton <nickc@redhat.com>
649 * config/tc-hppa.c: Convert to ISO C90 format.
650 * config/tc-hppa.h: Likewise.
652 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
653 Randolph Chung <randolph@tausq.org>
655 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
656 is_tls_ieoff, is_tls_leoff): Define.
657 (fix_new_hppa): Handle TLS.
658 (cons_fix_new_hppa): Likewise.
659 (pa_ip): Likewise.
660 (md_apply_fix): Handle TLS relocs.
661 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
663 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
665 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
667 2006-05-23 Thiemo Seufer <ths@mips.com>
668 David Ung <davidu@mips.com>
669 Nigel Stephens <nigel@mips.com>
671 [ gas/ChangeLog ]
672 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
673 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
674 ISA_HAS_MXHC1): New macros.
675 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
676 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
677 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
678 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
679 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
680 (mips_after_parse_args): Change default handling of float register
681 size to account for 32bit code with 64bit FP. Better sanity checking
682 of ISA/ASE/ABI option combinations.
683 (s_mipsset): Support switching of GPR and FPR sizes via
684 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
685 options.
686 (mips_elf_final_processing): We should record the use of 64bit FP
687 registers in 32bit code but we don't, because ELF header flags are
688 a scarce ressource.
689 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
690 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
691 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
692 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
693 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
694 missing -march options. Document .set arch=CPU. Move .set smartmips
695 to ASE page. Use @code for .set FOO examples.
697 2006-05-23 Jie Zhang <jie.zhang@analog.com>
699 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
700 if needed.
702 2006-05-23 Jie Zhang <jie.zhang@analog.com>
704 * config/bfin-defs.h (bfin_equals): Remove declaration.
705 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
706 * config/tc-bfin.c (bfin_name_is_register): Remove.
707 (bfin_equals): Remove.
708 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
709 (bfin_name_is_register): Remove declaration.
711 2006-05-19 Thiemo Seufer <ths@mips.com>
712 Nigel Stephens <nigel@mips.com>
714 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
715 (mips_oddfpreg_ok): New function.
716 (mips_ip): Use it.
718 2006-05-19 Thiemo Seufer <ths@mips.com>
719 David Ung <davidu@mips.com>
721 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
722 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
723 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
724 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
725 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
726 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
727 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
728 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
729 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
730 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
731 reg_names_o32, reg_names_n32n64): Define register classes.
732 (reg_lookup): New function, use register classes.
733 (md_begin): Reserve register names in the symbol table. Simplify
734 OBJ_ELF defines.
735 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
736 Use reg_lookup.
737 (mips16_ip): Use reg_lookup.
738 (tc_get_register): Likewise.
739 (tc_mips_regname_to_dw2regnum): New function.
741 2006-05-19 Thiemo Seufer <ths@mips.com>
743 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
744 Un-constify string argument.
745 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
746 Likewise.
747 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
748 Likewise.
749 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
750 Likewise.
751 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
752 Likewise.
753 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
754 Likewise.
755 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
756 Likewise.
758 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
760 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
761 cfloat/m68881 to correct architecture before using it.
763 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
765 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
766 constant values.
768 2006-05-15 Paul Brook <paul@codesourcery.com>
770 * config/tc-arm.c (arm_adjust_symtab): Use
771 bfd_is_arm_special_symbol_name.
773 2006-05-15 Bob Wilson <bob.wilson@acm.org>
775 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
776 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
777 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
778 Handle errors from calls to xtensa_opcode_is_* functions.
780 2006-05-14 Thiemo Seufer <ths@mips.com>
782 * config/tc-mips.c (macro_build): Test for currently active
783 mips16 option.
784 (mips16_ip): Reject invalid opcodes.
786 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
788 * doc/as.texinfo: Rename "Index" to "AS Index",
789 and "ABORT" to "ABORT (COFF)".
791 2006-05-11 Paul Brook <paul@codesourcery.com>
793 * config/tc-arm.c (parse_half): New function.
794 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
795 (parse_operands): Ditto.
796 (do_mov16): Reject invalid relocations.
797 (do_t_mov16): Ditto. Use Thumb reloc numbers.
798 (insns): Replace Iffff with HALF.
799 (md_apply_fix): Add MOVW and MOVT relocs.
800 (tc_gen_reloc): Ditto.
801 * doc/c-arm.texi: Document relocation operators
803 2006-05-11 Paul Brook <paul@codesourcery.com>
805 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
807 2006-05-11 Thiemo Seufer <ths@mips.com>
809 * config/tc-mips.c (append_insn): Don't check the range of j or
810 jal addresses.
812 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
814 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
815 relocs against external symbols for WinCE targets.
816 (md_apply_fix): Likewise.
818 2006-05-09 David Ung <davidu@mips.com>
820 * config/tc-mips.c (append_insn): Only warn about an out-of-range
821 j or jal address.
823 2006-05-09 Nick Clifton <nickc@redhat.com>
825 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
826 against symbols which are not going to be placed into the symbol
827 table.
829 2006-05-09 Ben Elliston <bje@au.ibm.com>
831 * expr.c (operand): Remove `if (0 && ..)' statement and
832 subsequently unused target_op label. Collapse `if (1 || ..)'
833 statement.
834 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
835 separately above the switch.
837 2006-05-08 Nick Clifton <nickc@redhat.com>
839 PR gas/2623
840 * config/tc-msp430.c (line_separator_character): Define as |.
842 2006-05-08 Thiemo Seufer <ths@mips.com>
843 Nigel Stephens <nigel@mips.com>
844 David Ung <davidu@mips.com>
846 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
847 (mips_opts): Likewise.
848 (file_ase_smartmips): New variable.
849 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
850 (macro_build): Handle SmartMIPS instructions.
851 (mips_ip): Likewise.
852 (md_longopts): Add argument handling for smartmips.
853 (md_parse_options, mips_after_parse_args): Likewise.
854 (s_mipsset): Add .set smartmips support.
855 (md_show_usage): Document -msmartmips/-mno-smartmips.
856 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
857 .set smartmips.
858 * doc/c-mips.texi: Likewise.
860 2006-05-08 Alan Modra <amodra@bigpond.net.au>
862 * write.c (relax_segment): Add pass count arg. Don't error on
863 negative org/space on first two passes.
864 (relax_seg_info): New struct.
865 (relax_seg, write_object_file): Adjust.
866 * write.h (relax_segment): Update prototype.
868 2006-05-05 Julian Brown <julian@codesourcery.com>
870 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
871 checking.
872 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
873 architecture version checks.
874 (insns): Allow overlapping instructions to be used in VFP mode.
876 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
878 PR gas/2598
879 * config/obj-elf.c (obj_elf_change_section): Allow user
880 specified SHF_ALPHA_GPREL.
882 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
884 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
885 for PMEM related expressions.
887 2006-05-05 Nick Clifton <nickc@redhat.com>
889 PR gas/2582
890 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
891 insertion of a directory separator character into a string at a
892 given offset. Uses heuristics to decide when to use a backslash
893 character rather than a forward-slash character.
894 (dwarf2_directive_loc): Use the macro.
895 (out_debug_info): Likewise.
897 2006-05-05 Thiemo Seufer <ths@mips.com>
898 David Ung <davidu@mips.com>
900 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
901 instruction.
902 (macro): Add new case M_CACHE_AB.
904 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
906 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
907 (opcode_lookup): Issue a warning for opcode with
908 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
909 identical to OT_cinfix3.
910 (TxC3w, TC3w, tC3w): New.
911 (insns): Use tC3w and TC3w for comparison instructions with
912 's' suffix.
914 2006-05-04 Alan Modra <amodra@bigpond.net.au>
916 * subsegs.h (struct frchain): Delete frch_seg.
917 (frchain_root): Delete.
918 (seg_info): Define as macro.
919 * subsegs.c (frchain_root): Delete.
920 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
921 (subsegs_begin, subseg_change): Adjust for above.
922 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
923 rather than to one big list.
924 (subseg_get): Don't special case abs, und sections.
925 (subseg_new, subseg_force_new): Don't set frchainP here.
926 (seg_info): Delete.
927 (subsegs_print_statistics): Adjust frag chain control list traversal.
928 * debug.c (dmp_frags): Likewise.
929 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
930 at frchain_root. Make use of known frchain ordering.
931 (last_frag_for_seg): Likewise.
932 (get_frag_fix): Likewise. Add seg param.
933 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
934 * write.c (chain_frchains_together_1): Adjust for struct frchain.
935 (SUB_SEGMENT_ALIGN): Likewise.
936 (subsegs_finish): Adjust frchain list traversal.
937 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
938 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
939 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
940 (xtensa_fix_b_j_loop_end_frags): Likewise.
941 (xtensa_fix_close_loop_end_frags): Likewise.
942 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
943 (retrieve_segment_info): Delete frch_seg initialisation.
945 2006-05-03 Alan Modra <amodra@bigpond.net.au>
947 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
948 * config/obj-elf.h (obj_sec_set_private_data): Delete.
949 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
950 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
952 2006-05-02 Joseph Myers <joseph@codesourcery.com>
954 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
955 here.
956 (md_apply_fix3): Multiply offset by 4 here for
957 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
959 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
960 Jan Beulich <jbeulich@novell.com>
962 * config/tc-i386.c (output_invalid_buf): Change size for
963 unsigned char.
964 * config/tc-tic30.c (output_invalid_buf): Likewise.
966 * config/tc-i386.c (output_invalid): Cast none-ascii char to
967 unsigned char.
968 * config/tc-tic30.c (output_invalid): Likewise.
970 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
972 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
973 (TEXI2POD): Use AM_MAKEINFOFLAGS.
974 (asconfig.texi): Don't set top_srcdir.
975 * doc/as.texinfo: Don't use top_srcdir.
976 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
978 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
980 * config/tc-i386.c (output_invalid_buf): Change size to 16.
981 * config/tc-tic30.c (output_invalid_buf): Likewise.
983 * config/tc-i386.c (output_invalid): Use snprintf instead of
984 sprintf.
985 * config/tc-ia64.c (declare_register_set): Likewise.
986 (emit_one_bundle): Likewise.
987 (check_dependencies): Likewise.
988 * config/tc-tic30.c (output_invalid): Likewise.
990 2006-05-02 Paul Brook <paul@codesourcery.com>
992 * config/tc-arm.c (arm_optimize_expr): New function.
993 * config/tc-arm.h (md_optimize_expr): Define
994 (arm_optimize_expr): Add prototype.
995 (TC_FORCE_RELOCATION_SUB_SAME): Define.
997 2006-05-02 Ben Elliston <bje@au.ibm.com>
999 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1000 field unsigned.
1002 * sb.h (sb_list_vector): Move to sb.c.
1003 * sb.c (free_list): Use type of sb_list_vector directly.
1004 (sb_build): Fix off-by-one error in assertion about `size'.
1006 2006-05-01 Ben Elliston <bje@au.ibm.com>
1008 * listing.c (listing_listing): Remove useless loop.
1009 * macro.c (macro_expand): Remove is_positional local variable.
1010 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1011 and simplify surrounding expressions, where possible.
1012 (assign_symbol): Likewise.
1013 (s_weakref): Likewise.
1014 * symbols.c (colon): Likewise.
1016 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1018 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1020 2006-04-30 Thiemo Seufer <ths@mips.com>
1021 David Ung <davidu@mips.com>
1023 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1024 (mips_immed): New table that records various handling of udi
1025 instruction patterns.
1026 (mips_ip): Adds udi handling.
1028 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1030 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1031 of list rather than beginning.
1033 2006-04-26 Julian Brown <julian@codesourcery.com>
1035 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1036 (is_quarter_float): Rename from above. Simplify slightly.
1037 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1038 number.
1039 (parse_neon_mov): Parse floating-point constants.
1040 (neon_qfloat_bits): Fix encoding.
1041 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1042 preference to integer encoding when using the F32 type.
1044 2006-04-26 Julian Brown <julian@codesourcery.com>
1046 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1047 zero-initialising structures containing it will lead to invalid types).
1048 (arm_it): Add vectype to each operand.
1049 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1050 defined field.
1051 (neon_typed_alias): New structure. Extra information for typed
1052 register aliases.
1053 (reg_entry): Add neon type info field.
1054 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1055 Break out alternative syntax for coprocessor registers, etc. into...
1056 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1057 out from arm_reg_parse.
1058 (parse_neon_type): Move. Return SUCCESS/FAIL.
1059 (first_error): New function. Call to ensure first error which occurs is
1060 reported.
1061 (parse_neon_operand_type): Parse exactly one type.
1062 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1063 (parse_typed_reg_or_scalar): New function. Handle core of both
1064 arm_typed_reg_parse and parse_scalar.
1065 (arm_typed_reg_parse): Parse a register with an optional type.
1066 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1067 result.
1068 (parse_scalar): Parse a Neon scalar with optional type.
1069 (parse_reg_list): Use first_error.
1070 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1071 (neon_alias_types_same): New function. Return true if two (alias) types
1072 are the same.
1073 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1074 of elements.
1075 (insert_reg_alias): Return new reg_entry not void.
1076 (insert_neon_reg_alias): New function. Insert type/index information as
1077 well as register for alias.
1078 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1079 make typed register aliases accordingly.
1080 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1081 of line.
1082 (s_unreq): Delete type information if present.
1083 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1084 (s_arm_unwind_save_mmxwcg): Likewise.
1085 (s_arm_unwind_movsp): Likewise.
1086 (s_arm_unwind_setfp): Likewise.
1087 (parse_shift): Likewise.
1088 (parse_shifter_operand): Likewise.
1089 (parse_address): Likewise.
1090 (parse_tb): Likewise.
1091 (tc_arm_regname_to_dw2regnum): Likewise.
1092 (md_pseudo_table): Add dn, qn.
1093 (parse_neon_mov): Handle typed operands.
1094 (parse_operands): Likewise.
1095 (neon_type_mask): Add N_SIZ.
1096 (N_ALLMODS): New macro.
1097 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1098 (el_type_of_type_chk): Add some safeguards.
1099 (modify_types_allowed): Fix logic bug.
1100 (neon_check_type): Handle operands with types.
1101 (neon_three_same): Remove redundant optional arg handling.
1102 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1103 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1104 (do_neon_step): Adjust accordingly.
1105 (neon_cmode_for_logic_imm): Use first_error.
1106 (do_neon_bitfield): Call neon_check_type.
1107 (neon_dyadic): Rename to...
1108 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1109 to allow modification of type of the destination.
1110 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1111 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1112 (do_neon_compare): Make destination be an untyped bitfield.
1113 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1114 (neon_mul_mac): Return early in case of errors.
1115 (neon_move_immediate): Use first_error.
1116 (neon_mac_reg_scalar_long): Fix type to include scalar.
1117 (do_neon_dup): Likewise.
1118 (do_neon_mov): Likewise (in several places).
1119 (do_neon_tbl_tbx): Fix type.
1120 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1121 (do_neon_ld_dup): Exit early in case of errors and/or use
1122 first_error.
1123 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1124 Handle .dn/.qn directives.
1125 (REGDEF): Add zero for reg_entry neon field.
1127 2006-04-26 Julian Brown <julian@codesourcery.com>
1129 * config/tc-arm.c (limits.h): Include.
1130 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1131 (fpu_vfp_v3_or_neon_ext): Declare constants.
1132 (neon_el_type): New enumeration of types for Neon vector elements.
1133 (neon_type_el): New struct. Define type and size of a vector element.
1134 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1135 instruction.
1136 (neon_type): Define struct. The type of an instruction.
1137 (arm_it): Add 'vectype' for the current instruction.
1138 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1139 (vfp_sp_reg_pos): Rename to...
1140 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1141 tags.
1142 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1143 (Neon D or Q register).
1144 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1145 register.
1146 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1147 (my_get_expression): Allow above constant as argument to accept
1148 64-bit constants with optional prefix.
1149 (arm_reg_parse): Add extra argument to return the specific type of
1150 register in when either a D or Q register (REG_TYPE_NDQ) is
1151 requested. Can be NULL.
1152 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1153 (parse_reg_list): Update for new arm_reg_parse args.
1154 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1155 (parse_neon_el_struct_list): New function. Parse element/structure
1156 register lists for VLD<n>/VST<n> instructions.
1157 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1158 (s_arm_unwind_save_mmxwr): Likewise.
1159 (s_arm_unwind_save_mmxwcg): Likewise.
1160 (s_arm_unwind_movsp): Likewise.
1161 (s_arm_unwind_setfp): Likewise.
1162 (parse_big_immediate): New function. Parse an immediate, which may be
1163 64 bits wide. Put results in inst.operands[i].
1164 (parse_shift): Update for new arm_reg_parse args.
1165 (parse_address): Likewise. Add parsing of alignment specifiers.
1166 (parse_neon_mov): Parse the operands of a VMOV instruction.
1167 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1168 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1169 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1170 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1171 (parse_operands): Handle new codes above.
1172 (encode_arm_vfp_sp_reg): Rename to...
1173 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1174 selected VFP version only supports D0-D15.
1175 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1176 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1177 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1178 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1179 encode_arm_vfp_reg name, and allow 32 D regs.
1180 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1181 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1182 regs.
1183 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1184 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1185 constant-load and conversion insns introduced with VFPv3.
1186 (neon_tab_entry): New struct.
1187 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1188 those which are the targets of pseudo-instructions.
1189 (neon_opc): Enumerate opcodes, use as indices into...
1190 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1191 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1192 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1193 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1194 neon_enc_tab.
1195 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1196 Neon instructions.
1197 (neon_type_mask): New. Compact type representation for type checking.
1198 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1199 permitted type combinations.
1200 (N_IGNORE_TYPE): New macro.
1201 (neon_check_shape): New function. Check an instruction shape for
1202 multiple alternatives. Return the specific shape for the current
1203 instruction.
1204 (neon_modify_type_size): New function. Modify a vector type and size,
1205 depending on the bit mask in argument 1.
1206 (neon_type_promote): New function. Convert a given "key" type (of an
1207 operand) into the correct type for a different operand, based on a bit
1208 mask.
1209 (type_chk_of_el_type): New function. Convert a type and size into the
1210 compact representation used for type checking.
1211 (el_type_of_type_ckh): New function. Reverse of above (only when a
1212 single bit is set in the bit mask).
1213 (modify_types_allowed): New function. Alter a mask of allowed types
1214 based on a bit mask of modifications.
1215 (neon_check_type): New function. Check the type of the current
1216 instruction against the variable argument list. The "key" type of the
1217 instruction is returned.
1218 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1219 a Neon data-processing instruction depending on whether we're in ARM
1220 mode or Thumb-2 mode.
1221 (neon_logbits): New function.
1222 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1223 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1224 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1225 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1226 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1227 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1228 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1229 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1230 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1231 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1232 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1233 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1234 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1235 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1236 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1237 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1238 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1239 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1240 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1241 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1242 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1243 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1244 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1245 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1246 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1247 helpers.
1248 (parse_neon_type): New function. Parse Neon type specifier.
1249 (opcode_lookup): Allow parsing of Neon type specifiers.
1250 (REGNUM2, REGSETH, REGSET2): New macros.
1251 (reg_names): Add new VFPv3 and Neon registers.
1252 (NUF, nUF, NCE, nCE): New macros for opcode table.
1253 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1254 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1255 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1256 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1257 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1258 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1259 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1260 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1261 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1262 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1263 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1264 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1265 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1266 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1267 fto[us][lh][sd].
1268 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1269 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1270 (arm_option_cpu_value): Add vfp3 and neon.
1271 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1272 VFPv1 attribute.
1274 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1276 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1277 syntax instead of hardcoded opcodes with ".w18" suffixes.
1278 (wide_branch_opcode): New.
1279 (build_transition): Use it to check for wide branch opcodes with
1280 either ".w18" or ".w15" suffixes.
1282 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1284 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1285 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1286 frag's is_literal flag.
1288 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1290 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1292 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1294 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1295 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1296 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1297 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1298 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1300 2005-04-20 Paul Brook <paul@codesourcery.com>
1302 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1303 all targets.
1304 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1306 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1308 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1309 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1310 Make some cpus unsupported on ELF. Run "make dep-am".
1311 * Makefile.in: Regenerate.
1313 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1315 * configure.in (--enable-targets): Indent help message.
1316 * configure: Regenerate.
1318 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1320 PR gas/2533
1321 * config/tc-i386.c (i386_immediate): Check illegal immediate
1322 register operand.
1324 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1326 * config/tc-i386.c: Formatting.
1327 (output_disp, output_imm): ISO C90 params.
1329 * frags.c (frag_offset_fixed_p): Constify args.
1330 * frags.h (frag_offset_fixed_p): Ditto.
1332 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1333 (COFF_MAGIC): Delete.
1335 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1337 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1339 * po/POTFILES.in: Regenerated.
1341 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1343 * doc/as.texinfo: Mention that some .type syntaxes are not
1344 supported on all architectures.
1346 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1348 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1349 instructions when such transformations have been disabled.
1351 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1353 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1354 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1355 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1356 decoding the loop instructions. Remove current_offset variable.
1357 (xtensa_fix_short_loop_frags): Likewise.
1358 (min_bytes_to_other_loop_end): Remove current_offset argument.
1360 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1362 * config/tc-z80.c (z80_optimize_expr): Removed.
1363 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1365 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1367 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1368 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1369 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1370 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1371 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1372 at90can64, at90usb646, at90usb647, at90usb1286 and
1373 at90usb1287.
1374 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1376 2006-04-07 Paul Brook <paul@codesourcery.com>
1378 * config/tc-arm.c (parse_operands): Set default error message.
1380 2006-04-07 Paul Brook <paul@codesourcery.com>
1382 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1384 2006-04-07 Paul Brook <paul@codesourcery.com>
1386 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1388 2006-04-07 Paul Brook <paul@codesourcery.com>
1390 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1391 (move_or_literal_pool): Handle Thumb-2 instructions.
1392 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1394 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1396 PR 2512.
1397 * config/tc-i386.c (match_template): Move 64-bit operand tests
1398 inside loop.
1400 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1402 * po/Make-in: Add install-html target.
1403 * Makefile.am: Add install-html and install-html-recursive targets.
1404 * Makefile.in: Regenerate.
1405 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1406 * configure: Regenerate.
1407 * doc/Makefile.am: Add install-html and install-html-am targets.
1408 * doc/Makefile.in: Regenerate.
1410 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1412 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1413 second scan.
1415 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1416 Daniel Jacobowitz <dan@codesourcery.com>
1418 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1419 (GOTT_BASE, GOTT_INDEX): New.
1420 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1421 GOTT_INDEX when generating VxWorks PIC.
1422 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1423 use the generic *-*-vxworks* stanza instead.
1425 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1427 PR 997
1428 * frags.c (frag_offset_fixed_p): New function.
1429 * frags.h (frag_offset_fixed_p): Declare.
1430 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1431 (resolve_expression): Likewise.
1433 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1435 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1436 of the same length but different numbers of slots.
1438 2006-03-30 Andreas Schwab <schwab@suse.de>
1440 * configure.in: Fix help string for --enable-targets option.
1441 * configure: Regenerate.
1443 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1445 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1446 (m68k_ip): ... here. Use for all chips. Protect against buffer
1447 overrun and avoid excessive copying.
1449 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1450 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1451 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1452 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1453 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1454 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1455 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1456 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1457 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1458 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1459 (struct m68k_cpu): Change chip field to control_regs.
1460 (current_chip): Remove.
1461 (control_regs): New.
1462 (m68k_archs, m68k_extensions): Adjust.
1463 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1464 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1465 (find_cf_chip): Reimplement for new organization of cpu table.
1466 (select_control_regs): Remove.
1467 (mri_chip): Adjust.
1468 (struct save_opts): Save control regs, not chip.
1469 (s_save, s_restore): Adjust.
1470 (m68k_lookup_cpu): Give deprecated warning when necessary.
1471 (m68k_init_arch): Adjust.
1472 (md_show_usage): Adjust for new cpu table organization.
1474 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1476 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1477 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1478 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1479 "elf/bfin.h".
1480 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1481 (any_gotrel): New rule.
1482 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1483 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1484 "elf/bfin.h".
1485 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1486 (bfin_pic_ptr): New function.
1487 (md_pseudo_table): Add it for ".picptr".
1488 (OPTION_FDPIC): New macro.
1489 (md_longopts): Add -mfdpic.
1490 (md_parse_option): Handle it.
1491 (md_begin): Set BFD flags.
1492 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1493 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1494 us for GOT relocs.
1495 * Makefile.am (bfin-parse.o): Update dependencies.
1496 (DEPTC_bfin_elf): Likewise.
1497 * Makefile.in: Regenerate.
1499 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1501 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1502 mcfemac instead of mcfmac.
1504 2006-03-23 Michael Matz <matz@suse.de>
1506 * config/tc-i386.c (type_names): Correct placement of 'static'.
1507 (reloc): Map some more relocs to their 64 bit counterpart when
1508 size is 8.
1509 (output_insn): Work around breakage if DEBUG386 is defined.
1510 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1511 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1512 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1513 different from i386.
1514 (output_imm): Ditto.
1515 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1516 Imm64.
1517 (md_convert_frag): Jumps can now be larger than 2GB away, error
1518 out in that case.
1519 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1520 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1522 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1523 Daniel Jacobowitz <dan@codesourcery.com>
1524 Phil Edwards <phil@codesourcery.com>
1525 Zack Weinberg <zack@codesourcery.com>
1526 Mark Mitchell <mark@codesourcery.com>
1527 Nathan Sidwell <nathan@codesourcery.com>
1529 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1530 (md_begin): Complain about -G being used for PIC. Don't change
1531 the text, data and bss alignments on VxWorks.
1532 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1533 generating VxWorks PIC.
1534 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1535 (macro): Likewise, but do not treat la $25 specially for
1536 VxWorks PIC, and do not handle jal.
1537 (OPTION_MVXWORKS_PIC): New macro.
1538 (md_longopts): Add -mvxworks-pic.
1539 (md_parse_option): Don't complain about using PIC and -G together here.
1540 Handle OPTION_MVXWORKS_PIC.
1541 (md_estimate_size_before_relax): Always use the first relaxation
1542 sequence on VxWorks.
1543 * config/tc-mips.h (VXWORKS_PIC): New.
1545 2006-03-21 Paul Brook <paul@codesourcery.com>
1547 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1549 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1551 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1552 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1553 (get_loop_align_size): New.
1554 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1555 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1556 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1557 (get_noop_aligned_address): Use get_loop_align_size.
1558 (get_aligned_diff): Likewise.
1560 2006-03-21 Paul Brook <paul@codesourcery.com>
1562 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1564 2006-03-20 Paul Brook <paul@codesourcery.com>
1566 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1567 (do_t_branch): Encode branches inside IT blocks as unconditional.
1568 (do_t_cps): New function.
1569 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1570 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1571 (opcode_lookup): Allow conditional suffixes on all instructions in
1572 Thumb mode.
1573 (md_assemble): Advance condexec state before checking for errors.
1574 (insns): Use do_t_cps.
1576 2006-03-20 Paul Brook <paul@codesourcery.com>
1578 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1579 outputting the insn.
1581 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1583 * config/tc-vax.c: Update copyright year.
1584 * config/tc-vax.h: Likewise.
1586 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1588 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1589 make it static.
1590 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1592 2006-03-17 Paul Brook <paul@codesourcery.com>
1594 * config/tc-arm.c (insns): Add ldm and stm.
1596 2006-03-17 Ben Elliston <bje@au.ibm.com>
1598 PR gas/2446
1599 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1601 2006-03-16 Paul Brook <paul@codesourcery.com>
1603 * config/tc-arm.c (insns): Add "svc".
1605 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1607 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1608 flag and avoid double underscore prefixes.
1610 2006-03-10 Paul Brook <paul@codesourcery.com>
1612 * config/tc-arm.c (md_begin): Handle EABIv5.
1613 (arm_eabis): Add EF_ARM_EABI_VER5.
1614 * doc/c-arm.texi: Document -meabi=5.
1616 2006-03-10 Ben Elliston <bje@au.ibm.com>
1618 * app.c (do_scrub_chars): Simplify string handling.
1620 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1621 Daniel Jacobowitz <dan@codesourcery.com>
1622 Zack Weinberg <zack@codesourcery.com>
1623 Nathan Sidwell <nathan@codesourcery.com>
1624 Paul Brook <paul@codesourcery.com>
1625 Ricardo Anguiano <anguiano@codesourcery.com>
1626 Phil Edwards <phil@codesourcery.com>
1628 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1629 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1630 R_ARM_ABS12 reloc.
1631 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1632 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1633 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1635 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1637 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1638 even when using the text-section-literals option.
1640 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1642 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1643 and cf.
1644 (m68k_ip): <case 'J'> Check we have some control regs.
1645 (md_parse_option): Allow raw arch switch.
1646 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1647 whether 68881 or cfloat was meant by -mfloat.
1648 (md_show_usage): Adjust extension display.
1649 (m68k_elf_final_processing): Adjust.
1651 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1653 * config/tc-avr.c (avr_mod_hash_value): New function.
1654 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1655 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1656 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1657 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1658 of (int).
1659 (tc_gen_reloc): Handle substractions of symbols, if possible do
1660 fixups, abort otherwise.
1661 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1662 tc_fix_adjustable): Define.
1664 2006-03-02 James E Wilson <wilson@specifix.com>
1666 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1667 change the template, then clear md.slot[curr].end_of_insn_group.
1669 2006-02-28 Jan Beulich <jbeulich@novell.com>
1671 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1673 2006-02-28 Jan Beulich <jbeulich@novell.com>
1675 PR/1070
1676 * macro.c (getstring): Don't treat parentheses special anymore.
1677 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1678 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1679 characters.
1681 2006-02-28 Mat <mat@csail.mit.edu>
1683 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1685 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1687 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1688 field.
1689 (CFI_signal_frame): Define.
1690 (cfi_pseudo_table): Add .cfi_signal_frame.
1691 (dot_cfi): Handle CFI_signal_frame.
1692 (output_cie): Handle cie->signal_frame.
1693 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1694 different. Copy signal_frame from FDE to newly created CIE.
1695 * doc/as.texinfo: Document .cfi_signal_frame.
1697 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1699 * doc/Makefile.am: Add html target.
1700 * doc/Makefile.in: Regenerate.
1701 * po/Make-in: Add html target.
1703 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1705 * config/tc-i386.c (output_insn): Support Intel Merom New
1706 Instructions.
1708 * config/tc-i386.h (CpuMNI): New.
1709 (CpuUnknownFlags): Add CpuMNI.
1711 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1713 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1714 (hpriv_reg_table): New table for hyperprivileged registers.
1715 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1716 register encoding.
1718 2006-02-24 DJ Delorie <dj@redhat.com>
1720 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1721 (tc_gen_reloc): Don't define.
1722 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1723 (OPTION_LINKRELAX): New.
1724 (md_longopts): Add it.
1725 (m32c_relax): New.
1726 (md_parse_options): Set it.
1727 (md_assemble): Emit relaxation relocs as needed.
1728 (md_convert_frag): Emit relaxation relocs as needed.
1729 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1730 (m32c_apply_fix): New.
1731 (tc_gen_reloc): New.
1732 (m32c_force_relocation): Force out jump relocs when relaxing.
1733 (m32c_fix_adjustable): Return false if relaxing.
1735 2006-02-24 Paul Brook <paul@codesourcery.com>
1737 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1738 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1739 (struct asm_barrier_opt): Define.
1740 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1741 (parse_psr): Accept V7M psr names.
1742 (parse_barrier): New function.
1743 (enum operand_parse_code): Add OP_oBARRIER.
1744 (parse_operands): Implement OP_oBARRIER.
1745 (do_barrier): New function.
1746 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1747 (do_t_cpsi): Add V7M restrictions.
1748 (do_t_mrs, do_t_msr): Validate V7M variants.
1749 (md_assemble): Check for NULL variants.
1750 (v7m_psrs, barrier_opt_names): New tables.
1751 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1752 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1753 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1754 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1755 (struct cpu_arch_ver_table): Define.
1756 (cpu_arch_ver): New.
1757 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1758 Tag_CPU_arch_profile.
1759 * doc/c-arm.texi: Document new cpu and arch options.
1761 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1763 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1765 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1767 * config/tc-ia64.c: Update copyright years.
1769 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1771 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1772 SDM 2.2.
1774 2005-02-22 Paul Brook <paul@codesourcery.com>
1776 * config/tc-arm.c (do_pld): Remove incorrect write to
1777 inst.instruction.
1778 (encode_thumb32_addr_mode): Use correct operand.
1780 2006-02-21 Paul Brook <paul@codesourcery.com>
1782 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1784 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1785 Anil Paranjape <anilp1@kpitcummins.com>
1786 Shilin Shakti <shilins@kpitcummins.com>
1788 * Makefile.am: Add xc16x related entry.
1789 * Makefile.in: Regenerate.
1790 * configure.in: Added xc16x related entry.
1791 * configure: Regenerate.
1792 * config/tc-xc16x.h: New file
1793 * config/tc-xc16x.c: New file
1794 * doc/c-xc16x.texi: New file for xc16x
1795 * doc/all.texi: Entry for xc16x
1796 * doc/Makefile.texi: Added c-xc16x.texi
1797 * NEWS: Announce the support for the new target.
1799 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1801 * configure.tgt: set emulation for mips-*-netbsd*
1803 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1805 * config.in: Rebuilt.
1807 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1809 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1810 from 1, not 0, in error messages.
1811 (md_assemble): Simplify special-case check for ENTRY instructions.
1812 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1813 operand in error message.
1815 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1817 * configure.tgt (arm-*-linux-gnueabi*): Change to
1818 arm-*-linux-*eabi*.
1820 2006-02-10 Nick Clifton <nickc@redhat.com>
1822 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1823 32-bit value is propagated into the upper bits of a 64-bit long.
1825 * config/tc-arc.c (init_opcode_tables): Fix cast.
1826 (arc_extoper, md_operand): Likewise.
1828 2006-02-09 David Heine <dlheine@tensilica.com>
1830 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1831 each relaxation step.
1833 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1835 * configure.in (CHECK_DECLS): Add vsnprintf.
1836 * configure: Regenerate.
1837 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1838 include/declare here, but...
1839 * as.h: Move code detecting VARARGS idiom to the top.
1840 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1841 (vsnprintf): Declare if not already declared.
1843 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1845 * as.c (close_output_file): New.
1846 (main): Register close_output_file with xatexit before
1847 dump_statistics. Don't call output_file_close.
1849 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1851 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1852 mcf5329_control_regs): New.
1853 (not_current_architecture, selected_arch, selected_cpu): New.
1854 (m68k_archs, m68k_extensions): New.
1855 (archs): Renamed to ...
1856 (m68k_cpus): ... here. Adjust.
1857 (n_arches): Remove.
1858 (md_pseudo_table): Add arch and cpu directives.
1859 (find_cf_chip, m68k_ip): Adjust table scanning.
1860 (no_68851, no_68881): Remove.
1861 (md_assemble): Lazily initialize.
1862 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1863 (md_init_after_args): Move functionality to m68k_init_arch.
1864 (mri_chip): Adjust table scanning.
1865 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1866 options with saner parsing.
1867 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1868 m68k_init_arch): New.
1869 (s_m68k_cpu, s_m68k_arch): New.
1870 (md_show_usage): Adjust.
1871 (m68k_elf_final_processing): Set CF EF flags.
1872 * config/tc-m68k.h (m68k_init_after_args): Remove.
1873 (tc_init_after_args): Remove.
1874 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1875 (M68k-Directives): Document .arch and .cpu directives.
1877 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1879 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1880 synonyms for equ and defl.
1881 (z80_cons_fix_new): New function.
1882 (emit_byte): Disallow relative jumps to absolute locations.
1883 (emit_data): Only handle defb, prototype changed, because defb is
1884 now handled as pseudo-op rather than an instruction.
1885 (instab): Entries for defb,defw,db,dw moved from here...
1886 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1887 Add entries for def24,def32,d24,d32.
1888 (md_assemble): Improved error handling.
1889 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1890 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1891 (z80_cons_fix_new): Declare.
1892 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1893 (def24,d24,def32,d32): New pseudo-ops.
1895 2006-02-02 Paul Brook <paul@codesourcery.com>
1897 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1899 2005-02-02 Paul Brook <paul@codesourcery.com>
1901 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1902 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1903 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1904 T2_OPCODE_RSB): Define.
1905 (thumb32_negate_data_op): New function.
1906 (md_apply_fix): Use it.
1908 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1910 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1911 fields.
1912 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1913 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1914 subtracted symbols.
1915 (relaxation_requirements): Add pfinish_frag argument and use it to
1916 replace setting tinsn->record_fix fields.
1917 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1918 and vinsn_to_insnbuf. Remove references to record_fix and
1919 slot_sub_symbols fields.
1920 (xtensa_mark_narrow_branches): Delete unused code.
1921 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1922 a symbol.
1923 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1924 record_fix fields.
1925 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1926 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1927 of the record_fix field. Simplify error messages for unexpected
1928 symbolic operands.
1929 (set_expr_symbol_offset_diff): Delete.
1931 2006-01-31 Paul Brook <paul@codesourcery.com>
1933 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1935 2006-01-31 Paul Brook <paul@codesourcery.com>
1936 Richard Earnshaw <rearnsha@arm.com>
1938 * config/tc-arm.c: Use arm_feature_set.
1939 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1940 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1941 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1942 New variables.
1943 (insns): Use them.
1944 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1945 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1946 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1947 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1948 feature flags.
1949 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1950 (arm_opts): Move old cpu/arch options from here...
1951 (arm_legacy_opts): ... to here.
1952 (md_parse_option): Search arm_legacy_opts.
1953 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1954 (arm_float_abis, arm_eabis): Make const.
1956 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1958 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1960 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1962 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1963 in load immediate intruction.
1965 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1967 * config/bfin-parse.y (value_match): Use correct conversion
1968 specifications in template string for __FILE__ and __LINE__.
1969 (binary): Ditto.
1970 (unary): Ditto.
1972 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1974 Introduce TLS descriptors for i386 and x86_64.
1975 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1976 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1977 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1978 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1979 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1980 displacement bits.
1981 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1982 (lex_got): Handle @tlsdesc and @tlscall.
1983 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1985 2006-01-11 Nick Clifton <nickc@redhat.com>
1987 Fixes for building on 64-bit hosts:
1988 * config/tc-avr.c (mod_index): New union to allow conversion
1989 between pointers and integers.
1990 (md_begin, avr_ldi_expression): Use it.
1991 * config/tc-i370.c (md_assemble): Add cast for argument to print
1992 statement.
1993 * config/tc-tic54x.c (subsym_substitute): Likewise.
1994 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1995 opindex field of fr_cgen structure into a pointer so that it can
1996 be stored in a frag.
1997 * config/tc-mn10300.c (md_assemble): Likewise.
1998 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1999 types.
2000 * config/tc-v850.c: Replace uses of (int) casts with correct
2001 types.
2003 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2005 PR gas/2117
2006 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2008 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2010 PR gas/2101
2011 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2012 a local-label reference.
2014 For older changes see ChangeLog-2005
2015 \f
2016 Local Variables:
2017 mode: change-log
2018 left-margin: 8
2019 fill-column: 74
2020 version-control: never
2021 End: