| blob | fe28fccdf5c44dbf8b122e4c9bc56c31ee68120e |
1 2006-08-08 Nick Clifton <nickc@redhat.com>
3 * config/tc-arm.c (WARN_DEPRECATED): Enable.
5 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
7 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
8 only block.
9 (pe_directive_secrel) [TE_PE]: New function.
10 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
11 loc, loc_mark_labels.
12 [TE_PE]: Handle secrel32.
13 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
14 call.
15 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
16 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
17 (md_section_align): Only round section sizes here for AOUT
18 targets.
19 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
20 (tc_pe_dwarf2_emit_offset): New function.
21 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
22 (cons_fix_new_arm): Handle O_secrel.
23 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
24 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
25 of OBJ_ELF only block.
26 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
27 tc_pe_dwarf2_emit_offset.
29 2006-08-04 Richard Sandiford <richard@codesourcery.com>
31 * config/tc-sh.c (apply_full_field_fix): New function.
32 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
33 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
34 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
35 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
37 2006-08-03 Nick Clifton <nickc@redhat.com>
39 PR gas/2991
40 * config.in: Regenerate.
42 2006-08-03 Joseph Myers <joseph@codesourcery.com>
44 * config/tc-arm.c (parse_operands): Handle invalid register name
45 for OP_RIWR_RIWC.
47 2006-08-03 Joseph Myers <joseph@codesourcery.com>
49 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
50 (parse_operands): Handle it.
51 (insns): Use it for tmcr and tmrc.
53 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
55 PR binutils/2983
56 * config/tc-i386.c (md_parse_option): Treat any target starting
57 with elf64_x86_64 as a viable target for the -64 switch.
58 (i386_target_format): For 64-bit ELF flavoured output use
59 ELF_TARGET_FORMAT64.
60 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
62 2006-08-02 Nick Clifton <nickc@redhat.com>
64 PR gas/2991
65 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
66 bfd/aclocal.m4.
67 * configure.in: Run BFD_BINARY_FOPEN.
68 * configure: Regenerate.
69 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
70 file to include.
72 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
74 * config/tc-i386.c (md_assemble): Don't update
75 cpu_arch_isa_flags.
77 2006-08-01 Thiemo Seufer <ths@mips.com>
79 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
81 2006-08-01 Thiemo Seufer <ths@mips.com>
83 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
84 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
85 BFD_RELOC_32 and BFD_RELOC_16.
86 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
87 md_convert_frag, md_obj_end): Fix comment formatting.
89 2006-07-31 Thiemo Seufer <ths@mips.com>
91 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
92 handling for BFD_RELOC_MIPS16_JMP.
94 2006-07-24 Andreas Schwab <schwab@suse.de>
96 PR/2756
97 * read.c (read_a_source_file): Ignore unknown text after line
98 comment character. Fix misleading comment.
100 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
102 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
103 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
104 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
105 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
106 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
107 doc/c-z80.texi, doc/internals.texi: Fix some typos.
109 2006-07-21 Nick Clifton <nickc@redhat.com>
111 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
112 linker testsuite.
114 2006-07-20 Thiemo Seufer <ths@mips.com>
115 Nigel Stephens <nigel@mips.com>
117 * config/tc-mips.c (md_parse_option): Don't infer optimisation
118 options from debug options.
120 2006-07-20 Thiemo Seufer <ths@mips.com>
122 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
123 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
125 2006-07-19 Paul Brook <paul@codesourcery.com>
127 * config/tc-arm.c (insns): Fix rbit Arm opcode.
129 2006-07-18 Paul Brook <paul@codesourcery.com>
131 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
132 (md_convert_frag): Use correct reloc for add_pc. Use
133 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
134 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
135 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
137 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
139 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
140 when file and line unknown.
142 2006-07-17 Thiemo Seufer <ths@mips.com>
144 * read.c (s_struct): Use IS_ELF.
145 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
146 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
147 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
148 s_mips_mask): Likewise.
150 2006-07-16 Thiemo Seufer <ths@mips.com>
151 David Ung <davidu@mips.com>
153 * read.c (s_struct): Handle ELF section changing.
154 * config/tc-mips.c (s_align): Leave enabling auto-align to the
155 generic code.
156 (s_change_sec): Try section changing only if we output ELF.
158 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
160 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
161 CpuAmdFam10.
162 (smallest_imm_type): Remove Cpu086.
163 (i386_target_format): Likewise.
165 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
166 Update CpuXXX.
168 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
169 Michael Meissner <michael.meissner@amd.com>
171 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
172 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
173 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
174 architecture.
175 (i386_align_code): Ditto.
176 (md_assemble_code): Add support for insertq/extrq instructions,
177 swapping as needed for intel syntax.
178 (swap_imm_operands): New function to swap immediate operands.
179 (swap_operands): Deal with 4 operand instructions.
180 (build_modrm_byte): Add support for insertq instruction.
182 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
184 * config/tc-i386.h (Size64): Fix a typo in comment.
186 2006-07-12 Nick Clifton <nickc@redhat.com>
188 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
189 fixup_segment() to repeat a range check on a value that has
190 already been checked here.
192 2006-07-07 James E Wilson <wilson@specifix.com>
194 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
196 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
197 Nick Clifton <nickc@redhat.com>
199 PR binutils/2877
200 * doc/as.texi: Fix spelling typo: branchs => branches.
201 * doc/c-m68hc11.texi: Likewise.
202 * config/tc-m68hc11.c: Likewise.
203 Support old spelling of command line switch for backwards
204 compatibility.
206 2006-07-04 Thiemo Seufer <ths@mips.com>
207 David Ung <davidu@mips.com>
209 * config/tc-mips.c (s_is_linkonce): New function.
210 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
211 weak, external, and linkonce symbols.
212 (pic_need_relax): Use s_is_linkonce.
214 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
216 * doc/as.texinfo (Org): Remove space.
217 (P2align): Add "@var{abs-expr},".
219 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
221 * config/tc-i386.c (cpu_arch_tune_set): New.
222 (cpu_arch_isa): Likewise.
223 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
224 nops with short or long nop sequences based on -march=/.arch
225 and -mtune=.
226 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
227 set cpu_arch_tune and cpu_arch_tune_flags.
228 (md_parse_option): For -march=, set cpu_arch_isa and set
229 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
230 0. Set cpu_arch_tune_set to 1 for -mtune=.
231 (i386_target_format): Don't set cpu_arch_tune.
233 2006-06-23 Nigel Stephens <nigel@mips.com>
235 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
236 generated .sbss.* and .gnu.linkonce.sb.*.
238 2006-06-23 Thiemo Seufer <ths@mips.com>
239 David Ung <davidu@mips.com>
241 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
242 label_list.
243 * config/tc-mips.c (label_list): Define per-segment label_list.
244 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
245 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
246 mips_from_file_after_relocs, mips_define_label): Use per-segment
247 label_list.
249 2006-06-22 Thiemo Seufer <ths@mips.com>
251 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
252 (append_insn): Use it.
253 (md_apply_fix): Whitespace formatting.
254 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
255 mips16_extended_frag): Remove register specifier.
256 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
257 constants.
259 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
261 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
262 a directive saving VFP registers for ARMv6 or later.
263 (s_arm_unwind_save): Add parameter arch_v6 and call
264 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
265 appropriate.
266 (md_pseudo_table): Add entry for new "vsave" directive.
267 * doc/c-arm.texi: Correct error in example for "save"
268 directive (fstmdf -> fstmdx). Also document "vsave" directive.
270 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
271 Anatoly Sokolov <aesok@post.ru>
273 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
274 and atmega644p devices. Rename atmega164/atmega324 devices to
275 atmega164p/atmega324p.
276 * doc/c-avr.texi: Document new mcu and arch options.
278 2006-06-17 Nick Clifton <nickc@redhat.com>
280 * config/tc-arm.c (enum parse_operand_result): Move outside of
281 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
283 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
285 * config/tc-i386.h (processor_type): New.
286 (arch_entry): Add type.
288 * config/tc-i386.c (cpu_arch_tune): New.
289 (cpu_arch_tune_flags): Likewise.
290 (cpu_arch_isa_flags): Likewise.
291 (cpu_arch): Updated.
292 (set_cpu_arch): Also update cpu_arch_isa_flags.
293 (md_assemble): Update cpu_arch_isa_flags.
294 (OPTION_MARCH): New.
295 (OPTION_MTUNE): Likewise.
296 (md_longopts): Add -march= and -mtune=.
297 (md_parse_option): Support -march= and -mtune=.
298 (md_show_usage): Add -march=CPU/-mtune=CPU.
299 (i386_target_format): Also update cpu_arch_isa_flags,
300 cpu_arch_tune and cpu_arch_tune_flags.
302 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
304 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
306 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
308 * config/tc-arm.c (enum parse_operand_result): New.
309 (struct group_reloc_table_entry): New.
310 (enum group_reloc_type): New.
311 (group_reloc_table): New array.
312 (find_group_reloc_table_entry): New function.
313 (parse_shifter_operand_group_reloc): New function.
314 (parse_address_main): New function, incorporating code
315 from the old parse_address function. To be used via...
316 (parse_address): wrapper for parse_address_main; and
317 (parse_address_group_reloc): new function, likewise.
318 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
319 OP_ADDRGLDRS, OP_ADDRGLDC.
320 (parse_operands): Support for these new operand codes.
321 New macro po_misc_or_fail_no_backtrack.
322 (encode_arm_cp_address): Preserve group relocations.
323 (insns): Modify to use the above operand codes where group
324 relocations are permitted.
325 (md_apply_fix): Handle the group relocations
326 ALU_PC_G0_NC through LDC_SB_G2.
327 (tc_gen_reloc): Likewise.
328 (arm_force_relocation): Leave group relocations for the linker.
329 (arm_fix_adjustable): Likewise.
331 2006-06-15 Julian Brown <julian@codesourcery.com>
333 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
334 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
335 relocs properly.
337 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
339 * config/tc-i386.c (process_suffix): Don't add rex64 for
340 "xchg %rax,%rax".
342 2006-06-09 Thiemo Seufer <ths@mips.com>
344 * config/tc-mips.c (mips_ip): Maintain argument count.
346 2006-06-09 Alan Modra <amodra@bigpond.net.au>
348 * config/tc-iq2000.c: Include sb.h.
350 2006-06-08 Nigel Stephens <nigel@mips.com>
352 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
353 aliases for better compatibility with SGI tools.
355 2006-06-08 Alan Modra <amodra@bigpond.net.au>
357 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
358 * Makefile.am (GASLIBS): Expand @BFDLIB@.
359 (BFDVER_H): Delete.
360 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
361 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
362 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
363 Run "make dep-am".
364 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
365 * Makefile.in: Regenerate.
366 * doc/Makefile.in: Regenerate.
367 * configure: Regenerate.
369 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
371 * po/Make-in (pdf, ps): New dummy targets.
373 2006-06-07 Julian Brown <julian@codesourcery.com>
375 * config/tc-arm.c (stdarg.h): include.
376 (arm_it): Add uncond_value field. Add isvec and issingle to operand
377 array.
378 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
379 REG_TYPE_NSDQ (single, double or quad vector reg).
380 (reg_expected_msgs): Update.
381 (BAD_FPU): Add macro for unsupported FPU instruction error.
382 (parse_neon_type): Support 'd' as an alias for .f64.
383 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
384 sets of registers.
385 (parse_vfp_reg_list): Don't update first arg on error.
386 (parse_neon_mov): Support extra syntax for VFP moves.
387 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
388 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
389 (parse_operands): Support isvec, issingle operands fields, new parse
390 codes above.
391 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
392 msr variants.
393 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
394 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
395 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
396 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
397 shapes.
398 (neon_shape): Redefine in terms of above.
399 (neon_shape_class): New enumeration, table of shape classes.
400 (neon_shape_el): New enumeration. One element of a shape.
401 (neon_shape_el_size): Register widths of above, where appropriate.
402 (neon_shape_info): New struct. Info for shape table.
403 (neon_shape_tab): New array.
404 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
405 (neon_check_shape): Rewrite as...
406 (neon_select_shape): New function to classify instruction shapes,
407 driven by new table neon_shape_tab array.
408 (neon_quad): New function. Return 1 if shape should set Q flag in
409 instructions (or equivalent), 0 otherwise.
410 (type_chk_of_el_type): Support F64.
411 (el_type_of_type_chk): Likewise.
412 (neon_check_type): Add support for VFP type checking (VFP data
413 elements fill their containing registers).
414 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
415 in thumb mode for VFP instructions.
416 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
417 and encode the current instruction as if it were that opcode.
418 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
419 arguments, call function in PFN.
420 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
421 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
422 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
423 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
424 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
425 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
426 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
427 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
428 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
429 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
430 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
431 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
432 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
433 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
434 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
435 neon_quad.
436 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
437 between VFP and Neon turns out to belong to Neon. Perform
438 architecture check and fill in condition field if appropriate.
439 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
440 (do_neon_cvt): Add support for VFP variants of instructions.
441 (neon_cvt_flavour): Extend to cover VFP conversions.
442 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
443 vmov variants.
444 (do_neon_ldr_str): Handle single-precision VFP load/store.
445 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
446 NS_NULL not NS_IGNORE.
447 (opcode_tag): Add OT_csuffixF for operands which either take a
448 conditional suffix, or have 0xF in the condition field.
449 (md_assemble): Add support for OT_csuffixF.
450 (NCE): Replace macro with...
451 (NCE_tag, NCE, NCEF): New macros.
452 (nCE): Replace macro with...
453 (nCE_tag, nCE, nCEF): New macros.
454 (insns): Add support for VFP insns or VFP versions of insns msr,
455 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
456 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
457 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
458 VFP/Neon insns together.
460 2006-06-07 Alan Modra <amodra@bigpond.net.au>
461 Ladislav Michl <ladis@linux-mips.org>
463 * app.c: Don't include headers already included by as.h.
464 * as.c: Likewise.
465 * atof-generic.c: Likewise.
466 * cgen.c: Likewise.
467 * dwarf2dbg.c: Likewise.
468 * expr.c: Likewise.
469 * input-file.c: Likewise.
470 * input-scrub.c: Likewise.
471 * macro.c: Likewise.
472 * output-file.c: Likewise.
473 * read.c: Likewise.
474 * sb.c: Likewise.
475 * config/bfin-lex.l: Likewise.
476 * config/obj-coff.h: Likewise.
477 * config/obj-elf.h: Likewise.
478 * config/obj-som.h: Likewise.
479 * config/tc-arc.c: Likewise.
480 * config/tc-arm.c: Likewise.
481 * config/tc-avr.c: Likewise.
482 * config/tc-bfin.c: Likewise.
483 * config/tc-cris.c: Likewise.
484 * config/tc-d10v.c: Likewise.
485 * config/tc-d30v.c: Likewise.
486 * config/tc-dlx.h: Likewise.
487 * config/tc-fr30.c: Likewise.
488 * config/tc-frv.c: Likewise.
489 * config/tc-h8300.c: Likewise.
490 * config/tc-hppa.c: Likewise.
491 * config/tc-i370.c: Likewise.
492 * config/tc-i860.c: Likewise.
493 * config/tc-i960.c: Likewise.
494 * config/tc-ip2k.c: Likewise.
495 * config/tc-iq2000.c: Likewise.
496 * config/tc-m32c.c: Likewise.
497 * config/tc-m32r.c: Likewise.
498 * config/tc-maxq.c: Likewise.
499 * config/tc-mcore.c: Likewise.
500 * config/tc-mips.c: Likewise.
501 * config/tc-mmix.c: Likewise.
502 * config/tc-mn10200.c: Likewise.
503 * config/tc-mn10300.c: Likewise.
504 * config/tc-msp430.c: Likewise.
505 * config/tc-mt.c: Likewise.
506 * config/tc-ns32k.c: Likewise.
507 * config/tc-openrisc.c: Likewise.
508 * config/tc-ppc.c: Likewise.
509 * config/tc-s390.c: Likewise.
510 * config/tc-sh.c: Likewise.
511 * config/tc-sh64.c: Likewise.
512 * config/tc-sparc.c: Likewise.
513 * config/tc-tic30.c: Likewise.
514 * config/tc-tic4x.c: Likewise.
515 * config/tc-tic54x.c: Likewise.
516 * config/tc-v850.c: Likewise.
517 * config/tc-vax.c: Likewise.
518 * config/tc-xc16x.c: Likewise.
519 * config/tc-xstormy16.c: Likewise.
520 * config/tc-xtensa.c: Likewise.
521 * config/tc-z80.c: Likewise.
522 * config/tc-z8k.c: Likewise.
523 * macro.h: Don't include sb.h or ansidecl.h.
524 * sb.h: Don't include stdio.h or ansidecl.h.
525 * cond.c: Include sb.h.
526 * itbl-lex.l: Include as.h instead of other system headers.
527 * itbl-parse.y: Likewise.
528 * itbl-ops.c: Similarly.
529 * itbl-ops.h: Don't include as.h or ansidecl.h.
530 * config/bfin-defs.h: Don't include bfd.h or as.h.
531 * config/bfin-parse.y: Include as.h instead of other system headers.
533 2006-06-06 Ben Elliston <bje@au.ibm.com>
534 Anton Blanchard <anton@samba.org>
536 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
537 (md_show_usage): Document it.
538 (ppc_setup_opcodes): Test power6 opcode flag bits.
539 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
541 2006-06-06 Thiemo Seufer <ths@mips.com>
542 Chao-ying Fu <fu@mips.com>
544 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
545 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
546 (macro_build): Update comment.
547 (mips_ip): Allow DSP64 instructions for MIPS64R2.
548 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
549 CPU_HAS_MDMX.
550 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
551 MIPS_CPU_ASE_MDMX flags for sb1.
553 2006-06-05 Thiemo Seufer <ths@mips.com>
555 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
556 appropriate.
557 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
558 (mips_ip): Make overflowed/underflowed constant arguments in DSP
559 and MT instructions a fatal error. Use INSERT_OPERAND where
560 appropriate. Improve warnings for break and wait code overflows.
561 Use symbolic constant of OP_MASK_COPZ.
562 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
564 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
566 * po/Make-in (top_builddir): Define.
568 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
570 * doc/Makefile.am (TEXI2DVI): Define.
571 * doc/Makefile.in: Regenerate.
572 * doc/c-arc.texi: Fix typo.
574 2006-06-01 Alan Modra <amodra@bigpond.net.au>
576 * config/obj-ieee.c: Delete.
577 * config/obj-ieee.h: Delete.
578 * Makefile.am (OBJ_FORMATS): Remove ieee.
579 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
580 (obj-ieee.o): Remove rule.
581 * Makefile.in: Regenerate.
582 * configure.in (atof): Remove tahoe.
583 (OBJ_MAYBE_IEEE): Don't define.
584 * configure: Regenerate.
585 * config.in: Regenerate.
586 * doc/Makefile.in: Regenerate.
587 * po/POTFILES.in: Regenerate.
589 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
591 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
592 and LIBINTL_DEP everywhere.
593 (INTLLIBS): Remove.
594 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
595 * acinclude.m4: Include new gettext macros.
596 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
597 Remove local code for po/Makefile.
598 * Makefile.in, configure, doc/Makefile.in: Regenerated.
600 2006-05-30 Nick Clifton <nickc@redhat.com>
602 * po/es.po: Updated Spanish translation.
604 2006-05-06 Denis Chertykov <denisc@overta.ru>
606 * doc/c-avr.texi: New file.
607 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
608 * doc/all.texi: Set AVR
609 * doc/as.texinfo: Include c-avr.texi
611 2006-05-28 Jie Zhang <jie.zhang@analog.com>
613 * config/bfin-parse.y (check_macfunc): Loose the condition of
614 calling check_multiply_halfregs ().
616 2006-05-25 Jie Zhang <jie.zhang@analog.com>
618 * config/bfin-parse.y (asm_1): Better check and deal with
619 vector and scalar Multiply 16-Bit Operands instructions.
621 2006-05-24 Nick Clifton <nickc@redhat.com>
623 * config/tc-hppa.c: Convert to ISO C90 format.
624 * config/tc-hppa.h: Likewise.
626 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
627 Randolph Chung <randolph@tausq.org>
629 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
630 is_tls_ieoff, is_tls_leoff): Define.
631 (fix_new_hppa): Handle TLS.
632 (cons_fix_new_hppa): Likewise.
633 (pa_ip): Likewise.
634 (md_apply_fix): Handle TLS relocs.
635 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
637 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
639 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
641 2006-05-23 Thiemo Seufer <ths@mips.com>
642 David Ung <davidu@mips.com>
643 Nigel Stephens <nigel@mips.com>
645 [ gas/ChangeLog ]
646 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
647 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
648 ISA_HAS_MXHC1): New macros.
649 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
650 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
651 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
652 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
653 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
654 (mips_after_parse_args): Change default handling of float register
655 size to account for 32bit code with 64bit FP. Better sanity checking
656 of ISA/ASE/ABI option combinations.
657 (s_mipsset): Support switching of GPR and FPR sizes via
658 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
659 options.
660 (mips_elf_final_processing): We should record the use of 64bit FP
661 registers in 32bit code but we don't, because ELF header flags are
662 a scarce ressource.
663 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
664 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
665 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
666 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
667 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
668 missing -march options. Document .set arch=CPU. Move .set smartmips
669 to ASE page. Use @code for .set FOO examples.
671 2006-05-23 Jie Zhang <jie.zhang@analog.com>
673 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
674 if needed.
676 2006-05-23 Jie Zhang <jie.zhang@analog.com>
678 * config/bfin-defs.h (bfin_equals): Remove declaration.
679 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
680 * config/tc-bfin.c (bfin_name_is_register): Remove.
681 (bfin_equals): Remove.
682 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
683 (bfin_name_is_register): Remove declaration.
685 2006-05-19 Thiemo Seufer <ths@mips.com>
686 Nigel Stephens <nigel@mips.com>
688 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
689 (mips_oddfpreg_ok): New function.
690 (mips_ip): Use it.
692 2006-05-19 Thiemo Seufer <ths@mips.com>
693 David Ung <davidu@mips.com>
695 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
696 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
697 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
698 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
699 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
700 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
701 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
702 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
703 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
704 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
705 reg_names_o32, reg_names_n32n64): Define register classes.
706 (reg_lookup): New function, use register classes.
707 (md_begin): Reserve register names in the symbol table. Simplify
708 OBJ_ELF defines.
709 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
710 Use reg_lookup.
711 (mips16_ip): Use reg_lookup.
712 (tc_get_register): Likewise.
713 (tc_mips_regname_to_dw2regnum): New function.
715 2006-05-19 Thiemo Seufer <ths@mips.com>
717 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
718 Un-constify string argument.
719 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
720 Likewise.
721 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
722 Likewise.
723 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
724 Likewise.
725 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
726 Likewise.
727 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
728 Likewise.
729 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
730 Likewise.
732 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
734 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
735 cfloat/m68881 to correct architecture before using it.
737 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
739 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
740 constant values.
742 2006-05-15 Paul Brook <paul@codesourcery.com>
744 * config/tc-arm.c (arm_adjust_symtab): Use
745 bfd_is_arm_special_symbol_name.
747 2006-05-15 Bob Wilson <bob.wilson@acm.org>
749 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
750 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
751 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
752 Handle errors from calls to xtensa_opcode_is_* functions.
754 2006-05-14 Thiemo Seufer <ths@mips.com>
756 * config/tc-mips.c (macro_build): Test for currently active
757 mips16 option.
758 (mips16_ip): Reject invalid opcodes.
760 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
762 * doc/as.texinfo: Rename "Index" to "AS Index",
763 and "ABORT" to "ABORT (COFF)".
765 2006-05-11 Paul Brook <paul@codesourcery.com>
767 * config/tc-arm.c (parse_half): New function.
768 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
769 (parse_operands): Ditto.
770 (do_mov16): Reject invalid relocations.
771 (do_t_mov16): Ditto. Use Thumb reloc numbers.
772 (insns): Replace Iffff with HALF.
773 (md_apply_fix): Add MOVW and MOVT relocs.
774 (tc_gen_reloc): Ditto.
775 * doc/c-arm.texi: Document relocation operators
777 2006-05-11 Paul Brook <paul@codesourcery.com>
779 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
781 2006-05-11 Thiemo Seufer <ths@mips.com>
783 * config/tc-mips.c (append_insn): Don't check the range of j or
784 jal addresses.
786 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
788 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
789 relocs against external symbols for WinCE targets.
790 (md_apply_fix): Likewise.
792 2006-05-09 David Ung <davidu@mips.com>
794 * config/tc-mips.c (append_insn): Only warn about an out-of-range
795 j or jal address.
797 2006-05-09 Nick Clifton <nickc@redhat.com>
799 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
800 against symbols which are not going to be placed into the symbol
801 table.
803 2006-05-09 Ben Elliston <bje@au.ibm.com>
805 * expr.c (operand): Remove `if (0 && ..)' statement and
806 subsequently unused target_op label. Collapse `if (1 || ..)'
807 statement.
808 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
809 separately above the switch.
811 2006-05-08 Nick Clifton <nickc@redhat.com>
813 PR gas/2623
814 * config/tc-msp430.c (line_separator_character): Define as |.
816 2006-05-08 Thiemo Seufer <ths@mips.com>
817 Nigel Stephens <nigel@mips.com>
818 David Ung <davidu@mips.com>
820 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
821 (mips_opts): Likewise.
822 (file_ase_smartmips): New variable.
823 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
824 (macro_build): Handle SmartMIPS instructions.
825 (mips_ip): Likewise.
826 (md_longopts): Add argument handling for smartmips.
827 (md_parse_options, mips_after_parse_args): Likewise.
828 (s_mipsset): Add .set smartmips support.
829 (md_show_usage): Document -msmartmips/-mno-smartmips.
830 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
831 .set smartmips.
832 * doc/c-mips.texi: Likewise.
834 2006-05-08 Alan Modra <amodra@bigpond.net.au>
836 * write.c (relax_segment): Add pass count arg. Don't error on
837 negative org/space on first two passes.
838 (relax_seg_info): New struct.
839 (relax_seg, write_object_file): Adjust.
840 * write.h (relax_segment): Update prototype.
842 2006-05-05 Julian Brown <julian@codesourcery.com>
844 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
845 checking.
846 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
847 architecture version checks.
848 (insns): Allow overlapping instructions to be used in VFP mode.
850 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
852 PR gas/2598
853 * config/obj-elf.c (obj_elf_change_section): Allow user
854 specified SHF_ALPHA_GPREL.
856 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
858 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
859 for PMEM related expressions.
861 2006-05-05 Nick Clifton <nickc@redhat.com>
863 PR gas/2582
864 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
865 insertion of a directory separator character into a string at a
866 given offset. Uses heuristics to decide when to use a backslash
867 character rather than a forward-slash character.
868 (dwarf2_directive_loc): Use the macro.
869 (out_debug_info): Likewise.
871 2006-05-05 Thiemo Seufer <ths@mips.com>
872 David Ung <davidu@mips.com>
874 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
875 instruction.
876 (macro): Add new case M_CACHE_AB.
878 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
880 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
881 (opcode_lookup): Issue a warning for opcode with
882 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
883 identical to OT_cinfix3.
884 (TxC3w, TC3w, tC3w): New.
885 (insns): Use tC3w and TC3w for comparison instructions with
886 's' suffix.
888 2006-05-04 Alan Modra <amodra@bigpond.net.au>
890 * subsegs.h (struct frchain): Delete frch_seg.
891 (frchain_root): Delete.
892 (seg_info): Define as macro.
893 * subsegs.c (frchain_root): Delete.
894 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
895 (subsegs_begin, subseg_change): Adjust for above.
896 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
897 rather than to one big list.
898 (subseg_get): Don't special case abs, und sections.
899 (subseg_new, subseg_force_new): Don't set frchainP here.
900 (seg_info): Delete.
901 (subsegs_print_statistics): Adjust frag chain control list traversal.
902 * debug.c (dmp_frags): Likewise.
903 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
904 at frchain_root. Make use of known frchain ordering.
905 (last_frag_for_seg): Likewise.
906 (get_frag_fix): Likewise. Add seg param.
907 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
908 * write.c (chain_frchains_together_1): Adjust for struct frchain.
909 (SUB_SEGMENT_ALIGN): Likewise.
910 (subsegs_finish): Adjust frchain list traversal.
911 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
912 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
913 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
914 (xtensa_fix_b_j_loop_end_frags): Likewise.
915 (xtensa_fix_close_loop_end_frags): Likewise.
916 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
917 (retrieve_segment_info): Delete frch_seg initialisation.
919 2006-05-03 Alan Modra <amodra@bigpond.net.au>
921 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
922 * config/obj-elf.h (obj_sec_set_private_data): Delete.
923 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
924 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
926 2006-05-02 Joseph Myers <joseph@codesourcery.com>
928 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
929 here.
930 (md_apply_fix3): Multiply offset by 4 here for
931 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
933 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
934 Jan Beulich <jbeulich@novell.com>
936 * config/tc-i386.c (output_invalid_buf): Change size for
937 unsigned char.
938 * config/tc-tic30.c (output_invalid_buf): Likewise.
940 * config/tc-i386.c (output_invalid): Cast none-ascii char to
941 unsigned char.
942 * config/tc-tic30.c (output_invalid): Likewise.
944 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
946 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
947 (TEXI2POD): Use AM_MAKEINFOFLAGS.
948 (asconfig.texi): Don't set top_srcdir.
949 * doc/as.texinfo: Don't use top_srcdir.
950 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
952 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
954 * config/tc-i386.c (output_invalid_buf): Change size to 16.
955 * config/tc-tic30.c (output_invalid_buf): Likewise.
957 * config/tc-i386.c (output_invalid): Use snprintf instead of
958 sprintf.
959 * config/tc-ia64.c (declare_register_set): Likewise.
960 (emit_one_bundle): Likewise.
961 (check_dependencies): Likewise.
962 * config/tc-tic30.c (output_invalid): Likewise.
964 2006-05-02 Paul Brook <paul@codesourcery.com>
966 * config/tc-arm.c (arm_optimize_expr): New function.
967 * config/tc-arm.h (md_optimize_expr): Define
968 (arm_optimize_expr): Add prototype.
969 (TC_FORCE_RELOCATION_SUB_SAME): Define.
971 2006-05-02 Ben Elliston <bje@au.ibm.com>
973 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
974 field unsigned.
976 * sb.h (sb_list_vector): Move to sb.c.
977 * sb.c (free_list): Use type of sb_list_vector directly.
978 (sb_build): Fix off-by-one error in assertion about `size'.
980 2006-05-01 Ben Elliston <bje@au.ibm.com>
982 * listing.c (listing_listing): Remove useless loop.
983 * macro.c (macro_expand): Remove is_positional local variable.
984 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
985 and simplify surrounding expressions, where possible.
986 (assign_symbol): Likewise.
987 (s_weakref): Likewise.
988 * symbols.c (colon): Likewise.
990 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
992 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
994 2006-04-30 Thiemo Seufer <ths@mips.com>
995 David Ung <davidu@mips.com>
997 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
998 (mips_immed): New table that records various handling of udi
999 instruction patterns.
1000 (mips_ip): Adds udi handling.
1002 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1004 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1005 of list rather than beginning.
1007 2006-04-26 Julian Brown <julian@codesourcery.com>
1009 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1010 (is_quarter_float): Rename from above. Simplify slightly.
1011 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1012 number.
1013 (parse_neon_mov): Parse floating-point constants.
1014 (neon_qfloat_bits): Fix encoding.
1015 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1016 preference to integer encoding when using the F32 type.
1018 2006-04-26 Julian Brown <julian@codesourcery.com>
1020 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1021 zero-initialising structures containing it will lead to invalid types).
1022 (arm_it): Add vectype to each operand.
1023 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1024 defined field.
1025 (neon_typed_alias): New structure. Extra information for typed
1026 register aliases.
1027 (reg_entry): Add neon type info field.
1028 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1029 Break out alternative syntax for coprocessor registers, etc. into...
1030 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1031 out from arm_reg_parse.
1032 (parse_neon_type): Move. Return SUCCESS/FAIL.
1033 (first_error): New function. Call to ensure first error which occurs is
1034 reported.
1035 (parse_neon_operand_type): Parse exactly one type.
1036 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1037 (parse_typed_reg_or_scalar): New function. Handle core of both
1038 arm_typed_reg_parse and parse_scalar.
1039 (arm_typed_reg_parse): Parse a register with an optional type.
1040 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1041 result.
1042 (parse_scalar): Parse a Neon scalar with optional type.
1043 (parse_reg_list): Use first_error.
1044 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1045 (neon_alias_types_same): New function. Return true if two (alias) types
1046 are the same.
1047 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1048 of elements.
1049 (insert_reg_alias): Return new reg_entry not void.
1050 (insert_neon_reg_alias): New function. Insert type/index information as
1051 well as register for alias.
1052 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1053 make typed register aliases accordingly.
1054 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1055 of line.
1056 (s_unreq): Delete type information if present.
1057 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1058 (s_arm_unwind_save_mmxwcg): Likewise.
1059 (s_arm_unwind_movsp): Likewise.
1060 (s_arm_unwind_setfp): Likewise.
1061 (parse_shift): Likewise.
1062 (parse_shifter_operand): Likewise.
1063 (parse_address): Likewise.
1064 (parse_tb): Likewise.
1065 (tc_arm_regname_to_dw2regnum): Likewise.
1066 (md_pseudo_table): Add dn, qn.
1067 (parse_neon_mov): Handle typed operands.
1068 (parse_operands): Likewise.
1069 (neon_type_mask): Add N_SIZ.
1070 (N_ALLMODS): New macro.
1071 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1072 (el_type_of_type_chk): Add some safeguards.
1073 (modify_types_allowed): Fix logic bug.
1074 (neon_check_type): Handle operands with types.
1075 (neon_three_same): Remove redundant optional arg handling.
1076 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1077 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1078 (do_neon_step): Adjust accordingly.
1079 (neon_cmode_for_logic_imm): Use first_error.
1080 (do_neon_bitfield): Call neon_check_type.
1081 (neon_dyadic): Rename to...
1082 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1083 to allow modification of type of the destination.
1084 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1085 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1086 (do_neon_compare): Make destination be an untyped bitfield.
1087 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1088 (neon_mul_mac): Return early in case of errors.
1089 (neon_move_immediate): Use first_error.
1090 (neon_mac_reg_scalar_long): Fix type to include scalar.
1091 (do_neon_dup): Likewise.
1092 (do_neon_mov): Likewise (in several places).
1093 (do_neon_tbl_tbx): Fix type.
1094 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1095 (do_neon_ld_dup): Exit early in case of errors and/or use
1096 first_error.
1097 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1098 Handle .dn/.qn directives.
1099 (REGDEF): Add zero for reg_entry neon field.
1101 2006-04-26 Julian Brown <julian@codesourcery.com>
1103 * config/tc-arm.c (limits.h): Include.
1104 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1105 (fpu_vfp_v3_or_neon_ext): Declare constants.
1106 (neon_el_type): New enumeration of types for Neon vector elements.
1107 (neon_type_el): New struct. Define type and size of a vector element.
1108 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1109 instruction.
1110 (neon_type): Define struct. The type of an instruction.
1111 (arm_it): Add 'vectype' for the current instruction.
1112 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1113 (vfp_sp_reg_pos): Rename to...
1114 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1115 tags.
1116 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1117 (Neon D or Q register).
1118 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1119 register.
1120 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1121 (my_get_expression): Allow above constant as argument to accept
1122 64-bit constants with optional prefix.
1123 (arm_reg_parse): Add extra argument to return the specific type of
1124 register in when either a D or Q register (REG_TYPE_NDQ) is
1125 requested. Can be NULL.
1126 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1127 (parse_reg_list): Update for new arm_reg_parse args.
1128 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1129 (parse_neon_el_struct_list): New function. Parse element/structure
1130 register lists for VLD<n>/VST<n> instructions.
1131 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1132 (s_arm_unwind_save_mmxwr): Likewise.
1133 (s_arm_unwind_save_mmxwcg): Likewise.
1134 (s_arm_unwind_movsp): Likewise.
1135 (s_arm_unwind_setfp): Likewise.
1136 (parse_big_immediate): New function. Parse an immediate, which may be
1137 64 bits wide. Put results in inst.operands[i].
1138 (parse_shift): Update for new arm_reg_parse args.
1139 (parse_address): Likewise. Add parsing of alignment specifiers.
1140 (parse_neon_mov): Parse the operands of a VMOV instruction.
1141 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1142 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1143 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1144 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1145 (parse_operands): Handle new codes above.
1146 (encode_arm_vfp_sp_reg): Rename to...
1147 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1148 selected VFP version only supports D0-D15.
1149 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1150 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1151 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1152 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1153 encode_arm_vfp_reg name, and allow 32 D regs.
1154 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1155 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1156 regs.
1157 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1158 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1159 constant-load and conversion insns introduced with VFPv3.
1160 (neon_tab_entry): New struct.
1161 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1162 those which are the targets of pseudo-instructions.
1163 (neon_opc): Enumerate opcodes, use as indices into...
1164 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1165 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1166 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1167 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1168 neon_enc_tab.
1169 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1170 Neon instructions.
1171 (neon_type_mask): New. Compact type representation for type checking.
1172 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1173 permitted type combinations.
1174 (N_IGNORE_TYPE): New macro.
1175 (neon_check_shape): New function. Check an instruction shape for
1176 multiple alternatives. Return the specific shape for the current
1177 instruction.
1178 (neon_modify_type_size): New function. Modify a vector type and size,
1179 depending on the bit mask in argument 1.
1180 (neon_type_promote): New function. Convert a given "key" type (of an
1181 operand) into the correct type for a different operand, based on a bit
1182 mask.
1183 (type_chk_of_el_type): New function. Convert a type and size into the
1184 compact representation used for type checking.
1185 (el_type_of_type_ckh): New function. Reverse of above (only when a
1186 single bit is set in the bit mask).
1187 (modify_types_allowed): New function. Alter a mask of allowed types
1188 based on a bit mask of modifications.
1189 (neon_check_type): New function. Check the type of the current
1190 instruction against the variable argument list. The "key" type of the
1191 instruction is returned.
1192 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1193 a Neon data-processing instruction depending on whether we're in ARM
1194 mode or Thumb-2 mode.
1195 (neon_logbits): New function.
1196 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1197 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1198 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1199 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1200 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1201 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1202 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1203 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1204 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1205 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1206 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1207 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1208 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1209 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1210 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1211 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1212 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1213 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1214 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1215 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1216 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1217 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1218 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1219 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1220 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1221 helpers.
1222 (parse_neon_type): New function. Parse Neon type specifier.
1223 (opcode_lookup): Allow parsing of Neon type specifiers.
1224 (REGNUM2, REGSETH, REGSET2): New macros.
1225 (reg_names): Add new VFPv3 and Neon registers.
1226 (NUF, nUF, NCE, nCE): New macros for opcode table.
1227 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1228 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1229 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1230 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1231 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1232 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1233 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1234 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1235 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1236 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1237 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1238 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1239 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1240 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1241 fto[us][lh][sd].
1242 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1243 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1244 (arm_option_cpu_value): Add vfp3 and neon.
1245 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1246 VFPv1 attribute.
1248 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1250 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1251 syntax instead of hardcoded opcodes with ".w18" suffixes.
1252 (wide_branch_opcode): New.
1253 (build_transition): Use it to check for wide branch opcodes with
1254 either ".w18" or ".w15" suffixes.
1256 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1258 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1259 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1260 frag's is_literal flag.
1262 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1264 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1266 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1268 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1269 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1270 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1271 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1272 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1274 2005-04-20 Paul Brook <paul@codesourcery.com>
1276 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1277 all targets.
1278 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1280 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1282 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1283 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1284 Make some cpus unsupported on ELF. Run "make dep-am".
1285 * Makefile.in: Regenerate.
1287 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1289 * configure.in (--enable-targets): Indent help message.
1290 * configure: Regenerate.
1292 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1294 PR gas/2533
1295 * config/tc-i386.c (i386_immediate): Check illegal immediate
1296 register operand.
1298 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1300 * config/tc-i386.c: Formatting.
1301 (output_disp, output_imm): ISO C90 params.
1303 * frags.c (frag_offset_fixed_p): Constify args.
1304 * frags.h (frag_offset_fixed_p): Ditto.
1306 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1307 (COFF_MAGIC): Delete.
1309 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1311 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1313 * po/POTFILES.in: Regenerated.
1315 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1317 * doc/as.texinfo: Mention that some .type syntaxes are not
1318 supported on all architectures.
1320 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1322 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1323 instructions when such transformations have been disabled.
1325 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1327 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1328 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1329 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1330 decoding the loop instructions. Remove current_offset variable.
1331 (xtensa_fix_short_loop_frags): Likewise.
1332 (min_bytes_to_other_loop_end): Remove current_offset argument.
1334 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1336 * config/tc-z80.c (z80_optimize_expr): Removed.
1337 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1339 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1341 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1342 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1343 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1344 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1345 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1346 at90can64, at90usb646, at90usb647, at90usb1286 and
1347 at90usb1287.
1348 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1350 2006-04-07 Paul Brook <paul@codesourcery.com>
1352 * config/tc-arm.c (parse_operands): Set default error message.
1354 2006-04-07 Paul Brook <paul@codesourcery.com>
1356 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1358 2006-04-07 Paul Brook <paul@codesourcery.com>
1360 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1362 2006-04-07 Paul Brook <paul@codesourcery.com>
1364 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1365 (move_or_literal_pool): Handle Thumb-2 instructions.
1366 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1368 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1370 PR 2512.
1371 * config/tc-i386.c (match_template): Move 64-bit operand tests
1372 inside loop.
1374 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1376 * po/Make-in: Add install-html target.
1377 * Makefile.am: Add install-html and install-html-recursive targets.
1378 * Makefile.in: Regenerate.
1379 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1380 * configure: Regenerate.
1381 * doc/Makefile.am: Add install-html and install-html-am targets.
1382 * doc/Makefile.in: Regenerate.
1384 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1386 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1387 second scan.
1389 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1390 Daniel Jacobowitz <dan@codesourcery.com>
1392 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1393 (GOTT_BASE, GOTT_INDEX): New.
1394 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1395 GOTT_INDEX when generating VxWorks PIC.
1396 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1397 use the generic *-*-vxworks* stanza instead.
1399 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1401 PR 997
1402 * frags.c (frag_offset_fixed_p): New function.
1403 * frags.h (frag_offset_fixed_p): Declare.
1404 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1405 (resolve_expression): Likewise.
1407 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1409 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1410 of the same length but different numbers of slots.
1412 2006-03-30 Andreas Schwab <schwab@suse.de>
1414 * configure.in: Fix help string for --enable-targets option.
1415 * configure: Regenerate.
1417 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1419 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1420 (m68k_ip): ... here. Use for all chips. Protect against buffer
1421 overrun and avoid excessive copying.
1423 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1424 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1425 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1426 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1427 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1428 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1429 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1430 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1431 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1432 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1433 (struct m68k_cpu): Change chip field to control_regs.
1434 (current_chip): Remove.
1435 (control_regs): New.
1436 (m68k_archs, m68k_extensions): Adjust.
1437 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1438 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1439 (find_cf_chip): Reimplement for new organization of cpu table.
1440 (select_control_regs): Remove.
1441 (mri_chip): Adjust.
1442 (struct save_opts): Save control regs, not chip.
1443 (s_save, s_restore): Adjust.
1444 (m68k_lookup_cpu): Give deprecated warning when necessary.
1445 (m68k_init_arch): Adjust.
1446 (md_show_usage): Adjust for new cpu table organization.
1448 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1450 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1451 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1452 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1453 "elf/bfin.h".
1454 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1455 (any_gotrel): New rule.
1456 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1457 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1458 "elf/bfin.h".
1459 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1460 (bfin_pic_ptr): New function.
1461 (md_pseudo_table): Add it for ".picptr".
1462 (OPTION_FDPIC): New macro.
1463 (md_longopts): Add -mfdpic.
1464 (md_parse_option): Handle it.
1465 (md_begin): Set BFD flags.
1466 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1467 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1468 us for GOT relocs.
1469 * Makefile.am (bfin-parse.o): Update dependencies.
1470 (DEPTC_bfin_elf): Likewise.
1471 * Makefile.in: Regenerate.
1473 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1475 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1476 mcfemac instead of mcfmac.
1478 2006-03-23 Michael Matz <matz@suse.de>
1480 * config/tc-i386.c (type_names): Correct placement of 'static'.
1481 (reloc): Map some more relocs to their 64 bit counterpart when
1482 size is 8.
1483 (output_insn): Work around breakage if DEBUG386 is defined.
1484 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1485 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1486 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1487 different from i386.
1488 (output_imm): Ditto.
1489 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1490 Imm64.
1491 (md_convert_frag): Jumps can now be larger than 2GB away, error
1492 out in that case.
1493 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1494 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1496 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1497 Daniel Jacobowitz <dan@codesourcery.com>
1498 Phil Edwards <phil@codesourcery.com>
1499 Zack Weinberg <zack@codesourcery.com>
1500 Mark Mitchell <mark@codesourcery.com>
1501 Nathan Sidwell <nathan@codesourcery.com>
1503 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1504 (md_begin): Complain about -G being used for PIC. Don't change
1505 the text, data and bss alignments on VxWorks.
1506 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1507 generating VxWorks PIC.
1508 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1509 (macro): Likewise, but do not treat la $25 specially for
1510 VxWorks PIC, and do not handle jal.
1511 (OPTION_MVXWORKS_PIC): New macro.
1512 (md_longopts): Add -mvxworks-pic.
1513 (md_parse_option): Don't complain about using PIC and -G together here.
1514 Handle OPTION_MVXWORKS_PIC.
1515 (md_estimate_size_before_relax): Always use the first relaxation
1516 sequence on VxWorks.
1517 * config/tc-mips.h (VXWORKS_PIC): New.
1519 2006-03-21 Paul Brook <paul@codesourcery.com>
1521 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1523 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1525 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1526 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1527 (get_loop_align_size): New.
1528 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1529 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1530 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1531 (get_noop_aligned_address): Use get_loop_align_size.
1532 (get_aligned_diff): Likewise.
1534 2006-03-21 Paul Brook <paul@codesourcery.com>
1536 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1538 2006-03-20 Paul Brook <paul@codesourcery.com>
1540 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1541 (do_t_branch): Encode branches inside IT blocks as unconditional.
1542 (do_t_cps): New function.
1543 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1544 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1545 (opcode_lookup): Allow conditional suffixes on all instructions in
1546 Thumb mode.
1547 (md_assemble): Advance condexec state before checking for errors.
1548 (insns): Use do_t_cps.
1550 2006-03-20 Paul Brook <paul@codesourcery.com>
1552 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1553 outputting the insn.
1555 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1557 * config/tc-vax.c: Update copyright year.
1558 * config/tc-vax.h: Likewise.
1560 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1562 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1563 make it static.
1564 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1566 2006-03-17 Paul Brook <paul@codesourcery.com>
1568 * config/tc-arm.c (insns): Add ldm and stm.
1570 2006-03-17 Ben Elliston <bje@au.ibm.com>
1572 PR gas/2446
1573 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1575 2006-03-16 Paul Brook <paul@codesourcery.com>
1577 * config/tc-arm.c (insns): Add "svc".
1579 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1581 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1582 flag and avoid double underscore prefixes.
1584 2006-03-10 Paul Brook <paul@codesourcery.com>
1586 * config/tc-arm.c (md_begin): Handle EABIv5.
1587 (arm_eabis): Add EF_ARM_EABI_VER5.
1588 * doc/c-arm.texi: Document -meabi=5.
1590 2006-03-10 Ben Elliston <bje@au.ibm.com>
1592 * app.c (do_scrub_chars): Simplify string handling.
1594 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1595 Daniel Jacobowitz <dan@codesourcery.com>
1596 Zack Weinberg <zack@codesourcery.com>
1597 Nathan Sidwell <nathan@codesourcery.com>
1598 Paul Brook <paul@codesourcery.com>
1599 Ricardo Anguiano <anguiano@codesourcery.com>
1600 Phil Edwards <phil@codesourcery.com>
1602 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1603 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1604 R_ARM_ABS12 reloc.
1605 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1606 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1607 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1609 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1611 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1612 even when using the text-section-literals option.
1614 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1616 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1617 and cf.
1618 (m68k_ip): <case 'J'> Check we have some control regs.
1619 (md_parse_option): Allow raw arch switch.
1620 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1621 whether 68881 or cfloat was meant by -mfloat.
1622 (md_show_usage): Adjust extension display.
1623 (m68k_elf_final_processing): Adjust.
1625 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1627 * config/tc-avr.c (avr_mod_hash_value): New function.
1628 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1629 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1630 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1631 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1632 of (int).
1633 (tc_gen_reloc): Handle substractions of symbols, if possible do
1634 fixups, abort otherwise.
1635 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1636 tc_fix_adjustable): Define.
1638 2006-03-02 James E Wilson <wilson@specifix.com>
1640 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1641 change the template, then clear md.slot[curr].end_of_insn_group.
1643 2006-02-28 Jan Beulich <jbeulich@novell.com>
1645 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1647 2006-02-28 Jan Beulich <jbeulich@novell.com>
1649 PR/1070
1650 * macro.c (getstring): Don't treat parentheses special anymore.
1651 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1652 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1653 characters.
1655 2006-02-28 Mat <mat@csail.mit.edu>
1657 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1659 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1661 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1662 field.
1663 (CFI_signal_frame): Define.
1664 (cfi_pseudo_table): Add .cfi_signal_frame.
1665 (dot_cfi): Handle CFI_signal_frame.
1666 (output_cie): Handle cie->signal_frame.
1667 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1668 different. Copy signal_frame from FDE to newly created CIE.
1669 * doc/as.texinfo: Document .cfi_signal_frame.
1671 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1673 * doc/Makefile.am: Add html target.
1674 * doc/Makefile.in: Regenerate.
1675 * po/Make-in: Add html target.
1677 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1679 * config/tc-i386.c (output_insn): Support Intel Merom New
1680 Instructions.
1682 * config/tc-i386.h (CpuMNI): New.
1683 (CpuUnknownFlags): Add CpuMNI.
1685 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1687 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1688 (hpriv_reg_table): New table for hyperprivileged registers.
1689 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1690 register encoding.
1692 2006-02-24 DJ Delorie <dj@redhat.com>
1694 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1695 (tc_gen_reloc): Don't define.
1696 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1697 (OPTION_LINKRELAX): New.
1698 (md_longopts): Add it.
1699 (m32c_relax): New.
1700 (md_parse_options): Set it.
1701 (md_assemble): Emit relaxation relocs as needed.
1702 (md_convert_frag): Emit relaxation relocs as needed.
1703 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1704 (m32c_apply_fix): New.
1705 (tc_gen_reloc): New.
1706 (m32c_force_relocation): Force out jump relocs when relaxing.
1707 (m32c_fix_adjustable): Return false if relaxing.
1709 2006-02-24 Paul Brook <paul@codesourcery.com>
1711 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1712 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1713 (struct asm_barrier_opt): Define.
1714 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1715 (parse_psr): Accept V7M psr names.
1716 (parse_barrier): New function.
1717 (enum operand_parse_code): Add OP_oBARRIER.
1718 (parse_operands): Implement OP_oBARRIER.
1719 (do_barrier): New function.
1720 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1721 (do_t_cpsi): Add V7M restrictions.
1722 (do_t_mrs, do_t_msr): Validate V7M variants.
1723 (md_assemble): Check for NULL variants.
1724 (v7m_psrs, barrier_opt_names): New tables.
1725 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1726 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1727 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1728 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1729 (struct cpu_arch_ver_table): Define.
1730 (cpu_arch_ver): New.
1731 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1732 Tag_CPU_arch_profile.
1733 * doc/c-arm.texi: Document new cpu and arch options.
1735 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1737 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1739 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1741 * config/tc-ia64.c: Update copyright years.
1743 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1745 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1746 SDM 2.2.
1748 2005-02-22 Paul Brook <paul@codesourcery.com>
1750 * config/tc-arm.c (do_pld): Remove incorrect write to
1751 inst.instruction.
1752 (encode_thumb32_addr_mode): Use correct operand.
1754 2006-02-21 Paul Brook <paul@codesourcery.com>
1756 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1758 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1759 Anil Paranjape <anilp1@kpitcummins.com>
1760 Shilin Shakti <shilins@kpitcummins.com>
1762 * Makefile.am: Add xc16x related entry.
1763 * Makefile.in: Regenerate.
1764 * configure.in: Added xc16x related entry.
1765 * configure: Regenerate.
1766 * config/tc-xc16x.h: New file
1767 * config/tc-xc16x.c: New file
1768 * doc/c-xc16x.texi: New file for xc16x
1769 * doc/all.texi: Entry for xc16x
1770 * doc/Makefile.texi: Added c-xc16x.texi
1771 * NEWS: Announce the support for the new target.
1773 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1775 * configure.tgt: set emulation for mips-*-netbsd*
1777 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1779 * config.in: Rebuilt.
1781 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1783 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1784 from 1, not 0, in error messages.
1785 (md_assemble): Simplify special-case check for ENTRY instructions.
1786 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1787 operand in error message.
1789 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1791 * configure.tgt (arm-*-linux-gnueabi*): Change to
1792 arm-*-linux-*eabi*.
1794 2006-02-10 Nick Clifton <nickc@redhat.com>
1796 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1797 32-bit value is propagated into the upper bits of a 64-bit long.
1799 * config/tc-arc.c (init_opcode_tables): Fix cast.
1800 (arc_extoper, md_operand): Likewise.
1802 2006-02-09 David Heine <dlheine@tensilica.com>
1804 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1805 each relaxation step.
1807 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1809 * configure.in (CHECK_DECLS): Add vsnprintf.
1810 * configure: Regenerate.
1811 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1812 include/declare here, but...
1813 * as.h: Move code detecting VARARGS idiom to the top.
1814 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1815 (vsnprintf): Declare if not already declared.
1817 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1819 * as.c (close_output_file): New.
1820 (main): Register close_output_file with xatexit before
1821 dump_statistics. Don't call output_file_close.
1823 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1825 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1826 mcf5329_control_regs): New.
1827 (not_current_architecture, selected_arch, selected_cpu): New.
1828 (m68k_archs, m68k_extensions): New.
1829 (archs): Renamed to ...
1830 (m68k_cpus): ... here. Adjust.
1831 (n_arches): Remove.
1832 (md_pseudo_table): Add arch and cpu directives.
1833 (find_cf_chip, m68k_ip): Adjust table scanning.
1834 (no_68851, no_68881): Remove.
1835 (md_assemble): Lazily initialize.
1836 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1837 (md_init_after_args): Move functionality to m68k_init_arch.
1838 (mri_chip): Adjust table scanning.
1839 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1840 options with saner parsing.
1841 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1842 m68k_init_arch): New.
1843 (s_m68k_cpu, s_m68k_arch): New.
1844 (md_show_usage): Adjust.
1845 (m68k_elf_final_processing): Set CF EF flags.
1846 * config/tc-m68k.h (m68k_init_after_args): Remove.
1847 (tc_init_after_args): Remove.
1848 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1849 (M68k-Directives): Document .arch and .cpu directives.
1851 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1853 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1854 synonyms for equ and defl.
1855 (z80_cons_fix_new): New function.
1856 (emit_byte): Disallow relative jumps to absolute locations.
1857 (emit_data): Only handle defb, prototype changed, because defb is
1858 now handled as pseudo-op rather than an instruction.
1859 (instab): Entries for defb,defw,db,dw moved from here...
1860 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1861 Add entries for def24,def32,d24,d32.
1862 (md_assemble): Improved error handling.
1863 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1864 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1865 (z80_cons_fix_new): Declare.
1866 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1867 (def24,d24,def32,d32): New pseudo-ops.
1869 2006-02-02 Paul Brook <paul@codesourcery.com>
1871 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1873 2005-02-02 Paul Brook <paul@codesourcery.com>
1875 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1876 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1877 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1878 T2_OPCODE_RSB): Define.
1879 (thumb32_negate_data_op): New function.
1880 (md_apply_fix): Use it.
1882 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1884 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1885 fields.
1886 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1887 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1888 subtracted symbols.
1889 (relaxation_requirements): Add pfinish_frag argument and use it to
1890 replace setting tinsn->record_fix fields.
1891 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1892 and vinsn_to_insnbuf. Remove references to record_fix and
1893 slot_sub_symbols fields.
1894 (xtensa_mark_narrow_branches): Delete unused code.
1895 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1896 a symbol.
1897 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1898 record_fix fields.
1899 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1900 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1901 of the record_fix field. Simplify error messages for unexpected
1902 symbolic operands.
1903 (set_expr_symbol_offset_diff): Delete.
1905 2006-01-31 Paul Brook <paul@codesourcery.com>
1907 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1909 2006-01-31 Paul Brook <paul@codesourcery.com>
1910 Richard Earnshaw <rearnsha@arm.com>
1912 * config/tc-arm.c: Use arm_feature_set.
1913 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1914 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1915 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1916 New variables.
1917 (insns): Use them.
1918 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1919 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1920 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1921 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1922 feature flags.
1923 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1924 (arm_opts): Move old cpu/arch options from here...
1925 (arm_legacy_opts): ... to here.
1926 (md_parse_option): Search arm_legacy_opts.
1927 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1928 (arm_float_abis, arm_eabis): Make const.
1930 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1932 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1934 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1936 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1937 in load immediate intruction.
1939 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1941 * config/bfin-parse.y (value_match): Use correct conversion
1942 specifications in template string for __FILE__ and __LINE__.
1943 (binary): Ditto.
1944 (unary): Ditto.
1946 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1948 Introduce TLS descriptors for i386 and x86_64.
1949 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1950 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1951 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1952 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1953 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1954 displacement bits.
1955 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1956 (lex_got): Handle @tlsdesc and @tlscall.
1957 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1959 2006-01-11 Nick Clifton <nickc@redhat.com>
1961 Fixes for building on 64-bit hosts:
1962 * config/tc-avr.c (mod_index): New union to allow conversion
1963 between pointers and integers.
1964 (md_begin, avr_ldi_expression): Use it.
1965 * config/tc-i370.c (md_assemble): Add cast for argument to print
1966 statement.
1967 * config/tc-tic54x.c (subsym_substitute): Likewise.
1968 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1969 opindex field of fr_cgen structure into a pointer so that it can
1970 be stored in a frag.
1971 * config/tc-mn10300.c (md_assemble): Likewise.
1972 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1973 types.
1974 * config/tc-v850.c: Replace uses of (int) casts with correct
1975 types.
1977 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1979 PR gas/2117
1980 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1982 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1984 PR gas/2101
1985 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1986 a local-label reference.
1988 For older changes see ChangeLog-2005
1989 \f
1990 Local Variables:
1991 mode: change-log
1992 left-margin: 8
1993 fill-column: 74
1994 version-control: never
1995 End: