* elf.c (bfd_elf_get_elf_syms): Don't leak memory on error.
[binutils.git] / opcodes / mt-opc.c
blobf73ca2f7be5c83ca14a200bb07b9965e243468c8
1 /* Instruction opcode table for mt.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #include "sysdep.h"
26 #include "ansidecl.h"
27 #include "bfd.h"
28 #include "symcat.h"
29 #include "mt-desc.h"
30 #include "mt-opc.h"
31 #include "libiberty.h"
33 /* -- opc.c */
34 #include "safe-ctype.h"
36 /* Special check to ensure that instruction exists for given machine. */
38 int
39 mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
41 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
43 /* No mach attribute? Assume it's supported for all machs. */
44 if (machs == 0)
45 return 1;
47 return ((machs & cd->machs) != 0);
50 /* A better hash function for instruction mnemonics. */
52 unsigned int
53 mt_asm_hash (const char* insn)
55 unsigned int hash;
56 const char* m = insn;
58 for (hash = 0; *m && ! ISSPACE (*m); m++)
59 hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
61 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
63 return hash % CGEN_ASM_HASH_SIZE;
67 /* -- asm.c */
68 /* The hash functions are recorded here to help keep assembler code out of
69 the disassembler and vice versa. */
71 static int asm_hash_insn_p (const CGEN_INSN *);
72 static unsigned int asm_hash_insn (const char *);
73 static int dis_hash_insn_p (const CGEN_INSN *);
74 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
76 /* Instruction formats. */
78 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
79 #define F(f) & mt_cgen_ifld_table[MT_##f]
80 #else
81 #define F(f) & mt_cgen_ifld_table[MT_/**/f]
82 #endif
83 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
84 0, 0, 0x0, { { 0 } }
87 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
88 32, 32, 0xff000fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
91 static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
92 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16S) }, { 0 } }
95 static const CGEN_IFMT ifmt_addui ATTRIBUTE_UNUSED = {
96 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } }
99 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
100 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU24) }, { 0 } }
103 static const CGEN_IFMT ifmt_ldui ATTRIBUTE_UNUSED = {
104 32, 32, 0xfff00000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } }
107 static const CGEN_IFMT ifmt_brlt ATTRIBUTE_UNUSED = {
108 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } }
111 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
112 32, 32, 0xffff0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } }
115 static const CGEN_IFMT ifmt_jal ATTRIBUTE_UNUSED = {
116 32, 32, 0xff0f0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
119 static const CGEN_IFMT ifmt_dbnz ATTRIBUTE_UNUSED = {
120 32, 32, 0xff0f0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } }
123 static const CGEN_IFMT ifmt_ei ATTRIBUTE_UNUSED = {
124 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } }
127 static const CGEN_IFMT ifmt_si ATTRIBUTE_UNUSED = {
128 32, 32, 0xffff0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
131 static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED = {
132 32, 32, 0xff0fffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } }
135 static const CGEN_IFMT ifmt_stw ATTRIBUTE_UNUSED = {
136 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } }
139 static const CGEN_IFMT ifmt_ldctxt ATTRIBUTE_UNUSED = {
140 32, 32, 0xff000e00, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_RC) }, { F (F_RCNUM) }, { F (F_UU_3_11) }, { F (F_CONTNUM) }, { 0 } }
143 static const CGEN_IFMT ifmt_ldfb ATTRIBUTE_UNUSED = {
144 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16U) }, { 0 } }
147 static const CGEN_IFMT ifmt_fbcb ATTRIBUTE_UNUSED = {
148 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_4_15) }, { F (F_RC) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
151 static const CGEN_IFMT ifmt_mfbcb ATTRIBUTE_UNUSED = {
152 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_4_15) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
155 static const CGEN_IFMT ifmt_fbcci ATTRIBUTE_UNUSED = {
156 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
159 static const CGEN_IFMT ifmt_mfbcci ATTRIBUTE_UNUSED = {
160 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
163 static const CGEN_IFMT ifmt_fbcbdr ATTRIBUTE_UNUSED = {
164 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_BALL2) }, { F (F_BRC2) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
167 static const CGEN_IFMT ifmt_rcfbcb ATTRIBUTE_UNUSED = {
168 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
171 static const CGEN_IFMT ifmt_mrcfbcb ATTRIBUTE_UNUSED = {
172 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
175 static const CGEN_IFMT ifmt_cbcast ATTRIBUTE_UNUSED = {
176 32, 32, 0xfc000380, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_UU_3_9) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
179 static const CGEN_IFMT ifmt_dupcbcast ATTRIBUTE_UNUSED = {
180 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_CELL) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
183 static const CGEN_IFMT ifmt_wfbi ATTRIBUTE_UNUSED = {
184 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_BANKADDR) }, { F (F_ROWNUM1) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
187 static const CGEN_IFMT ifmt_wfb ATTRIBUTE_UNUSED = {
188 32, 32, 0xff000040, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_UU_1_6) }, { F (F_CTXDISP) }, { 0 } }
191 static const CGEN_IFMT ifmt_rcrisc ATTRIBUTE_UNUSED = {
192 32, 32, 0xfc080000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_UU_1_19) }, { F (F_COLNUM) }, { F (F_DRRR) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
195 static const CGEN_IFMT ifmt_fbcbinc ATTRIBUTE_UNUSED = {
196 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_INCAMT) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
199 static const CGEN_IFMT ifmt_rcxmode ATTRIBUTE_UNUSED = {
200 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_XMODE) }, { F (F_MASK1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
203 static const CGEN_IFMT ifmt_interleaver ATTRIBUTE_UNUSED = {
204 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MODE) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ID) }, { F (F_SIZE) }, { 0 } }
207 static const CGEN_IFMT ifmt_wfbinc ATTRIBUTE_UNUSED = {
208 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
211 static const CGEN_IFMT ifmt_mwfbinc ATTRIBUTE_UNUSED = {
212 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
215 static const CGEN_IFMT ifmt_wfbincr ATTRIBUTE_UNUSED = {
216 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
219 static const CGEN_IFMT ifmt_mwfbincr ATTRIBUTE_UNUSED = {
220 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
223 static const CGEN_IFMT ifmt_fbcbincs ATTRIBUTE_UNUSED = {
224 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_A23) }, { F (F_CR) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
227 static const CGEN_IFMT ifmt_mfbcbincs ATTRIBUTE_UNUSED = {
228 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
231 static const CGEN_IFMT ifmt_fbcbincrs ATTRIBUTE_UNUSED = {
232 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
235 static const CGEN_IFMT ifmt_mfbcbincrs ATTRIBUTE_UNUSED = {
236 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
239 static const CGEN_IFMT ifmt_loop ATTRIBUTE_UNUSED = {
240 32, 32, 0xff0fff00, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU8) }, { F (F_LOOPO) }, { 0 } }
243 static const CGEN_IFMT ifmt_loopi ATTRIBUTE_UNUSED = {
244 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_IMM16L) }, { F (F_LOOPO) }, { 0 } }
247 static const CGEN_IFMT ifmt_dfbc ATTRIBUTE_UNUSED = {
248 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_RC3) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
251 static const CGEN_IFMT ifmt_dwfb ATTRIBUTE_UNUSED = {
252 32, 32, 0xfc000080, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_UU1) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
255 static const CGEN_IFMT ifmt_dfbr ATTRIBUTE_UNUSED = {
256 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
259 #undef F
261 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
262 #define A(a) (1 << CGEN_INSN_##a)
263 #else
264 #define A(a) (1 << CGEN_INSN_/**/a)
265 #endif
266 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
267 #define OPERAND(op) MT_OPERAND_##op
268 #else
269 #define OPERAND(op) MT_OPERAND_/**/op
270 #endif
271 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
272 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
274 /* The instruction table. */
276 static const CGEN_OPCODE mt_cgen_insn_opcode_table[MAX_INSNS] =
278 /* Special null first entry.
279 A `num' value of zero is thus invalid.
280 Also, the special `invalid' insn resides here. */
281 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
282 /* add $frdrrr,$frsr1,$frsr2 */
284 { 0, 0, 0, 0 },
285 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
286 & ifmt_add, { 0x0 }
288 /* addu $frdrrr,$frsr1,$frsr2 */
290 { 0, 0, 0, 0 },
291 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
292 & ifmt_add, { 0x2000000 }
294 /* addi $frdr,$frsr1,#$imm16 */
296 { 0, 0, 0, 0 },
297 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
298 & ifmt_addi, { 0x1000000 }
300 /* addui $frdr,$frsr1,#$imm16z */
302 { 0, 0, 0, 0 },
303 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
304 & ifmt_addui, { 0x3000000 }
306 /* sub $frdrrr,$frsr1,$frsr2 */
308 { 0, 0, 0, 0 },
309 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
310 & ifmt_add, { 0x4000000 }
312 /* subu $frdrrr,$frsr1,$frsr2 */
314 { 0, 0, 0, 0 },
315 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
316 & ifmt_add, { 0x6000000 }
318 /* subi $frdr,$frsr1,#$imm16 */
320 { 0, 0, 0, 0 },
321 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
322 & ifmt_addi, { 0x5000000 }
324 /* subui $frdr,$frsr1,#$imm16z */
326 { 0, 0, 0, 0 },
327 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
328 & ifmt_addui, { 0x7000000 }
330 /* mul $frdrrr,$frsr1,$frsr2 */
332 { 0, 0, 0, 0 },
333 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
334 & ifmt_add, { 0x8000000 }
336 /* muli $frdr,$frsr1,#$imm16 */
338 { 0, 0, 0, 0 },
339 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
340 & ifmt_addi, { 0x9000000 }
342 /* and $frdrrr,$frsr1,$frsr2 */
344 { 0, 0, 0, 0 },
345 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
346 & ifmt_add, { 0x10000000 }
348 /* andi $frdr,$frsr1,#$imm16z */
350 { 0, 0, 0, 0 },
351 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
352 & ifmt_addui, { 0x11000000 }
354 /* or $frdrrr,$frsr1,$frsr2 */
356 { 0, 0, 0, 0 },
357 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
358 & ifmt_add, { 0x12000000 }
360 /* nop */
362 { 0, 0, 0, 0 },
363 { { MNEM, 0 } },
364 & ifmt_nop, { 0x12000000 }
366 /* ori $frdr,$frsr1,#$imm16z */
368 { 0, 0, 0, 0 },
369 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
370 & ifmt_addui, { 0x13000000 }
372 /* xor $frdrrr,$frsr1,$frsr2 */
374 { 0, 0, 0, 0 },
375 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
376 & ifmt_add, { 0x14000000 }
378 /* xori $frdr,$frsr1,#$imm16z */
380 { 0, 0, 0, 0 },
381 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
382 & ifmt_addui, { 0x15000000 }
384 /* nand $frdrrr,$frsr1,$frsr2 */
386 { 0, 0, 0, 0 },
387 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
388 & ifmt_add, { 0x16000000 }
390 /* nandi $frdr,$frsr1,#$imm16z */
392 { 0, 0, 0, 0 },
393 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
394 & ifmt_addui, { 0x17000000 }
396 /* nor $frdrrr,$frsr1,$frsr2 */
398 { 0, 0, 0, 0 },
399 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
400 & ifmt_add, { 0x18000000 }
402 /* nori $frdr,$frsr1,#$imm16z */
404 { 0, 0, 0, 0 },
405 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
406 & ifmt_addui, { 0x19000000 }
408 /* xnor $frdrrr,$frsr1,$frsr2 */
410 { 0, 0, 0, 0 },
411 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
412 & ifmt_add, { 0x1a000000 }
414 /* xnori $frdr,$frsr1,#$imm16z */
416 { 0, 0, 0, 0 },
417 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
418 & ifmt_addui, { 0x1b000000 }
420 /* ldui $frdr,#$imm16z */
422 { 0, 0, 0, 0 },
423 { { MNEM, ' ', OP (FRDR), ',', '#', OP (IMM16Z), 0 } },
424 & ifmt_ldui, { 0x1d000000 }
426 /* lsl $frdrrr,$frsr1,$frsr2 */
428 { 0, 0, 0, 0 },
429 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
430 & ifmt_add, { 0x20000000 }
432 /* lsli $frdr,$frsr1,#$imm16 */
434 { 0, 0, 0, 0 },
435 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
436 & ifmt_addi, { 0x21000000 }
438 /* lsr $frdrrr,$frsr1,$frsr2 */
440 { 0, 0, 0, 0 },
441 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
442 & ifmt_add, { 0x22000000 }
444 /* lsri $frdr,$frsr1,#$imm16 */
446 { 0, 0, 0, 0 },
447 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
448 & ifmt_addi, { 0x23000000 }
450 /* asr $frdrrr,$frsr1,$frsr2 */
452 { 0, 0, 0, 0 },
453 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
454 & ifmt_add, { 0x24000000 }
456 /* asri $frdr,$frsr1,#$imm16 */
458 { 0, 0, 0, 0 },
459 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
460 & ifmt_addi, { 0x25000000 }
462 /* brlt $frsr1,$frsr2,$imm16o */
464 { 0, 0, 0, 0 },
465 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
466 & ifmt_brlt, { 0x31000000 }
468 /* brle $frsr1,$frsr2,$imm16o */
470 { 0, 0, 0, 0 },
471 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
472 & ifmt_brlt, { 0x33000000 }
474 /* breq $frsr1,$frsr2,$imm16o */
476 { 0, 0, 0, 0 },
477 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
478 & ifmt_brlt, { 0x35000000 }
480 /* brne $frsr1,$frsr2,$imm16o */
482 { 0, 0, 0, 0 },
483 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
484 & ifmt_brlt, { 0x3b000000 }
486 /* jmp $imm16o */
488 { 0, 0, 0, 0 },
489 { { MNEM, ' ', OP (IMM16O), 0 } },
490 & ifmt_jmp, { 0x37000000 }
492 /* jal $frdrrr,$frsr1 */
494 { 0, 0, 0, 0 },
495 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), 0 } },
496 & ifmt_jal, { 0x38000000 }
498 /* dbnz $frsr1,$imm16o */
500 { 0, 0, 0, 0 },
501 { { MNEM, ' ', OP (FRSR1), ',', OP (IMM16O), 0 } },
502 & ifmt_dbnz, { 0x3d000000 }
504 /* ei */
506 { 0, 0, 0, 0 },
507 { { MNEM, 0 } },
508 & ifmt_ei, { 0x60000000 }
510 /* di */
512 { 0, 0, 0, 0 },
513 { { MNEM, 0 } },
514 & ifmt_ei, { 0x62000000 }
516 /* si $frdrrr */
518 { 0, 0, 0, 0 },
519 { { MNEM, ' ', OP (FRDRRR), 0 } },
520 & ifmt_si, { 0x64000000 }
522 /* reti $frsr1 */
524 { 0, 0, 0, 0 },
525 { { MNEM, ' ', OP (FRSR1), 0 } },
526 & ifmt_reti, { 0x66000000 }
528 /* ldw $frdr,$frsr1,#$imm16 */
530 { 0, 0, 0, 0 },
531 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
532 & ifmt_addi, { 0x41000000 }
534 /* stw $frsr2,$frsr1,#$imm16 */
536 { 0, 0, 0, 0 },
537 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
538 & ifmt_stw, { 0x43000000 }
540 /* break */
542 { 0, 0, 0, 0 },
543 { { MNEM, 0 } },
544 & ifmt_nop, { 0x68000000 }
546 /* iflush */
548 { 0, 0, 0, 0 },
549 { { MNEM, 0 } },
550 & ifmt_nop, { 0x6a000000 }
552 /* ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum */
554 { 0, 0, 0, 0 },
555 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RC), ',', '#', OP (RCNUM), ',', '#', OP (CONTNUM), 0 } },
556 & ifmt_ldctxt, { 0x80000000 }
558 /* ldfb $frsr1,$frsr2,#$imm16z */
560 { 0, 0, 0, 0 },
561 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } },
562 & ifmt_ldfb, { 0x84000000 }
564 /* stfb $frsr1,$frsr2,#$imm16z */
566 { 0, 0, 0, 0 },
567 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } },
568 & ifmt_ldfb, { 0x88000000 }
570 /* fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
572 { 0, 0, 0, 0 },
573 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
574 & ifmt_fbcb, { 0x8c000000 }
576 /* mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
578 { 0, 0, 0, 0 },
579 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
580 & ifmt_mfbcb, { 0x90000000 }
582 /* fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
584 { 0, 0, 0, 0 },
585 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
586 & ifmt_fbcci, { 0x94000000 }
588 /* fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
590 { 0, 0, 0, 0 },
591 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
592 & ifmt_fbcci, { 0x98000000 }
594 /* fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
596 { 0, 0, 0, 0 },
597 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
598 & ifmt_fbcci, { 0x9c000000 }
600 /* fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
602 { 0, 0, 0, 0 },
603 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
604 & ifmt_fbcci, { 0xa0000000 }
606 /* mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
608 { 0, 0, 0, 0 },
609 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
610 & ifmt_mfbcci, { 0xa4000000 }
612 /* mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
614 { 0, 0, 0, 0 },
615 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
616 & ifmt_mfbcci, { 0xa8000000 }
618 /* mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
620 { 0, 0, 0, 0 },
621 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
622 & ifmt_mfbcci, { 0xac000000 }
624 /* mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
626 { 0, 0, 0, 0 },
627 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
628 & ifmt_mfbcci, { 0xb0000000 }
630 /* fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
632 { 0, 0, 0, 0 },
633 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (BALL2), ',', '#', OP (BRC2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
634 & ifmt_fbcbdr, { 0xb4000000 }
636 /* rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
638 { 0, 0, 0, 0 },
639 { { MNEM, ' ', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
640 & ifmt_rcfbcb, { 0xb8000000 }
642 /* mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
644 { 0, 0, 0, 0 },
645 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
646 & ifmt_mrcfbcb, { 0xbc000000 }
648 /* cbcast #$mask,#$rc2,#$ctxdisp */
650 { 0, 0, 0, 0 },
651 { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
652 & ifmt_cbcast, { 0xc0000000 }
654 /* dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp */
656 { 0, 0, 0, 0 },
657 { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (CELL), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
658 & ifmt_dupcbcast, { 0xc4000000 }
660 /* wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp */
662 { 0, 0, 0, 0 },
663 { { MNEM, ' ', '#', OP (BANKADDR), ',', '#', OP (ROWNUM1), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
664 & ifmt_wfbi, { 0xc8000000 }
666 /* wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp */
668 { 0, 0, 0, 0 },
669 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (CTXDISP), 0 } },
670 & ifmt_wfb, { 0xcc000000 }
672 /* rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
674 { 0, 0, 0, 0 },
675 { { MNEM, ' ', OP (FRDRRR), ',', '#', OP (RBBC), ',', OP (FRSR1), ',', '#', OP (COLNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
676 & ifmt_rcrisc, { 0xd0000000 }
678 /* fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
680 { 0, 0, 0, 0 },
681 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (INCAMT), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
682 & ifmt_fbcbinc, { 0xd4000000 }
684 /* rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp */
686 { 0, 0, 0, 0 },
687 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (XMODE), ',', '#', OP (MASK1), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
688 & ifmt_rcxmode, { 0xd8000000 }
690 /* intlvr $frsr1,#$mode,$frsr2,#$id,#$size */
692 { 0, 0, 0, 0 },
693 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (MODE), ',', OP (FRSR2), ',', '#', OP (ID), ',', '#', OP (SIZE), 0 } },
694 & ifmt_interleaver, { 0xdc000000 }
696 /* wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
698 { 0, 0, 0, 0 },
699 { { MNEM, ' ', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
700 & ifmt_wfbinc, { 0xe0000000 }
702 /* mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
704 { 0, 0, 0, 0 },
705 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
706 & ifmt_mwfbinc, { 0xe4000000 }
708 /* wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
710 { 0, 0, 0, 0 },
711 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
712 & ifmt_wfbincr, { 0xe8000000 }
714 /* mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
716 { 0, 0, 0, 0 },
717 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
718 & ifmt_mwfbincr, { 0xec000000 }
720 /* fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
722 { 0, 0, 0, 0 },
723 { { MNEM, ' ', '#', OP (PERM), ',', '#', OP (A23), ',', '#', OP (CR), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
724 & ifmt_fbcbincs, { 0xf0000000 }
726 /* mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
728 { 0, 0, 0, 0 },
729 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
730 & ifmt_mfbcbincs, { 0xf4000000 }
732 /* fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
734 { 0, 0, 0, 0 },
735 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
736 & ifmt_fbcbincrs, { 0xf8000000 }
738 /* mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
740 { 0, 0, 0, 0 },
741 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (PERM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
742 & ifmt_mfbcbincrs, { 0xfc000000 }
744 /* loop $frsr1,$loopsize */
746 { 0, 0, 0, 0 },
747 { { MNEM, ' ', OP (FRSR1), ',', OP (LOOPSIZE), 0 } },
748 & ifmt_loop, { 0x3e000000 }
750 /* loopi #$imm16l,$loopsize */
752 { 0, 0, 0, 0 },
753 { { MNEM, ' ', '#', OP (IMM16L), ',', OP (LOOPSIZE), 0 } },
754 & ifmt_loopi, { 0x3f000000 }
756 /* dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
758 { 0, 0, 0, 0 },
759 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
760 & ifmt_dfbc, { 0x80000000 }
762 /* dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp */
764 { 0, 0, 0, 0 },
765 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
766 & ifmt_dwfb, { 0x84000000 }
768 /* fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
770 { 0, 0, 0, 0 },
771 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
772 & ifmt_dfbc, { 0x88000000 }
774 /* dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp */
776 { 0, 0, 0, 0 },
777 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', OP (FRSR2), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
778 & ifmt_dfbr, { 0x8c000000 }
782 #undef A
783 #undef OPERAND
784 #undef MNEM
785 #undef OP
787 /* Formats for ALIAS macro-insns. */
789 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
790 #define F(f) & mt_cgen_ifld_table[MT_##f]
791 #else
792 #define F(f) & mt_cgen_ifld_table[MT_/**/f]
793 #endif
794 #undef F
796 /* Each non-simple macro entry points to an array of expansion possibilities. */
798 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
799 #define A(a) (1 << CGEN_INSN_##a)
800 #else
801 #define A(a) (1 << CGEN_INSN_/**/a)
802 #endif
803 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
804 #define OPERAND(op) MT_OPERAND_##op
805 #else
806 #define OPERAND(op) MT_OPERAND_/**/op
807 #endif
808 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
809 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
811 /* The macro instruction table. */
813 static const CGEN_IBASE mt_cgen_macro_insn_table[] =
817 /* The macro instruction opcode table. */
819 static const CGEN_OPCODE mt_cgen_macro_insn_opcode_table[] =
823 #undef A
824 #undef OPERAND
825 #undef MNEM
826 #undef OP
828 #ifndef CGEN_ASM_HASH_P
829 #define CGEN_ASM_HASH_P(insn) 1
830 #endif
832 #ifndef CGEN_DIS_HASH_P
833 #define CGEN_DIS_HASH_P(insn) 1
834 #endif
836 /* Return non-zero if INSN is to be added to the hash table.
837 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
839 static int
840 asm_hash_insn_p (insn)
841 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
843 return CGEN_ASM_HASH_P (insn);
846 static int
847 dis_hash_insn_p (insn)
848 const CGEN_INSN *insn;
850 /* If building the hash table and the NO-DIS attribute is present,
851 ignore. */
852 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
853 return 0;
854 return CGEN_DIS_HASH_P (insn);
857 #ifndef CGEN_ASM_HASH
858 #define CGEN_ASM_HASH_SIZE 127
859 #ifdef CGEN_MNEMONIC_OPERANDS
860 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
861 #else
862 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
863 #endif
864 #endif
866 /* It doesn't make much sense to provide a default here,
867 but while this is under development we do.
868 BUFFER is a pointer to the bytes of the insn, target order.
869 VALUE is the first base_insn_bitsize bits as an int in host order. */
871 #ifndef CGEN_DIS_HASH
872 #define CGEN_DIS_HASH_SIZE 256
873 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
874 #endif
876 /* The result is the hash value of the insn.
877 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
879 static unsigned int
880 asm_hash_insn (mnem)
881 const char * mnem;
883 return CGEN_ASM_HASH (mnem);
886 /* BUF is a pointer to the bytes of the insn, target order.
887 VALUE is the first base_insn_bitsize bits as an int in host order. */
889 static unsigned int
890 dis_hash_insn (buf, value)
891 const char * buf ATTRIBUTE_UNUSED;
892 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
894 return CGEN_DIS_HASH (buf, value);
897 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
899 static void
900 set_fields_bitsize (CGEN_FIELDS *fields, int size)
902 CGEN_FIELDS_BITSIZE (fields) = size;
905 /* Function to call before using the operand instance table.
906 This plugs the opcode entries and macro instructions into the cpu table. */
908 void
909 mt_cgen_init_opcode_table (CGEN_CPU_DESC cd)
911 int i;
912 int num_macros = (sizeof (mt_cgen_macro_insn_table) /
913 sizeof (mt_cgen_macro_insn_table[0]));
914 const CGEN_IBASE *ib = & mt_cgen_macro_insn_table[0];
915 const CGEN_OPCODE *oc = & mt_cgen_macro_insn_opcode_table[0];
916 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
918 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
919 for (i = 0; i < num_macros; ++i)
921 insns[i].base = &ib[i];
922 insns[i].opcode = &oc[i];
923 mt_cgen_build_insn_regex (& insns[i]);
925 cd->macro_insn_table.init_entries = insns;
926 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
927 cd->macro_insn_table.num_init_entries = num_macros;
929 oc = & mt_cgen_insn_opcode_table[0];
930 insns = (CGEN_INSN *) cd->insn_table.init_entries;
931 for (i = 0; i < MAX_INSNS; ++i)
933 insns[i].opcode = &oc[i];
934 mt_cgen_build_insn_regex (& insns[i]);
937 cd->sizeof_fields = sizeof (CGEN_FIELDS);
938 cd->set_fields_bitsize = set_fields_bitsize;
940 cd->asm_hash_p = asm_hash_insn_p;
941 cd->asm_hash = asm_hash_insn;
942 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
944 cd->dis_hash_p = dis_hash_insn_p;
945 cd->dis_hash = dis_hash_insn;
946 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;