1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
132 /* The following pseudo-registers are used for unwind directives only: */
140 DYNREG_GR
= 0, /* dynamic general purpose register */
141 DYNREG_FR
, /* dynamic floating point register */
142 DYNREG_PR
, /* dynamic predicate register */
146 enum operand_match_result
149 OPERAND_OUT_OF_RANGE
,
153 /* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
159 struct label_fix
*next
;
161 bfd_boolean dw2_mark_labels
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";{}";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0000000000LL
, /* L-"unit" nop immediate */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 struct unw_rec_list
*next
;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count
*next
;
708 unsigned long label_number
;
709 unsigned int prologue_count
;
710 } label_prologue_count
;
712 typedef struct proc_pending
715 struct proc_pending
*next
;
720 /* Maintain a list of unwind entries for the current function. */
724 /* Any unwind entires that should be attached to the current slot
725 that an insn is being constructed for. */
726 unw_rec_list
*current_entry
;
728 /* These are used to create the unwind table entry for this function. */
729 proc_pending proc_pending
;
730 symbolS
*info
; /* pointer to unwind info */
731 symbolS
*personality_routine
;
733 subsegT saved_text_subseg
;
734 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
736 /* TRUE if processing unwind directives in a prologue region. */
737 unsigned int prologue
: 1;
738 unsigned int prologue_mask
: 4;
739 unsigned int prologue_gr
: 7;
740 unsigned int body
: 1;
741 unsigned int insn
: 1;
742 unsigned int prologue_count
; /* number of .prologues seen so far */
743 /* Prologue counts at previous .label_state directives. */
744 struct label_prologue_count
* saved_prologue_counts
;
746 /* List of split up .save-s. */
747 unw_p_record
*pending_saves
;
750 /* The input value is a negated offset from psp, and specifies an address
751 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
752 must add 16 and divide by 4 to get the encoded value. */
754 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
756 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
758 /* Forward declarations: */
759 static void set_section
PARAMS ((char *name
));
760 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
761 unsigned int, unsigned int));
762 static void dot_align (int);
763 static void dot_radix
PARAMS ((int));
764 static void dot_special_section
PARAMS ((int));
765 static void dot_proc
PARAMS ((int));
766 static void dot_fframe
PARAMS ((int));
767 static void dot_vframe
PARAMS ((int));
768 static void dot_vframesp
PARAMS ((int));
769 static void dot_save
PARAMS ((int));
770 static void dot_restore
PARAMS ((int));
771 static void dot_restorereg
PARAMS ((int));
772 static void dot_handlerdata
PARAMS ((int));
773 static void dot_unwentry
PARAMS ((int));
774 static void dot_altrp
PARAMS ((int));
775 static void dot_savemem
PARAMS ((int));
776 static void dot_saveg
PARAMS ((int));
777 static void dot_savef
PARAMS ((int));
778 static void dot_saveb
PARAMS ((int));
779 static void dot_savegf
PARAMS ((int));
780 static void dot_spill
PARAMS ((int));
781 static void dot_spillreg
PARAMS ((int));
782 static void dot_spillmem
PARAMS ((int));
783 static void dot_label_state
PARAMS ((int));
784 static void dot_copy_state
PARAMS ((int));
785 static void dot_unwabi
PARAMS ((int));
786 static void dot_personality
PARAMS ((int));
787 static void dot_body
PARAMS ((int));
788 static void dot_prologue
PARAMS ((int));
789 static void dot_endp
PARAMS ((int));
790 static void dot_template
PARAMS ((int));
791 static void dot_regstk
PARAMS ((int));
792 static void dot_rot
PARAMS ((int));
793 static void dot_byteorder
PARAMS ((int));
794 static void dot_psr
PARAMS ((int));
795 static void dot_alias
PARAMS ((int));
796 static void dot_ln
PARAMS ((int));
797 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
798 static void dot_xdata
PARAMS ((int));
799 static void stmt_float_cons
PARAMS ((int));
800 static void stmt_cons_ua
PARAMS ((int));
801 static void dot_xfloat_cons
PARAMS ((int));
802 static void dot_xstringer
PARAMS ((int));
803 static void dot_xdata_ua
PARAMS ((int));
804 static void dot_xfloat_cons_ua
PARAMS ((int));
805 static void print_prmask
PARAMS ((valueT mask
));
806 static void dot_pred_rel
PARAMS ((int));
807 static void dot_reg_val
PARAMS ((int));
808 static void dot_serialize
PARAMS ((int));
809 static void dot_dv_mode
PARAMS ((int));
810 static void dot_entry
PARAMS ((int));
811 static void dot_mem_offset
PARAMS ((int));
812 static void add_unwind_entry
PARAMS((unw_rec_list
*, int));
813 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
814 static void declare_register_set
PARAMS ((const char *, int, int));
815 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
816 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
819 static int parse_operand
PARAMS ((expressionS
*, int));
820 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
821 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
822 static void emit_one_bundle
PARAMS ((void));
823 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
824 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
825 bfd_reloc_code_real_type r_type
));
826 static void insn_group_break
PARAMS ((int, int, int));
827 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
828 struct rsrc
*, int depind
, int path
));
829 static void add_qp_mutex
PARAMS((valueT mask
));
830 static void add_qp_imply
PARAMS((int p1
, int p2
));
831 static void clear_qp_branch_flag
PARAMS((valueT mask
));
832 static void clear_qp_mutex
PARAMS((valueT mask
));
833 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
834 static int has_suffix_p
PARAMS((const char *, const char *));
835 static void clear_register_values
PARAMS ((void));
836 static void print_dependency
PARAMS ((const char *action
, int depind
));
837 static void instruction_serialization
PARAMS ((void));
838 static void data_serialization
PARAMS ((void));
839 static void remove_marked_resource
PARAMS ((struct rsrc
*));
840 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
841 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
842 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
843 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
844 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
845 struct ia64_opcode
*, int, struct rsrc
[], int, int));
846 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
847 static void check_dependencies
PARAMS((struct ia64_opcode
*));
848 static void mark_resources
PARAMS((struct ia64_opcode
*));
849 static void update_dependencies
PARAMS((struct ia64_opcode
*));
850 static void note_register_values
PARAMS((struct ia64_opcode
*));
851 static int qp_mutex
PARAMS ((int, int, int));
852 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
853 static void output_vbyte_mem
PARAMS ((int, char *, char *));
854 static void count_output
PARAMS ((int, char *, char *));
855 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
856 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
857 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
858 static void output_P1_format
PARAMS ((vbyte_func
, int));
859 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
860 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
861 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
862 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
863 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
864 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
865 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
866 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
867 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
868 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
869 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
870 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
871 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
872 static char format_ab_reg
PARAMS ((int, int));
873 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
875 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
876 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
878 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
879 static unw_rec_list
*output_endp
PARAMS ((void));
880 static unw_rec_list
*output_prologue
PARAMS ((void));
881 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
882 static unw_rec_list
*output_body
PARAMS ((void));
883 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
884 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
885 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
886 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
887 static unw_rec_list
*output_rp_when
PARAMS ((void));
888 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
889 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
890 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
891 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_pfs_when
PARAMS ((void));
893 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
894 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
895 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
896 static unw_rec_list
*output_preds_when
PARAMS ((void));
897 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
898 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
899 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
900 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
901 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
902 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
903 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
904 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
905 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
906 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
907 static unw_rec_list
*output_unat_when
PARAMS ((void));
908 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
909 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
910 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
911 static unw_rec_list
*output_lc_when
PARAMS ((void));
912 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
913 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
915 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
916 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
917 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
919 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
920 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
921 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
922 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
923 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bsp_when
PARAMS ((void));
925 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
926 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
927 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
928 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
929 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
930 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
931 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
932 static unw_rec_list
*output_rnat_when
PARAMS ((void));
933 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
934 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
935 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
936 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
937 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
938 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
939 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
940 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int,
942 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int,
944 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
945 unsigned int, unsigned int));
946 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
947 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
948 static int calc_record_size
PARAMS ((unw_rec_list
*));
949 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
950 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
951 unsigned long, fragS
*,
953 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
954 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
955 static int parse_predicate_and_operand
PARAMS ((expressionS
*, unsigned *, const char *));
956 static void convert_expr_to_ab_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
957 static void convert_expr_to_xy_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
958 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
959 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
960 static void free_saved_prologue_counts
PARAMS ((void));
962 /* Determine if application register REGNUM resides only in the integer
963 unit (as opposed to the memory unit). */
965 ar_is_only_in_integer_unit (int reg
)
968 return reg
>= 64 && reg
<= 111;
971 /* Determine if application register REGNUM resides only in the memory
972 unit (as opposed to the integer unit). */
974 ar_is_only_in_memory_unit (int reg
)
977 return reg
>= 0 && reg
<= 47;
980 /* Switch to section NAME and create section if necessary. It's
981 rather ugly that we have to manipulate input_line_pointer but I
982 don't see any other way to accomplish the same thing without
983 changing obj-elf.c (which may be the Right Thing, in the end). */
988 char *saved_input_line_pointer
;
990 saved_input_line_pointer
= input_line_pointer
;
991 input_line_pointer
= name
;
993 input_line_pointer
= saved_input_line_pointer
;
996 /* Map 's' to SHF_IA_64_SHORT. */
999 ia64_elf_section_letter (letter
, ptr_msg
)
1004 return SHF_IA_64_SHORT
;
1005 else if (letter
== 'o')
1006 return SHF_LINK_ORDER
;
1008 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1012 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1015 ia64_elf_section_flags (flags
, attr
, type
)
1017 int attr
, type ATTRIBUTE_UNUSED
;
1019 if (attr
& SHF_IA_64_SHORT
)
1020 flags
|= SEC_SMALL_DATA
;
1025 ia64_elf_section_type (str
, len
)
1029 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1031 if (STREQ (ELF_STRING_ia64_unwind_info
))
1032 return SHT_PROGBITS
;
1034 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1035 return SHT_PROGBITS
;
1037 if (STREQ (ELF_STRING_ia64_unwind
))
1038 return SHT_IA_64_UNWIND
;
1040 if (STREQ (ELF_STRING_ia64_unwind_once
))
1041 return SHT_IA_64_UNWIND
;
1043 if (STREQ ("unwind"))
1044 return SHT_IA_64_UNWIND
;
1051 set_regstack (ins
, locs
, outs
, rots
)
1052 unsigned int ins
, locs
, outs
, rots
;
1054 /* Size of frame. */
1057 sof
= ins
+ locs
+ outs
;
1060 as_bad ("Size of frame exceeds maximum of 96 registers");
1065 as_warn ("Size of rotating registers exceeds frame size");
1068 md
.in
.base
= REG_GR
+ 32;
1069 md
.loc
.base
= md
.in
.base
+ ins
;
1070 md
.out
.base
= md
.loc
.base
+ locs
;
1072 md
.in
.num_regs
= ins
;
1073 md
.loc
.num_regs
= locs
;
1074 md
.out
.num_regs
= outs
;
1075 md
.rot
.num_regs
= rots
;
1082 struct label_fix
*lfix
;
1084 subsegT saved_subseg
;
1088 if (!md
.last_text_seg
)
1091 saved_seg
= now_seg
;
1092 saved_subseg
= now_subseg
;
1094 subseg_set (md
.last_text_seg
, 0);
1096 while (md
.num_slots_in_use
> 0)
1097 emit_one_bundle (); /* force out queued instructions */
1099 /* In case there are labels following the last instruction, resolve
1102 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1104 symbol_set_value_now (lfix
->sym
);
1105 mark
|= lfix
->dw2_mark_labels
;
1109 dwarf2_where (&CURR_SLOT
.debug_line
);
1110 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
1111 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
1113 CURR_SLOT
.label_fixups
= 0;
1115 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1116 symbol_set_value_now (lfix
->sym
);
1117 CURR_SLOT
.tag_fixups
= 0;
1119 /* In case there are unwind directives following the last instruction,
1120 resolve those now. We only handle prologue, body, and endp directives
1121 here. Give an error for others. */
1122 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1124 switch (ptr
->r
.type
)
1130 ptr
->slot_number
= (unsigned long) frag_more (0);
1131 ptr
->slot_frag
= frag_now
;
1134 /* Allow any record which doesn't have a "t" field (i.e.,
1135 doesn't relate to a particular instruction). */
1151 as_bad (_("Unwind directive not followed by an instruction."));
1155 unwind
.current_entry
= NULL
;
1157 subseg_set (saved_seg
, saved_subseg
);
1159 if (md
.qp
.X_op
== O_register
)
1160 as_bad ("qualifying predicate not followed by instruction");
1164 ia64_do_align (int nbytes
)
1166 char *saved_input_line_pointer
= input_line_pointer
;
1168 input_line_pointer
= "";
1169 s_align_bytes (nbytes
);
1170 input_line_pointer
= saved_input_line_pointer
;
1174 ia64_cons_align (nbytes
)
1179 char *saved_input_line_pointer
= input_line_pointer
;
1180 input_line_pointer
= "";
1181 s_align_bytes (nbytes
);
1182 input_line_pointer
= saved_input_line_pointer
;
1186 /* Output COUNT bytes to a memory location. */
1187 static char *vbyte_mem_ptr
= NULL
;
1190 output_vbyte_mem (count
, ptr
, comment
)
1193 char *comment ATTRIBUTE_UNUSED
;
1196 if (vbyte_mem_ptr
== NULL
)
1201 for (x
= 0; x
< count
; x
++)
1202 *(vbyte_mem_ptr
++) = ptr
[x
];
1205 /* Count the number of bytes required for records. */
1206 static int vbyte_count
= 0;
1208 count_output (count
, ptr
, comment
)
1210 char *ptr ATTRIBUTE_UNUSED
;
1211 char *comment ATTRIBUTE_UNUSED
;
1213 vbyte_count
+= count
;
1217 output_R1_format (f
, rtype
, rlen
)
1219 unw_record_type rtype
;
1226 output_R3_format (f
, rtype
, rlen
);
1232 else if (rtype
!= prologue
)
1233 as_bad ("record type is not valid");
1235 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1236 (*f
) (1, &byte
, NULL
);
1240 output_R2_format (f
, mask
, grsave
, rlen
)
1247 mask
= (mask
& 0x0f);
1248 grsave
= (grsave
& 0x7f);
1250 bytes
[0] = (UNW_R2
| (mask
>> 1));
1251 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1252 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1253 (*f
) (count
, bytes
, NULL
);
1257 output_R3_format (f
, rtype
, rlen
)
1259 unw_record_type rtype
;
1266 output_R1_format (f
, rtype
, rlen
);
1272 else if (rtype
!= prologue
)
1273 as_bad ("record type is not valid");
1274 bytes
[0] = (UNW_R3
| r
);
1275 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1276 (*f
) (count
+ 1, bytes
, NULL
);
1280 output_P1_format (f
, brmask
)
1285 byte
= UNW_P1
| (brmask
& 0x1f);
1286 (*f
) (1, &byte
, NULL
);
1290 output_P2_format (f
, brmask
, gr
)
1296 brmask
= (brmask
& 0x1f);
1297 bytes
[0] = UNW_P2
| (brmask
>> 1);
1298 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1299 (*f
) (2, bytes
, NULL
);
1303 output_P3_format (f
, rtype
, reg
)
1305 unw_record_type rtype
;
1350 as_bad ("Invalid record type for P3 format.");
1352 bytes
[0] = (UNW_P3
| (r
>> 1));
1353 bytes
[1] = (((r
& 1) << 7) | reg
);
1354 (*f
) (2, bytes
, NULL
);
1358 output_P4_format (f
, imask
, imask_size
)
1360 unsigned char *imask
;
1361 unsigned long imask_size
;
1364 (*f
) (imask_size
, (char *) imask
, NULL
);
1368 output_P5_format (f
, grmask
, frmask
)
1371 unsigned long frmask
;
1374 grmask
= (grmask
& 0x0f);
1377 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1378 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1379 bytes
[3] = (frmask
& 0x000000ff);
1380 (*f
) (4, bytes
, NULL
);
1384 output_P6_format (f
, rtype
, rmask
)
1386 unw_record_type rtype
;
1392 if (rtype
== gr_mem
)
1394 else if (rtype
!= fr_mem
)
1395 as_bad ("Invalid record type for format P6");
1396 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1397 (*f
) (1, &byte
, NULL
);
1401 output_P7_format (f
, rtype
, w1
, w2
)
1403 unw_record_type rtype
;
1410 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1415 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1465 bytes
[0] = (UNW_P7
| r
);
1466 (*f
) (count
, bytes
, NULL
);
1470 output_P8_format (f
, rtype
, t
)
1472 unw_record_type rtype
;
1511 case bspstore_psprel
:
1514 case bspstore_sprel
:
1526 case priunat_when_gr
:
1529 case priunat_psprel
:
1535 case priunat_when_mem
:
1542 count
+= output_leb128 (bytes
+ 2, t
, 0);
1543 (*f
) (count
, bytes
, NULL
);
1547 output_P9_format (f
, grmask
, gr
)
1554 bytes
[1] = (grmask
& 0x0f);
1555 bytes
[2] = (gr
& 0x7f);
1556 (*f
) (3, bytes
, NULL
);
1560 output_P10_format (f
, abi
, context
)
1567 bytes
[1] = (abi
& 0xff);
1568 bytes
[2] = (context
& 0xff);
1569 (*f
) (3, bytes
, NULL
);
1573 output_B1_format (f
, rtype
, label
)
1575 unw_record_type rtype
;
1576 unsigned long label
;
1582 output_B4_format (f
, rtype
, label
);
1585 if (rtype
== copy_state
)
1587 else if (rtype
!= label_state
)
1588 as_bad ("Invalid record type for format B1");
1590 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1591 (*f
) (1, &byte
, NULL
);
1595 output_B2_format (f
, ecount
, t
)
1597 unsigned long ecount
;
1604 output_B3_format (f
, ecount
, t
);
1607 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1608 count
+= output_leb128 (bytes
+ 1, t
, 0);
1609 (*f
) (count
, bytes
, NULL
);
1613 output_B3_format (f
, ecount
, t
)
1615 unsigned long ecount
;
1622 output_B2_format (f
, ecount
, t
);
1626 count
+= output_leb128 (bytes
+ 1, t
, 0);
1627 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1628 (*f
) (count
, bytes
, NULL
);
1632 output_B4_format (f
, rtype
, label
)
1634 unw_record_type rtype
;
1635 unsigned long label
;
1642 output_B1_format (f
, rtype
, label
);
1646 if (rtype
== copy_state
)
1648 else if (rtype
!= label_state
)
1649 as_bad ("Invalid record type for format B1");
1651 bytes
[0] = (UNW_B4
| (r
<< 3));
1652 count
+= output_leb128 (bytes
+ 1, label
, 0);
1653 (*f
) (count
, bytes
, NULL
);
1657 format_ab_reg (ab
, reg
)
1664 ret
= (ab
<< 5) | reg
;
1669 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1671 unw_record_type rtype
;
1681 if (rtype
== spill_sprel
)
1683 else if (rtype
!= spill_psprel
)
1684 as_bad ("Invalid record type for format X1");
1685 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1686 count
+= output_leb128 (bytes
+ 2, t
, 0);
1687 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1688 (*f
) (count
, bytes
, NULL
);
1692 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1701 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1702 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1703 count
+= output_leb128 (bytes
+ 3, t
, 0);
1704 (*f
) (count
, bytes
, NULL
);
1708 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1710 unw_record_type rtype
;
1721 if (rtype
== spill_sprel_p
)
1723 else if (rtype
!= spill_psprel_p
)
1724 as_bad ("Invalid record type for format X3");
1725 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1726 bytes
[2] = format_ab_reg (ab
, reg
);
1727 count
+= output_leb128 (bytes
+ 3, t
, 0);
1728 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1729 (*f
) (count
, bytes
, NULL
);
1733 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1743 bytes
[1] = (qp
& 0x3f);
1744 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1745 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1746 count
+= output_leb128 (bytes
+ 4, t
, 0);
1747 (*f
) (count
, bytes
, NULL
);
1750 /* This function checks whether there are any outstanding .save-s and
1751 discards them if so. */
1754 check_pending_save (void)
1756 if (unwind
.pending_saves
)
1758 unw_rec_list
*cur
, *prev
;
1760 as_warn ("Previous .save incomplete");
1761 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1762 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1765 prev
->next
= cur
->next
;
1767 unwind
.list
= cur
->next
;
1768 if (cur
== unwind
.tail
)
1770 if (cur
== unwind
.current_entry
)
1771 unwind
.current_entry
= cur
->next
;
1772 /* Don't free the first discarded record, it's being used as
1773 terminator for (currently) br_gr and gr_gr processing, and
1774 also prevents leaving a dangling pointer to it in its
1776 cur
->r
.record
.p
.grmask
= 0;
1777 cur
->r
.record
.p
.brmask
= 0;
1778 cur
->r
.record
.p
.frmask
= 0;
1779 prev
= cur
->r
.record
.p
.next
;
1780 cur
->r
.record
.p
.next
= NULL
;
1792 cur
= cur
->r
.record
.p
.next
;
1795 unwind
.pending_saves
= NULL
;
1799 /* This function allocates a record list structure, and initializes fields. */
1801 static unw_rec_list
*
1802 alloc_record (unw_record_type t
)
1805 ptr
= xmalloc (sizeof (*ptr
));
1806 memset (ptr
, 0, sizeof (*ptr
));
1807 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1812 /* Dummy unwind record used for calculating the length of the last prologue or
1815 static unw_rec_list
*
1818 unw_rec_list
*ptr
= alloc_record (endp
);
1822 static unw_rec_list
*
1825 unw_rec_list
*ptr
= alloc_record (prologue
);
1826 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1830 static unw_rec_list
*
1831 output_prologue_gr (saved_mask
, reg
)
1832 unsigned int saved_mask
;
1835 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1836 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1837 ptr
->r
.record
.r
.grmask
= saved_mask
;
1838 ptr
->r
.record
.r
.grsave
= reg
;
1842 static unw_rec_list
*
1845 unw_rec_list
*ptr
= alloc_record (body
);
1849 static unw_rec_list
*
1850 output_mem_stack_f (size
)
1853 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1854 ptr
->r
.record
.p
.size
= size
;
1858 static unw_rec_list
*
1859 output_mem_stack_v ()
1861 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1865 static unw_rec_list
*
1869 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1870 ptr
->r
.record
.p
.r
.gr
= gr
;
1874 static unw_rec_list
*
1875 output_psp_sprel (offset
)
1876 unsigned int offset
;
1878 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1879 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1883 static unw_rec_list
*
1886 unw_rec_list
*ptr
= alloc_record (rp_when
);
1890 static unw_rec_list
*
1894 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1895 ptr
->r
.record
.p
.r
.gr
= gr
;
1899 static unw_rec_list
*
1903 unw_rec_list
*ptr
= alloc_record (rp_br
);
1904 ptr
->r
.record
.p
.r
.br
= br
;
1908 static unw_rec_list
*
1909 output_rp_psprel (offset
)
1910 unsigned int offset
;
1912 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1913 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1917 static unw_rec_list
*
1918 output_rp_sprel (offset
)
1919 unsigned int offset
;
1921 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1922 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1926 static unw_rec_list
*
1929 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1933 static unw_rec_list
*
1937 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1938 ptr
->r
.record
.p
.r
.gr
= gr
;
1942 static unw_rec_list
*
1943 output_pfs_psprel (offset
)
1944 unsigned int offset
;
1946 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1947 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1951 static unw_rec_list
*
1952 output_pfs_sprel (offset
)
1953 unsigned int offset
;
1955 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1956 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1960 static unw_rec_list
*
1961 output_preds_when ()
1963 unw_rec_list
*ptr
= alloc_record (preds_when
);
1967 static unw_rec_list
*
1968 output_preds_gr (gr
)
1971 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1972 ptr
->r
.record
.p
.r
.gr
= gr
;
1976 static unw_rec_list
*
1977 output_preds_psprel (offset
)
1978 unsigned int offset
;
1980 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1981 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1985 static unw_rec_list
*
1986 output_preds_sprel (offset
)
1987 unsigned int offset
;
1989 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1990 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1994 static unw_rec_list
*
1995 output_fr_mem (mask
)
1998 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1999 unw_rec_list
*cur
= ptr
;
2001 ptr
->r
.record
.p
.frmask
= mask
;
2002 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2005 unw_rec_list
*prev
= cur
;
2007 /* Clear least significant set bit. */
2008 mask
&= ~(mask
& (~mask
+ 1));
2011 cur
= alloc_record (fr_mem
);
2012 cur
->r
.record
.p
.frmask
= mask
;
2013 /* Retain only least significant bit. */
2014 prev
->r
.record
.p
.frmask
^= mask
;
2015 prev
->r
.record
.p
.next
= cur
;
2019 static unw_rec_list
*
2020 output_frgr_mem (gr_mask
, fr_mask
)
2021 unsigned int gr_mask
;
2022 unsigned int fr_mask
;
2024 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
2025 unw_rec_list
*cur
= ptr
;
2027 unwind
.pending_saves
= &cur
->r
.record
.p
;
2028 cur
->r
.record
.p
.frmask
= fr_mask
;
2031 unw_rec_list
*prev
= cur
;
2033 /* Clear least significant set bit. */
2034 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
2035 if (!gr_mask
&& !fr_mask
)
2037 cur
= alloc_record (frgr_mem
);
2038 cur
->r
.record
.p
.frmask
= fr_mask
;
2039 /* Retain only least significant bit. */
2040 prev
->r
.record
.p
.frmask
^= fr_mask
;
2041 prev
->r
.record
.p
.next
= cur
;
2043 cur
->r
.record
.p
.grmask
= gr_mask
;
2046 unw_rec_list
*prev
= cur
;
2048 /* Clear least significant set bit. */
2049 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
2052 cur
= alloc_record (frgr_mem
);
2053 cur
->r
.record
.p
.grmask
= gr_mask
;
2054 /* Retain only least significant bit. */
2055 prev
->r
.record
.p
.grmask
^= gr_mask
;
2056 prev
->r
.record
.p
.next
= cur
;
2060 static unw_rec_list
*
2061 output_gr_gr (mask
, reg
)
2065 unw_rec_list
*ptr
= alloc_record (gr_gr
);
2066 unw_rec_list
*cur
= ptr
;
2068 ptr
->r
.record
.p
.grmask
= mask
;
2069 ptr
->r
.record
.p
.r
.gr
= reg
;
2070 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2073 unw_rec_list
*prev
= cur
;
2075 /* Clear least significant set bit. */
2076 mask
&= ~(mask
& (~mask
+ 1));
2079 cur
= alloc_record (gr_gr
);
2080 cur
->r
.record
.p
.grmask
= mask
;
2081 /* Indicate this record shouldn't be output. */
2082 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2083 /* Retain only least significant bit. */
2084 prev
->r
.record
.p
.grmask
^= mask
;
2085 prev
->r
.record
.p
.next
= cur
;
2089 static unw_rec_list
*
2090 output_gr_mem (mask
)
2093 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2094 unw_rec_list
*cur
= ptr
;
2096 ptr
->r
.record
.p
.grmask
= mask
;
2097 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2100 unw_rec_list
*prev
= cur
;
2102 /* Clear least significant set bit. */
2103 mask
&= ~(mask
& (~mask
+ 1));
2106 cur
= alloc_record (gr_mem
);
2107 cur
->r
.record
.p
.grmask
= mask
;
2108 /* Retain only least significant bit. */
2109 prev
->r
.record
.p
.grmask
^= mask
;
2110 prev
->r
.record
.p
.next
= cur
;
2114 static unw_rec_list
*
2115 output_br_mem (unsigned int mask
)
2117 unw_rec_list
*ptr
= alloc_record (br_mem
);
2118 unw_rec_list
*cur
= ptr
;
2120 ptr
->r
.record
.p
.brmask
= mask
;
2121 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2124 unw_rec_list
*prev
= cur
;
2126 /* Clear least significant set bit. */
2127 mask
&= ~(mask
& (~mask
+ 1));
2130 cur
= alloc_record (br_mem
);
2131 cur
->r
.record
.p
.brmask
= mask
;
2132 /* Retain only least significant bit. */
2133 prev
->r
.record
.p
.brmask
^= mask
;
2134 prev
->r
.record
.p
.next
= cur
;
2138 static unw_rec_list
*
2139 output_br_gr (mask
, reg
)
2143 unw_rec_list
*ptr
= alloc_record (br_gr
);
2144 unw_rec_list
*cur
= ptr
;
2146 ptr
->r
.record
.p
.brmask
= mask
;
2147 ptr
->r
.record
.p
.r
.gr
= reg
;
2148 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2151 unw_rec_list
*prev
= cur
;
2153 /* Clear least significant set bit. */
2154 mask
&= ~(mask
& (~mask
+ 1));
2157 cur
= alloc_record (br_gr
);
2158 cur
->r
.record
.p
.brmask
= mask
;
2159 /* Indicate this record shouldn't be output. */
2160 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2161 /* Retain only least significant bit. */
2162 prev
->r
.record
.p
.brmask
^= mask
;
2163 prev
->r
.record
.p
.next
= cur
;
2167 static unw_rec_list
*
2168 output_spill_base (offset
)
2169 unsigned int offset
;
2171 unw_rec_list
*ptr
= alloc_record (spill_base
);
2172 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2176 static unw_rec_list
*
2179 unw_rec_list
*ptr
= alloc_record (unat_when
);
2183 static unw_rec_list
*
2187 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2188 ptr
->r
.record
.p
.r
.gr
= gr
;
2192 static unw_rec_list
*
2193 output_unat_psprel (offset
)
2194 unsigned int offset
;
2196 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2197 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2201 static unw_rec_list
*
2202 output_unat_sprel (offset
)
2203 unsigned int offset
;
2205 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2206 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2210 static unw_rec_list
*
2213 unw_rec_list
*ptr
= alloc_record (lc_when
);
2217 static unw_rec_list
*
2221 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2222 ptr
->r
.record
.p
.r
.gr
= gr
;
2226 static unw_rec_list
*
2227 output_lc_psprel (offset
)
2228 unsigned int offset
;
2230 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2231 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2235 static unw_rec_list
*
2236 output_lc_sprel (offset
)
2237 unsigned int offset
;
2239 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2240 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2244 static unw_rec_list
*
2247 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2251 static unw_rec_list
*
2255 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2256 ptr
->r
.record
.p
.r
.gr
= gr
;
2260 static unw_rec_list
*
2261 output_fpsr_psprel (offset
)
2262 unsigned int offset
;
2264 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2265 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2269 static unw_rec_list
*
2270 output_fpsr_sprel (offset
)
2271 unsigned int offset
;
2273 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2274 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2278 static unw_rec_list
*
2279 output_priunat_when_gr ()
2281 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2285 static unw_rec_list
*
2286 output_priunat_when_mem ()
2288 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2292 static unw_rec_list
*
2293 output_priunat_gr (gr
)
2296 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2297 ptr
->r
.record
.p
.r
.gr
= gr
;
2301 static unw_rec_list
*
2302 output_priunat_psprel (offset
)
2303 unsigned int offset
;
2305 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2306 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2310 static unw_rec_list
*
2311 output_priunat_sprel (offset
)
2312 unsigned int offset
;
2314 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2315 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2319 static unw_rec_list
*
2322 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2326 static unw_rec_list
*
2330 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2331 ptr
->r
.record
.p
.r
.gr
= gr
;
2335 static unw_rec_list
*
2336 output_bsp_psprel (offset
)
2337 unsigned int offset
;
2339 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2340 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2344 static unw_rec_list
*
2345 output_bsp_sprel (offset
)
2346 unsigned int offset
;
2348 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2349 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2353 static unw_rec_list
*
2354 output_bspstore_when ()
2356 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2360 static unw_rec_list
*
2361 output_bspstore_gr (gr
)
2364 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2365 ptr
->r
.record
.p
.r
.gr
= gr
;
2369 static unw_rec_list
*
2370 output_bspstore_psprel (offset
)
2371 unsigned int offset
;
2373 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2374 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2378 static unw_rec_list
*
2379 output_bspstore_sprel (offset
)
2380 unsigned int offset
;
2382 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2383 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2387 static unw_rec_list
*
2390 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2394 static unw_rec_list
*
2398 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2399 ptr
->r
.record
.p
.r
.gr
= gr
;
2403 static unw_rec_list
*
2404 output_rnat_psprel (offset
)
2405 unsigned int offset
;
2407 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2408 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2412 static unw_rec_list
*
2413 output_rnat_sprel (offset
)
2414 unsigned int offset
;
2416 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2417 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2421 static unw_rec_list
*
2422 output_unwabi (abi
, context
)
2424 unsigned long context
;
2426 unw_rec_list
*ptr
= alloc_record (unwabi
);
2427 ptr
->r
.record
.p
.abi
= abi
;
2428 ptr
->r
.record
.p
.context
= context
;
2432 static unw_rec_list
*
2433 output_epilogue (unsigned long ecount
)
2435 unw_rec_list
*ptr
= alloc_record (epilogue
);
2436 ptr
->r
.record
.b
.ecount
= ecount
;
2440 static unw_rec_list
*
2441 output_label_state (unsigned long label
)
2443 unw_rec_list
*ptr
= alloc_record (label_state
);
2444 ptr
->r
.record
.b
.label
= label
;
2448 static unw_rec_list
*
2449 output_copy_state (unsigned long label
)
2451 unw_rec_list
*ptr
= alloc_record (copy_state
);
2452 ptr
->r
.record
.b
.label
= label
;
2456 static unw_rec_list
*
2457 output_spill_psprel (ab
, reg
, offset
, predicate
)
2460 unsigned int offset
;
2461 unsigned int predicate
;
2463 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2464 ptr
->r
.record
.x
.ab
= ab
;
2465 ptr
->r
.record
.x
.reg
= reg
;
2466 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2467 ptr
->r
.record
.x
.qp
= predicate
;
2471 static unw_rec_list
*
2472 output_spill_sprel (ab
, reg
, offset
, predicate
)
2475 unsigned int offset
;
2476 unsigned int predicate
;
2478 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2479 ptr
->r
.record
.x
.ab
= ab
;
2480 ptr
->r
.record
.x
.reg
= reg
;
2481 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2482 ptr
->r
.record
.x
.qp
= predicate
;
2486 static unw_rec_list
*
2487 output_spill_reg (ab
, reg
, targ_reg
, xy
, predicate
)
2490 unsigned int targ_reg
;
2492 unsigned int predicate
;
2494 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2495 ptr
->r
.record
.x
.ab
= ab
;
2496 ptr
->r
.record
.x
.reg
= reg
;
2497 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2498 ptr
->r
.record
.x
.xy
= xy
;
2499 ptr
->r
.record
.x
.qp
= predicate
;
2503 /* Given a unw_rec_list process the correct format with the
2504 specified function. */
2507 process_one_record (ptr
, f
)
2511 unsigned int fr_mask
, gr_mask
;
2513 switch (ptr
->r
.type
)
2515 /* This is a dummy record that takes up no space in the output. */
2523 /* These are taken care of by prologue/prologue_gr. */
2528 if (ptr
->r
.type
== prologue_gr
)
2529 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2530 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2532 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2534 /* Output descriptor(s) for union of register spills (if any). */
2535 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2536 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2539 if ((fr_mask
& ~0xfUL
) == 0)
2540 output_P6_format (f
, fr_mem
, fr_mask
);
2543 output_P5_format (f
, gr_mask
, fr_mask
);
2548 output_P6_format (f
, gr_mem
, gr_mask
);
2549 if (ptr
->r
.record
.r
.mask
.br_mem
)
2550 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2552 /* output imask descriptor if necessary: */
2553 if (ptr
->r
.record
.r
.mask
.i
)
2554 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2555 ptr
->r
.record
.r
.imask_size
);
2559 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2563 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2564 ptr
->r
.record
.p
.size
);
2577 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2580 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2583 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2591 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2600 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2610 case bspstore_sprel
:
2612 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2615 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2617 const unw_rec_list
*cur
= ptr
;
2619 gr_mask
= cur
->r
.record
.p
.grmask
;
2620 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2621 gr_mask
|= cur
->r
.record
.p
.grmask
;
2622 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2626 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2628 const unw_rec_list
*cur
= ptr
;
2630 gr_mask
= cur
->r
.record
.p
.brmask
;
2631 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2632 gr_mask
|= cur
->r
.record
.p
.brmask
;
2633 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2637 as_bad ("spill_mask record unimplemented.");
2639 case priunat_when_gr
:
2640 case priunat_when_mem
:
2644 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2646 case priunat_psprel
:
2648 case bspstore_psprel
:
2650 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2653 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2656 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2660 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2663 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2664 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2665 ptr
->r
.record
.x
.where
.pspoff
);
2668 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2669 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2670 ptr
->r
.record
.x
.where
.spoff
);
2673 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2674 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2675 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2677 case spill_psprel_p
:
2678 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2679 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2680 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2683 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2684 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2685 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2688 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2689 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2690 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2694 as_bad ("record_type_not_valid");
2699 /* Given a unw_rec_list list, process all the records with
2700 the specified function. */
2702 process_unw_records (list
, f
)
2707 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2708 process_one_record (ptr
, f
);
2711 /* Determine the size of a record list in bytes. */
2713 calc_record_size (list
)
2717 process_unw_records (list
, count_output
);
2721 /* Return the number of bits set in the input value.
2722 Perhaps this has a better place... */
2723 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2724 # define popcount __builtin_popcount
2727 popcount (unsigned x
)
2729 static const unsigned char popcnt
[16] =
2737 if (x
< NELEMS (popcnt
))
2739 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2743 /* Update IMASK bitmask to reflect the fact that one or more registers
2744 of type TYPE are saved starting at instruction with index T. If N
2745 bits are set in REGMASK, it is assumed that instructions T through
2746 T+N-1 save these registers.
2750 1: instruction saves next fp reg
2751 2: instruction saves next general reg
2752 3: instruction saves next branch reg */
2754 set_imask (region
, regmask
, t
, type
)
2755 unw_rec_list
*region
;
2756 unsigned long regmask
;
2760 unsigned char *imask
;
2761 unsigned long imask_size
;
2765 imask
= region
->r
.record
.r
.mask
.i
;
2766 imask_size
= region
->r
.record
.r
.imask_size
;
2769 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2770 imask
= xmalloc (imask_size
);
2771 memset (imask
, 0, imask_size
);
2773 region
->r
.record
.r
.imask_size
= imask_size
;
2774 region
->r
.record
.r
.mask
.i
= imask
;
2778 pos
= 2 * (3 - t
% 4);
2781 if (i
>= imask_size
)
2783 as_bad ("Ignoring attempt to spill beyond end of region");
2787 imask
[i
] |= (type
& 0x3) << pos
;
2789 regmask
&= (regmask
- 1);
2799 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2800 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2801 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2805 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2806 unsigned long slot_addr
;
2808 unsigned long first_addr
;
2812 unsigned long index
= 0;
2814 /* First time we are called, the initial address and frag are invalid. */
2815 if (first_addr
== 0)
2818 /* If the two addresses are in different frags, then we need to add in
2819 the remaining size of this frag, and then the entire size of intermediate
2821 while (slot_frag
!= first_frag
)
2823 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2827 /* We can get the final addresses only during and after
2829 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2830 index
+= 3 * ((first_frag
->fr_next
->fr_address
2831 - first_frag
->fr_address
2832 - first_frag
->fr_fix
) >> 4);
2835 /* We don't know what the final addresses will be. We try our
2836 best to estimate. */
2837 switch (first_frag
->fr_type
)
2843 as_fatal ("only constant space allocation is supported");
2849 /* Take alignment into account. Assume the worst case
2850 before relaxation. */
2851 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2855 if (first_frag
->fr_symbol
)
2857 as_fatal ("only constant offsets are supported");
2861 index
+= 3 * (first_frag
->fr_offset
>> 4);
2865 /* Add in the full size of the frag converted to instruction slots. */
2866 index
+= 3 * (first_frag
->fr_fix
>> 4);
2867 /* Subtract away the initial part before first_addr. */
2868 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2869 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2871 /* Move to the beginning of the next frag. */
2872 first_frag
= first_frag
->fr_next
;
2873 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2875 /* This can happen if there is section switching in the middle of a
2876 function, causing the frag chain for the function to be broken. */
2877 if (first_frag
== NULL
)
2879 /* We get six warnings for one problem, because of the loop in
2880 fixup_unw_records, and because fixup_unw_records is called 3
2881 times: once before creating the variant frag, once to estimate
2882 its size, and once to relax it. This is unreasonable, so we use
2883 a static var to make sure we only emit the warning once. */
2884 static int warned
= 0;
2888 as_warn ("Corrupted unwind info due to unsupported section switching");
2896 /* Add in the used part of the last frag. */
2897 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2898 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2902 /* Optimize unwind record directives. */
2904 static unw_rec_list
*
2905 optimize_unw_records (list
)
2911 /* If the only unwind record is ".prologue" or ".prologue" followed
2912 by ".body", then we can optimize the unwind directives away. */
2913 if (list
->r
.type
== prologue
2914 && (list
->next
->r
.type
== endp
2915 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2921 /* Given a complete record list, process any records which have
2922 unresolved fields, (ie length counts for a prologue). After
2923 this has been run, all necessary information should be available
2924 within each record to generate an image. */
2927 fixup_unw_records (list
, before_relax
)
2931 unw_rec_list
*ptr
, *region
= 0;
2932 unsigned long first_addr
= 0, rlen
= 0, t
;
2933 fragS
*first_frag
= 0;
2935 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2937 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2938 as_bad (" Insn slot not set in unwind record.");
2939 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2940 first_addr
, first_frag
, before_relax
);
2941 switch (ptr
->r
.type
)
2949 unsigned long last_addr
= 0;
2950 fragS
*last_frag
= NULL
;
2952 first_addr
= ptr
->slot_number
;
2953 first_frag
= ptr
->slot_frag
;
2954 /* Find either the next body/prologue start, or the end of
2955 the function, and determine the size of the region. */
2956 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2957 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2958 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2960 last_addr
= last
->slot_number
;
2961 last_frag
= last
->slot_frag
;
2964 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2966 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2967 if (ptr
->r
.type
== body
)
2968 /* End of region. */
2976 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2978 /* This happens when a memory-stack-less procedure uses a
2979 ".restore sp" directive at the end of a region to pop
2981 ptr
->r
.record
.b
.t
= 0;
2992 case priunat_when_gr
:
2993 case priunat_when_mem
:
2997 ptr
->r
.record
.p
.t
= t
;
3005 case spill_psprel_p
:
3006 ptr
->r
.record
.x
.t
= t
;
3012 as_bad ("frgr_mem record before region record!");
3015 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3016 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3017 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3018 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3023 as_bad ("fr_mem record before region record!");
3026 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3027 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3032 as_bad ("gr_mem record before region record!");
3035 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3036 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3041 as_bad ("br_mem record before region record!");
3044 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
3045 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3051 as_bad ("gr_gr record before region record!");
3054 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3059 as_bad ("br_gr record before region record!");
3062 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3071 /* Estimate the size of a frag before relaxing. We only have one type of frag
3072 to handle here, which is the unwind info frag. */
3075 ia64_estimate_size_before_relax (fragS
*frag
,
3076 asection
*segtype ATTRIBUTE_UNUSED
)
3081 /* ??? This code is identical to the first part of ia64_convert_frag. */
3082 list
= (unw_rec_list
*) frag
->fr_opcode
;
3083 fixup_unw_records (list
, 0);
3085 len
= calc_record_size (list
);
3086 /* pad to pointer-size boundary. */
3087 pad
= len
% md
.pointer_size
;
3089 len
+= md
.pointer_size
- pad
;
3090 /* Add 8 for the header. */
3092 /* Add a pointer for the personality offset. */
3093 if (frag
->fr_offset
)
3094 size
+= md
.pointer_size
;
3096 /* fr_var carries the max_chars that we created the fragment with.
3097 We must, of course, have allocated enough memory earlier. */
3098 assert (frag
->fr_var
>= size
);
3100 return frag
->fr_fix
+ size
;
3103 /* This function converts a rs_machine_dependent variant frag into a
3104 normal fill frag with the unwind image from the the record list. */
3106 ia64_convert_frag (fragS
*frag
)
3112 /* ??? This code is identical to ia64_estimate_size_before_relax. */
3113 list
= (unw_rec_list
*) frag
->fr_opcode
;
3114 fixup_unw_records (list
, 0);
3116 len
= calc_record_size (list
);
3117 /* pad to pointer-size boundary. */
3118 pad
= len
% md
.pointer_size
;
3120 len
+= md
.pointer_size
- pad
;
3121 /* Add 8 for the header. */
3123 /* Add a pointer for the personality offset. */
3124 if (frag
->fr_offset
)
3125 size
+= md
.pointer_size
;
3127 /* fr_var carries the max_chars that we created the fragment with.
3128 We must, of course, have allocated enough memory earlier. */
3129 assert (frag
->fr_var
>= size
);
3131 /* Initialize the header area. fr_offset is initialized with
3132 unwind.personality_routine. */
3133 if (frag
->fr_offset
)
3135 if (md
.flags
& EF_IA_64_ABI64
)
3136 flag_value
= (bfd_vma
) 3 << 32;
3138 /* 32-bit unwind info block. */
3139 flag_value
= (bfd_vma
) 0x1003 << 32;
3144 md_number_to_chars (frag
->fr_literal
,
3145 (((bfd_vma
) 1 << 48) /* Version. */
3146 | flag_value
/* U & E handler flags. */
3147 | (len
/ md
.pointer_size
)), /* Length. */
3150 /* Skip the header. */
3151 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3152 process_unw_records (list
, output_vbyte_mem
);
3154 /* Fill the padding bytes with zeros. */
3156 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3157 md
.pointer_size
- pad
);
3159 frag
->fr_fix
+= size
;
3160 frag
->fr_type
= rs_fill
;
3162 frag
->fr_offset
= 0;
3166 parse_predicate_and_operand (e
, qp
, po
)
3171 int sep
= parse_operand (e
, ',');
3173 *qp
= e
->X_add_number
- REG_P
;
3174 if (e
->X_op
!= O_register
|| *qp
> 63)
3176 as_bad ("First operand to .%s must be a predicate", po
);
3180 as_warn ("Pointless use of p0 as first operand to .%s", po
);
3182 sep
= parse_operand (e
, ',');
3189 convert_expr_to_ab_reg (e
, ab
, regp
, po
, n
)
3190 const expressionS
*e
;
3196 unsigned int reg
= e
->X_add_number
;
3198 *ab
= *regp
= 0; /* Anything valid is good here. */
3200 if (e
->X_op
!= O_register
)
3201 reg
= REG_GR
; /* Anything invalid is good here. */
3203 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3206 *regp
= reg
- REG_GR
;
3208 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3209 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3212 *regp
= reg
- REG_FR
;
3214 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3217 *regp
= reg
- REG_BR
;
3224 case REG_PR
: *regp
= 0; break;
3225 case REG_PSP
: *regp
= 1; break;
3226 case REG_PRIUNAT
: *regp
= 2; break;
3227 case REG_BR
+ 0: *regp
= 3; break;
3228 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3229 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3230 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3231 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3232 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3233 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3234 case REG_AR
+ AR_LC
: *regp
= 10; break;
3237 as_bad ("Operand %d to .%s must be a preserved register", n
, po
);
3244 convert_expr_to_xy_reg (e
, xy
, regp
, po
, n
)
3245 const expressionS
*e
;
3251 unsigned int reg
= e
->X_add_number
;
3253 *xy
= *regp
= 0; /* Anything valid is good here. */
3255 if (e
->X_op
!= O_register
)
3256 reg
= REG_GR
; /* Anything invalid is good here. */
3258 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3261 *regp
= reg
- REG_GR
;
3263 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3266 *regp
= reg
- REG_FR
;
3268 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3271 *regp
= reg
- REG_BR
;
3274 as_bad ("Operand %d to .%s must be a writable register", n
, po
);
3280 /* The current frag is an alignment frag. */
3281 align_frag
= frag_now
;
3282 s_align_bytes (arg
);
3287 int dummy ATTRIBUTE_UNUSED
;
3294 if (is_it_end_of_statement ())
3296 radix
= input_line_pointer
;
3297 ch
= get_symbol_end ();
3298 ia64_canonicalize_symbol_name (radix
);
3299 if (strcasecmp (radix
, "C"))
3300 as_bad ("Radix `%s' unsupported or invalid", radix
);
3301 *input_line_pointer
= ch
;
3302 demand_empty_rest_of_line ();
3305 /* Helper function for .loc directives. If the assembler is not generating
3306 line number info, then we need to remember which instructions have a .loc
3307 directive, and only call dwarf2_gen_line_info for those instructions. */
3312 CURR_SLOT
.loc_directive_seen
= 1;
3313 dwarf2_directive_loc (x
);
3316 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3318 dot_special_section (which
)
3321 set_section ((char *) special_section_name
[which
]);
3324 /* Return -1 for warning and 0 for error. */
3327 unwind_diagnostic (const char * region
, const char *directive
)
3329 if (md
.unwind_check
== unwind_check_warning
)
3331 as_warn (".%s outside of %s", directive
, region
);
3336 as_bad (".%s outside of %s", directive
, region
);
3337 ignore_rest_of_line ();
3342 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3343 a procedure but the unwind directive check is set to warning, 0 if
3344 a directive isn't in a procedure and the unwind directive check is set
3348 in_procedure (const char *directive
)
3350 if (unwind
.proc_pending
.sym
3351 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3353 return unwind_diagnostic ("procedure", directive
);
3356 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3357 a prologue but the unwind directive check is set to warning, 0 if
3358 a directive isn't in a prologue and the unwind directive check is set
3362 in_prologue (const char *directive
)
3364 int in
= in_procedure (directive
);
3366 if (in
> 0 && !unwind
.prologue
)
3367 in
= unwind_diagnostic ("prologue", directive
);
3368 check_pending_save ();
3372 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3373 a body but the unwind directive check is set to warning, 0 if
3374 a directive isn't in a body and the unwind directive check is set
3378 in_body (const char *directive
)
3380 int in
= in_procedure (directive
);
3382 if (in
> 0 && !unwind
.body
)
3383 in
= unwind_diagnostic ("body region", directive
);
3388 add_unwind_entry (ptr
, sep
)
3395 unwind
.tail
->next
= ptr
;
3400 /* The current entry can in fact be a chain of unwind entries. */
3401 if (unwind
.current_entry
== NULL
)
3402 unwind
.current_entry
= ptr
;
3405 /* The current entry can in fact be a chain of unwind entries. */
3406 if (unwind
.current_entry
== NULL
)
3407 unwind
.current_entry
= ptr
;
3411 /* Parse a tag permitted for the current directive. */
3415 ch
= get_symbol_end ();
3416 /* FIXME: For now, just issue a warning that this isn't implemented. */
3423 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3426 *input_line_pointer
= ch
;
3428 if (sep
!= NOT_A_CHAR
)
3429 demand_empty_rest_of_line ();
3434 int dummy ATTRIBUTE_UNUSED
;
3439 if (!in_prologue ("fframe"))
3442 sep
= parse_operand (&e
, ',');
3444 if (e
.X_op
!= O_constant
)
3446 as_bad ("First operand to .fframe must be a constant");
3449 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3454 int dummy ATTRIBUTE_UNUSED
;
3460 if (!in_prologue ("vframe"))
3463 sep
= parse_operand (&e
, ',');
3464 reg
= e
.X_add_number
- REG_GR
;
3465 if (e
.X_op
!= O_register
|| reg
> 127)
3467 as_bad ("First operand to .vframe must be a general register");
3470 add_unwind_entry (output_mem_stack_v (), sep
);
3471 if (! (unwind
.prologue_mask
& 2))
3472 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3473 else if (reg
!= unwind
.prologue_gr
3474 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3475 as_warn ("Operand of .vframe contradicts .prologue");
3486 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
3488 if (!in_prologue ("vframesp"))
3491 sep
= parse_operand (&e
, ',');
3492 if (e
.X_op
!= O_constant
)
3494 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3497 add_unwind_entry (output_mem_stack_v (), sep
);
3498 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3503 int dummy ATTRIBUTE_UNUSED
;
3506 unsigned reg1
, reg2
;
3509 if (!in_prologue ("save"))
3512 sep
= parse_operand (&e1
, ',');
3514 sep
= parse_operand (&e2
, ',');
3518 reg1
= e1
.X_add_number
;
3519 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3520 if (e1
.X_op
!= O_register
)
3522 as_bad ("First operand to .save not a register");
3523 reg1
= REG_PR
; /* Anything valid is good here. */
3525 reg2
= e2
.X_add_number
- REG_GR
;
3526 if (e2
.X_op
!= O_register
|| reg2
> 127)
3528 as_bad ("Second operand to .save not a valid register");
3533 case REG_AR
+ AR_BSP
:
3534 add_unwind_entry (output_bsp_when (), sep
);
3535 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3537 case REG_AR
+ AR_BSPSTORE
:
3538 add_unwind_entry (output_bspstore_when (), sep
);
3539 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3541 case REG_AR
+ AR_RNAT
:
3542 add_unwind_entry (output_rnat_when (), sep
);
3543 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3545 case REG_AR
+ AR_UNAT
:
3546 add_unwind_entry (output_unat_when (), sep
);
3547 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3549 case REG_AR
+ AR_FPSR
:
3550 add_unwind_entry (output_fpsr_when (), sep
);
3551 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3553 case REG_AR
+ AR_PFS
:
3554 add_unwind_entry (output_pfs_when (), sep
);
3555 if (! (unwind
.prologue_mask
& 4))
3556 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3557 else if (reg2
!= unwind
.prologue_gr
3558 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3559 as_warn ("Second operand of .save contradicts .prologue");
3561 case REG_AR
+ AR_LC
:
3562 add_unwind_entry (output_lc_when (), sep
);
3563 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3566 add_unwind_entry (output_rp_when (), sep
);
3567 if (! (unwind
.prologue_mask
& 8))
3568 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3569 else if (reg2
!= unwind
.prologue_gr
)
3570 as_warn ("Second operand of .save contradicts .prologue");
3573 add_unwind_entry (output_preds_when (), sep
);
3574 if (! (unwind
.prologue_mask
& 1))
3575 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3576 else if (reg2
!= unwind
.prologue_gr
3577 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3578 as_warn ("Second operand of .save contradicts .prologue");
3581 add_unwind_entry (output_priunat_when_gr (), sep
);
3582 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3585 as_bad ("First operand to .save not a valid register");
3586 add_unwind_entry (NULL
, sep
);
3593 int dummy ATTRIBUTE_UNUSED
;
3596 unsigned long ecount
; /* # of _additional_ regions to pop */
3599 if (!in_body ("restore"))
3602 sep
= parse_operand (&e1
, ',');
3603 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3604 as_bad ("First operand to .restore must be stack pointer (sp)");
3610 sep
= parse_operand (&e2
, ',');
3611 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3613 as_bad ("Second operand to .restore must be a constant >= 0");
3614 e2
.X_add_number
= 0;
3616 ecount
= e2
.X_add_number
;
3619 ecount
= unwind
.prologue_count
- 1;
3621 if (ecount
>= unwind
.prologue_count
)
3623 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3624 ecount
+ 1, unwind
.prologue_count
);
3628 add_unwind_entry (output_epilogue (ecount
), sep
);
3630 if (ecount
< unwind
.prologue_count
)
3631 unwind
.prologue_count
-= ecount
+ 1;
3633 unwind
.prologue_count
= 0;
3637 dot_restorereg (pred
)
3640 unsigned int qp
, ab
, reg
;
3643 const char * const po
= pred
? "restorereg.p" : "restorereg";
3645 if (!in_procedure (po
))
3649 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3652 sep
= parse_operand (&e
, ',');
3655 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3657 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3660 static char *special_linkonce_name
[] =
3662 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3666 start_unwind_section (const segT text_seg
, int sec_index
)
3669 Use a slightly ugly scheme to derive the unwind section names from
3670 the text section name:
3672 text sect. unwind table sect.
3673 name: name: comments:
3674 ---------- ----------------- --------------------------------
3676 .text.foo .IA_64.unwind.text.foo
3677 .foo .IA_64.unwind.foo
3679 .gnu.linkonce.ia64unw.foo
3680 _info .IA_64.unwind_info gas issues error message (ditto)
3681 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3683 This mapping is done so that:
3685 (a) An object file with unwind info only in .text will use
3686 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3687 This follows the letter of the ABI and also ensures backwards
3688 compatibility with older toolchains.
3690 (b) An object file with unwind info in multiple text sections
3691 will use separate unwind sections for each text section.
3692 This allows us to properly set the "sh_info" and "sh_link"
3693 fields in SHT_IA_64_UNWIND as required by the ABI and also
3694 lets GNU ld support programs with multiple segments
3695 containing unwind info (as might be the case for certain
3696 embedded applications).
3698 (c) An error is issued if there would be a name clash.
3701 const char *text_name
, *sec_text_name
;
3703 const char *prefix
= special_section_name
[sec_index
];
3705 size_t prefix_len
, suffix_len
, sec_name_len
;
3707 sec_text_name
= segment_name (text_seg
);
3708 text_name
= sec_text_name
;
3709 if (strncmp (text_name
, "_info", 5) == 0)
3711 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3713 ignore_rest_of_line ();
3716 if (strcmp (text_name
, ".text") == 0)
3719 /* Build the unwind section name by appending the (possibly stripped)
3720 text section name to the unwind prefix. */
3722 if (strncmp (text_name
, ".gnu.linkonce.t.",
3723 sizeof (".gnu.linkonce.t.") - 1) == 0)
3725 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3726 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3729 prefix_len
= strlen (prefix
);
3730 suffix_len
= strlen (suffix
);
3731 sec_name_len
= prefix_len
+ suffix_len
;
3732 sec_name
= alloca (sec_name_len
+ 1);
3733 memcpy (sec_name
, prefix
, prefix_len
);
3734 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3735 sec_name
[sec_name_len
] = '\0';
3737 /* Handle COMDAT group. */
3738 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3739 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3742 size_t len
, group_name_len
;
3743 const char *group_name
= elf_group_name (text_seg
);
3745 if (group_name
== NULL
)
3747 as_bad ("Group section `%s' has no group signature",
3749 ignore_rest_of_line ();
3752 /* We have to construct a fake section directive. */
3753 group_name_len
= strlen (group_name
);
3755 + 16 /* ,"aG",@progbits, */
3756 + group_name_len
/* ,group_name */
3759 section
= alloca (len
+ 1);
3760 memcpy (section
, sec_name
, sec_name_len
);
3761 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3762 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3763 memcpy (section
+ len
- 7, ",comdat", 7);
3764 section
[len
] = '\0';
3765 set_section (section
);
3769 set_section (sec_name
);
3770 bfd_set_section_flags (stdoutput
, now_seg
,
3771 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3774 elf_linked_to_section (now_seg
) = text_seg
;
3778 generate_unwind_image (const segT text_seg
)
3783 /* Mark the end of the unwind info, so that we can compute the size of the
3784 last unwind region. */
3785 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3787 /* Force out pending instructions, to make sure all unwind records have
3788 a valid slot_number field. */
3789 ia64_flush_insns ();
3791 /* Generate the unwind record. */
3792 list
= optimize_unw_records (unwind
.list
);
3793 fixup_unw_records (list
, 1);
3794 size
= calc_record_size (list
);
3796 if (size
> 0 || unwind
.force_unwind_entry
)
3798 unwind
.force_unwind_entry
= 0;
3799 /* pad to pointer-size boundary. */
3800 pad
= size
% md
.pointer_size
;
3802 size
+= md
.pointer_size
- pad
;
3803 /* Add 8 for the header. */
3805 /* Add a pointer for the personality offset. */
3806 if (unwind
.personality_routine
)
3807 size
+= md
.pointer_size
;
3810 /* If there are unwind records, switch sections, and output the info. */
3814 bfd_reloc_code_real_type reloc
;
3816 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3818 /* Make sure the section has 4 byte alignment for ILP32 and
3819 8 byte alignment for LP64. */
3820 frag_align (md
.pointer_size_shift
, 0, 0);
3821 record_alignment (now_seg
, md
.pointer_size_shift
);
3823 /* Set expression which points to start of unwind descriptor area. */
3824 unwind
.info
= expr_build_dot ();
3826 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3827 (offsetT
) (long) unwind
.personality_routine
,
3830 /* Add the personality address to the image. */
3831 if (unwind
.personality_routine
!= 0)
3833 exp
.X_op
= O_symbol
;
3834 exp
.X_add_symbol
= unwind
.personality_routine
;
3835 exp
.X_add_number
= 0;
3837 if (md
.flags
& EF_IA_64_BE
)
3839 if (md
.flags
& EF_IA_64_ABI64
)
3840 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3842 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3846 if (md
.flags
& EF_IA_64_ABI64
)
3847 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3849 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3852 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3853 md
.pointer_size
, &exp
, 0, reloc
);
3854 unwind
.personality_routine
= 0;
3858 free_saved_prologue_counts ();
3859 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3863 dot_handlerdata (dummy
)
3864 int dummy ATTRIBUTE_UNUSED
;
3866 if (!in_procedure ("handlerdata"))
3868 unwind
.force_unwind_entry
= 1;
3870 /* Remember which segment we're in so we can switch back after .endp */
3871 unwind
.saved_text_seg
= now_seg
;
3872 unwind
.saved_text_subseg
= now_subseg
;
3874 /* Generate unwind info into unwind-info section and then leave that
3875 section as the currently active one so dataXX directives go into
3876 the language specific data area of the unwind info block. */
3877 generate_unwind_image (now_seg
);
3878 demand_empty_rest_of_line ();
3882 dot_unwentry (dummy
)
3883 int dummy ATTRIBUTE_UNUSED
;
3885 if (!in_procedure ("unwentry"))
3887 unwind
.force_unwind_entry
= 1;
3888 demand_empty_rest_of_line ();
3893 int dummy ATTRIBUTE_UNUSED
;
3898 if (!in_prologue ("altrp"))
3901 parse_operand (&e
, 0);
3902 reg
= e
.X_add_number
- REG_BR
;
3903 if (e
.X_op
!= O_register
|| reg
> 7)
3905 as_bad ("First operand to .altrp not a valid branch register");
3908 add_unwind_entry (output_rp_br (reg
), 0);
3912 dot_savemem (psprel
)
3918 const char * const po
= psprel
? "savepsp" : "savesp";
3920 if (!in_prologue (po
))
3923 sep
= parse_operand (&e1
, ',');
3925 sep
= parse_operand (&e2
, ',');
3929 reg1
= e1
.X_add_number
;
3930 val
= e2
.X_add_number
;
3932 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3933 if (e1
.X_op
!= O_register
)
3935 as_bad ("First operand to .%s not a register", po
);
3936 reg1
= REG_PR
; /* Anything valid is good here. */
3938 if (e2
.X_op
!= O_constant
)
3940 as_bad ("Second operand to .%s not a constant", po
);
3946 case REG_AR
+ AR_BSP
:
3947 add_unwind_entry (output_bsp_when (), sep
);
3948 add_unwind_entry ((psprel
3950 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3952 case REG_AR
+ AR_BSPSTORE
:
3953 add_unwind_entry (output_bspstore_when (), sep
);
3954 add_unwind_entry ((psprel
3955 ? output_bspstore_psprel
3956 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3958 case REG_AR
+ AR_RNAT
:
3959 add_unwind_entry (output_rnat_when (), sep
);
3960 add_unwind_entry ((psprel
3961 ? output_rnat_psprel
3962 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3964 case REG_AR
+ AR_UNAT
:
3965 add_unwind_entry (output_unat_when (), sep
);
3966 add_unwind_entry ((psprel
3967 ? output_unat_psprel
3968 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3970 case REG_AR
+ AR_FPSR
:
3971 add_unwind_entry (output_fpsr_when (), sep
);
3972 add_unwind_entry ((psprel
3973 ? output_fpsr_psprel
3974 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3976 case REG_AR
+ AR_PFS
:
3977 add_unwind_entry (output_pfs_when (), sep
);
3978 add_unwind_entry ((psprel
3980 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3982 case REG_AR
+ AR_LC
:
3983 add_unwind_entry (output_lc_when (), sep
);
3984 add_unwind_entry ((psprel
3986 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3989 add_unwind_entry (output_rp_when (), sep
);
3990 add_unwind_entry ((psprel
3992 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3995 add_unwind_entry (output_preds_when (), sep
);
3996 add_unwind_entry ((psprel
3997 ? output_preds_psprel
3998 : output_preds_sprel
) (val
), NOT_A_CHAR
);
4001 add_unwind_entry (output_priunat_when_mem (), sep
);
4002 add_unwind_entry ((psprel
4003 ? output_priunat_psprel
4004 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
4007 as_bad ("First operand to .%s not a valid register", po
);
4008 add_unwind_entry (NULL
, sep
);
4015 int dummy ATTRIBUTE_UNUSED
;
4021 if (!in_prologue ("save.g"))
4024 sep
= parse_operand (&e
, ',');
4026 grmask
= e
.X_add_number
;
4027 if (e
.X_op
!= O_constant
4028 || e
.X_add_number
<= 0
4029 || e
.X_add_number
> 0xf)
4031 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4038 int n
= popcount (grmask
);
4040 parse_operand (&e
, 0);
4041 reg
= e
.X_add_number
- REG_GR
;
4042 if (e
.X_op
!= O_register
|| reg
> 127)
4044 as_bad ("Second operand to .save.g must be a general register");
4047 else if (reg
> 128U - n
)
4049 as_bad ("Second operand to .save.g must be the first of %d general registers", n
);
4052 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
4055 add_unwind_entry (output_gr_mem (grmask
), 0);
4060 int dummy ATTRIBUTE_UNUSED
;
4064 if (!in_prologue ("save.f"))
4067 parse_operand (&e
, 0);
4069 if (e
.X_op
!= O_constant
4070 || e
.X_add_number
<= 0
4071 || e
.X_add_number
> 0xfffff)
4073 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4076 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
4081 int dummy ATTRIBUTE_UNUSED
;
4087 if (!in_prologue ("save.b"))
4090 sep
= parse_operand (&e
, ',');
4092 brmask
= e
.X_add_number
;
4093 if (e
.X_op
!= O_constant
4094 || e
.X_add_number
<= 0
4095 || e
.X_add_number
> 0x1f)
4097 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4104 int n
= popcount (brmask
);
4106 parse_operand (&e
, 0);
4107 reg
= e
.X_add_number
- REG_GR
;
4108 if (e
.X_op
!= O_register
|| reg
> 127)
4110 as_bad ("Second operand to .save.b must be a general register");
4113 else if (reg
> 128U - n
)
4115 as_bad ("Second operand to .save.b must be the first of %d general registers", n
);
4118 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
4121 add_unwind_entry (output_br_mem (brmask
), 0);
4126 int dummy ATTRIBUTE_UNUSED
;
4130 if (!in_prologue ("save.gf"))
4133 if (parse_operand (&e1
, ',') == ',')
4134 parse_operand (&e2
, 0);
4138 if (e1
.X_op
!= O_constant
4139 || e1
.X_add_number
< 0
4140 || e1
.X_add_number
> 0xf)
4142 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4144 e1
.X_add_number
= 0;
4146 if (e2
.X_op
!= O_constant
4147 || e2
.X_add_number
< 0
4148 || e2
.X_add_number
> 0xfffff)
4150 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4152 e2
.X_add_number
= 0;
4154 if (e1
.X_op
== O_constant
4155 && e2
.X_op
== O_constant
4156 && e1
.X_add_number
== 0
4157 && e2
.X_add_number
== 0)
4158 as_bad ("Operands to .save.gf may not be both zero");
4160 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4165 int dummy ATTRIBUTE_UNUSED
;
4169 if (!in_prologue ("spill"))
4172 parse_operand (&e
, 0);
4174 if (e
.X_op
!= O_constant
)
4176 as_bad ("Operand to .spill must be a constant");
4179 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4187 unsigned int qp
, ab
, xy
, reg
, treg
;
4189 const char * const po
= pred
? "spillreg.p" : "spillreg";
4191 if (!in_procedure (po
))
4195 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4198 sep
= parse_operand (&e
, ',');
4201 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4204 sep
= parse_operand (&e
, ',');
4207 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4209 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4213 dot_spillmem (psprel
)
4217 int pred
= (psprel
< 0), sep
;
4218 unsigned int qp
, ab
, reg
;
4224 po
= psprel
? "spillpsp.p" : "spillsp.p";
4227 po
= psprel
? "spillpsp" : "spillsp";
4229 if (!in_procedure (po
))
4233 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4236 sep
= parse_operand (&e
, ',');
4239 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4242 sep
= parse_operand (&e
, ',');
4245 if (e
.X_op
!= O_constant
)
4247 as_bad ("Operand %d to .%s must be a constant", 2 + pred
, po
);
4252 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4254 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4258 get_saved_prologue_count (lbl
)
4261 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4263 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4267 return lpc
->prologue_count
;
4269 as_bad ("Missing .label_state %ld", lbl
);
4274 save_prologue_count (lbl
, count
)
4278 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4280 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4284 lpc
->prologue_count
= count
;
4287 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4289 new_lpc
->next
= unwind
.saved_prologue_counts
;
4290 new_lpc
->label_number
= lbl
;
4291 new_lpc
->prologue_count
= count
;
4292 unwind
.saved_prologue_counts
= new_lpc
;
4297 free_saved_prologue_counts ()
4299 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4300 label_prologue_count
*next
;
4309 unwind
.saved_prologue_counts
= NULL
;
4313 dot_label_state (dummy
)
4314 int dummy ATTRIBUTE_UNUSED
;
4318 if (!in_body ("label_state"))
4321 parse_operand (&e
, 0);
4322 if (e
.X_op
== O_constant
)
4323 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4326 as_bad ("Operand to .label_state must be a constant");
4329 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4333 dot_copy_state (dummy
)
4334 int dummy ATTRIBUTE_UNUSED
;
4338 if (!in_body ("copy_state"))
4341 parse_operand (&e
, 0);
4342 if (e
.X_op
== O_constant
)
4343 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4346 as_bad ("Operand to .copy_state must be a constant");
4349 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4354 int dummy ATTRIBUTE_UNUSED
;
4359 if (!in_prologue ("unwabi"))
4362 sep
= parse_operand (&e1
, ',');
4364 parse_operand (&e2
, 0);
4368 if (e1
.X_op
!= O_constant
)
4370 as_bad ("First operand to .unwabi must be a constant");
4371 e1
.X_add_number
= 0;
4374 if (e2
.X_op
!= O_constant
)
4376 as_bad ("Second operand to .unwabi must be a constant");
4377 e2
.X_add_number
= 0;
4380 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4384 dot_personality (dummy
)
4385 int dummy ATTRIBUTE_UNUSED
;
4388 if (!in_procedure ("personality"))
4391 name
= input_line_pointer
;
4392 c
= get_symbol_end ();
4393 p
= input_line_pointer
;
4394 unwind
.personality_routine
= symbol_find_or_make (name
);
4395 unwind
.force_unwind_entry
= 1;
4398 demand_empty_rest_of_line ();
4403 int dummy ATTRIBUTE_UNUSED
;
4407 proc_pending
*pending
, *last_pending
;
4409 if (unwind
.proc_pending
.sym
)
4411 (md
.unwind_check
== unwind_check_warning
4413 : as_bad
) ("Missing .endp after previous .proc");
4414 while (unwind
.proc_pending
.next
)
4416 pending
= unwind
.proc_pending
.next
;
4417 unwind
.proc_pending
.next
= pending
->next
;
4421 last_pending
= NULL
;
4423 /* Parse names of main and alternate entry points and mark them as
4424 function symbols: */
4428 name
= input_line_pointer
;
4429 c
= get_symbol_end ();
4430 p
= input_line_pointer
;
4432 as_bad ("Empty argument of .proc");
4435 sym
= symbol_find_or_make (name
);
4436 if (S_IS_DEFINED (sym
))
4437 as_bad ("`%s' was already defined", name
);
4438 else if (!last_pending
)
4440 unwind
.proc_pending
.sym
= sym
;
4441 last_pending
= &unwind
.proc_pending
;
4445 pending
= xmalloc (sizeof (*pending
));
4447 last_pending
= last_pending
->next
= pending
;
4449 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4453 if (*input_line_pointer
!= ',')
4455 ++input_line_pointer
;
4459 unwind
.proc_pending
.sym
= expr_build_dot ();
4460 last_pending
= &unwind
.proc_pending
;
4462 last_pending
->next
= NULL
;
4463 demand_empty_rest_of_line ();
4466 unwind
.prologue
= 0;
4467 unwind
.prologue_count
= 0;
4470 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4471 unwind
.personality_routine
= 0;
4476 int dummy ATTRIBUTE_UNUSED
;
4478 if (!in_procedure ("body"))
4480 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4481 as_warn ("Initial .body should precede any instructions");
4482 check_pending_save ();
4484 unwind
.prologue
= 0;
4485 unwind
.prologue_mask
= 0;
4488 add_unwind_entry (output_body (), 0);
4492 dot_prologue (dummy
)
4493 int dummy ATTRIBUTE_UNUSED
;
4495 unsigned mask
= 0, grsave
= 0;
4497 if (!in_procedure ("prologue"))
4499 if (unwind
.prologue
)
4501 as_bad (".prologue within prologue");
4502 ignore_rest_of_line ();
4505 if (!unwind
.body
&& unwind
.insn
)
4506 as_warn ("Initial .prologue should precede any instructions");
4508 if (!is_it_end_of_statement ())
4511 int n
, sep
= parse_operand (&e
, ',');
4513 if (e
.X_op
!= O_constant
4514 || e
.X_add_number
< 0
4515 || e
.X_add_number
> 0xf)
4516 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4517 else if (e
.X_add_number
== 0)
4518 as_warn ("Pointless use of zero first operand to .prologue");
4520 mask
= e
.X_add_number
;
4521 n
= popcount (mask
);
4524 parse_operand (&e
, 0);
4527 if (e
.X_op
== O_constant
4528 && e
.X_add_number
>= 0
4529 && e
.X_add_number
< 128)
4531 if (md
.unwind_check
== unwind_check_error
)
4532 as_warn ("Using a constant as second operand to .prologue is deprecated");
4533 grsave
= e
.X_add_number
;
4535 else if (e
.X_op
!= O_register
4536 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4538 as_bad ("Second operand to .prologue must be a general register");
4541 else if (grsave
> 128U - n
)
4543 as_bad ("Second operand to .prologue must be the first of %d general registers", n
);
4550 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4552 add_unwind_entry (output_prologue (), 0);
4554 unwind
.prologue
= 1;
4555 unwind
.prologue_mask
= mask
;
4556 unwind
.prologue_gr
= grsave
;
4558 ++unwind
.prologue_count
;
4563 int dummy ATTRIBUTE_UNUSED
;
4566 int bytes_per_address
;
4569 subsegT saved_subseg
;
4570 proc_pending
*pending
;
4571 int unwind_check
= md
.unwind_check
;
4573 md
.unwind_check
= unwind_check_error
;
4574 if (!in_procedure ("endp"))
4576 md
.unwind_check
= unwind_check
;
4578 if (unwind
.saved_text_seg
)
4580 saved_seg
= unwind
.saved_text_seg
;
4581 saved_subseg
= unwind
.saved_text_subseg
;
4582 unwind
.saved_text_seg
= NULL
;
4586 saved_seg
= now_seg
;
4587 saved_subseg
= now_subseg
;
4590 insn_group_break (1, 0, 0);
4592 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4594 generate_unwind_image (saved_seg
);
4596 if (unwind
.info
|| unwind
.force_unwind_entry
)
4600 subseg_set (md
.last_text_seg
, 0);
4601 proc_end
= expr_build_dot ();
4603 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4605 /* Make sure that section has 4 byte alignment for ILP32 and
4606 8 byte alignment for LP64. */
4607 record_alignment (now_seg
, md
.pointer_size_shift
);
4609 /* Need space for 3 pointers for procedure start, procedure end,
4611 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4612 where
= frag_now_fix () - (3 * md
.pointer_size
);
4613 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4615 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4616 e
.X_op
= O_pseudo_fixup
;
4617 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4619 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4620 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4621 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4622 S_GET_VALUE (unwind
.proc_pending
.sym
),
4623 symbol_get_frag (unwind
.proc_pending
.sym
));
4625 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4626 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4628 e
.X_op
= O_pseudo_fixup
;
4629 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4631 e
.X_add_symbol
= proc_end
;
4632 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4633 bytes_per_address
, &e
);
4637 e
.X_op
= O_pseudo_fixup
;
4638 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4640 e
.X_add_symbol
= unwind
.info
;
4641 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4642 bytes_per_address
, &e
);
4645 subseg_set (saved_seg
, saved_subseg
);
4647 /* Set symbol sizes. */
4648 pending
= &unwind
.proc_pending
;
4649 if (S_GET_NAME (pending
->sym
))
4653 symbolS
*sym
= pending
->sym
;
4655 if (!S_IS_DEFINED (sym
))
4656 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym
));
4657 else if (S_GET_SIZE (sym
) == 0
4658 && symbol_get_obj (sym
)->size
== NULL
)
4660 fragS
*frag
= symbol_get_frag (sym
);
4664 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4665 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4668 symbol_get_obj (sym
)->size
=
4669 (expressionS
*) xmalloc (sizeof (expressionS
));
4670 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4671 symbol_get_obj (sym
)->size
->X_add_symbol
4672 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4673 frag_now_fix (), frag_now
);
4674 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4675 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4679 } while ((pending
= pending
->next
) != NULL
);
4682 /* Parse names of main and alternate entry points. */
4688 name
= input_line_pointer
;
4689 c
= get_symbol_end ();
4690 p
= input_line_pointer
;
4692 (md
.unwind_check
== unwind_check_warning
4694 : as_bad
) ("Empty argument of .endp");
4697 symbolS
*sym
= symbol_find (name
);
4699 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4701 if (sym
== pending
->sym
)
4703 pending
->sym
= NULL
;
4707 if (!sym
|| !pending
)
4708 as_warn ("`%s' was not specified with previous .proc", name
);
4712 if (*input_line_pointer
!= ',')
4714 ++input_line_pointer
;
4716 demand_empty_rest_of_line ();
4718 /* Deliberately only checking for the main entry point here; the
4719 language spec even says all arguments to .endp are ignored. */
4720 if (unwind
.proc_pending
.sym
4721 && S_GET_NAME (unwind
.proc_pending
.sym
)
4722 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4723 as_warn ("`%s' should be an operand to this .endp",
4724 S_GET_NAME (unwind
.proc_pending
.sym
));
4725 while (unwind
.proc_pending
.next
)
4727 pending
= unwind
.proc_pending
.next
;
4728 unwind
.proc_pending
.next
= pending
->next
;
4731 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4735 dot_template (template)
4738 CURR_SLOT
.user_template
= template;
4743 int dummy ATTRIBUTE_UNUSED
;
4745 int ins
, locs
, outs
, rots
;
4747 if (is_it_end_of_statement ())
4748 ins
= locs
= outs
= rots
= 0;
4751 ins
= get_absolute_expression ();
4752 if (*input_line_pointer
++ != ',')
4754 locs
= get_absolute_expression ();
4755 if (*input_line_pointer
++ != ',')
4757 outs
= get_absolute_expression ();
4758 if (*input_line_pointer
++ != ',')
4760 rots
= get_absolute_expression ();
4762 set_regstack (ins
, locs
, outs
, rots
);
4766 as_bad ("Comma expected");
4767 ignore_rest_of_line ();
4775 valueT num_alloced
= 0;
4776 struct dynreg
**drpp
, *dr
;
4777 int ch
, base_reg
= 0;
4783 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4784 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4785 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4789 /* First, remove existing names from hash table. */
4790 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4792 hash_delete (md
.dynreg_hash
, dr
->name
);
4793 /* FIXME: Free dr->name. */
4797 drpp
= &md
.dynreg
[type
];
4800 start
= input_line_pointer
;
4801 ch
= get_symbol_end ();
4802 len
= strlen (ia64_canonicalize_symbol_name (start
));
4803 *input_line_pointer
= ch
;
4806 if (*input_line_pointer
!= '[')
4808 as_bad ("Expected '['");
4811 ++input_line_pointer
; /* skip '[' */
4813 num_regs
= get_absolute_expression ();
4815 if (*input_line_pointer
++ != ']')
4817 as_bad ("Expected ']'");
4822 as_bad ("Number of elements must be positive");
4827 num_alloced
+= num_regs
;
4831 if (num_alloced
> md
.rot
.num_regs
)
4833 as_bad ("Used more than the declared %d rotating registers",
4839 if (num_alloced
> 96)
4841 as_bad ("Used more than the available 96 rotating registers");
4846 if (num_alloced
> 48)
4848 as_bad ("Used more than the available 48 rotating registers");
4859 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4860 memset (*drpp
, 0, sizeof (*dr
));
4863 name
= obstack_alloc (¬es
, len
+ 1);
4864 memcpy (name
, start
, len
);
4869 dr
->num_regs
= num_regs
;
4870 dr
->base
= base_reg
;
4872 base_reg
+= num_regs
;
4874 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4876 as_bad ("Attempt to redefine register set `%s'", name
);
4877 obstack_free (¬es
, name
);
4881 if (*input_line_pointer
!= ',')
4883 ++input_line_pointer
; /* skip comma */
4886 demand_empty_rest_of_line ();
4890 ignore_rest_of_line ();
4894 dot_byteorder (byteorder
)
4897 segment_info_type
*seginfo
= seg_info (now_seg
);
4899 if (byteorder
== -1)
4901 if (seginfo
->tc_segment_info_data
.endian
== 0)
4902 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4903 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4906 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4908 if (target_big_endian
!= byteorder
)
4910 target_big_endian
= byteorder
;
4911 if (target_big_endian
)
4913 ia64_number_to_chars
= number_to_chars_bigendian
;
4914 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4918 ia64_number_to_chars
= number_to_chars_littleendian
;
4919 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4926 int dummy ATTRIBUTE_UNUSED
;
4933 option
= input_line_pointer
;
4934 ch
= get_symbol_end ();
4935 if (strcmp (option
, "lsb") == 0)
4936 md
.flags
&= ~EF_IA_64_BE
;
4937 else if (strcmp (option
, "msb") == 0)
4938 md
.flags
|= EF_IA_64_BE
;
4939 else if (strcmp (option
, "abi32") == 0)
4940 md
.flags
&= ~EF_IA_64_ABI64
;
4941 else if (strcmp (option
, "abi64") == 0)
4942 md
.flags
|= EF_IA_64_ABI64
;
4944 as_bad ("Unknown psr option `%s'", option
);
4945 *input_line_pointer
= ch
;
4948 if (*input_line_pointer
!= ',')
4951 ++input_line_pointer
;
4954 demand_empty_rest_of_line ();
4959 int dummy ATTRIBUTE_UNUSED
;
4961 new_logical_line (0, get_absolute_expression ());
4962 demand_empty_rest_of_line ();
4966 cross_section (ref
, cons
, ua
)
4968 void (*cons
) PARAMS((int));
4972 int saved_auto_align
;
4973 unsigned int section_count
;
4976 start
= input_line_pointer
;
4982 name
= demand_copy_C_string (&len
);
4983 obstack_free(¬es
, name
);
4986 ignore_rest_of_line ();
4992 char c
= get_symbol_end ();
4994 if (input_line_pointer
== start
)
4996 as_bad ("Missing section name");
4997 ignore_rest_of_line ();
5000 *input_line_pointer
= c
;
5002 end
= input_line_pointer
;
5004 if (*input_line_pointer
!= ',')
5006 as_bad ("Comma expected after section name");
5007 ignore_rest_of_line ();
5011 end
= input_line_pointer
+ 1; /* skip comma */
5012 input_line_pointer
= start
;
5013 md
.keep_pending_output
= 1;
5014 section_count
= bfd_count_sections(stdoutput
);
5015 obj_elf_section (0);
5016 if (section_count
!= bfd_count_sections(stdoutput
))
5017 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5018 input_line_pointer
= end
;
5019 saved_auto_align
= md
.auto_align
;
5024 md
.auto_align
= saved_auto_align
;
5025 obj_elf_previous (0);
5026 md
.keep_pending_output
= 0;
5033 cross_section (size
, cons
, 0);
5036 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
5039 stmt_float_cons (kind
)
5060 ia64_do_align (alignment
);
5068 int saved_auto_align
= md
.auto_align
;
5072 md
.auto_align
= saved_auto_align
;
5076 dot_xfloat_cons (kind
)
5079 cross_section (kind
, stmt_float_cons
, 0);
5083 dot_xstringer (zero
)
5086 cross_section (zero
, stringer
, 0);
5093 cross_section (size
, cons
, 1);
5097 dot_xfloat_cons_ua (kind
)
5100 cross_section (kind
, float_cons
, 1);
5103 /* .reg.val <regname>,value */
5107 int dummy ATTRIBUTE_UNUSED
;
5111 expression_and_evaluate (®
);
5112 if (reg
.X_op
!= O_register
)
5114 as_bad (_("Register name expected"));
5115 ignore_rest_of_line ();
5117 else if (*input_line_pointer
++ != ',')
5119 as_bad (_("Comma expected"));
5120 ignore_rest_of_line ();
5124 valueT value
= get_absolute_expression ();
5125 int regno
= reg
.X_add_number
;
5126 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
5127 as_warn (_("Register value annotation ignored"));
5130 gr_values
[regno
- REG_GR
].known
= 1;
5131 gr_values
[regno
- REG_GR
].value
= value
;
5132 gr_values
[regno
- REG_GR
].path
= md
.path
;
5135 demand_empty_rest_of_line ();
5140 .serialize.instruction
5143 dot_serialize (type
)
5146 insn_group_break (0, 0, 0);
5148 instruction_serialization ();
5150 data_serialization ();
5151 insn_group_break (0, 0, 0);
5152 demand_empty_rest_of_line ();
5155 /* select dv checking mode
5160 A stop is inserted when changing modes
5167 if (md
.manual_bundling
)
5168 as_warn (_("Directive invalid within a bundle"));
5170 if (type
== 'E' || type
== 'A')
5171 md
.mode_explicitly_set
= 0;
5173 md
.mode_explicitly_set
= 1;
5180 if (md
.explicit_mode
)
5181 insn_group_break (1, 0, 0);
5182 md
.explicit_mode
= 0;
5186 if (!md
.explicit_mode
)
5187 insn_group_break (1, 0, 0);
5188 md
.explicit_mode
= 1;
5192 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5193 insn_group_break (1, 0, 0);
5194 md
.explicit_mode
= md
.default_explicit_mode
;
5195 md
.mode_explicitly_set
= 0;
5206 for (regno
= 0; regno
< 64; regno
++)
5208 if (mask
& ((valueT
) 1 << regno
))
5210 fprintf (stderr
, "%s p%d", comma
, regno
);
5217 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5218 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5219 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5220 .pred.safe_across_calls p1 [, p2 [,...]]
5229 int p1
= -1, p2
= -1;
5233 if (*input_line_pointer
== '"')
5236 char *form
= demand_copy_C_string (&len
);
5238 if (strcmp (form
, "mutex") == 0)
5240 else if (strcmp (form
, "clear") == 0)
5242 else if (strcmp (form
, "imply") == 0)
5244 obstack_free (¬es
, form
);
5246 else if (*input_line_pointer
== '@')
5248 char *form
= ++input_line_pointer
;
5249 char c
= get_symbol_end();
5251 if (strcmp (form
, "mutex") == 0)
5253 else if (strcmp (form
, "clear") == 0)
5255 else if (strcmp (form
, "imply") == 0)
5257 *input_line_pointer
= c
;
5261 as_bad (_("Missing predicate relation type"));
5262 ignore_rest_of_line ();
5267 as_bad (_("Unrecognized predicate relation type"));
5268 ignore_rest_of_line ();
5271 if (*input_line_pointer
== ',')
5272 ++input_line_pointer
;
5281 expressionS pr
, *pr1
, *pr2
;
5283 expression_and_evaluate (&pr
);
5284 if (pr
.X_op
== O_register
5285 && pr
.X_add_number
>= REG_P
5286 && pr
.X_add_number
<= REG_P
+ 63)
5288 regno
= pr
.X_add_number
- REG_P
;
5296 else if (type
!= 'i'
5297 && pr
.X_op
== O_subtract
5298 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5299 && pr1
->X_op
== O_register
5300 && pr1
->X_add_number
>= REG_P
5301 && pr1
->X_add_number
<= REG_P
+ 63
5302 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5303 && pr2
->X_op
== O_register
5304 && pr2
->X_add_number
>= REG_P
5305 && pr2
->X_add_number
<= REG_P
+ 63)
5310 regno
= pr1
->X_add_number
- REG_P
;
5311 stop
= pr2
->X_add_number
- REG_P
;
5314 as_bad (_("Bad register range"));
5315 ignore_rest_of_line ();
5318 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5319 count
+= stop
- regno
+ 1;
5323 as_bad (_("Predicate register expected"));
5324 ignore_rest_of_line ();
5328 as_warn (_("Duplicate predicate register ignored"));
5330 if (*input_line_pointer
!= ',')
5332 ++input_line_pointer
;
5341 clear_qp_mutex (mask
);
5342 clear_qp_implies (mask
, (valueT
) 0);
5345 if (count
!= 2 || p1
== -1 || p2
== -1)
5346 as_bad (_("Predicate source and target required"));
5347 else if (p1
== 0 || p2
== 0)
5348 as_bad (_("Use of p0 is not valid in this context"));
5350 add_qp_imply (p1
, p2
);
5355 as_bad (_("At least two PR arguments expected"));
5360 as_bad (_("Use of p0 is not valid in this context"));
5363 add_qp_mutex (mask
);
5366 /* note that we don't override any existing relations */
5369 as_bad (_("At least one PR argument expected"));
5374 fprintf (stderr
, "Safe across calls: ");
5375 print_prmask (mask
);
5376 fprintf (stderr
, "\n");
5378 qp_safe_across_calls
= mask
;
5381 demand_empty_rest_of_line ();
5384 /* .entry label [, label [, ...]]
5385 Hint to DV code that the given labels are to be considered entry points.
5386 Otherwise, only global labels are considered entry points. */
5390 int dummy ATTRIBUTE_UNUSED
;
5399 name
= input_line_pointer
;
5400 c
= get_symbol_end ();
5401 symbolP
= symbol_find_or_make (name
);
5403 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5405 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5408 *input_line_pointer
= c
;
5410 c
= *input_line_pointer
;
5413 input_line_pointer
++;
5415 if (*input_line_pointer
== '\n')
5421 demand_empty_rest_of_line ();
5424 /* .mem.offset offset, base
5425 "base" is used to distinguish between offsets from a different base. */
5428 dot_mem_offset (dummy
)
5429 int dummy ATTRIBUTE_UNUSED
;
5431 md
.mem_offset
.hint
= 1;
5432 md
.mem_offset
.offset
= get_absolute_expression ();
5433 if (*input_line_pointer
!= ',')
5435 as_bad (_("Comma expected"));
5436 ignore_rest_of_line ();
5439 ++input_line_pointer
;
5440 md
.mem_offset
.base
= get_absolute_expression ();
5441 demand_empty_rest_of_line ();
5444 /* ia64-specific pseudo-ops: */
5445 const pseudo_typeS md_pseudo_table
[] =
5447 { "radix", dot_radix
, 0 },
5448 { "lcomm", s_lcomm_bytes
, 1 },
5449 { "loc", dot_loc
, 0 },
5450 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5451 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5452 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5453 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5454 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5455 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5456 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5457 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5458 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5459 { "proc", dot_proc
, 0 },
5460 { "body", dot_body
, 0 },
5461 { "prologue", dot_prologue
, 0 },
5462 { "endp", dot_endp
, 0 },
5464 { "fframe", dot_fframe
, 0 },
5465 { "vframe", dot_vframe
, 0 },
5466 { "vframesp", dot_vframesp
, 0 },
5467 { "vframepsp", dot_vframesp
, 1 },
5468 { "save", dot_save
, 0 },
5469 { "restore", dot_restore
, 0 },
5470 { "restorereg", dot_restorereg
, 0 },
5471 { "restorereg.p", dot_restorereg
, 1 },
5472 { "handlerdata", dot_handlerdata
, 0 },
5473 { "unwentry", dot_unwentry
, 0 },
5474 { "altrp", dot_altrp
, 0 },
5475 { "savesp", dot_savemem
, 0 },
5476 { "savepsp", dot_savemem
, 1 },
5477 { "save.g", dot_saveg
, 0 },
5478 { "save.f", dot_savef
, 0 },
5479 { "save.b", dot_saveb
, 0 },
5480 { "save.gf", dot_savegf
, 0 },
5481 { "spill", dot_spill
, 0 },
5482 { "spillreg", dot_spillreg
, 0 },
5483 { "spillsp", dot_spillmem
, 0 },
5484 { "spillpsp", dot_spillmem
, 1 },
5485 { "spillreg.p", dot_spillreg
, 1 },
5486 { "spillsp.p", dot_spillmem
, ~0 },
5487 { "spillpsp.p", dot_spillmem
, ~1 },
5488 { "label_state", dot_label_state
, 0 },
5489 { "copy_state", dot_copy_state
, 0 },
5490 { "unwabi", dot_unwabi
, 0 },
5491 { "personality", dot_personality
, 0 },
5492 { "mii", dot_template
, 0x0 },
5493 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5494 { "mlx", dot_template
, 0x2 },
5495 { "mmi", dot_template
, 0x4 },
5496 { "mfi", dot_template
, 0x6 },
5497 { "mmf", dot_template
, 0x7 },
5498 { "mib", dot_template
, 0x8 },
5499 { "mbb", dot_template
, 0x9 },
5500 { "bbb", dot_template
, 0xb },
5501 { "mmb", dot_template
, 0xc },
5502 { "mfb", dot_template
, 0xe },
5503 { "align", dot_align
, 0 },
5504 { "regstk", dot_regstk
, 0 },
5505 { "rotr", dot_rot
, DYNREG_GR
},
5506 { "rotf", dot_rot
, DYNREG_FR
},
5507 { "rotp", dot_rot
, DYNREG_PR
},
5508 { "lsb", dot_byteorder
, 0 },
5509 { "msb", dot_byteorder
, 1 },
5510 { "psr", dot_psr
, 0 },
5511 { "alias", dot_alias
, 0 },
5512 { "secalias", dot_alias
, 1 },
5513 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5515 { "xdata1", dot_xdata
, 1 },
5516 { "xdata2", dot_xdata
, 2 },
5517 { "xdata4", dot_xdata
, 4 },
5518 { "xdata8", dot_xdata
, 8 },
5519 { "xdata16", dot_xdata
, 16 },
5520 { "xreal4", dot_xfloat_cons
, 'f' },
5521 { "xreal8", dot_xfloat_cons
, 'd' },
5522 { "xreal10", dot_xfloat_cons
, 'x' },
5523 { "xreal16", dot_xfloat_cons
, 'X' },
5524 { "xstring", dot_xstringer
, 0 },
5525 { "xstringz", dot_xstringer
, 1 },
5527 /* unaligned versions: */
5528 { "xdata2.ua", dot_xdata_ua
, 2 },
5529 { "xdata4.ua", dot_xdata_ua
, 4 },
5530 { "xdata8.ua", dot_xdata_ua
, 8 },
5531 { "xdata16.ua", dot_xdata_ua
, 16 },
5532 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5533 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5534 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5535 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5537 /* annotations/DV checking support */
5538 { "entry", dot_entry
, 0 },
5539 { "mem.offset", dot_mem_offset
, 0 },
5540 { "pred.rel", dot_pred_rel
, 0 },
5541 { "pred.rel.clear", dot_pred_rel
, 'c' },
5542 { "pred.rel.imply", dot_pred_rel
, 'i' },
5543 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5544 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5545 { "reg.val", dot_reg_val
, 0 },
5546 { "serialize.data", dot_serialize
, 0 },
5547 { "serialize.instruction", dot_serialize
, 1 },
5548 { "auto", dot_dv_mode
, 'a' },
5549 { "explicit", dot_dv_mode
, 'e' },
5550 { "default", dot_dv_mode
, 'd' },
5552 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5553 IA-64 aligns data allocation pseudo-ops by default, so we have to
5554 tell it that these ones are supposed to be unaligned. Long term,
5555 should rewrite so that only IA-64 specific data allocation pseudo-ops
5556 are aligned by default. */
5557 {"2byte", stmt_cons_ua
, 2},
5558 {"4byte", stmt_cons_ua
, 4},
5559 {"8byte", stmt_cons_ua
, 8},
5564 static const struct pseudo_opcode
5567 void (*handler
) (int);
5572 /* these are more like pseudo-ops, but don't start with a dot */
5573 { "data1", cons
, 1 },
5574 { "data2", cons
, 2 },
5575 { "data4", cons
, 4 },
5576 { "data8", cons
, 8 },
5577 { "data16", cons
, 16 },
5578 { "real4", stmt_float_cons
, 'f' },
5579 { "real8", stmt_float_cons
, 'd' },
5580 { "real10", stmt_float_cons
, 'x' },
5581 { "real16", stmt_float_cons
, 'X' },
5582 { "string", stringer
, 0 },
5583 { "stringz", stringer
, 1 },
5585 /* unaligned versions: */
5586 { "data2.ua", stmt_cons_ua
, 2 },
5587 { "data4.ua", stmt_cons_ua
, 4 },
5588 { "data8.ua", stmt_cons_ua
, 8 },
5589 { "data16.ua", stmt_cons_ua
, 16 },
5590 { "real4.ua", float_cons
, 'f' },
5591 { "real8.ua", float_cons
, 'd' },
5592 { "real10.ua", float_cons
, 'x' },
5593 { "real16.ua", float_cons
, 'X' },
5596 /* Declare a register by creating a symbol for it and entering it in
5597 the symbol table. */
5600 declare_register (name
, regnum
)
5607 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5609 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5611 as_fatal ("Inserting \"%s\" into register table failed: %s",
5618 declare_register_set (prefix
, num_regs
, base_regnum
)
5626 for (i
= 0; i
< num_regs
; ++i
)
5628 sprintf (name
, "%s%u", prefix
, i
);
5629 declare_register (name
, base_regnum
+ i
);
5634 operand_width (opnd
)
5635 enum ia64_opnd opnd
;
5637 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5638 unsigned int bits
= 0;
5642 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5643 bits
+= odesc
->field
[i
].bits
;
5648 static enum operand_match_result
5649 operand_match (idesc
, index
, e
)
5650 const struct ia64_opcode
*idesc
;
5654 enum ia64_opnd opnd
= idesc
->operands
[index
];
5655 int bits
, relocatable
= 0;
5656 struct insn_fix
*fix
;
5663 case IA64_OPND_AR_CCV
:
5664 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5665 return OPERAND_MATCH
;
5668 case IA64_OPND_AR_CSD
:
5669 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5670 return OPERAND_MATCH
;
5673 case IA64_OPND_AR_PFS
:
5674 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5675 return OPERAND_MATCH
;
5679 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5680 return OPERAND_MATCH
;
5684 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5685 return OPERAND_MATCH
;
5689 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5690 return OPERAND_MATCH
;
5693 case IA64_OPND_PR_ROT
:
5694 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5695 return OPERAND_MATCH
;
5699 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5700 return OPERAND_MATCH
;
5703 case IA64_OPND_PSR_L
:
5704 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5705 return OPERAND_MATCH
;
5708 case IA64_OPND_PSR_UM
:
5709 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5710 return OPERAND_MATCH
;
5714 if (e
->X_op
== O_constant
)
5716 if (e
->X_add_number
== 1)
5717 return OPERAND_MATCH
;
5719 return OPERAND_OUT_OF_RANGE
;
5724 if (e
->X_op
== O_constant
)
5726 if (e
->X_add_number
== 8)
5727 return OPERAND_MATCH
;
5729 return OPERAND_OUT_OF_RANGE
;
5734 if (e
->X_op
== O_constant
)
5736 if (e
->X_add_number
== 16)
5737 return OPERAND_MATCH
;
5739 return OPERAND_OUT_OF_RANGE
;
5743 /* register operands: */
5746 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5747 && e
->X_add_number
< REG_AR
+ 128)
5748 return OPERAND_MATCH
;
5753 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5754 && e
->X_add_number
< REG_BR
+ 8)
5755 return OPERAND_MATCH
;
5759 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5760 && e
->X_add_number
< REG_CR
+ 128)
5761 return OPERAND_MATCH
;
5768 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5769 && e
->X_add_number
< REG_FR
+ 128)
5770 return OPERAND_MATCH
;
5775 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5776 && e
->X_add_number
< REG_P
+ 64)
5777 return OPERAND_MATCH
;
5783 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5784 && e
->X_add_number
< REG_GR
+ 128)
5785 return OPERAND_MATCH
;
5788 case IA64_OPND_R3_2
:
5789 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5791 if (e
->X_add_number
< REG_GR
+ 4)
5792 return OPERAND_MATCH
;
5793 else if (e
->X_add_number
< REG_GR
+ 128)
5794 return OPERAND_OUT_OF_RANGE
;
5798 /* indirect operands: */
5799 case IA64_OPND_CPUID_R3
:
5800 case IA64_OPND_DBR_R3
:
5801 case IA64_OPND_DTR_R3
:
5802 case IA64_OPND_ITR_R3
:
5803 case IA64_OPND_IBR_R3
:
5804 case IA64_OPND_MSR_R3
:
5805 case IA64_OPND_PKR_R3
:
5806 case IA64_OPND_PMC_R3
:
5807 case IA64_OPND_PMD_R3
:
5808 case IA64_OPND_RR_R3
:
5809 if (e
->X_op
== O_index
&& e
->X_op_symbol
5810 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5811 == opnd
- IA64_OPND_CPUID_R3
))
5812 return OPERAND_MATCH
;
5816 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5817 return OPERAND_MATCH
;
5820 /* immediate operands: */
5821 case IA64_OPND_CNT2a
:
5822 case IA64_OPND_LEN4
:
5823 case IA64_OPND_LEN6
:
5824 bits
= operand_width (idesc
->operands
[index
]);
5825 if (e
->X_op
== O_constant
)
5827 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5828 return OPERAND_MATCH
;
5830 return OPERAND_OUT_OF_RANGE
;
5834 case IA64_OPND_CNT2b
:
5835 if (e
->X_op
== O_constant
)
5837 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5838 return OPERAND_MATCH
;
5840 return OPERAND_OUT_OF_RANGE
;
5844 case IA64_OPND_CNT2c
:
5845 val
= e
->X_add_number
;
5846 if (e
->X_op
== O_constant
)
5848 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5849 return OPERAND_MATCH
;
5851 return OPERAND_OUT_OF_RANGE
;
5856 /* SOR must be an integer multiple of 8 */
5857 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5858 return OPERAND_OUT_OF_RANGE
;
5861 if (e
->X_op
== O_constant
)
5863 if ((bfd_vma
) e
->X_add_number
<= 96)
5864 return OPERAND_MATCH
;
5866 return OPERAND_OUT_OF_RANGE
;
5870 case IA64_OPND_IMMU62
:
5871 if (e
->X_op
== O_constant
)
5873 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5874 return OPERAND_MATCH
;
5876 return OPERAND_OUT_OF_RANGE
;
5880 /* FIXME -- need 62-bit relocation type */
5881 as_bad (_("62-bit relocation not yet implemented"));
5885 case IA64_OPND_IMMU64
:
5886 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5887 || e
->X_op
== O_subtract
)
5889 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5890 fix
->code
= BFD_RELOC_IA64_IMM64
;
5891 if (e
->X_op
!= O_subtract
)
5893 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5894 if (e
->X_op
== O_pseudo_fixup
)
5898 fix
->opnd
= idesc
->operands
[index
];
5901 ++CURR_SLOT
.num_fixups
;
5902 return OPERAND_MATCH
;
5904 else if (e
->X_op
== O_constant
)
5905 return OPERAND_MATCH
;
5908 case IA64_OPND_CCNT5
:
5909 case IA64_OPND_CNT5
:
5910 case IA64_OPND_CNT6
:
5911 case IA64_OPND_CPOS6a
:
5912 case IA64_OPND_CPOS6b
:
5913 case IA64_OPND_CPOS6c
:
5914 case IA64_OPND_IMMU2
:
5915 case IA64_OPND_IMMU7a
:
5916 case IA64_OPND_IMMU7b
:
5917 case IA64_OPND_IMMU21
:
5918 case IA64_OPND_IMMU24
:
5919 case IA64_OPND_MBTYPE4
:
5920 case IA64_OPND_MHTYPE8
:
5921 case IA64_OPND_POS6
:
5922 bits
= operand_width (idesc
->operands
[index
]);
5923 if (e
->X_op
== O_constant
)
5925 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5926 return OPERAND_MATCH
;
5928 return OPERAND_OUT_OF_RANGE
;
5932 case IA64_OPND_IMMU9
:
5933 bits
= operand_width (idesc
->operands
[index
]);
5934 if (e
->X_op
== O_constant
)
5936 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5938 int lobits
= e
->X_add_number
& 0x3;
5939 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5940 e
->X_add_number
|= (bfd_vma
) 0x3;
5941 return OPERAND_MATCH
;
5944 return OPERAND_OUT_OF_RANGE
;
5948 case IA64_OPND_IMM44
:
5949 /* least 16 bits must be zero */
5950 if ((e
->X_add_number
& 0xffff) != 0)
5951 /* XXX technically, this is wrong: we should not be issuing warning
5952 messages until we're sure this instruction pattern is going to
5954 as_warn (_("lower 16 bits of mask ignored"));
5956 if (e
->X_op
== O_constant
)
5958 if (((e
->X_add_number
>= 0
5959 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5960 || (e
->X_add_number
< 0
5961 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5964 if (e
->X_add_number
>= 0
5965 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5967 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5969 return OPERAND_MATCH
;
5972 return OPERAND_OUT_OF_RANGE
;
5976 case IA64_OPND_IMM17
:
5977 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5978 if (e
->X_op
== O_constant
)
5980 if (((e
->X_add_number
>= 0
5981 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5982 || (e
->X_add_number
< 0
5983 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5986 if (e
->X_add_number
>= 0
5987 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5989 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5991 return OPERAND_MATCH
;
5994 return OPERAND_OUT_OF_RANGE
;
5998 case IA64_OPND_IMM14
:
5999 case IA64_OPND_IMM22
:
6001 case IA64_OPND_IMM1
:
6002 case IA64_OPND_IMM8
:
6003 case IA64_OPND_IMM8U4
:
6004 case IA64_OPND_IMM8M1
:
6005 case IA64_OPND_IMM8M1U4
:
6006 case IA64_OPND_IMM8M1U8
:
6007 case IA64_OPND_IMM9a
:
6008 case IA64_OPND_IMM9b
:
6009 bits
= operand_width (idesc
->operands
[index
]);
6010 if (relocatable
&& (e
->X_op
== O_symbol
6011 || e
->X_op
== O_subtract
6012 || e
->X_op
== O_pseudo_fixup
))
6014 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6016 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
6017 fix
->code
= BFD_RELOC_IA64_IMM14
;
6019 fix
->code
= BFD_RELOC_IA64_IMM22
;
6021 if (e
->X_op
!= O_subtract
)
6023 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6024 if (e
->X_op
== O_pseudo_fixup
)
6028 fix
->opnd
= idesc
->operands
[index
];
6031 ++CURR_SLOT
.num_fixups
;
6032 return OPERAND_MATCH
;
6034 else if (e
->X_op
!= O_constant
6035 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
6036 return OPERAND_MISMATCH
;
6038 if (opnd
== IA64_OPND_IMM8M1U4
)
6040 /* Zero is not valid for unsigned compares that take an adjusted
6041 constant immediate range. */
6042 if (e
->X_add_number
== 0)
6043 return OPERAND_OUT_OF_RANGE
;
6045 /* Sign-extend 32-bit unsigned numbers, so that the following range
6046 checks will work. */
6047 val
= e
->X_add_number
;
6048 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6049 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6050 val
= ((val
<< 32) >> 32);
6052 /* Check for 0x100000000. This is valid because
6053 0x100000000-1 is the same as ((uint32_t) -1). */
6054 if (val
== ((bfd_signed_vma
) 1 << 32))
6055 return OPERAND_MATCH
;
6059 else if (opnd
== IA64_OPND_IMM8M1U8
)
6061 /* Zero is not valid for unsigned compares that take an adjusted
6062 constant immediate range. */
6063 if (e
->X_add_number
== 0)
6064 return OPERAND_OUT_OF_RANGE
;
6066 /* Check for 0x10000000000000000. */
6067 if (e
->X_op
== O_big
)
6069 if (generic_bignum
[0] == 0
6070 && generic_bignum
[1] == 0
6071 && generic_bignum
[2] == 0
6072 && generic_bignum
[3] == 0
6073 && generic_bignum
[4] == 1)
6074 return OPERAND_MATCH
;
6076 return OPERAND_OUT_OF_RANGE
;
6079 val
= e
->X_add_number
- 1;
6081 else if (opnd
== IA64_OPND_IMM8M1
)
6082 val
= e
->X_add_number
- 1;
6083 else if (opnd
== IA64_OPND_IMM8U4
)
6085 /* Sign-extend 32-bit unsigned numbers, so that the following range
6086 checks will work. */
6087 val
= e
->X_add_number
;
6088 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6089 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6090 val
= ((val
<< 32) >> 32);
6093 val
= e
->X_add_number
;
6095 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
6096 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
6097 return OPERAND_MATCH
;
6099 return OPERAND_OUT_OF_RANGE
;
6101 case IA64_OPND_INC3
:
6102 /* +/- 1, 4, 8, 16 */
6103 val
= e
->X_add_number
;
6106 if (e
->X_op
== O_constant
)
6108 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
6109 return OPERAND_MATCH
;
6111 return OPERAND_OUT_OF_RANGE
;
6115 case IA64_OPND_TGT25
:
6116 case IA64_OPND_TGT25b
:
6117 case IA64_OPND_TGT25c
:
6118 case IA64_OPND_TGT64
:
6119 if (e
->X_op
== O_symbol
)
6121 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6122 if (opnd
== IA64_OPND_TGT25
)
6123 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
6124 else if (opnd
== IA64_OPND_TGT25b
)
6125 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
6126 else if (opnd
== IA64_OPND_TGT25c
)
6127 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
6128 else if (opnd
== IA64_OPND_TGT64
)
6129 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
6133 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6134 fix
->opnd
= idesc
->operands
[index
];
6137 ++CURR_SLOT
.num_fixups
;
6138 return OPERAND_MATCH
;
6140 case IA64_OPND_TAG13
:
6141 case IA64_OPND_TAG13b
:
6145 return OPERAND_MATCH
;
6148 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6149 /* There are no external relocs for TAG13/TAG13b fields, so we
6150 create a dummy reloc. This will not live past md_apply_fix. */
6151 fix
->code
= BFD_RELOC_UNUSED
;
6152 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6153 fix
->opnd
= idesc
->operands
[index
];
6156 ++CURR_SLOT
.num_fixups
;
6157 return OPERAND_MATCH
;
6164 case IA64_OPND_LDXMOV
:
6165 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6166 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6167 fix
->opnd
= idesc
->operands
[index
];
6170 ++CURR_SLOT
.num_fixups
;
6171 return OPERAND_MATCH
;
6176 return OPERAND_MISMATCH
;
6180 parse_operand (e
, more
)
6186 memset (e
, 0, sizeof (*e
));
6189 expression_and_evaluate (e
);
6190 sep
= *input_line_pointer
;
6191 if (more
&& (sep
== ',' || sep
== more
))
6192 ++input_line_pointer
;
6196 /* Returns the next entry in the opcode table that matches the one in
6197 IDESC, and frees the entry in IDESC. If no matching entry is
6198 found, NULL is returned instead. */
6200 static struct ia64_opcode
*
6201 get_next_opcode (struct ia64_opcode
*idesc
)
6203 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6204 ia64_free_opcode (idesc
);
6208 /* Parse the operands for the opcode and find the opcode variant that
6209 matches the specified operands, or NULL if no match is possible. */
6211 static struct ia64_opcode
*
6212 parse_operands (idesc
)
6213 struct ia64_opcode
*idesc
;
6215 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6216 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6219 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6220 enum operand_match_result result
;
6222 char *first_arg
= 0, *end
, *saved_input_pointer
;
6225 assert (strlen (idesc
->name
) <= 128);
6227 strcpy (mnemonic
, idesc
->name
);
6228 if (idesc
->operands
[2] == IA64_OPND_SOF
6229 || idesc
->operands
[1] == IA64_OPND_SOF
)
6231 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6232 can't parse the first operand until we have parsed the
6233 remaining operands of the "alloc" instruction. */
6235 first_arg
= input_line_pointer
;
6236 end
= strchr (input_line_pointer
, '=');
6239 as_bad ("Expected separator `='");
6242 input_line_pointer
= end
+ 1;
6249 if (i
< NELEMS (CURR_SLOT
.opnd
))
6251 sep
= parse_operand (CURR_SLOT
.opnd
+ i
, '=');
6252 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6259 sep
= parse_operand (&dummy
, '=');
6260 if (dummy
.X_op
== O_absent
)
6266 if (sep
!= '=' && sep
!= ',')
6271 if (num_outputs
> 0)
6272 as_bad ("Duplicate equal sign (=) in instruction");
6274 num_outputs
= i
+ 1;
6279 as_bad ("Illegal operand separator `%c'", sep
);
6283 if (idesc
->operands
[2] == IA64_OPND_SOF
6284 || idesc
->operands
[1] == IA64_OPND_SOF
)
6286 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6287 Note, however, that due to that mapping operand numbers in error
6288 messages for any of the constant operands will not be correct. */
6289 know (strcmp (idesc
->name
, "alloc") == 0);
6290 /* The first operand hasn't been parsed/initialized, yet (but
6291 num_operands intentionally doesn't account for that). */
6292 i
= num_operands
> 4 ? 2 : 1;
6293 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6294 ? CURR_SLOT.opnd[n].X_add_number \
6296 sof
= set_regstack (FORCE_CONST(i
),
6299 FORCE_CONST(i
+ 3));
6302 /* now we can parse the first arg: */
6303 saved_input_pointer
= input_line_pointer
;
6304 input_line_pointer
= first_arg
;
6305 sep
= parse_operand (CURR_SLOT
.opnd
+ 0, '=');
6307 --num_outputs
; /* force error */
6308 input_line_pointer
= saved_input_pointer
;
6310 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6311 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6312 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6313 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6314 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6316 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6317 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6320 highest_unmatched_operand
= -4;
6321 curr_out_of_range_pos
= -1;
6323 for (; idesc
; idesc
= get_next_opcode (idesc
))
6325 if (num_outputs
!= idesc
->num_outputs
)
6326 continue; /* mismatch in # of outputs */
6327 if (highest_unmatched_operand
< 0)
6328 highest_unmatched_operand
|= 1;
6329 if (num_operands
> NELEMS (idesc
->operands
)
6330 || (num_operands
< NELEMS (idesc
->operands
)
6331 && idesc
->operands
[num_operands
])
6332 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6333 continue; /* mismatch in number of arguments */
6334 if (highest_unmatched_operand
< 0)
6335 highest_unmatched_operand
|= 2;
6337 CURR_SLOT
.num_fixups
= 0;
6339 /* Try to match all operands. If we see an out-of-range operand,
6340 then continue trying to match the rest of the operands, since if
6341 the rest match, then this idesc will give the best error message. */
6343 out_of_range_pos
= -1;
6344 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6346 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6347 if (result
!= OPERAND_MATCH
)
6349 if (result
!= OPERAND_OUT_OF_RANGE
)
6351 if (out_of_range_pos
< 0)
6352 /* remember position of the first out-of-range operand: */
6353 out_of_range_pos
= i
;
6357 /* If we did not match all operands, or if at least one operand was
6358 out-of-range, then this idesc does not match. Keep track of which
6359 idesc matched the most operands before failing. If we have two
6360 idescs that failed at the same position, and one had an out-of-range
6361 operand, then prefer the out-of-range operand. Thus if we have
6362 "add r0=0x1000000,r1" we get an error saying the constant is out
6363 of range instead of an error saying that the constant should have been
6366 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6368 if (i
> highest_unmatched_operand
6369 || (i
== highest_unmatched_operand
6370 && out_of_range_pos
> curr_out_of_range_pos
))
6372 highest_unmatched_operand
= i
;
6373 if (out_of_range_pos
>= 0)
6375 expected_operand
= idesc
->operands
[out_of_range_pos
];
6376 error_pos
= out_of_range_pos
;
6380 expected_operand
= idesc
->operands
[i
];
6383 curr_out_of_range_pos
= out_of_range_pos
;
6392 if (expected_operand
)
6393 as_bad ("Operand %u of `%s' should be %s",
6394 error_pos
+ 1, mnemonic
,
6395 elf64_ia64_operands
[expected_operand
].desc
);
6396 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6397 as_bad ("Wrong number of output operands");
6398 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6399 as_bad ("Wrong number of input operands");
6401 as_bad ("Operand mismatch");
6405 /* Check that the instruction doesn't use
6406 - r0, f0, or f1 as output operands
6407 - the same predicate twice as output operands
6408 - r0 as address of a base update load or store
6409 - the same GR as output and address of a base update load
6410 - two even- or two odd-numbered FRs as output operands of a floating
6411 point parallel load.
6412 At most two (conflicting) output (or output-like) operands can exist,
6413 (floating point parallel loads have three outputs, but the base register,
6414 if updated, cannot conflict with the actual outputs). */
6416 for (i
= 0; i
< num_operands
; ++i
)
6421 switch (idesc
->operands
[i
])
6426 if (i
< num_outputs
)
6428 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6431 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6433 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6438 if (i
< num_outputs
)
6441 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6443 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6450 if (i
< num_outputs
)
6452 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6453 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6456 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6459 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6461 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6465 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6467 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6470 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6472 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6483 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6486 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6492 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6497 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6502 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6510 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6512 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6513 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6514 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6515 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6516 && ! ((reg1
^ reg2
) & 1))
6517 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6518 reg1
- REG_FR
, reg2
- REG_FR
);
6519 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6520 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6521 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6522 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6523 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6524 reg1
- REG_FR
, reg2
- REG_FR
);
6529 build_insn (slot
, insnp
)
6533 const struct ia64_operand
*odesc
, *o2desc
;
6534 struct ia64_opcode
*idesc
= slot
->idesc
;
6540 insn
= idesc
->opcode
| slot
->qp_regno
;
6542 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6544 if (slot
->opnd
[i
].X_op
== O_register
6545 || slot
->opnd
[i
].X_op
== O_constant
6546 || slot
->opnd
[i
].X_op
== O_index
)
6547 val
= slot
->opnd
[i
].X_add_number
;
6548 else if (slot
->opnd
[i
].X_op
== O_big
)
6550 /* This must be the value 0x10000000000000000. */
6551 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6557 switch (idesc
->operands
[i
])
6559 case IA64_OPND_IMMU64
:
6560 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6561 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6562 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6563 | (((val
>> 63) & 0x1) << 36));
6566 case IA64_OPND_IMMU62
:
6567 val
&= 0x3fffffffffffffffULL
;
6568 if (val
!= slot
->opnd
[i
].X_add_number
)
6569 as_warn (_("Value truncated to 62 bits"));
6570 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6571 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6574 case IA64_OPND_TGT64
:
6576 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6577 insn
|= ((((val
>> 59) & 0x1) << 36)
6578 | (((val
>> 0) & 0xfffff) << 13));
6609 case IA64_OPND_R3_2
:
6610 case IA64_OPND_CPUID_R3
:
6611 case IA64_OPND_DBR_R3
:
6612 case IA64_OPND_DTR_R3
:
6613 case IA64_OPND_ITR_R3
:
6614 case IA64_OPND_IBR_R3
:
6616 case IA64_OPND_MSR_R3
:
6617 case IA64_OPND_PKR_R3
:
6618 case IA64_OPND_PMC_R3
:
6619 case IA64_OPND_PMD_R3
:
6620 case IA64_OPND_RR_R3
:
6628 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6629 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6631 as_bad_where (slot
->src_file
, slot
->src_line
,
6632 "Bad operand value: %s", err
);
6633 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6635 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6636 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6638 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6639 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6641 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6642 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6643 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6645 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6646 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6656 int manual_bundling_off
= 0, manual_bundling
= 0;
6657 enum ia64_unit required_unit
, insn_unit
= 0;
6658 enum ia64_insn_type type
[3], insn_type
;
6659 unsigned int template, orig_template
;
6660 bfd_vma insn
[3] = { -1, -1, -1 };
6661 struct ia64_opcode
*idesc
;
6662 int end_of_insn_group
= 0, user_template
= -1;
6663 int n
, i
, j
, first
, curr
, last_slot
;
6664 bfd_vma t0
= 0, t1
= 0;
6665 struct label_fix
*lfix
;
6666 bfd_boolean mark_label
;
6667 struct insn_fix
*ifix
;
6673 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6674 know (first
>= 0 & first
< NUM_SLOTS
);
6675 n
= MIN (3, md
.num_slots_in_use
);
6677 /* Determine template: user user_template if specified, best match
6680 if (md
.slot
[first
].user_template
>= 0)
6681 user_template
= template = md
.slot
[first
].user_template
;
6684 /* Auto select appropriate template. */
6685 memset (type
, 0, sizeof (type
));
6687 for (i
= 0; i
< n
; ++i
)
6689 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6691 type
[i
] = md
.slot
[curr
].idesc
->type
;
6692 curr
= (curr
+ 1) % NUM_SLOTS
;
6694 template = best_template
[type
[0]][type
[1]][type
[2]];
6697 /* initialize instructions with appropriate nops: */
6698 for (i
= 0; i
< 3; ++i
)
6699 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6703 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6704 from the start of the frag. */
6705 addr_mod
= frag_now_fix () & 15;
6706 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6707 as_bad (_("instruction address is not a multiple of 16"));
6708 frag_now
->insn_addr
= addr_mod
;
6709 frag_now
->has_code
= 1;
6711 /* now fill in slots with as many insns as possible: */
6713 idesc
= md
.slot
[curr
].idesc
;
6714 end_of_insn_group
= 0;
6716 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6718 /* If we have unwind records, we may need to update some now. */
6719 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6720 unw_rec_list
*end_ptr
= NULL
;
6724 /* Find the last prologue/body record in the list for the current
6725 insn, and set the slot number for all records up to that point.
6726 This needs to be done now, because prologue/body records refer to
6727 the current point, not the point after the instruction has been
6728 issued. This matters because there may have been nops emitted
6729 meanwhile. Any non-prologue non-body record followed by a
6730 prologue/body record must also refer to the current point. */
6731 unw_rec_list
*last_ptr
;
6733 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6734 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6735 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6736 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6737 || ptr
->r
.type
== body
)
6741 /* Make last_ptr point one after the last prologue/body
6743 last_ptr
= last_ptr
->next
;
6744 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6747 ptr
->slot_number
= (unsigned long) f
+ i
;
6748 ptr
->slot_frag
= frag_now
;
6750 /* Remove the initialized records, so that we won't accidentally
6751 update them again if we insert a nop and continue. */
6752 md
.slot
[curr
].unwind_record
= last_ptr
;
6756 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6757 if (md
.slot
[curr
].manual_bundling_on
)
6760 manual_bundling
= 1;
6762 break; /* Need to start a new bundle. */
6765 /* If this instruction specifies a template, then it must be the first
6766 instruction of a bundle. */
6767 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6770 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6772 if (manual_bundling
&& !manual_bundling_off
)
6774 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6775 "`%s' must be last in bundle", idesc
->name
);
6777 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6781 if (idesc
->flags
& IA64_OPCODE_LAST
)
6784 unsigned int required_template
;
6786 /* If we need a stop bit after an M slot, our only choice is
6787 template 5 (M;;MI). If we need a stop bit after a B
6788 slot, our only choice is to place it at the end of the
6789 bundle, because the only available templates are MIB,
6790 MBB, BBB, MMB, and MFB. We don't handle anything other
6791 than M and B slots because these are the only kind of
6792 instructions that can have the IA64_OPCODE_LAST bit set. */
6793 required_template
= template;
6794 switch (idesc
->type
)
6798 required_template
= 5;
6806 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6807 "Internal error: don't know how to force %s to end"
6808 "of instruction group", idesc
->name
);
6813 && (i
> required_slot
6814 || (required_slot
== 2 && !manual_bundling_off
)
6815 || (user_template
>= 0
6816 /* Changing from MMI to M;MI is OK. */
6817 && (template ^ required_template
) > 1)))
6819 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6820 "`%s' must be last in instruction group",
6822 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6823 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6825 if (required_slot
< i
)
6826 /* Can't fit this instruction. */
6830 if (required_template
!= template)
6832 /* If we switch the template, we need to reset the NOPs
6833 after slot i. The slot-types of the instructions ahead
6834 of i never change, so we don't need to worry about
6835 changing NOPs in front of this slot. */
6836 for (j
= i
; j
< 3; ++j
)
6837 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6839 template = required_template
;
6841 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6843 if (manual_bundling
)
6845 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6846 "Label must be first in a bundle");
6847 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6849 /* This insn must go into the first slot of a bundle. */
6853 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6855 /* We need an instruction group boundary in the middle of a
6856 bundle. See if we can switch to an other template with
6857 an appropriate boundary. */
6859 orig_template
= template;
6860 if (i
== 1 && (user_template
== 4
6861 || (user_template
< 0
6862 && (ia64_templ_desc
[template].exec_unit
[0]
6866 end_of_insn_group
= 0;
6868 else if (i
== 2 && (user_template
== 0
6869 || (user_template
< 0
6870 && (ia64_templ_desc
[template].exec_unit
[1]
6872 /* This test makes sure we don't switch the template if
6873 the next instruction is one that needs to be first in
6874 an instruction group. Since all those instructions are
6875 in the M group, there is no way such an instruction can
6876 fit in this bundle even if we switch the template. The
6877 reason we have to check for this is that otherwise we
6878 may end up generating "MI;;I M.." which has the deadly
6879 effect that the second M instruction is no longer the
6880 first in the group! --davidm 99/12/16 */
6881 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6884 end_of_insn_group
= 0;
6887 && user_template
== 0
6888 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6889 /* Use the next slot. */
6891 else if (curr
!= first
)
6892 /* can't fit this insn */
6895 if (template != orig_template
)
6896 /* if we switch the template, we need to reset the NOPs
6897 after slot i. The slot-types of the instructions ahead
6898 of i never change, so we don't need to worry about
6899 changing NOPs in front of this slot. */
6900 for (j
= i
; j
< 3; ++j
)
6901 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6903 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6905 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6906 if (idesc
->type
== IA64_TYPE_DYN
)
6908 enum ia64_opnd opnd1
, opnd2
;
6910 if ((strcmp (idesc
->name
, "nop") == 0)
6911 || (strcmp (idesc
->name
, "break") == 0))
6912 insn_unit
= required_unit
;
6913 else if (strcmp (idesc
->name
, "hint") == 0)
6915 insn_unit
= required_unit
;
6916 if (required_unit
== IA64_UNIT_B
)
6922 case hint_b_warning
:
6923 as_warn ("hint in B unit may be treated as nop");
6926 /* When manual bundling is off and there is no
6927 user template, we choose a different unit so
6928 that hint won't go into the current slot. We
6929 will fill the current bundle with nops and
6930 try to put hint into the next bundle. */
6931 if (!manual_bundling
&& user_template
< 0)
6932 insn_unit
= IA64_UNIT_I
;
6934 as_bad ("hint in B unit can't be used");
6939 else if (strcmp (idesc
->name
, "chk.s") == 0
6940 || strcmp (idesc
->name
, "mov") == 0)
6942 insn_unit
= IA64_UNIT_M
;
6943 if (required_unit
== IA64_UNIT_I
6944 || (required_unit
== IA64_UNIT_F
&& template == 6))
6945 insn_unit
= IA64_UNIT_I
;
6948 as_fatal ("emit_one_bundle: unexpected dynamic op");
6950 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6951 opnd1
= idesc
->operands
[0];
6952 opnd2
= idesc
->operands
[1];
6953 ia64_free_opcode (idesc
);
6954 idesc
= ia64_find_opcode (mnemonic
);
6955 /* moves to/from ARs have collisions */
6956 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6958 while (idesc
!= NULL
6959 && (idesc
->operands
[0] != opnd1
6960 || idesc
->operands
[1] != opnd2
))
6961 idesc
= get_next_opcode (idesc
);
6963 md
.slot
[curr
].idesc
= idesc
;
6967 insn_type
= idesc
->type
;
6968 insn_unit
= IA64_UNIT_NIL
;
6972 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6973 insn_unit
= required_unit
;
6975 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6976 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6977 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6978 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6979 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6984 if (insn_unit
!= required_unit
)
6985 continue; /* Try next slot. */
6987 /* Now is a good time to fix up the labels for this insn. */
6989 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6991 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6992 symbol_set_frag (lfix
->sym
, frag_now
);
6993 mark_label
|= lfix
->dw2_mark_labels
;
6995 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6997 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6998 symbol_set_frag (lfix
->sym
, frag_now
);
7001 if (debug_type
== DEBUG_DWARF2
7002 || md
.slot
[curr
].loc_directive_seen
7005 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
7007 md
.slot
[curr
].loc_directive_seen
= 0;
7009 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
7011 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
7014 build_insn (md
.slot
+ curr
, insn
+ i
);
7016 ptr
= md
.slot
[curr
].unwind_record
;
7019 /* Set slot numbers for all remaining unwind records belonging to the
7020 current insn. There can not be any prologue/body unwind records
7022 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
7024 ptr
->slot_number
= (unsigned long) f
+ i
;
7025 ptr
->slot_frag
= frag_now
;
7027 md
.slot
[curr
].unwind_record
= NULL
;
7030 if (required_unit
== IA64_UNIT_L
)
7033 /* skip one slot for long/X-unit instructions */
7036 --md
.num_slots_in_use
;
7039 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
7041 ifix
= md
.slot
[curr
].fixup
+ j
;
7042 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
7043 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
7044 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
7045 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
7046 fix
->fx_file
= md
.slot
[curr
].src_file
;
7047 fix
->fx_line
= md
.slot
[curr
].src_line
;
7050 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
7053 ia64_free_opcode (md
.slot
[curr
].idesc
);
7054 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7055 md
.slot
[curr
].user_template
= -1;
7057 if (manual_bundling_off
)
7059 manual_bundling
= 0;
7062 curr
= (curr
+ 1) % NUM_SLOTS
;
7063 idesc
= md
.slot
[curr
].idesc
;
7065 if (manual_bundling
> 0)
7067 if (md
.num_slots_in_use
> 0)
7070 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7071 "`%s' does not fit into bundle", idesc
->name
);
7072 else if (last_slot
< 0)
7074 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7075 "`%s' does not fit into %s template",
7076 idesc
->name
, ia64_templ_desc
[template].name
);
7077 /* Drop first insn so we don't livelock. */
7078 --md
.num_slots_in_use
;
7079 know (curr
== first
);
7080 ia64_free_opcode (md
.slot
[curr
].idesc
);
7081 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7082 md
.slot
[curr
].user_template
= -1;
7090 else if (last_slot
== 0)
7091 where
= "slots 2 or 3";
7094 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7095 "`%s' can't go in %s of %s template",
7096 idesc
->name
, where
, ia64_templ_desc
[template].name
);
7100 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7101 "Missing '}' at end of file");
7103 know (md
.num_slots_in_use
< NUM_SLOTS
);
7105 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
7106 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7108 number_to_chars_littleendian (f
+ 0, t0
, 8);
7109 number_to_chars_littleendian (f
+ 8, t1
, 8);
7113 md_parse_option (c
, arg
)
7120 /* Switches from the Intel assembler. */
7122 if (strcmp (arg
, "ilp64") == 0
7123 || strcmp (arg
, "lp64") == 0
7124 || strcmp (arg
, "p64") == 0)
7126 md
.flags
|= EF_IA_64_ABI64
;
7128 else if (strcmp (arg
, "ilp32") == 0)
7130 md
.flags
&= ~EF_IA_64_ABI64
;
7132 else if (strcmp (arg
, "le") == 0)
7134 md
.flags
&= ~EF_IA_64_BE
;
7135 default_big_endian
= 0;
7137 else if (strcmp (arg
, "be") == 0)
7139 md
.flags
|= EF_IA_64_BE
;
7140 default_big_endian
= 1;
7142 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7145 if (strcmp (arg
, "warning") == 0)
7146 md
.unwind_check
= unwind_check_warning
;
7147 else if (strcmp (arg
, "error") == 0)
7148 md
.unwind_check
= unwind_check_error
;
7152 else if (strncmp (arg
, "hint.b=", 7) == 0)
7155 if (strcmp (arg
, "ok") == 0)
7156 md
.hint_b
= hint_b_ok
;
7157 else if (strcmp (arg
, "warning") == 0)
7158 md
.hint_b
= hint_b_warning
;
7159 else if (strcmp (arg
, "error") == 0)
7160 md
.hint_b
= hint_b_error
;
7164 else if (strncmp (arg
, "tune=", 5) == 0)
7167 if (strcmp (arg
, "itanium1") == 0)
7169 else if (strcmp (arg
, "itanium2") == 0)
7179 if (strcmp (arg
, "so") == 0)
7181 /* Suppress signon message. */
7183 else if (strcmp (arg
, "pi") == 0)
7185 /* Reject privileged instructions. FIXME */
7187 else if (strcmp (arg
, "us") == 0)
7189 /* Allow union of signed and unsigned range. FIXME */
7191 else if (strcmp (arg
, "close_fcalls") == 0)
7193 /* Do not resolve global function calls. */
7200 /* temp[="prefix"] Insert temporary labels into the object file
7201 symbol table prefixed by "prefix".
7202 Default prefix is ":temp:".
7207 /* indirect=<tgt> Assume unannotated indirect branches behavior
7208 according to <tgt> --
7209 exit: branch out from the current context (default)
7210 labels: all labels in context may be branch targets
7212 if (strncmp (arg
, "indirect=", 9) != 0)
7217 /* -X conflicts with an ignored option, use -x instead */
7219 if (!arg
|| strcmp (arg
, "explicit") == 0)
7221 /* set default mode to explicit */
7222 md
.default_explicit_mode
= 1;
7225 else if (strcmp (arg
, "auto") == 0)
7227 md
.default_explicit_mode
= 0;
7229 else if (strcmp (arg
, "none") == 0)
7233 else if (strcmp (arg
, "debug") == 0)
7237 else if (strcmp (arg
, "debugx") == 0)
7239 md
.default_explicit_mode
= 1;
7242 else if (strcmp (arg
, "debugn") == 0)
7249 as_bad (_("Unrecognized option '-x%s'"), arg
);
7254 /* nops Print nops statistics. */
7257 /* GNU specific switches for gcc. */
7258 case OPTION_MCONSTANT_GP
:
7259 md
.flags
|= EF_IA_64_CONS_GP
;
7262 case OPTION_MAUTO_PIC
:
7263 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7274 md_show_usage (stream
)
7279 --mconstant-gp mark output file as using the constant-GP model\n\
7280 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7281 --mauto-pic mark output file as using the constant-GP model\n\
7282 without function descriptors (sets ELF header flag\n\
7283 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7284 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7285 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7286 -mtune=[itanium1|itanium2]\n\
7287 tune for a specific CPU (default -mtune=itanium2)\n\
7288 -munwind-check=[warning|error]\n\
7289 unwind directive check (default -munwind-check=warning)\n\
7290 -mhint.b=[ok|warning|error]\n\
7291 hint.b check (default -mhint.b=error)\n\
7292 -x | -xexplicit turn on dependency violation checking\n\
7293 -xauto automagically remove dependency violations (default)\n\
7294 -xnone turn off dependency violation checking\n\
7295 -xdebug debug dependency violation checker\n\
7296 -xdebugn debug dependency violation checker but turn off\n\
7297 dependency violation checking\n\
7298 -xdebugx debug dependency violation checker and turn on\n\
7299 dependency violation checking\n"),
7304 ia64_after_parse_args ()
7306 if (debug_type
== DEBUG_STABS
)
7307 as_fatal (_("--gstabs is not supported for ia64"));
7310 /* Return true if TYPE fits in TEMPL at SLOT. */
7313 match (int templ
, int type
, int slot
)
7315 enum ia64_unit unit
;
7318 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7321 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7323 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7325 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7326 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7327 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7328 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7329 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7330 default: result
= 0; break;
7335 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7336 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7337 type M or I would fit in TEMPL at SLOT. */
7340 extra_goodness (int templ
, int slot
)
7345 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7347 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7353 if (match (templ
, IA64_TYPE_M
, slot
)
7354 || match (templ
, IA64_TYPE_I
, slot
))
7355 /* Favor M- and I-unit NOPs. We definitely want to avoid
7356 F-unit and B-unit may cause split-issue or less-than-optimal
7357 branch-prediction. */
7368 /* This function is called once, at assembler startup time. It sets
7369 up all the tables, etc. that the MD part of the assembler will need
7370 that can be determined before arguments are parsed. */
7374 int i
, j
, k
, t
, goodness
, best
, regnum
, ok
;
7379 md
.explicit_mode
= md
.default_explicit_mode
;
7381 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7383 /* Make sure function pointers get initialized. */
7384 target_big_endian
= -1;
7385 dot_byteorder (default_big_endian
);
7387 alias_hash
= hash_new ();
7388 alias_name_hash
= hash_new ();
7389 secalias_hash
= hash_new ();
7390 secalias_name_hash
= hash_new ();
7392 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7393 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7394 &zero_address_frag
);
7396 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7397 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7398 &zero_address_frag
);
7400 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7401 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7402 &zero_address_frag
);
7404 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7405 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7406 &zero_address_frag
);
7408 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7409 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7410 &zero_address_frag
);
7412 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7413 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7414 &zero_address_frag
);
7416 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7417 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7418 &zero_address_frag
);
7420 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7421 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7422 &zero_address_frag
);
7424 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7425 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7426 &zero_address_frag
);
7428 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7429 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7430 &zero_address_frag
);
7432 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7433 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7434 &zero_address_frag
);
7436 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7437 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7438 &zero_address_frag
);
7440 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7441 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7442 &zero_address_frag
);
7444 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7445 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7446 &zero_address_frag
);
7448 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7449 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7450 &zero_address_frag
);
7452 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7453 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7454 &zero_address_frag
);
7456 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7457 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7458 &zero_address_frag
);
7460 if (md
.tune
!= itanium1
)
7462 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7464 le_nop_stop
[0] = 0x9;
7467 /* Compute the table of best templates. We compute goodness as a
7468 base 4 value, in which each match counts for 3. Match-failures
7469 result in NOPs and we use extra_goodness() to pick the execution
7470 units that are best suited for issuing the NOP. */
7471 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7472 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7473 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7476 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7479 if (match (t
, i
, 0))
7481 if (match (t
, j
, 1))
7483 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7484 goodness
= 3 + 3 + 3;
7486 goodness
= 3 + 3 + extra_goodness (t
, 2);
7488 else if (match (t
, j
, 2))
7489 goodness
= 3 + 3 + extra_goodness (t
, 1);
7493 goodness
+= extra_goodness (t
, 1);
7494 goodness
+= extra_goodness (t
, 2);
7497 else if (match (t
, i
, 1))
7499 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7502 goodness
= 3 + extra_goodness (t
, 2);
7504 else if (match (t
, i
, 2))
7505 goodness
= 3 + extra_goodness (t
, 1);
7507 if (goodness
> best
)
7510 best_template
[i
][j
][k
] = t
;
7515 #ifdef DEBUG_TEMPLATES
7516 /* For debugging changes to the best_template calculations. We don't care
7517 about combinations with invalid instructions, so start the loops at 1. */
7518 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7519 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7520 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7522 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7524 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7526 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7530 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7531 md
.slot
[i
].user_template
= -1;
7533 md
.pseudo_hash
= hash_new ();
7534 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7536 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7537 (void *) (pseudo_opcode
+ i
));
7539 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7540 pseudo_opcode
[i
].name
, err
);
7543 md
.reg_hash
= hash_new ();
7544 md
.dynreg_hash
= hash_new ();
7545 md
.const_hash
= hash_new ();
7546 md
.entry_hash
= hash_new ();
7548 /* general registers: */
7549 for (i
= REG_GR
; i
< REG_GR
+ 128; ++i
)
7551 sprintf (name
, "r%d", i
- REG_GR
);
7552 md
.regsym
[i
] = declare_register (name
, i
);
7555 /* floating point registers: */
7556 for (i
= REG_FR
; i
< REG_FR
+ 128; ++i
)
7558 sprintf (name
, "f%d", i
- REG_FR
);
7559 md
.regsym
[i
] = declare_register (name
, i
);
7562 /* application registers: */
7563 for (i
= REG_AR
; i
< REG_AR
+ 128; ++i
)
7565 sprintf (name
, "ar%d", i
- REG_AR
);
7566 md
.regsym
[i
] = declare_register (name
, i
);
7569 /* control registers: */
7570 for (i
= REG_CR
; i
< REG_CR
+ 128; ++i
)
7572 sprintf (name
, "cr%d", i
- REG_CR
);
7573 md
.regsym
[i
] = declare_register (name
, i
);
7576 /* predicate registers: */
7577 for (i
= REG_P
; i
< REG_P
+ 64; ++i
)
7579 sprintf (name
, "p%d", i
- REG_P
);
7580 md
.regsym
[i
] = declare_register (name
, i
);
7583 /* branch registers: */
7584 for (i
= REG_BR
; i
< REG_BR
+ 8; ++i
)
7586 sprintf (name
, "b%d", i
- REG_BR
);
7587 md
.regsym
[i
] = declare_register (name
, i
);
7590 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7591 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7592 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7593 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7594 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7595 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7596 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7598 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7600 regnum
= indirect_reg
[i
].regnum
;
7601 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7604 /* define synonyms for application registers: */
7605 for (i
= 0; i
< NELEMS (ar
); ++i
)
7606 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7608 /* define synonyms for control registers: */
7609 for (i
= 0; i
< NELEMS (cr
); ++i
)
7610 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7612 declare_register ("gp", REG_GR
+ 1);
7613 declare_register ("sp", REG_GR
+ 12);
7614 declare_register ("tp", REG_GR
+ 13);
7615 declare_register ("rp", REG_BR
+ 0);
7617 /* pseudo-registers used to specify unwind info: */
7618 declare_register ("psp", REG_PSP
);
7620 declare_register_set ("ret", 4, REG_GR
+ 8);
7621 declare_register_set ("farg", 8, REG_FR
+ 8);
7622 declare_register_set ("fret", 8, REG_FR
+ 8);
7624 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7626 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7627 (PTR
) (const_bits
+ i
));
7629 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7633 /* Set the architecture and machine depending on defaults and command line
7635 if (md
.flags
& EF_IA_64_ABI64
)
7636 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7638 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7641 as_warn (_("Could not set architecture and machine"));
7643 /* Set the pointer size and pointer shift size depending on md.flags */
7645 if (md
.flags
& EF_IA_64_ABI64
)
7647 md
.pointer_size
= 8; /* pointers are 8 bytes */
7648 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7652 md
.pointer_size
= 4; /* pointers are 4 bytes */
7653 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7656 md
.mem_offset
.hint
= 0;
7659 md
.entry_labels
= NULL
;
7662 /* Set the default options in md. Cannot do this in md_begin because
7663 that is called after md_parse_option which is where we set the
7664 options in md based on command line options. */
7667 ia64_init (argc
, argv
)
7668 int argc ATTRIBUTE_UNUSED
;
7669 char **argv ATTRIBUTE_UNUSED
;
7671 md
.flags
= MD_FLAGS_DEFAULT
;
7673 /* FIXME: We should change it to unwind_check_error someday. */
7674 md
.unwind_check
= unwind_check_warning
;
7675 md
.hint_b
= hint_b_error
;
7679 /* Return a string for the target object file format. */
7682 ia64_target_format ()
7684 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7686 if (md
.flags
& EF_IA_64_BE
)
7688 if (md
.flags
& EF_IA_64_ABI64
)
7689 #if defined(TE_AIX50)
7690 return "elf64-ia64-aix-big";
7691 #elif defined(TE_HPUX)
7692 return "elf64-ia64-hpux-big";
7694 return "elf64-ia64-big";
7697 #if defined(TE_AIX50)
7698 return "elf32-ia64-aix-big";
7699 #elif defined(TE_HPUX)
7700 return "elf32-ia64-hpux-big";
7702 return "elf32-ia64-big";
7707 if (md
.flags
& EF_IA_64_ABI64
)
7709 return "elf64-ia64-aix-little";
7711 return "elf64-ia64-little";
7715 return "elf32-ia64-aix-little";
7717 return "elf32-ia64-little";
7722 return "unknown-format";
7726 ia64_end_of_source ()
7728 /* terminate insn group upon reaching end of file: */
7729 insn_group_break (1, 0, 0);
7731 /* emits slots we haven't written yet: */
7732 ia64_flush_insns ();
7734 bfd_set_private_flags (stdoutput
, md
.flags
);
7736 md
.mem_offset
.hint
= 0;
7745 /* Make sure we don't reference input_line_pointer[-1] when that's
7751 if (md
.qp
.X_op
== O_register
)
7752 as_bad ("qualifying predicate not followed by instruction");
7753 md
.qp
.X_op
= O_absent
;
7755 if (ignore_input ())
7758 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7760 if (md
.detect_dv
&& !md
.explicit_mode
)
7767 as_warn (_("Explicit stops are ignored in auto mode"));
7771 insn_group_break (1, 0, 0);
7773 else if (input_line_pointer
[-1] == '{')
7775 if (md
.manual_bundling
)
7776 as_warn ("Found '{' when manual bundling is already turned on");
7778 CURR_SLOT
.manual_bundling_on
= 1;
7779 md
.manual_bundling
= 1;
7781 /* Bundling is only acceptable in explicit mode
7782 or when in default automatic mode. */
7783 if (md
.detect_dv
&& !md
.explicit_mode
)
7785 if (!md
.mode_explicitly_set
7786 && !md
.default_explicit_mode
)
7789 as_warn (_("Found '{' after explicit switch to automatic mode"));
7792 else if (input_line_pointer
[-1] == '}')
7794 if (!md
.manual_bundling
)
7795 as_warn ("Found '}' when manual bundling is off");
7797 PREV_SLOT
.manual_bundling_off
= 1;
7798 md
.manual_bundling
= 0;
7800 /* switch back to automatic mode, if applicable */
7803 && !md
.mode_explicitly_set
7804 && !md
.default_explicit_mode
)
7809 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7811 static int defining_tag
= 0;
7814 ia64_unrecognized_line (ch
)
7820 expression_and_evaluate (&md
.qp
);
7821 if (*input_line_pointer
++ != ')')
7823 as_bad ("Expected ')'");
7826 if (md
.qp
.X_op
!= O_register
)
7828 as_bad ("Qualifying predicate expected");
7831 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7833 as_bad ("Predicate register expected");
7845 if (md
.qp
.X_op
== O_register
)
7847 as_bad ("Tag must come before qualifying predicate.");
7851 /* This implements just enough of read_a_source_file in read.c to
7852 recognize labels. */
7853 if (is_name_beginner (*input_line_pointer
))
7855 s
= input_line_pointer
;
7856 c
= get_symbol_end ();
7858 else if (LOCAL_LABELS_FB
7859 && ISDIGIT (*input_line_pointer
))
7862 while (ISDIGIT (*input_line_pointer
))
7863 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7864 fb_label_instance_inc (temp
);
7865 s
= fb_label_name (temp
, 0);
7866 c
= *input_line_pointer
;
7875 /* Put ':' back for error messages' sake. */
7876 *input_line_pointer
++ = ':';
7877 as_bad ("Expected ':'");
7884 /* Put ':' back for error messages' sake. */
7885 *input_line_pointer
++ = ':';
7886 if (*input_line_pointer
++ != ']')
7888 as_bad ("Expected ']'");
7893 as_bad ("Tag name expected");
7903 /* Not a valid line. */
7908 ia64_frob_label (sym
)
7911 struct label_fix
*fix
;
7913 /* Tags need special handling since they are not bundle breaks like
7917 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7919 fix
->next
= CURR_SLOT
.tag_fixups
;
7920 fix
->dw2_mark_labels
= FALSE
;
7921 CURR_SLOT
.tag_fixups
= fix
;
7926 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7928 md
.last_text_seg
= now_seg
;
7929 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7931 fix
->next
= CURR_SLOT
.label_fixups
;
7932 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7933 CURR_SLOT
.label_fixups
= fix
;
7935 /* Keep track of how many code entry points we've seen. */
7936 if (md
.path
== md
.maxpaths
)
7939 md
.entry_labels
= (const char **)
7940 xrealloc ((void *) md
.entry_labels
,
7941 md
.maxpaths
* sizeof (char *));
7943 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7948 /* The HP-UX linker will give unresolved symbol errors for symbols
7949 that are declared but unused. This routine removes declared,
7950 unused symbols from an object. */
7952 ia64_frob_symbol (sym
)
7955 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7956 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7957 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7958 && ! S_IS_EXTERNAL (sym
)))
7965 ia64_flush_pending_output ()
7967 if (!md
.keep_pending_output
7968 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7970 /* ??? This causes many unnecessary stop bits to be emitted.
7971 Unfortunately, it isn't clear if it is safe to remove this. */
7972 insn_group_break (1, 0, 0);
7973 ia64_flush_insns ();
7977 /* Do ia64-specific expression optimization. All that's done here is
7978 to transform index expressions that are either due to the indexing
7979 of rotating registers or due to the indexing of indirect register
7982 ia64_optimize_expr (l
, op
, r
)
7989 resolve_expression (l
);
7990 if (l
->X_op
== O_register
)
7992 unsigned num_regs
= l
->X_add_number
>> 16;
7994 resolve_expression (r
);
7997 /* Left side is a .rotX-allocated register. */
7998 if (r
->X_op
!= O_constant
)
8000 as_bad ("Rotating register index must be a non-negative constant");
8001 r
->X_add_number
= 0;
8003 else if ((valueT
) r
->X_add_number
>= num_regs
)
8005 as_bad ("Index out of range 0..%u", num_regs
- 1);
8006 r
->X_add_number
= 0;
8008 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
8011 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
8013 if (r
->X_op
!= O_register
8014 || r
->X_add_number
< REG_GR
8015 || r
->X_add_number
> REG_GR
+ 127)
8017 as_bad ("Indirect register index must be a general register");
8018 r
->X_add_number
= REG_GR
;
8021 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
8022 l
->X_add_number
= r
->X_add_number
;
8026 as_bad ("Index can only be applied to rotating or indirect registers");
8027 /* Fall back to some register use of which has as little as possible
8028 side effects, to minimize subsequent error messages. */
8029 l
->X_op
= O_register
;
8030 l
->X_add_number
= REG_GR
+ 3;
8035 ia64_parse_name (name
, e
, nextcharP
)
8040 struct const_desc
*cdesc
;
8041 struct dynreg
*dr
= 0;
8048 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
8050 /* Find what relocation pseudo-function we're dealing with. */
8051 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
8052 if (pseudo_func
[idx
].name
8053 && pseudo_func
[idx
].name
[0] == name
[1]
8054 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
8056 pseudo_type
= pseudo_func
[idx
].type
;
8059 switch (pseudo_type
)
8061 case PSEUDO_FUNC_RELOC
:
8062 end
= input_line_pointer
;
8063 if (*nextcharP
!= '(')
8065 as_bad ("Expected '('");
8069 ++input_line_pointer
;
8071 if (*input_line_pointer
!= ')')
8073 as_bad ("Missing ')'");
8077 ++input_line_pointer
;
8078 if (e
->X_op
!= O_symbol
)
8080 if (e
->X_op
!= O_pseudo_fixup
)
8082 as_bad ("Not a symbolic expression");
8085 if (idx
!= FUNC_LT_RELATIVE
)
8087 as_bad ("Illegal combination of relocation functions");
8090 switch (S_GET_VALUE (e
->X_op_symbol
))
8092 case FUNC_FPTR_RELATIVE
:
8093 idx
= FUNC_LT_FPTR_RELATIVE
; break;
8094 case FUNC_DTP_MODULE
:
8095 idx
= FUNC_LT_DTP_MODULE
; break;
8096 case FUNC_DTP_RELATIVE
:
8097 idx
= FUNC_LT_DTP_RELATIVE
; break;
8098 case FUNC_TP_RELATIVE
:
8099 idx
= FUNC_LT_TP_RELATIVE
; break;
8101 as_bad ("Illegal combination of relocation functions");
8105 /* Make sure gas doesn't get rid of local symbols that are used
8107 e
->X_op
= O_pseudo_fixup
;
8108 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8110 *nextcharP
= *input_line_pointer
;
8113 case PSEUDO_FUNC_CONST
:
8114 e
->X_op
= O_constant
;
8115 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8118 case PSEUDO_FUNC_REG
:
8119 e
->X_op
= O_register
;
8120 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8129 /* first see if NAME is a known register name: */
8130 sym
= hash_find (md
.reg_hash
, name
);
8133 e
->X_op
= O_register
;
8134 e
->X_add_number
= S_GET_VALUE (sym
);
8138 cdesc
= hash_find (md
.const_hash
, name
);
8141 e
->X_op
= O_constant
;
8142 e
->X_add_number
= cdesc
->value
;
8146 /* check for inN, locN, or outN: */
8151 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8159 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8167 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8178 /* Ignore register numbers with leading zeroes, except zero itself. */
8179 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8181 unsigned long regnum
;
8183 /* The name is inN, locN, or outN; parse the register number. */
8184 regnum
= strtoul (name
+ idx
, &end
, 10);
8185 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8187 if (regnum
>= dr
->num_regs
)
8190 as_bad ("No current frame");
8192 as_bad ("Register number out of range 0..%u",
8196 e
->X_op
= O_register
;
8197 e
->X_add_number
= dr
->base
+ regnum
;
8202 end
= alloca (strlen (name
) + 1);
8204 name
= ia64_canonicalize_symbol_name (end
);
8205 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8207 /* We've got ourselves the name of a rotating register set.
8208 Store the base register number in the low 16 bits of
8209 X_add_number and the size of the register set in the top 16
8211 e
->X_op
= O_register
;
8212 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8218 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8221 ia64_canonicalize_symbol_name (name
)
8224 size_t len
= strlen (name
), full
= len
;
8226 while (len
> 0 && name
[len
- 1] == '#')
8231 as_bad ("Standalone `#' is illegal");
8233 else if (len
< full
- 1)
8234 as_warn ("Redundant `#' suffix operators");
8239 /* Return true if idesc is a conditional branch instruction. This excludes
8240 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8241 because they always read/write resources regardless of the value of the
8242 qualifying predicate. br.ia must always use p0, and hence is always
8243 taken. Thus this function returns true for branches which can fall
8244 through, and which use no resources if they do fall through. */
8247 is_conditional_branch (idesc
)
8248 struct ia64_opcode
*idesc
;
8250 /* br is a conditional branch. Everything that starts with br. except
8251 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8252 Everything that starts with brl is a conditional branch. */
8253 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8254 && (idesc
->name
[2] == '\0'
8255 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8256 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8257 || idesc
->name
[2] == 'l'
8258 /* br.cond, br.call, br.clr */
8259 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8260 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8261 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8264 /* Return whether the given opcode is a taken branch. If there's any doubt,
8268 is_taken_branch (idesc
)
8269 struct ia64_opcode
*idesc
;
8271 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8272 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8275 /* Return whether the given opcode is an interruption or rfi. If there's any
8276 doubt, returns zero. */
8279 is_interruption_or_rfi (idesc
)
8280 struct ia64_opcode
*idesc
;
8282 if (strcmp (idesc
->name
, "rfi") == 0)
8287 /* Returns the index of the given dependency in the opcode's list of chks, or
8288 -1 if there is no dependency. */
8291 depends_on (depind
, idesc
)
8293 struct ia64_opcode
*idesc
;
8296 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8297 for (i
= 0; i
< dep
->nchks
; i
++)
8299 if (depind
== DEP (dep
->chks
[i
]))
8305 /* Determine a set of specific resources used for a particular resource
8306 class. Returns the number of specific resources identified For those
8307 cases which are not determinable statically, the resource returned is
8310 Meanings of value in 'NOTE':
8311 1) only read/write when the register number is explicitly encoded in the
8313 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8314 accesses CFM when qualifying predicate is in the rotating region.
8315 3) general register value is used to specify an indirect register; not
8316 determinable statically.
8317 4) only read the given resource when bits 7:0 of the indirect index
8318 register value does not match the register number of the resource; not
8319 determinable statically.
8320 5) all rules are implementation specific.
8321 6) only when both the index specified by the reader and the index specified
8322 by the writer have the same value in bits 63:61; not determinable
8324 7) only access the specified resource when the corresponding mask bit is
8326 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8327 only read when these insns reference FR2-31
8328 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8329 written when these insns write FR32-127
8330 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8332 11) The target predicates are written independently of PR[qp], but source
8333 registers are only read if PR[qp] is true. Since the state of PR[qp]
8334 cannot statically be determined, all source registers are marked used.
8335 12) This insn only reads the specified predicate register when that
8336 register is the PR[qp].
8337 13) This reference to ld-c only applies to teh GR whose value is loaded
8338 with data returned from memory, not the post-incremented address register.
8339 14) The RSE resource includes the implementation-specific RSE internal
8340 state resources. At least one (and possibly more) of these resources are
8341 read by each instruction listed in IC:rse-readers. At least one (and
8342 possibly more) of these resources are written by each insn listed in
8344 15+16) Represents reserved instructions, which the assembler does not
8347 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8348 this code; there are no dependency violations based on memory access.
8351 #define MAX_SPECS 256
8356 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8357 const struct ia64_dependency
*dep
;
8358 struct ia64_opcode
*idesc
;
8359 int type
; /* is this a DV chk or a DV reg? */
8360 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8361 int note
; /* resource note for this insn's usage */
8362 int path
; /* which execution path to examine */
8369 if (dep
->mode
== IA64_DV_WAW
8370 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8371 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8374 /* template for any resources we identify */
8375 tmpl
.dependency
= dep
;
8377 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8378 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8379 tmpl
.link_to_qp_branch
= 1;
8380 tmpl
.mem_offset
.hint
= 0;
8381 tmpl
.mem_offset
.offset
= 0;
8382 tmpl
.mem_offset
.base
= 0;
8385 tmpl
.cmp_type
= CMP_NONE
;
8392 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8393 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8394 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8396 /* we don't need to track these */
8397 if (dep
->semantics
== IA64_DVS_NONE
)
8400 switch (dep
->specifier
)
8405 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8407 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8408 if (regno
>= 0 && regno
<= 7)
8410 specs
[count
] = tmpl
;
8411 specs
[count
++].index
= regno
;
8417 for (i
= 0; i
< 8; i
++)
8419 specs
[count
] = tmpl
;
8420 specs
[count
++].index
= i
;
8429 case IA64_RS_AR_UNAT
:
8430 /* This is a mov =AR or mov AR= instruction. */
8431 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8433 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8434 if (regno
== AR_UNAT
)
8436 specs
[count
++] = tmpl
;
8441 /* This is a spill/fill, or other instruction that modifies the
8444 /* Unless we can determine the specific bits used, mark the whole
8445 thing; bits 8:3 of the memory address indicate the bit used in
8446 UNAT. The .mem.offset hint may be used to eliminate a small
8447 subset of conflicts. */
8448 specs
[count
] = tmpl
;
8449 if (md
.mem_offset
.hint
)
8452 fprintf (stderr
, " Using hint for spill/fill\n");
8453 /* The index isn't actually used, just set it to something
8454 approximating the bit index. */
8455 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8456 specs
[count
].mem_offset
.hint
= 1;
8457 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8458 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8462 specs
[count
++].specific
= 0;
8470 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8472 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8473 if ((regno
>= 8 && regno
<= 15)
8474 || (regno
>= 20 && regno
<= 23)
8475 || (regno
>= 31 && regno
<= 39)
8476 || (regno
>= 41 && regno
<= 47)
8477 || (regno
>= 67 && regno
<= 111))
8479 specs
[count
] = tmpl
;
8480 specs
[count
++].index
= regno
;
8493 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8495 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8496 if ((regno
>= 48 && regno
<= 63)
8497 || (regno
>= 112 && regno
<= 127))
8499 specs
[count
] = tmpl
;
8500 specs
[count
++].index
= regno
;
8506 for (i
= 48; i
< 64; i
++)
8508 specs
[count
] = tmpl
;
8509 specs
[count
++].index
= i
;
8511 for (i
= 112; i
< 128; i
++)
8513 specs
[count
] = tmpl
;
8514 specs
[count
++].index
= i
;
8532 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8533 if (idesc
->operands
[i
] == IA64_OPND_B1
8534 || idesc
->operands
[i
] == IA64_OPND_B2
)
8536 specs
[count
] = tmpl
;
8537 specs
[count
++].index
=
8538 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8543 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8544 if (idesc
->operands
[i
] == IA64_OPND_B1
8545 || idesc
->operands
[i
] == IA64_OPND_B2
)
8547 specs
[count
] = tmpl
;
8548 specs
[count
++].index
=
8549 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8555 case IA64_RS_CPUID
: /* four or more registers */
8558 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8560 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8561 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8564 specs
[count
] = tmpl
;
8565 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8569 specs
[count
] = tmpl
;
8570 specs
[count
++].specific
= 0;
8580 case IA64_RS_DBR
: /* four or more registers */
8583 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8585 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8586 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8589 specs
[count
] = tmpl
;
8590 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8594 specs
[count
] = tmpl
;
8595 specs
[count
++].specific
= 0;
8599 else if (note
== 0 && !rsrc_write
)
8601 specs
[count
] = tmpl
;
8602 specs
[count
++].specific
= 0;
8610 case IA64_RS_IBR
: /* four or more registers */
8613 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8615 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8616 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8619 specs
[count
] = tmpl
;
8620 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8624 specs
[count
] = tmpl
;
8625 specs
[count
++].specific
= 0;
8638 /* These are implementation specific. Force all references to
8639 conflict with all other references. */
8640 specs
[count
] = tmpl
;
8641 specs
[count
++].specific
= 0;
8649 case IA64_RS_PKR
: /* 16 or more registers */
8650 if (note
== 3 || note
== 4)
8652 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8654 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8655 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8660 specs
[count
] = tmpl
;
8661 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8664 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8666 /* Uses all registers *except* the one in R3. */
8667 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8669 specs
[count
] = tmpl
;
8670 specs
[count
++].index
= i
;
8676 specs
[count
] = tmpl
;
8677 specs
[count
++].specific
= 0;
8684 specs
[count
] = tmpl
;
8685 specs
[count
++].specific
= 0;
8689 case IA64_RS_PMC
: /* four or more registers */
8692 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8693 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8696 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8698 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8699 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8702 specs
[count
] = tmpl
;
8703 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8707 specs
[count
] = tmpl
;
8708 specs
[count
++].specific
= 0;
8718 case IA64_RS_PMD
: /* four or more registers */
8721 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8723 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8724 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8727 specs
[count
] = tmpl
;
8728 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8732 specs
[count
] = tmpl
;
8733 specs
[count
++].specific
= 0;
8743 case IA64_RS_RR
: /* eight registers */
8746 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8748 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8749 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8752 specs
[count
] = tmpl
;
8753 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8757 specs
[count
] = tmpl
;
8758 specs
[count
++].specific
= 0;
8762 else if (note
== 0 && !rsrc_write
)
8764 specs
[count
] = tmpl
;
8765 specs
[count
++].specific
= 0;
8773 case IA64_RS_CR_IRR
:
8776 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8777 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8779 && idesc
->operands
[1] == IA64_OPND_CR3
8782 for (i
= 0; i
< 4; i
++)
8784 specs
[count
] = tmpl
;
8785 specs
[count
++].index
= CR_IRR0
+ i
;
8791 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8792 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8794 && regno
<= CR_IRR3
)
8796 specs
[count
] = tmpl
;
8797 specs
[count
++].index
= regno
;
8806 case IA64_RS_CR_LRR
:
8813 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8814 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8815 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8817 specs
[count
] = tmpl
;
8818 specs
[count
++].index
= regno
;
8826 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8828 specs
[count
] = tmpl
;
8829 specs
[count
++].index
=
8830 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8845 else if (rsrc_write
)
8847 if (dep
->specifier
== IA64_RS_FRb
8848 && idesc
->operands
[0] == IA64_OPND_F1
)
8850 specs
[count
] = tmpl
;
8851 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8856 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8858 if (idesc
->operands
[i
] == IA64_OPND_F2
8859 || idesc
->operands
[i
] == IA64_OPND_F3
8860 || idesc
->operands
[i
] == IA64_OPND_F4
)
8862 specs
[count
] = tmpl
;
8863 specs
[count
++].index
=
8864 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8873 /* This reference applies only to the GR whose value is loaded with
8874 data returned from memory. */
8875 specs
[count
] = tmpl
;
8876 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8882 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8883 if (idesc
->operands
[i
] == IA64_OPND_R1
8884 || idesc
->operands
[i
] == IA64_OPND_R2
8885 || idesc
->operands
[i
] == IA64_OPND_R3
)
8887 specs
[count
] = tmpl
;
8888 specs
[count
++].index
=
8889 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8891 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8892 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8893 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8895 specs
[count
] = tmpl
;
8896 specs
[count
++].index
=
8897 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8902 /* Look for anything that reads a GR. */
8903 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8905 if (idesc
->operands
[i
] == IA64_OPND_MR3
8906 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8907 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8908 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8909 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8910 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8911 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8912 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8913 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8914 || ((i
>= idesc
->num_outputs
)
8915 && (idesc
->operands
[i
] == IA64_OPND_R1
8916 || idesc
->operands
[i
] == IA64_OPND_R2
8917 || idesc
->operands
[i
] == IA64_OPND_R3
8918 /* addl source register. */
8919 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8921 specs
[count
] = tmpl
;
8922 specs
[count
++].index
=
8923 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8934 /* This is the same as IA64_RS_PRr, except that the register range is
8935 from 1 - 15, and there are no rotating register reads/writes here. */
8939 for (i
= 1; i
< 16; i
++)
8941 specs
[count
] = tmpl
;
8942 specs
[count
++].index
= i
;
8948 /* Mark only those registers indicated by the mask. */
8951 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8952 for (i
= 1; i
< 16; i
++)
8953 if (mask
& ((valueT
) 1 << i
))
8955 specs
[count
] = tmpl
;
8956 specs
[count
++].index
= i
;
8964 else if (note
== 11) /* note 11 implies note 1 as well */
8968 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8970 if (idesc
->operands
[i
] == IA64_OPND_P1
8971 || idesc
->operands
[i
] == IA64_OPND_P2
)
8973 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8974 if (regno
>= 1 && regno
< 16)
8976 specs
[count
] = tmpl
;
8977 specs
[count
++].index
= regno
;
8987 else if (note
== 12)
8989 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8991 specs
[count
] = tmpl
;
8992 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8999 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9000 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9001 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9002 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9004 if ((idesc
->operands
[0] == IA64_OPND_P1
9005 || idesc
->operands
[0] == IA64_OPND_P2
)
9006 && p1
>= 1 && p1
< 16)
9008 specs
[count
] = tmpl
;
9009 specs
[count
].cmp_type
=
9010 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9011 specs
[count
++].index
= p1
;
9013 if ((idesc
->operands
[1] == IA64_OPND_P1
9014 || idesc
->operands
[1] == IA64_OPND_P2
)
9015 && p2
>= 1 && p2
< 16)
9017 specs
[count
] = tmpl
;
9018 specs
[count
].cmp_type
=
9019 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9020 specs
[count
++].index
= p2
;
9025 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
9027 specs
[count
] = tmpl
;
9028 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9030 if (idesc
->operands
[1] == IA64_OPND_PR
)
9032 for (i
= 1; i
< 16; i
++)
9034 specs
[count
] = tmpl
;
9035 specs
[count
++].index
= i
;
9046 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9047 simplified cases of this. */
9051 for (i
= 16; i
< 63; i
++)
9053 specs
[count
] = tmpl
;
9054 specs
[count
++].index
= i
;
9060 /* Mark only those registers indicated by the mask. */
9062 && idesc
->operands
[0] == IA64_OPND_PR
)
9064 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9065 if (mask
& ((valueT
) 1 << 16))
9066 for (i
= 16; i
< 63; i
++)
9068 specs
[count
] = tmpl
;
9069 specs
[count
++].index
= i
;
9073 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9075 for (i
= 16; i
< 63; i
++)
9077 specs
[count
] = tmpl
;
9078 specs
[count
++].index
= i
;
9086 else if (note
== 11) /* note 11 implies note 1 as well */
9090 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9092 if (idesc
->operands
[i
] == IA64_OPND_P1
9093 || idesc
->operands
[i
] == IA64_OPND_P2
)
9095 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9096 if (regno
>= 16 && regno
< 63)
9098 specs
[count
] = tmpl
;
9099 specs
[count
++].index
= regno
;
9109 else if (note
== 12)
9111 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9113 specs
[count
] = tmpl
;
9114 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9121 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9122 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9123 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9124 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9126 if ((idesc
->operands
[0] == IA64_OPND_P1
9127 || idesc
->operands
[0] == IA64_OPND_P2
)
9128 && p1
>= 16 && p1
< 63)
9130 specs
[count
] = tmpl
;
9131 specs
[count
].cmp_type
=
9132 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9133 specs
[count
++].index
= p1
;
9135 if ((idesc
->operands
[1] == IA64_OPND_P1
9136 || idesc
->operands
[1] == IA64_OPND_P2
)
9137 && p2
>= 16 && p2
< 63)
9139 specs
[count
] = tmpl
;
9140 specs
[count
].cmp_type
=
9141 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9142 specs
[count
++].index
= p2
;
9147 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9149 specs
[count
] = tmpl
;
9150 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9152 if (idesc
->operands
[1] == IA64_OPND_PR
)
9154 for (i
= 16; i
< 63; i
++)
9156 specs
[count
] = tmpl
;
9157 specs
[count
++].index
= i
;
9169 /* Verify that the instruction is using the PSR bit indicated in
9173 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9175 if (dep
->regindex
< 6)
9177 specs
[count
++] = tmpl
;
9180 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9182 if (dep
->regindex
< 32
9183 || dep
->regindex
== 35
9184 || dep
->regindex
== 36
9185 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9187 specs
[count
++] = tmpl
;
9190 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9192 if (dep
->regindex
< 32
9193 || dep
->regindex
== 35
9194 || dep
->regindex
== 36
9195 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9197 specs
[count
++] = tmpl
;
9202 /* Several PSR bits have very specific dependencies. */
9203 switch (dep
->regindex
)
9206 specs
[count
++] = tmpl
;
9211 specs
[count
++] = tmpl
;
9215 /* Only certain CR accesses use PSR.ic */
9216 if (idesc
->operands
[0] == IA64_OPND_CR3
9217 || idesc
->operands
[1] == IA64_OPND_CR3
)
9220 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9223 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9238 specs
[count
++] = tmpl
;
9247 specs
[count
++] = tmpl
;
9251 /* Only some AR accesses use cpl */
9252 if (idesc
->operands
[0] == IA64_OPND_AR3
9253 || idesc
->operands
[1] == IA64_OPND_AR3
)
9256 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9259 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9266 && regno
<= AR_K7
))))
9268 specs
[count
++] = tmpl
;
9273 specs
[count
++] = tmpl
;
9283 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9285 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9291 if (mask
& ((valueT
) 1 << dep
->regindex
))
9293 specs
[count
++] = tmpl
;
9298 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9299 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9300 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9301 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9303 if (idesc
->operands
[i
] == IA64_OPND_F1
9304 || idesc
->operands
[i
] == IA64_OPND_F2
9305 || idesc
->operands
[i
] == IA64_OPND_F3
9306 || idesc
->operands
[i
] == IA64_OPND_F4
)
9308 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9309 if (reg
>= min
&& reg
<= max
)
9311 specs
[count
++] = tmpl
;
9318 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9319 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9320 /* mfh is read on writes to FR32-127; mfl is read on writes to
9322 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9324 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9326 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9327 if (reg
>= min
&& reg
<= max
)
9329 specs
[count
++] = tmpl
;
9334 else if (note
== 10)
9336 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9338 if (idesc
->operands
[i
] == IA64_OPND_R1
9339 || idesc
->operands
[i
] == IA64_OPND_R2
9340 || idesc
->operands
[i
] == IA64_OPND_R3
)
9342 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9343 if (regno
>= 16 && regno
<= 31)
9345 specs
[count
++] = tmpl
;
9356 case IA64_RS_AR_FPSR
:
9357 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9359 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9360 if (regno
== AR_FPSR
)
9362 specs
[count
++] = tmpl
;
9367 specs
[count
++] = tmpl
;
9372 /* Handle all AR[REG] resources */
9373 if (note
== 0 || note
== 1)
9375 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9376 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9377 && regno
== dep
->regindex
)
9379 specs
[count
++] = tmpl
;
9381 /* other AR[REG] resources may be affected by AR accesses */
9382 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9385 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9386 switch (dep
->regindex
)
9392 if (regno
== AR_BSPSTORE
)
9394 specs
[count
++] = tmpl
;
9398 (regno
== AR_BSPSTORE
9399 || regno
== AR_RNAT
))
9401 specs
[count
++] = tmpl
;
9406 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9409 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9410 switch (dep
->regindex
)
9415 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9417 specs
[count
++] = tmpl
;
9424 specs
[count
++] = tmpl
;
9434 /* Handle all CR[REG] resources */
9435 if (note
== 0 || note
== 1)
9437 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9439 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9440 if (regno
== dep
->regindex
)
9442 specs
[count
++] = tmpl
;
9444 else if (!rsrc_write
)
9446 /* Reads from CR[IVR] affect other resources. */
9447 if (regno
== CR_IVR
)
9449 if ((dep
->regindex
>= CR_IRR0
9450 && dep
->regindex
<= CR_IRR3
)
9451 || dep
->regindex
== CR_TPR
)
9453 specs
[count
++] = tmpl
;
9460 specs
[count
++] = tmpl
;
9469 case IA64_RS_INSERVICE
:
9470 /* look for write of EOI (67) or read of IVR (65) */
9471 if ((idesc
->operands
[0] == IA64_OPND_CR3
9472 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9473 || (idesc
->operands
[1] == IA64_OPND_CR3
9474 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9476 specs
[count
++] = tmpl
;
9483 specs
[count
++] = tmpl
;
9494 specs
[count
++] = tmpl
;
9498 /* Check if any of the registers accessed are in the rotating region.
9499 mov to/from pr accesses CFM only when qp_regno is in the rotating
9501 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9503 if (idesc
->operands
[i
] == IA64_OPND_R1
9504 || idesc
->operands
[i
] == IA64_OPND_R2
9505 || idesc
->operands
[i
] == IA64_OPND_R3
)
9507 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9508 /* Assumes that md.rot.num_regs is always valid */
9509 if (md
.rot
.num_regs
> 0
9511 && num
< 31 + md
.rot
.num_regs
)
9513 specs
[count
] = tmpl
;
9514 specs
[count
++].specific
= 0;
9517 else if (idesc
->operands
[i
] == IA64_OPND_F1
9518 || idesc
->operands
[i
] == IA64_OPND_F2
9519 || idesc
->operands
[i
] == IA64_OPND_F3
9520 || idesc
->operands
[i
] == IA64_OPND_F4
)
9522 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9525 specs
[count
] = tmpl
;
9526 specs
[count
++].specific
= 0;
9529 else if (idesc
->operands
[i
] == IA64_OPND_P1
9530 || idesc
->operands
[i
] == IA64_OPND_P2
)
9532 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9535 specs
[count
] = tmpl
;
9536 specs
[count
++].specific
= 0;
9540 if (CURR_SLOT
.qp_regno
> 15)
9542 specs
[count
] = tmpl
;
9543 specs
[count
++].specific
= 0;
9548 /* This is the same as IA64_RS_PRr, except simplified to account for
9549 the fact that there is only one register. */
9553 specs
[count
++] = tmpl
;
9558 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9559 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9560 if (mask
& ((valueT
) 1 << 63))
9561 specs
[count
++] = tmpl
;
9563 else if (note
== 11)
9565 if ((idesc
->operands
[0] == IA64_OPND_P1
9566 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9567 || (idesc
->operands
[1] == IA64_OPND_P2
9568 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9570 specs
[count
++] = tmpl
;
9573 else if (note
== 12)
9575 if (CURR_SLOT
.qp_regno
== 63)
9577 specs
[count
++] = tmpl
;
9584 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9585 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9586 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9587 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9590 && (idesc
->operands
[0] == IA64_OPND_P1
9591 || idesc
->operands
[0] == IA64_OPND_P2
))
9593 specs
[count
] = tmpl
;
9594 specs
[count
++].cmp_type
=
9595 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9598 && (idesc
->operands
[1] == IA64_OPND_P1
9599 || idesc
->operands
[1] == IA64_OPND_P2
))
9601 specs
[count
] = tmpl
;
9602 specs
[count
++].cmp_type
=
9603 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9608 if (CURR_SLOT
.qp_regno
== 63)
9610 specs
[count
++] = tmpl
;
9621 /* FIXME we can identify some individual RSE written resources, but RSE
9622 read resources have not yet been completely identified, so for now
9623 treat RSE as a single resource */
9624 if (strncmp (idesc
->name
, "mov", 3) == 0)
9628 if (idesc
->operands
[0] == IA64_OPND_AR3
9629 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9631 specs
[count
++] = tmpl
;
9636 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9638 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9639 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9641 specs
[count
++] = tmpl
;
9644 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9646 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9647 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9648 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9650 specs
[count
++] = tmpl
;
9657 specs
[count
++] = tmpl
;
9662 /* FIXME -- do any of these need to be non-specific? */
9663 specs
[count
++] = tmpl
;
9667 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9674 /* Clear branch flags on marked resources. This breaks the link between the
9675 QP of the marking instruction and a subsequent branch on the same QP. */
9678 clear_qp_branch_flag (mask
)
9682 for (i
= 0; i
< regdepslen
; i
++)
9684 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9685 if ((bit
& mask
) != 0)
9687 regdeps
[i
].link_to_qp_branch
= 0;
9692 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9693 any mutexes which contain one of the PRs and create new ones when
9697 update_qp_mutex (valueT mask
)
9703 while (i
< qp_mutexeslen
)
9705 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9707 /* If it destroys and creates the same mutex, do nothing. */
9708 if (qp_mutexes
[i
].prmask
== mask
9709 && qp_mutexes
[i
].path
== md
.path
)
9720 fprintf (stderr
, " Clearing mutex relation");
9721 print_prmask (qp_mutexes
[i
].prmask
);
9722 fprintf (stderr
, "\n");
9725 /* Deal with the old mutex with more than 3+ PRs only if
9726 the new mutex on the same execution path with it.
9728 FIXME: The 3+ mutex support is incomplete.
9729 dot_pred_rel () may be a better place to fix it. */
9730 if (qp_mutexes
[i
].path
== md
.path
)
9732 /* If it is a proper subset of the mutex, create a
9735 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9738 qp_mutexes
[i
].prmask
&= ~mask
;
9739 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9741 /* Modify the mutex if there are more than one
9749 /* Remove the mutex. */
9750 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9758 add_qp_mutex (mask
);
9763 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9765 Any changes to a PR clears the mutex relations which include that PR. */
9768 clear_qp_mutex (mask
)
9774 while (i
< qp_mutexeslen
)
9776 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9780 fprintf (stderr
, " Clearing mutex relation");
9781 print_prmask (qp_mutexes
[i
].prmask
);
9782 fprintf (stderr
, "\n");
9784 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9791 /* Clear implies relations which contain PRs in the given masks.
9792 P1_MASK indicates the source of the implies relation, while P2_MASK
9793 indicates the implied PR. */
9796 clear_qp_implies (p1_mask
, p2_mask
)
9803 while (i
< qp_implieslen
)
9805 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9806 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9809 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9810 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9811 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9818 /* Add the PRs specified to the list of implied relations. */
9821 add_qp_imply (p1
, p2
)
9828 /* p0 is not meaningful here. */
9829 if (p1
== 0 || p2
== 0)
9835 /* If it exists already, ignore it. */
9836 for (i
= 0; i
< qp_implieslen
; i
++)
9838 if (qp_implies
[i
].p1
== p1
9839 && qp_implies
[i
].p2
== p2
9840 && qp_implies
[i
].path
== md
.path
9841 && !qp_implies
[i
].p2_branched
)
9845 if (qp_implieslen
== qp_impliestotlen
)
9847 qp_impliestotlen
+= 20;
9848 qp_implies
= (struct qp_imply
*)
9849 xrealloc ((void *) qp_implies
,
9850 qp_impliestotlen
* sizeof (struct qp_imply
));
9853 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9854 qp_implies
[qp_implieslen
].p1
= p1
;
9855 qp_implies
[qp_implieslen
].p2
= p2
;
9856 qp_implies
[qp_implieslen
].path
= md
.path
;
9857 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9859 /* Add in the implied transitive relations; for everything that p2 implies,
9860 make p1 imply that, too; for everything that implies p1, make it imply p2
9862 for (i
= 0; i
< qp_implieslen
; i
++)
9864 if (qp_implies
[i
].p1
== p2
)
9865 add_qp_imply (p1
, qp_implies
[i
].p2
);
9866 if (qp_implies
[i
].p2
== p1
)
9867 add_qp_imply (qp_implies
[i
].p1
, p2
);
9869 /* Add in mutex relations implied by this implies relation; for each mutex
9870 relation containing p2, duplicate it and replace p2 with p1. */
9871 bit
= (valueT
) 1 << p1
;
9872 mask
= (valueT
) 1 << p2
;
9873 for (i
= 0; i
< qp_mutexeslen
; i
++)
9875 if (qp_mutexes
[i
].prmask
& mask
)
9876 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9880 /* Add the PRs specified in the mask to the mutex list; this means that only
9881 one of the PRs can be true at any time. PR0 should never be included in
9891 if (qp_mutexeslen
== qp_mutexestotlen
)
9893 qp_mutexestotlen
+= 20;
9894 qp_mutexes
= (struct qpmutex
*)
9895 xrealloc ((void *) qp_mutexes
,
9896 qp_mutexestotlen
* sizeof (struct qpmutex
));
9900 fprintf (stderr
, " Registering mutex on");
9901 print_prmask (mask
);
9902 fprintf (stderr
, "\n");
9904 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9905 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9909 has_suffix_p (name
, suffix
)
9913 size_t namelen
= strlen (name
);
9914 size_t sufflen
= strlen (suffix
);
9916 if (namelen
<= sufflen
)
9918 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9922 clear_register_values ()
9926 fprintf (stderr
, " Clearing register values\n");
9927 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9928 gr_values
[i
].known
= 0;
9931 /* Keep track of register values/changes which affect DV tracking.
9933 optimization note: should add a flag to classes of insns where otherwise we
9934 have to examine a group of strings to identify them. */
9937 note_register_values (idesc
)
9938 struct ia64_opcode
*idesc
;
9940 valueT qp_changemask
= 0;
9943 /* Invalidate values for registers being written to. */
9944 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9946 if (idesc
->operands
[i
] == IA64_OPND_R1
9947 || idesc
->operands
[i
] == IA64_OPND_R2
9948 || idesc
->operands
[i
] == IA64_OPND_R3
)
9950 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9951 if (regno
> 0 && regno
< NELEMS (gr_values
))
9952 gr_values
[regno
].known
= 0;
9954 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9956 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9957 if (regno
> 0 && regno
< 4)
9958 gr_values
[regno
].known
= 0;
9960 else if (idesc
->operands
[i
] == IA64_OPND_P1
9961 || idesc
->operands
[i
] == IA64_OPND_P2
)
9963 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9964 qp_changemask
|= (valueT
) 1 << regno
;
9966 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9968 if (idesc
->operands
[2] & (valueT
) 0x10000)
9969 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9971 qp_changemask
= idesc
->operands
[2];
9974 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9976 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9977 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9979 qp_changemask
= idesc
->operands
[1];
9980 qp_changemask
&= ~(valueT
) 0xFFFF;
9985 /* Always clear qp branch flags on any PR change. */
9986 /* FIXME there may be exceptions for certain compares. */
9987 clear_qp_branch_flag (qp_changemask
);
9989 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9990 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9992 qp_changemask
|= ~(valueT
) 0xFFFF;
9993 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9995 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9996 gr_values
[i
].known
= 0;
9998 clear_qp_mutex (qp_changemask
);
9999 clear_qp_implies (qp_changemask
, qp_changemask
);
10001 /* After a call, all register values are undefined, except those marked
10003 else if (strncmp (idesc
->name
, "br.call", 6) == 0
10004 || strncmp (idesc
->name
, "brl.call", 7) == 0)
10006 /* FIXME keep GR values which are marked as "safe_across_calls" */
10007 clear_register_values ();
10008 clear_qp_mutex (~qp_safe_across_calls
);
10009 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
10010 clear_qp_branch_flag (~qp_safe_across_calls
);
10012 else if (is_interruption_or_rfi (idesc
)
10013 || is_taken_branch (idesc
))
10015 clear_register_values ();
10016 clear_qp_mutex (~(valueT
) 0);
10017 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
10019 /* Look for mutex and implies relations. */
10020 else if ((idesc
->operands
[0] == IA64_OPND_P1
10021 || idesc
->operands
[0] == IA64_OPND_P2
)
10022 && (idesc
->operands
[1] == IA64_OPND_P1
10023 || idesc
->operands
[1] == IA64_OPND_P2
))
10025 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
10026 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
10027 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
10028 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
10030 /* If both PRs are PR0, we can't really do anything. */
10031 if (p1
== 0 && p2
== 0)
10034 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
10036 /* In general, clear mutexes and implies which include P1 or P2,
10037 with the following exceptions. */
10038 else if (has_suffix_p (idesc
->name
, ".or.andcm")
10039 || has_suffix_p (idesc
->name
, ".and.orcm"))
10041 clear_qp_implies (p2mask
, p1mask
);
10043 else if (has_suffix_p (idesc
->name
, ".andcm")
10044 || has_suffix_p (idesc
->name
, ".and"))
10046 clear_qp_implies (0, p1mask
| p2mask
);
10048 else if (has_suffix_p (idesc
->name
, ".orcm")
10049 || has_suffix_p (idesc
->name
, ".or"))
10051 clear_qp_mutex (p1mask
| p2mask
);
10052 clear_qp_implies (p1mask
| p2mask
, 0);
10058 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
10060 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10061 if (p1
== 0 || p2
== 0)
10062 clear_qp_mutex (p1mask
| p2mask
);
10064 added
= update_qp_mutex (p1mask
| p2mask
);
10066 if (CURR_SLOT
.qp_regno
== 0
10067 || has_suffix_p (idesc
->name
, ".unc"))
10069 if (added
== 0 && p1
&& p2
)
10070 add_qp_mutex (p1mask
| p2mask
);
10071 if (CURR_SLOT
.qp_regno
!= 0)
10074 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
10076 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10081 /* Look for mov imm insns into GRs. */
10082 else if (idesc
->operands
[0] == IA64_OPND_R1
10083 && (idesc
->operands
[1] == IA64_OPND_IMM22
10084 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10085 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10086 && (strcmp (idesc
->name
, "mov") == 0
10087 || strcmp (idesc
->name
, "movl") == 0))
10089 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10090 if (regno
> 0 && regno
< NELEMS (gr_values
))
10092 gr_values
[regno
].known
= 1;
10093 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10094 gr_values
[regno
].path
= md
.path
;
10097 fprintf (stderr
, " Know gr%d = ", regno
);
10098 fprintf_vma (stderr
, gr_values
[regno
].value
);
10099 fputs ("\n", stderr
);
10103 /* Look for dep.z imm insns. */
10104 else if (idesc
->operands
[0] == IA64_OPND_R1
10105 && idesc
->operands
[1] == IA64_OPND_IMM8
10106 && strcmp (idesc
->name
, "dep.z") == 0)
10108 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10109 if (regno
> 0 && regno
< NELEMS (gr_values
))
10111 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10113 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10114 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10115 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10116 gr_values
[regno
].known
= 1;
10117 gr_values
[regno
].value
= value
;
10118 gr_values
[regno
].path
= md
.path
;
10121 fprintf (stderr
, " Know gr%d = ", regno
);
10122 fprintf_vma (stderr
, gr_values
[regno
].value
);
10123 fputs ("\n", stderr
);
10129 clear_qp_mutex (qp_changemask
);
10130 clear_qp_implies (qp_changemask
, qp_changemask
);
10134 /* Return whether the given predicate registers are currently mutex. */
10137 qp_mutex (p1
, p2
, path
)
10147 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10148 for (i
= 0; i
< qp_mutexeslen
; i
++)
10150 if (qp_mutexes
[i
].path
>= path
10151 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10158 /* Return whether the given resource is in the given insn's list of chks
10159 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10163 resources_match (rs
, idesc
, note
, qp_regno
, path
)
10165 struct ia64_opcode
*idesc
;
10170 struct rsrc specs
[MAX_SPECS
];
10173 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10174 we don't need to check. One exception is note 11, which indicates that
10175 target predicates are written regardless of PR[qp]. */
10176 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10180 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10181 while (count
-- > 0)
10183 /* UNAT checking is a bit more specific than other resources */
10184 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10185 && specs
[count
].mem_offset
.hint
10186 && rs
->mem_offset
.hint
)
10188 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10190 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10191 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10198 /* Skip apparent PR write conflicts where both writes are an AND or both
10199 writes are an OR. */
10200 if (rs
->dependency
->specifier
== IA64_RS_PR
10201 || rs
->dependency
->specifier
== IA64_RS_PRr
10202 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10204 if (specs
[count
].cmp_type
!= CMP_NONE
10205 && specs
[count
].cmp_type
== rs
->cmp_type
)
10208 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10209 dv_mode
[rs
->dependency
->mode
],
10210 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10211 specs
[count
].index
: 63);
10216 " %s on parallel compare conflict %s vs %s on PR%d\n",
10217 dv_mode
[rs
->dependency
->mode
],
10218 dv_cmp_type
[rs
->cmp_type
],
10219 dv_cmp_type
[specs
[count
].cmp_type
],
10220 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10221 specs
[count
].index
: 63);
10225 /* If either resource is not specific, conservatively assume a conflict
10227 if (!specs
[count
].specific
|| !rs
->specific
)
10229 else if (specs
[count
].index
== rs
->index
)
10236 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10237 insert a stop to create the break. Update all resource dependencies
10238 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10239 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10240 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10244 insn_group_break (insert_stop
, qp_regno
, save_current
)
10251 if (insert_stop
&& md
.num_slots_in_use
> 0)
10252 PREV_SLOT
.end_of_insn_group
= 1;
10256 fprintf (stderr
, " Insn group break%s",
10257 (insert_stop
? " (w/stop)" : ""));
10259 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10260 fprintf (stderr
, "\n");
10264 while (i
< regdepslen
)
10266 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10269 && regdeps
[i
].qp_regno
!= qp_regno
)
10276 && CURR_SLOT
.src_file
== regdeps
[i
].file
10277 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10283 /* clear dependencies which are automatically cleared by a stop, or
10284 those that have reached the appropriate state of insn serialization */
10285 if (dep
->semantics
== IA64_DVS_IMPLIED
10286 || dep
->semantics
== IA64_DVS_IMPLIEDF
10287 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10289 print_dependency ("Removing", i
);
10290 regdeps
[i
] = regdeps
[--regdepslen
];
10294 if (dep
->semantics
== IA64_DVS_DATA
10295 || dep
->semantics
== IA64_DVS_INSTR
10296 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10298 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10299 regdeps
[i
].insn_srlz
= STATE_STOP
;
10300 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10301 regdeps
[i
].data_srlz
= STATE_STOP
;
10308 /* Add the given resource usage spec to the list of active dependencies. */
10311 mark_resource (idesc
, dep
, spec
, depind
, path
)
10312 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10313 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10318 if (regdepslen
== regdepstotlen
)
10320 regdepstotlen
+= 20;
10321 regdeps
= (struct rsrc
*)
10322 xrealloc ((void *) regdeps
,
10323 regdepstotlen
* sizeof (struct rsrc
));
10326 regdeps
[regdepslen
] = *spec
;
10327 regdeps
[regdepslen
].depind
= depind
;
10328 regdeps
[regdepslen
].path
= path
;
10329 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10330 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10332 print_dependency ("Adding", regdepslen
);
10338 print_dependency (action
, depind
)
10339 const char *action
;
10344 fprintf (stderr
, " %s %s '%s'",
10345 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10346 (regdeps
[depind
].dependency
)->name
);
10347 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10348 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10349 if (regdeps
[depind
].mem_offset
.hint
)
10351 fputs (" ", stderr
);
10352 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10353 fputs ("+", stderr
);
10354 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10356 fprintf (stderr
, "\n");
10361 instruction_serialization ()
10365 fprintf (stderr
, " Instruction serialization\n");
10366 for (i
= 0; i
< regdepslen
; i
++)
10367 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10368 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10372 data_serialization ()
10376 fprintf (stderr
, " Data serialization\n");
10377 while (i
< regdepslen
)
10379 if (regdeps
[i
].data_srlz
== STATE_STOP
10380 /* Note: as of 991210, all "other" dependencies are cleared by a
10381 data serialization. This might change with new tables */
10382 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10384 print_dependency ("Removing", i
);
10385 regdeps
[i
] = regdeps
[--regdepslen
];
10392 /* Insert stops and serializations as needed to avoid DVs. */
10395 remove_marked_resource (rs
)
10398 switch (rs
->dependency
->semantics
)
10400 case IA64_DVS_SPECIFIC
:
10402 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10403 /* ...fall through... */
10404 case IA64_DVS_INSTR
:
10406 fprintf (stderr
, "Inserting instr serialization\n");
10407 if (rs
->insn_srlz
< STATE_STOP
)
10408 insn_group_break (1, 0, 0);
10409 if (rs
->insn_srlz
< STATE_SRLZ
)
10411 struct slot oldslot
= CURR_SLOT
;
10412 /* Manually jam a srlz.i insn into the stream */
10413 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10414 CURR_SLOT
.user_template
= -1;
10415 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10416 instruction_serialization ();
10417 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10418 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10419 emit_one_bundle ();
10420 CURR_SLOT
= oldslot
;
10422 insn_group_break (1, 0, 0);
10424 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10425 "other" types of DV are eliminated
10426 by a data serialization */
10427 case IA64_DVS_DATA
:
10429 fprintf (stderr
, "Inserting data serialization\n");
10430 if (rs
->data_srlz
< STATE_STOP
)
10431 insn_group_break (1, 0, 0);
10433 struct slot oldslot
= CURR_SLOT
;
10434 /* Manually jam a srlz.d insn into the stream */
10435 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10436 CURR_SLOT
.user_template
= -1;
10437 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10438 data_serialization ();
10439 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10440 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10441 emit_one_bundle ();
10442 CURR_SLOT
= oldslot
;
10445 case IA64_DVS_IMPLIED
:
10446 case IA64_DVS_IMPLIEDF
:
10448 fprintf (stderr
, "Inserting stop\n");
10449 insn_group_break (1, 0, 0);
10456 /* Check the resources used by the given opcode against the current dependency
10459 The check is run once for each execution path encountered. In this case,
10460 a unique execution path is the sequence of instructions following a code
10461 entry point, e.g. the following has three execution paths, one starting
10462 at L0, one at L1, and one at L2.
10471 check_dependencies (idesc
)
10472 struct ia64_opcode
*idesc
;
10474 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10478 /* Note that the number of marked resources may change within the
10479 loop if in auto mode. */
10481 while (i
< regdepslen
)
10483 struct rsrc
*rs
= ®deps
[i
];
10484 const struct ia64_dependency
*dep
= rs
->dependency
;
10487 int start_over
= 0;
10489 if (dep
->semantics
== IA64_DVS_NONE
10490 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10496 note
= NOTE (opdeps
->chks
[chkind
]);
10498 /* Check this resource against each execution path seen thus far. */
10499 for (path
= 0; path
<= md
.path
; path
++)
10503 /* If the dependency wasn't on the path being checked, ignore it. */
10504 if (rs
->path
< path
)
10507 /* If the QP for this insn implies a QP which has branched, don't
10508 bother checking. Ed. NOTE: I don't think this check is terribly
10509 useful; what's the point of generating code which will only be
10510 reached if its QP is zero?
10511 This code was specifically inserted to handle the following code,
10512 based on notes from Intel's DV checking code, where p1 implies p2.
10518 if (CURR_SLOT
.qp_regno
!= 0)
10522 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10524 if (qp_implies
[implies
].path
>= path
10525 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10526 && qp_implies
[implies
].p2_branched
)
10536 if ((matchtype
= resources_match (rs
, idesc
, note
,
10537 CURR_SLOT
.qp_regno
, path
)) != 0)
10540 char pathmsg
[256] = "";
10541 char indexmsg
[256] = "";
10542 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10545 sprintf (pathmsg
, " when entry is at label '%s'",
10546 md
.entry_labels
[path
- 1]);
10547 if (matchtype
== 1 && rs
->index
>= 0)
10548 sprintf (indexmsg
, ", specific resource number is %d",
10550 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10552 (certain
? "violates" : "may violate"),
10553 dv_mode
[dep
->mode
], dep
->name
,
10554 dv_sem
[dep
->semantics
],
10555 pathmsg
, indexmsg
);
10557 if (md
.explicit_mode
)
10559 as_warn ("%s", msg
);
10560 if (path
< md
.path
)
10561 as_warn (_("Only the first path encountering the conflict "
10563 as_warn_where (rs
->file
, rs
->line
,
10564 _("This is the location of the "
10565 "conflicting usage"));
10566 /* Don't bother checking other paths, to avoid duplicating
10567 the same warning */
10573 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10575 remove_marked_resource (rs
);
10577 /* since the set of dependencies has changed, start over */
10578 /* FIXME -- since we're removing dvs as we go, we
10579 probably don't really need to start over... */
10592 /* Register new dependencies based on the given opcode. */
10595 mark_resources (idesc
)
10596 struct ia64_opcode
*idesc
;
10599 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10600 int add_only_qp_reads
= 0;
10602 /* A conditional branch only uses its resources if it is taken; if it is
10603 taken, we stop following that path. The other branch types effectively
10604 *always* write their resources. If it's not taken, register only QP
10606 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10608 add_only_qp_reads
= 1;
10612 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10614 for (i
= 0; i
< opdeps
->nregs
; i
++)
10616 const struct ia64_dependency
*dep
;
10617 struct rsrc specs
[MAX_SPECS
];
10622 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10623 note
= NOTE (opdeps
->regs
[i
]);
10625 if (add_only_qp_reads
10626 && !(dep
->mode
== IA64_DV_WAR
10627 && (dep
->specifier
== IA64_RS_PR
10628 || dep
->specifier
== IA64_RS_PRr
10629 || dep
->specifier
== IA64_RS_PR63
)))
10632 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10634 while (count
-- > 0)
10636 mark_resource (idesc
, dep
, &specs
[count
],
10637 DEP (opdeps
->regs
[i
]), md
.path
);
10640 /* The execution path may affect register values, which may in turn
10641 affect which indirect-access resources are accessed. */
10642 switch (dep
->specifier
)
10646 case IA64_RS_CPUID
:
10654 for (path
= 0; path
< md
.path
; path
++)
10656 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10657 while (count
-- > 0)
10658 mark_resource (idesc
, dep
, &specs
[count
],
10659 DEP (opdeps
->regs
[i
]), path
);
10666 /* Remove dependencies when they no longer apply. */
10669 update_dependencies (idesc
)
10670 struct ia64_opcode
*idesc
;
10674 if (strcmp (idesc
->name
, "srlz.i") == 0)
10676 instruction_serialization ();
10678 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10680 data_serialization ();
10682 else if (is_interruption_or_rfi (idesc
)
10683 || is_taken_branch (idesc
))
10685 /* Although technically the taken branch doesn't clear dependencies
10686 which require a srlz.[id], we don't follow the branch; the next
10687 instruction is assumed to start with a clean slate. */
10691 else if (is_conditional_branch (idesc
)
10692 && CURR_SLOT
.qp_regno
!= 0)
10694 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10696 for (i
= 0; i
< qp_implieslen
; i
++)
10698 /* If the conditional branch's predicate is implied by the predicate
10699 in an existing dependency, remove that dependency. */
10700 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10703 /* Note that this implied predicate takes a branch so that if
10704 a later insn generates a DV but its predicate implies this
10705 one, we can avoid the false DV warning. */
10706 qp_implies
[i
].p2_branched
= 1;
10707 while (depind
< regdepslen
)
10709 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10711 print_dependency ("Removing", depind
);
10712 regdeps
[depind
] = regdeps
[--regdepslen
];
10719 /* Any marked resources which have this same predicate should be
10720 cleared, provided that the QP hasn't been modified between the
10721 marking instruction and the branch. */
10724 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10729 while (i
< regdepslen
)
10731 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10732 && regdeps
[i
].link_to_qp_branch
10733 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10734 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10736 /* Treat like a taken branch */
10737 print_dependency ("Removing", i
);
10738 regdeps
[i
] = regdeps
[--regdepslen
];
10747 /* Examine the current instruction for dependency violations. */
10751 struct ia64_opcode
*idesc
;
10755 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10756 idesc
->name
, CURR_SLOT
.src_line
,
10757 idesc
->dependencies
->nchks
,
10758 idesc
->dependencies
->nregs
);
10761 /* Look through the list of currently marked resources; if the current
10762 instruction has the dependency in its chks list which uses that resource,
10763 check against the specific resources used. */
10764 check_dependencies (idesc
);
10766 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10767 then add them to the list of marked resources. */
10768 mark_resources (idesc
);
10770 /* There are several types of dependency semantics, and each has its own
10771 requirements for being cleared
10773 Instruction serialization (insns separated by interruption, rfi, or
10774 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10776 Data serialization (instruction serialization, or writer + srlz.d +
10777 reader, where writer and srlz.d are in separate groups) clears
10778 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10779 always be the case).
10781 Instruction group break (groups separated by stop, taken branch,
10782 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10784 update_dependencies (idesc
);
10786 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10787 warning. Keep track of as many as possible that are useful. */
10788 note_register_values (idesc
);
10790 /* We don't need or want this anymore. */
10791 md
.mem_offset
.hint
= 0;
10796 /* Translate one line of assembly. Pseudo ops and labels do not show
10802 char *saved_input_line_pointer
, *mnemonic
;
10803 const struct pseudo_opcode
*pdesc
;
10804 struct ia64_opcode
*idesc
;
10805 unsigned char qp_regno
;
10806 unsigned int flags
;
10809 saved_input_line_pointer
= input_line_pointer
;
10810 input_line_pointer
= str
;
10812 /* extract the opcode (mnemonic): */
10814 mnemonic
= input_line_pointer
;
10815 ch
= get_symbol_end ();
10816 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10819 *input_line_pointer
= ch
;
10820 (*pdesc
->handler
) (pdesc
->arg
);
10824 /* Find the instruction descriptor matching the arguments. */
10826 idesc
= ia64_find_opcode (mnemonic
);
10827 *input_line_pointer
= ch
;
10830 as_bad ("Unknown opcode `%s'", mnemonic
);
10834 idesc
= parse_operands (idesc
);
10838 /* Handle the dynamic ops we can handle now: */
10839 if (idesc
->type
== IA64_TYPE_DYN
)
10841 if (strcmp (idesc
->name
, "add") == 0)
10843 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10844 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10848 ia64_free_opcode (idesc
);
10849 idesc
= ia64_find_opcode (mnemonic
);
10851 else if (strcmp (idesc
->name
, "mov") == 0)
10853 enum ia64_opnd opnd1
, opnd2
;
10856 opnd1
= idesc
->operands
[0];
10857 opnd2
= idesc
->operands
[1];
10858 if (opnd1
== IA64_OPND_AR3
)
10860 else if (opnd2
== IA64_OPND_AR3
)
10864 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10866 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10867 mnemonic
= "mov.i";
10868 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10869 mnemonic
= "mov.m";
10877 ia64_free_opcode (idesc
);
10878 idesc
= ia64_find_opcode (mnemonic
);
10879 while (idesc
!= NULL
10880 && (idesc
->operands
[0] != opnd1
10881 || idesc
->operands
[1] != opnd2
))
10882 idesc
= get_next_opcode (idesc
);
10886 else if (strcmp (idesc
->name
, "mov.i") == 0
10887 || strcmp (idesc
->name
, "mov.m") == 0)
10889 enum ia64_opnd opnd1
, opnd2
;
10892 opnd1
= idesc
->operands
[0];
10893 opnd2
= idesc
->operands
[1];
10894 if (opnd1
== IA64_OPND_AR3
)
10896 else if (opnd2
== IA64_OPND_AR3
)
10900 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10903 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10905 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10907 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10908 as_bad ("AR %d can only be accessed by %c-unit",
10909 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10913 else if (strcmp (idesc
->name
, "hint.b") == 0)
10919 case hint_b_warning
:
10920 as_warn ("hint.b may be treated as nop");
10923 as_bad ("hint.b shouldn't be used");
10929 if (md
.qp
.X_op
== O_register
)
10931 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10932 md
.qp
.X_op
= O_absent
;
10935 flags
= idesc
->flags
;
10937 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10939 /* The alignment frag has to end with a stop bit only if the
10940 next instruction after the alignment directive has to be
10941 the first instruction in an instruction group. */
10944 while (align_frag
->fr_type
!= rs_align_code
)
10946 align_frag
= align_frag
->fr_next
;
10950 /* align_frag can be NULL if there are directives in
10952 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10953 align_frag
->tc_frag_data
= 1;
10956 insn_group_break (1, 0, 0);
10960 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10962 as_bad ("`%s' cannot be predicated", idesc
->name
);
10966 /* Build the instruction. */
10967 CURR_SLOT
.qp_regno
= qp_regno
;
10968 CURR_SLOT
.idesc
= idesc
;
10969 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10970 dwarf2_where (&CURR_SLOT
.debug_line
);
10972 /* Add unwind entries, if there are any. */
10973 if (unwind
.current_entry
)
10975 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10976 unwind
.current_entry
= NULL
;
10978 if (unwind
.pending_saves
)
10980 if (unwind
.pending_saves
->next
)
10982 /* Attach the next pending save to the next slot so that its
10983 slot number will get set correctly. */
10984 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10985 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10988 unwind
.pending_saves
= NULL
;
10990 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10993 /* Check for dependency violations. */
10997 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10998 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10999 emit_one_bundle ();
11001 if ((flags
& IA64_OPCODE_LAST
) != 0)
11002 insn_group_break (1, 0, 0);
11004 md
.last_text_seg
= now_seg
;
11007 input_line_pointer
= saved_input_line_pointer
;
11010 /* Called when symbol NAME cannot be found in the symbol table.
11011 Should be used for dynamic valued symbols only. */
11014 md_undefined_symbol (name
)
11015 char *name ATTRIBUTE_UNUSED
;
11020 /* Called for any expression that can not be recognized. When the
11021 function is called, `input_line_pointer' will point to the start of
11028 switch (*input_line_pointer
)
11031 ++input_line_pointer
;
11032 expression_and_evaluate (e
);
11033 if (*input_line_pointer
!= ']')
11035 as_bad ("Closing bracket missing");
11040 if (e
->X_op
!= O_register
11041 || e
->X_add_number
< REG_GR
11042 || e
->X_add_number
> REG_GR
+ 127)
11044 as_bad ("Index must be a general register");
11045 e
->X_add_number
= REG_GR
;
11048 ++input_line_pointer
;
11059 ignore_rest_of_line ();
11062 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11063 a section symbol plus some offset. For relocs involving @fptr(),
11064 directives we don't want such adjustments since we need to have the
11065 original symbol's name in the reloc. */
11067 ia64_fix_adjustable (fix
)
11070 /* Prevent all adjustments to global symbols */
11071 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
11074 switch (fix
->fx_r_type
)
11076 case BFD_RELOC_IA64_FPTR64I
:
11077 case BFD_RELOC_IA64_FPTR32MSB
:
11078 case BFD_RELOC_IA64_FPTR32LSB
:
11079 case BFD_RELOC_IA64_FPTR64MSB
:
11080 case BFD_RELOC_IA64_FPTR64LSB
:
11081 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11082 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11092 ia64_force_relocation (fix
)
11095 switch (fix
->fx_r_type
)
11097 case BFD_RELOC_IA64_FPTR64I
:
11098 case BFD_RELOC_IA64_FPTR32MSB
:
11099 case BFD_RELOC_IA64_FPTR32LSB
:
11100 case BFD_RELOC_IA64_FPTR64MSB
:
11101 case BFD_RELOC_IA64_FPTR64LSB
:
11103 case BFD_RELOC_IA64_LTOFF22
:
11104 case BFD_RELOC_IA64_LTOFF64I
:
11105 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11106 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11107 case BFD_RELOC_IA64_PLTOFF22
:
11108 case BFD_RELOC_IA64_PLTOFF64I
:
11109 case BFD_RELOC_IA64_PLTOFF64MSB
:
11110 case BFD_RELOC_IA64_PLTOFF64LSB
:
11112 case BFD_RELOC_IA64_LTOFF22X
:
11113 case BFD_RELOC_IA64_LDXMOV
:
11120 return generic_force_reloc (fix
);
11123 /* Decide from what point a pc-relative relocation is relative to,
11124 relative to the pc-relative fixup. Er, relatively speaking. */
11126 ia64_pcrel_from_section (fix
, sec
)
11130 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11132 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11139 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11141 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11145 expr
.X_op
= O_pseudo_fixup
;
11146 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11147 expr
.X_add_number
= 0;
11148 expr
.X_add_symbol
= symbol
;
11149 emit_expr (&expr
, size
);
11152 /* This is called whenever some data item (not an instruction) needs a
11153 fixup. We pick the right reloc code depending on the byteorder
11154 currently in effect. */
11156 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
11162 bfd_reloc_code_real_type code
;
11167 /* There are no reloc for 8 and 16 bit quantities, but we allow
11168 them here since they will work fine as long as the expression
11169 is fully defined at the end of the pass over the source file. */
11170 case 1: code
= BFD_RELOC_8
; break;
11171 case 2: code
= BFD_RELOC_16
; break;
11173 if (target_big_endian
)
11174 code
= BFD_RELOC_IA64_DIR32MSB
;
11176 code
= BFD_RELOC_IA64_DIR32LSB
;
11180 /* In 32-bit mode, data8 could mean function descriptors too. */
11181 if (exp
->X_op
== O_pseudo_fixup
11182 && exp
->X_op_symbol
11183 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11184 && !(md
.flags
& EF_IA_64_ABI64
))
11186 if (target_big_endian
)
11187 code
= BFD_RELOC_IA64_IPLTMSB
;
11189 code
= BFD_RELOC_IA64_IPLTLSB
;
11190 exp
->X_op
= O_symbol
;
11195 if (target_big_endian
)
11196 code
= BFD_RELOC_IA64_DIR64MSB
;
11198 code
= BFD_RELOC_IA64_DIR64LSB
;
11203 if (exp
->X_op
== O_pseudo_fixup
11204 && exp
->X_op_symbol
11205 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11207 if (target_big_endian
)
11208 code
= BFD_RELOC_IA64_IPLTMSB
;
11210 code
= BFD_RELOC_IA64_IPLTLSB
;
11211 exp
->X_op
= O_symbol
;
11217 as_bad ("Unsupported fixup size %d", nbytes
);
11218 ignore_rest_of_line ();
11222 if (exp
->X_op
== O_pseudo_fixup
)
11224 exp
->X_op
= O_symbol
;
11225 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11226 /* ??? If code unchanged, unsupported. */
11229 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11230 /* We need to store the byte order in effect in case we're going
11231 to fix an 8 or 16 bit relocation (for which there no real
11232 relocs available). See md_apply_fix(). */
11233 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11236 /* Return the actual relocation we wish to associate with the pseudo
11237 reloc described by SYM and R_TYPE. SYM should be one of the
11238 symbols in the pseudo_func array, or NULL. */
11240 static bfd_reloc_code_real_type
11241 ia64_gen_real_reloc_type (sym
, r_type
)
11242 struct symbol
*sym
;
11243 bfd_reloc_code_real_type r_type
;
11245 bfd_reloc_code_real_type
new = 0;
11246 const char *type
= NULL
, *suffix
= "";
11253 switch (S_GET_VALUE (sym
))
11255 case FUNC_FPTR_RELATIVE
:
11258 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11259 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11260 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11261 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11262 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11263 default: type
= "FPTR"; break;
11267 case FUNC_GP_RELATIVE
:
11270 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11271 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11272 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11273 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11274 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11275 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11276 default: type
= "GPREL"; break;
11280 case FUNC_LT_RELATIVE
:
11283 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11284 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11285 default: type
= "LTOFF"; break;
11289 case FUNC_LT_RELATIVE_X
:
11292 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11293 default: type
= "LTOFF"; suffix
= "X"; break;
11297 case FUNC_PC_RELATIVE
:
11300 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11301 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11302 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11303 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11304 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11305 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11306 default: type
= "PCREL"; break;
11310 case FUNC_PLT_RELATIVE
:
11313 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11314 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11315 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11316 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11317 default: type
= "PLTOFF"; break;
11321 case FUNC_SEC_RELATIVE
:
11324 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11325 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11326 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11327 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11328 default: type
= "SECREL"; break;
11332 case FUNC_SEG_RELATIVE
:
11335 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11336 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11337 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11338 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11339 default: type
= "SEGREL"; break;
11343 case FUNC_LTV_RELATIVE
:
11346 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11347 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11348 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11349 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11350 default: type
= "LTV"; break;
11354 case FUNC_LT_FPTR_RELATIVE
:
11357 case BFD_RELOC_IA64_IMM22
:
11358 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11359 case BFD_RELOC_IA64_IMM64
:
11360 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11361 case BFD_RELOC_IA64_DIR32MSB
:
11362 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11363 case BFD_RELOC_IA64_DIR32LSB
:
11364 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11365 case BFD_RELOC_IA64_DIR64MSB
:
11366 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11367 case BFD_RELOC_IA64_DIR64LSB
:
11368 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11370 type
= "LTOFF_FPTR"; break;
11374 case FUNC_TP_RELATIVE
:
11377 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11378 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11379 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11380 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11381 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11382 default: type
= "TPREL"; break;
11386 case FUNC_LT_TP_RELATIVE
:
11389 case BFD_RELOC_IA64_IMM22
:
11390 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11392 type
= "LTOFF_TPREL"; break;
11396 case FUNC_DTP_MODULE
:
11399 case BFD_RELOC_IA64_DIR64MSB
:
11400 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11401 case BFD_RELOC_IA64_DIR64LSB
:
11402 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11404 type
= "DTPMOD"; break;
11408 case FUNC_LT_DTP_MODULE
:
11411 case BFD_RELOC_IA64_IMM22
:
11412 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11414 type
= "LTOFF_DTPMOD"; break;
11418 case FUNC_DTP_RELATIVE
:
11421 case BFD_RELOC_IA64_DIR32MSB
:
11422 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11423 case BFD_RELOC_IA64_DIR32LSB
:
11424 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11425 case BFD_RELOC_IA64_DIR64MSB
:
11426 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11427 case BFD_RELOC_IA64_DIR64LSB
:
11428 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11429 case BFD_RELOC_IA64_IMM14
:
11430 new = BFD_RELOC_IA64_DTPREL14
; break;
11431 case BFD_RELOC_IA64_IMM22
:
11432 new = BFD_RELOC_IA64_DTPREL22
; break;
11433 case BFD_RELOC_IA64_IMM64
:
11434 new = BFD_RELOC_IA64_DTPREL64I
; break;
11436 type
= "DTPREL"; break;
11440 case FUNC_LT_DTP_RELATIVE
:
11443 case BFD_RELOC_IA64_IMM22
:
11444 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11446 type
= "LTOFF_DTPREL"; break;
11450 case FUNC_IPLT_RELOC
:
11453 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11454 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11455 default: type
= "IPLT"; break;
11473 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11474 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11475 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11476 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11477 case BFD_RELOC_UNUSED
: width
= 13; break;
11478 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11479 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11480 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11484 /* This should be an error, but since previously there wasn't any
11485 diagnostic here, dont't make it fail because of this for now. */
11486 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11491 /* Here is where generate the appropriate reloc for pseudo relocation
11494 ia64_validate_fix (fix
)
11497 switch (fix
->fx_r_type
)
11499 case BFD_RELOC_IA64_FPTR64I
:
11500 case BFD_RELOC_IA64_FPTR32MSB
:
11501 case BFD_RELOC_IA64_FPTR64LSB
:
11502 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11503 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11504 if (fix
->fx_offset
!= 0)
11505 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11506 "No addend allowed in @fptr() relocation");
11514 fix_insn (fix
, odesc
, value
)
11516 const struct ia64_operand
*odesc
;
11519 bfd_vma insn
[3], t0
, t1
, control_bits
;
11524 slot
= fix
->fx_where
& 0x3;
11525 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11527 /* Bundles are always in little-endian byte order */
11528 t0
= bfd_getl64 (fixpos
);
11529 t1
= bfd_getl64 (fixpos
+ 8);
11530 control_bits
= t0
& 0x1f;
11531 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11532 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11533 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11536 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11538 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11539 insn
[2] |= (((value
& 0x7f) << 13)
11540 | (((value
>> 7) & 0x1ff) << 27)
11541 | (((value
>> 16) & 0x1f) << 22)
11542 | (((value
>> 21) & 0x1) << 21)
11543 | (((value
>> 63) & 0x1) << 36));
11545 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11547 if (value
& ~0x3fffffffffffffffULL
)
11548 err
= "integer operand out of range";
11549 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11550 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11552 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11555 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11556 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11557 | (((value
>> 0) & 0xfffff) << 13));
11560 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11563 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11565 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11566 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11567 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11568 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11571 /* Attempt to simplify or even eliminate a fixup. The return value is
11572 ignored; perhaps it was once meaningful, but now it is historical.
11573 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11575 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11579 md_apply_fix (fix
, valP
, seg
)
11582 segT seg ATTRIBUTE_UNUSED
;
11585 valueT value
= *valP
;
11587 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11591 switch (fix
->fx_r_type
)
11593 case BFD_RELOC_IA64_PCREL21B
: break;
11594 case BFD_RELOC_IA64_PCREL21BI
: break;
11595 case BFD_RELOC_IA64_PCREL21F
: break;
11596 case BFD_RELOC_IA64_PCREL21M
: break;
11597 case BFD_RELOC_IA64_PCREL60B
: break;
11598 case BFD_RELOC_IA64_PCREL22
: break;
11599 case BFD_RELOC_IA64_PCREL64I
: break;
11600 case BFD_RELOC_IA64_PCREL32MSB
: break;
11601 case BFD_RELOC_IA64_PCREL32LSB
: break;
11602 case BFD_RELOC_IA64_PCREL64MSB
: break;
11603 case BFD_RELOC_IA64_PCREL64LSB
: break;
11605 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11612 switch (fix
->fx_r_type
)
11614 case BFD_RELOC_UNUSED
:
11615 /* This must be a TAG13 or TAG13b operand. There are no external
11616 relocs defined for them, so we must give an error. */
11617 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11618 "%s must have a constant value",
11619 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11623 case BFD_RELOC_IA64_TPREL14
:
11624 case BFD_RELOC_IA64_TPREL22
:
11625 case BFD_RELOC_IA64_TPREL64I
:
11626 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11627 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11628 case BFD_RELOC_IA64_DTPREL14
:
11629 case BFD_RELOC_IA64_DTPREL22
:
11630 case BFD_RELOC_IA64_DTPREL64I
:
11631 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11632 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11639 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11641 if (fix
->tc_fix_data
.bigendian
)
11642 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11644 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11649 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11654 /* Generate the BFD reloc to be stuck in the object file from the
11655 fixup used internally in the assembler. */
11658 tc_gen_reloc (sec
, fixp
)
11659 asection
*sec ATTRIBUTE_UNUSED
;
11664 reloc
= xmalloc (sizeof (*reloc
));
11665 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11666 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11667 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11668 reloc
->addend
= fixp
->fx_offset
;
11669 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11673 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11674 "Cannot represent %s relocation in object file",
11675 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11680 /* Turn a string in input_line_pointer into a floating point constant
11681 of type TYPE, and store the appropriate bytes in *LIT. The number
11682 of LITTLENUMS emitted is stored in *SIZE. An error message is
11683 returned, or NULL on OK. */
11685 #define MAX_LITTLENUMS 5
11688 md_atof (type
, lit
, size
)
11693 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11723 return "Bad call to MD_ATOF()";
11725 t
= atof_ieee (input_line_pointer
, type
, words
);
11727 input_line_pointer
= t
;
11729 (*ia64_float_to_chars
) (lit
, words
, prec
);
11733 /* It is 10 byte floating point with 6 byte padding. */
11734 memset (&lit
[10], 0, 6);
11735 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11738 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11743 /* Handle ia64 specific semantics of the align directive. */
11746 ia64_md_do_align (n
, fill
, len
, max
)
11747 int n ATTRIBUTE_UNUSED
;
11748 const char *fill ATTRIBUTE_UNUSED
;
11749 int len ATTRIBUTE_UNUSED
;
11750 int max ATTRIBUTE_UNUSED
;
11752 if (subseg_text_p (now_seg
))
11753 ia64_flush_insns ();
11756 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11757 of an rs_align_code fragment. */
11760 ia64_handle_align (fragp
)
11765 const unsigned char *nop
;
11767 if (fragp
->fr_type
!= rs_align_code
)
11770 /* Check if this frag has to end with a stop bit. */
11771 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11773 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11774 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11776 /* If no paddings are needed, we check if we need a stop bit. */
11777 if (!bytes
&& fragp
->tc_frag_data
)
11779 if (fragp
->fr_fix
< 16)
11781 /* FIXME: It won't work with
11783 alloc r32=ar.pfs,1,2,4,0
11787 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11788 _("Can't add stop bit to mark end of instruction group"));
11791 /* Bundles are always in little-endian byte order. Make sure
11792 the previous bundle has the stop bit. */
11796 /* Make sure we are on a 16-byte boundary, in case someone has been
11797 putting data into a text section. */
11800 int fix
= bytes
& 15;
11801 memset (p
, 0, fix
);
11804 fragp
->fr_fix
+= fix
;
11807 /* Instruction bundles are always little-endian. */
11808 memcpy (p
, nop
, 16);
11809 fragp
->fr_var
= 16;
11813 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11818 number_to_chars_bigendian (lit
, (long) (*words
++),
11819 sizeof (LITTLENUM_TYPE
));
11820 lit
+= sizeof (LITTLENUM_TYPE
);
11825 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11830 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11831 sizeof (LITTLENUM_TYPE
));
11832 lit
+= sizeof (LITTLENUM_TYPE
);
11837 ia64_elf_section_change_hook (void)
11839 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11840 && elf_linked_to_section (now_seg
) == NULL
)
11841 elf_linked_to_section (now_seg
) = text_section
;
11842 dot_byteorder (-1);
11845 /* Check if a label should be made global. */
11847 ia64_check_label (symbolS
*label
)
11849 if (*input_line_pointer
== ':')
11851 S_SET_EXTERNAL (label
);
11852 input_line_pointer
++;
11856 /* Used to remember where .alias and .secalias directives are seen. We
11857 will rename symbol and section names when we are about to output
11858 the relocatable file. */
11861 char *file
; /* The file where the directive is seen. */
11862 unsigned int line
; /* The line number the directive is at. */
11863 const char *name
; /* The orignale name of the symbol. */
11866 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11867 .secalias. Otherwise, it is .alias. */
11869 dot_alias (int section
)
11871 char *name
, *alias
;
11875 const char *error_string
;
11878 struct hash_control
*ahash
, *nhash
;
11881 name
= input_line_pointer
;
11882 delim
= get_symbol_end ();
11883 end_name
= input_line_pointer
;
11886 if (name
== end_name
)
11888 as_bad (_("expected symbol name"));
11889 ignore_rest_of_line ();
11893 SKIP_WHITESPACE ();
11895 if (*input_line_pointer
!= ',')
11898 as_bad (_("expected comma after \"%s\""), name
);
11900 ignore_rest_of_line ();
11904 input_line_pointer
++;
11906 ia64_canonicalize_symbol_name (name
);
11908 /* We call demand_copy_C_string to check if alias string is valid.
11909 There should be a closing `"' and no `\0' in the string. */
11910 alias
= demand_copy_C_string (&len
);
11913 ignore_rest_of_line ();
11917 /* Make a copy of name string. */
11918 len
= strlen (name
) + 1;
11919 obstack_grow (¬es
, name
, len
);
11920 name
= obstack_finish (¬es
);
11925 ahash
= secalias_hash
;
11926 nhash
= secalias_name_hash
;
11931 ahash
= alias_hash
;
11932 nhash
= alias_name_hash
;
11935 /* Check if alias has been used before. */
11936 h
= (struct alias
*) hash_find (ahash
, alias
);
11939 if (strcmp (h
->name
, name
))
11940 as_bad (_("`%s' is already the alias of %s `%s'"),
11941 alias
, kind
, h
->name
);
11945 /* Check if name already has an alias. */
11946 a
= (const char *) hash_find (nhash
, name
);
11949 if (strcmp (a
, alias
))
11950 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11954 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11955 as_where (&h
->file
, &h
->line
);
11958 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11961 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11962 alias
, kind
, error_string
);
11966 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11969 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11970 alias
, kind
, error_string
);
11972 obstack_free (¬es
, name
);
11973 obstack_free (¬es
, alias
);
11976 demand_empty_rest_of_line ();
11979 /* It renames the original symbol name to its alias. */
11981 do_alias (const char *alias
, PTR value
)
11983 struct alias
*h
= (struct alias
*) value
;
11984 symbolS
*sym
= symbol_find (h
->name
);
11987 as_warn_where (h
->file
, h
->line
,
11988 _("symbol `%s' aliased to `%s' is not used"),
11991 S_SET_NAME (sym
, (char *) alias
);
11994 /* Called from write_object_file. */
11996 ia64_adjust_symtab (void)
11998 hash_traverse (alias_hash
, do_alias
);
12001 /* It renames the original section name to its alias. */
12003 do_secalias (const char *alias
, PTR value
)
12005 struct alias
*h
= (struct alias
*) value
;
12006 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
12009 as_warn_where (h
->file
, h
->line
,
12010 _("section `%s' aliased to `%s' is not used"),
12016 /* Called from write_object_file. */
12018 ia64_frob_file (void)
12020 hash_traverse (secalias_hash
, do_secalias
);