1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "iq2000-desc.h"
35 #include "iq2000-opc.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
42 #define min(a,b) ((a) < (b) ? (a) : (b))
44 #define max(a,b) ((a) > (b) ? (a) : (b))
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC
, const CGEN_INSN
*, const char **, CGEN_FIELDS
*);
49 /* -- assembler routines inserted here. */
53 #include "safe-ctype.h"
55 static const char * MISSING_CLOSING_PARENTHESIS
= N_("missing `)'");
57 /* Special check to ensure that instruction exists for given machine. */
60 iq2000_cgen_insn_supported (CGEN_CPU_DESC cd
, const CGEN_INSN
*insn
)
62 int machs
= cd
->machs
;
64 return (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_MACH
) & machs
) != 0;
68 iq2000_cgen_isa_register (const char **strp
)
73 if (**strp
== 'r' || **strp
== 'R')
79 if ('0' <= ch1
&& ch1
<= '9')
86 if (('1' <= ch1
&& ch1
<= '2') && ('0' <= ch2
&& ch2
<= '9'))
88 if ('3' == ch1
&& (ch2
== '0' || ch2
== '1'))
93 && TOLOWER ((*strp
)[1]) != 'l'
94 && TOLOWER ((*strp
)[1]) != 'h')
99 /* Handle negated literal. */
102 parse_mimm (CGEN_CPU_DESC cd
,
105 unsigned long *valuep
)
109 /* Verify this isn't a register. */
110 if (iq2000_cgen_isa_register (strp
))
111 errmsg
= _("immediate value cannot be register");
116 errmsg
= cgen_parse_signed_integer (cd
, strp
, opindex
, & value
);
119 long x
= (-value
) & 0xFFFF0000;
121 if (x
!= 0 && x
!= (long) 0xFFFF0000)
122 errmsg
= _("immediate value out of range");
124 *valuep
= (-value
& 0xFFFF);
130 /* Handle signed/unsigned literal. */
133 parse_imm (CGEN_CPU_DESC cd
,
136 unsigned long *valuep
)
140 if (iq2000_cgen_isa_register (strp
))
141 errmsg
= _("immediate value cannot be register");
146 errmsg
= cgen_parse_signed_integer (cd
, strp
, opindex
, & value
);
149 long x
= value
& 0xFFFF0000;
151 if (x
!= 0 && x
!= (long) 0xFFFF0000)
152 errmsg
= _("immediate value out of range");
154 *valuep
= (value
& 0xFFFF);
160 /* Handle iq10 21-bit jmp offset. */
163 parse_jtargq10 (CGEN_CPU_DESC cd
,
166 int reloc ATTRIBUTE_UNUSED
,
167 enum cgen_parse_operand_result
*type_addr ATTRIBUTE_UNUSED
,
172 enum cgen_parse_operand_result result_type
= CGEN_PARSE_OPERAND_RESULT_NUMBER
;
174 errmsg
= cgen_parse_address (cd
, strp
, opindex
, BFD_RELOC_IQ2000_OFFSET_21
,
175 & result_type
, & value
);
176 if (errmsg
== NULL
&& result_type
== CGEN_PARSE_OPERAND_RESULT_NUMBER
)
178 /* Check value is within 23-bits
179 (remembering that 2-bit shift right will occur). */
180 if (value
> 0x7fffff)
181 return _("21-bit offset out of range");
183 *valuep
= (value
& 0x7FFFFF);
190 parse_hi16 (CGEN_CPU_DESC cd
,
193 unsigned long *valuep
)
195 if (strncasecmp (*strp
, "%hi(", 4) == 0)
197 enum cgen_parse_operand_result result_type
;
202 errmsg
= cgen_parse_address (cd
, strp
, opindex
, BFD_RELOC_HI16
,
203 & result_type
, & value
);
205 return MISSING_CLOSING_PARENTHESIS
;
209 && result_type
== CGEN_PARSE_OPERAND_RESULT_NUMBER
)
211 /* If value has top-bit of %lo on, then it will
212 sign-propagate and so we compensate by adding
213 1 to the resultant %hi value. */
223 /* We add %uhi in case a user just wants the high 16-bits or is using
224 an insn like ori for %lo which does not sign-propagate. */
225 if (strncasecmp (*strp
, "%uhi(", 5) == 0)
227 enum cgen_parse_operand_result result_type
;
232 errmsg
= cgen_parse_address (cd
, strp
, opindex
, BFD_RELOC_IQ2000_UHI16
,
233 & result_type
, & value
);
235 return MISSING_CLOSING_PARENTHESIS
;
239 && result_type
== CGEN_PARSE_OPERAND_RESULT_NUMBER
)
247 return parse_imm (cd
, strp
, opindex
, valuep
);
250 /* Handle %lo in a signed context.
251 The signedness of the value doesn't matter to %lo(), but this also
252 handles the case where %lo() isn't present. */
255 parse_lo16 (CGEN_CPU_DESC cd
,
258 unsigned long *valuep
)
260 if (strncasecmp (*strp
, "%lo(", 4) == 0)
263 enum cgen_parse_operand_result result_type
;
267 errmsg
= cgen_parse_address (cd
, strp
, opindex
, BFD_RELOC_LO16
,
268 & result_type
, & value
);
270 return MISSING_CLOSING_PARENTHESIS
;
273 && result_type
== CGEN_PARSE_OPERAND_RESULT_NUMBER
)
279 return parse_imm (cd
, strp
, opindex
, valuep
);
282 /* Handle %lo in a negated signed context.
283 The signedness of the value doesn't matter to %lo(), but this also
284 handles the case where %lo() isn't present. */
287 parse_mlo16 (CGEN_CPU_DESC cd
,
290 unsigned long *valuep
)
292 if (strncasecmp (*strp
, "%lo(", 4) == 0)
295 enum cgen_parse_operand_result result_type
;
299 errmsg
= cgen_parse_address (cd
, strp
, opindex
, BFD_RELOC_LO16
,
300 & result_type
, & value
);
302 return MISSING_CLOSING_PARENTHESIS
;
305 && result_type
== CGEN_PARSE_OPERAND_RESULT_NUMBER
)
306 value
= (-value
) & 0xffff;
311 return parse_mimm (cd
, strp
, opindex
, valuep
);
316 const char * iq2000_cgen_parse_operand
317 (CGEN_CPU_DESC
, int, const char **, CGEN_FIELDS
*);
319 /* Main entry point for operand parsing.
321 This function is basically just a big switch statement. Earlier versions
322 used tables to look up the function to use, but
323 - if the table contains both assembler and disassembler functions then
324 the disassembler contains much of the assembler and vice-versa,
325 - there's a lot of inlining possibilities as things grow,
326 - using a switch statement avoids the function call overhead.
328 This function could be moved into `parse_insn_normal', but keeping it
329 separate makes clear the interface between `parse_insn_normal' and each of
333 iq2000_cgen_parse_operand (CGEN_CPU_DESC cd
,
336 CGEN_FIELDS
* fields
)
338 const char * errmsg
= NULL
;
339 /* Used by scalar operands that still need to be parsed. */
340 long junk ATTRIBUTE_UNUSED
;
344 case IQ2000_OPERAND__INDEX
:
345 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND__INDEX
, (unsigned long *) (& fields
->f_index
));
347 case IQ2000_OPERAND_BASE
:
348 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rs
);
350 case IQ2000_OPERAND_BASEOFF
:
353 errmsg
= cgen_parse_address (cd
, strp
, IQ2000_OPERAND_BASEOFF
, 0, NULL
, & value
);
354 fields
->f_imm
= value
;
357 case IQ2000_OPERAND_BITNUM
:
358 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_BITNUM
, (unsigned long *) (& fields
->f_rt
));
360 case IQ2000_OPERAND_BYTECOUNT
:
361 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_BYTECOUNT
, (unsigned long *) (& fields
->f_bytecount
));
363 case IQ2000_OPERAND_CAM_Y
:
364 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_CAM_Y
, (unsigned long *) (& fields
->f_cam_y
));
366 case IQ2000_OPERAND_CAM_Z
:
367 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_CAM_Z
, (unsigned long *) (& fields
->f_cam_z
));
369 case IQ2000_OPERAND_CM_3FUNC
:
370 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_CM_3FUNC
, (unsigned long *) (& fields
->f_cm_3func
));
372 case IQ2000_OPERAND_CM_3Z
:
373 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_CM_3Z
, (unsigned long *) (& fields
->f_cm_3z
));
375 case IQ2000_OPERAND_CM_4FUNC
:
376 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_CM_4FUNC
, (unsigned long *) (& fields
->f_cm_4func
));
378 case IQ2000_OPERAND_CM_4Z
:
379 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_CM_4Z
, (unsigned long *) (& fields
->f_cm_4z
));
381 case IQ2000_OPERAND_COUNT
:
382 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_COUNT
, (unsigned long *) (& fields
->f_count
));
384 case IQ2000_OPERAND_EXECODE
:
385 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_EXECODE
, (unsigned long *) (& fields
->f_excode
));
387 case IQ2000_OPERAND_HI16
:
388 errmsg
= parse_hi16 (cd
, strp
, IQ2000_OPERAND_HI16
, (unsigned long *) (& fields
->f_imm
));
390 case IQ2000_OPERAND_IMM
:
391 errmsg
= parse_imm (cd
, strp
, IQ2000_OPERAND_IMM
, (unsigned long *) (& fields
->f_imm
));
393 case IQ2000_OPERAND_JMPTARG
:
396 errmsg
= cgen_parse_address (cd
, strp
, IQ2000_OPERAND_JMPTARG
, 0, NULL
, & value
);
397 fields
->f_jtarg
= value
;
400 case IQ2000_OPERAND_JMPTARGQ10
:
403 errmsg
= parse_jtargq10 (cd
, strp
, IQ2000_OPERAND_JMPTARGQ10
, 0, NULL
, & value
);
404 fields
->f_jtargq10
= value
;
407 case IQ2000_OPERAND_LO16
:
408 errmsg
= parse_lo16 (cd
, strp
, IQ2000_OPERAND_LO16
, (unsigned long *) (& fields
->f_imm
));
410 case IQ2000_OPERAND_MASK
:
411 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_MASK
, (unsigned long *) (& fields
->f_mask
));
413 case IQ2000_OPERAND_MASKL
:
414 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_MASKL
, (unsigned long *) (& fields
->f_maskl
));
416 case IQ2000_OPERAND_MASKQ10
:
417 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_MASKQ10
, (unsigned long *) (& fields
->f_maskq10
));
419 case IQ2000_OPERAND_MASKR
:
420 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_MASKR
, (unsigned long *) (& fields
->f_rs
));
422 case IQ2000_OPERAND_MLO16
:
423 errmsg
= parse_mlo16 (cd
, strp
, IQ2000_OPERAND_MLO16
, (unsigned long *) (& fields
->f_imm
));
425 case IQ2000_OPERAND_OFFSET
:
428 errmsg
= cgen_parse_address (cd
, strp
, IQ2000_OPERAND_OFFSET
, 0, NULL
, & value
);
429 fields
->f_offset
= value
;
432 case IQ2000_OPERAND_RD
:
433 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rd
);
435 case IQ2000_OPERAND_RD_RS
:
436 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rd_rs
);
438 case IQ2000_OPERAND_RD_RT
:
439 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rd_rt
);
441 case IQ2000_OPERAND_RS
:
442 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rs
);
444 case IQ2000_OPERAND_RT
:
445 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rt
);
447 case IQ2000_OPERAND_RT_RS
:
448 errmsg
= cgen_parse_keyword (cd
, strp
, & iq2000_cgen_opval_gr_names
, & fields
->f_rt_rs
);
450 case IQ2000_OPERAND_SHAMT
:
451 errmsg
= cgen_parse_unsigned_integer (cd
, strp
, IQ2000_OPERAND_SHAMT
, (unsigned long *) (& fields
->f_shamt
));
455 /* xgettext:c-format */
456 fprintf (stderr
, _("Unrecognized field %d while parsing.\n"), opindex
);
463 cgen_parse_fn
* const iq2000_cgen_parse_handlers
[] =
469 iq2000_cgen_init_asm (CGEN_CPU_DESC cd
)
471 iq2000_cgen_init_opcode_table (cd
);
472 iq2000_cgen_init_ibld_table (cd
);
473 cd
->parse_handlers
= & iq2000_cgen_parse_handlers
[0];
474 cd
->parse_operand
= iq2000_cgen_parse_operand
;
479 /* Regex construction routine.
481 This translates an opcode syntax string into a regex string,
482 by replacing any non-character syntax element (such as an
483 opcode) with the pattern '.*'
485 It then compiles the regex and stores it in the opcode, for
486 later use by iq2000_cgen_assemble_insn
488 Returns NULL for success, an error message for failure. */
491 iq2000_cgen_build_insn_regex (CGEN_INSN
*insn
)
493 CGEN_OPCODE
*opc
= (CGEN_OPCODE
*) CGEN_INSN_OPCODE (insn
);
494 const char *mnem
= CGEN_INSN_MNEMONIC (insn
);
495 char rxbuf
[CGEN_MAX_RX_ELEMENTS
];
497 const CGEN_SYNTAX_CHAR_TYPE
*syn
;
500 syn
= CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc
));
502 /* Mnemonics come first in the syntax string. */
503 if (! CGEN_SYNTAX_MNEMONIC_P (* syn
))
504 return _("missing mnemonic in syntax string");
507 /* Generate a case sensitive regular expression that emulates case
508 insensitive matching in the "C" locale. We cannot generate a case
509 insensitive regular expression because in Turkish locales, 'i' and 'I'
510 are not equal modulo case conversion. */
512 /* Copy the literal mnemonic out of the insn. */
513 for (; *mnem
; mnem
++)
528 /* Copy any remaining literals from the syntax string into the rx. */
529 for(; * syn
!= 0 && rx
<= rxbuf
+ (CGEN_MAX_RX_ELEMENTS
- 7 - 4); ++syn
)
531 if (CGEN_SYNTAX_CHAR_P (* syn
))
533 char c
= CGEN_SYNTAX_CHAR (* syn
);
537 /* Escape any regex metacharacters in the syntax. */
538 case '.': case '[': case '\\':
539 case '*': case '^': case '$':
541 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
542 case '?': case '{': case '}':
543 case '(': case ')': case '*':
544 case '|': case '+': case ']':
565 /* Replace non-syntax fields with globs. */
571 /* Trailing whitespace ok. */
578 /* But anchor it after that. */
582 CGEN_INSN_RX (insn
) = xmalloc (sizeof (regex_t
));
583 reg_err
= regcomp ((regex_t
*) CGEN_INSN_RX (insn
), rxbuf
, REG_NOSUB
);
591 regerror (reg_err
, (regex_t
*) CGEN_INSN_RX (insn
), msg
, 80);
592 regfree ((regex_t
*) CGEN_INSN_RX (insn
));
593 free (CGEN_INSN_RX (insn
));
594 (CGEN_INSN_RX (insn
)) = NULL
;
600 /* Default insn parser.
602 The syntax string is scanned and operands are parsed and stored in FIELDS.
603 Relocs are queued as we go via other callbacks.
605 ??? Note that this is currently an all-or-nothing parser. If we fail to
606 parse the instruction, we return 0 and the caller will start over from
607 the beginning. Backtracking will be necessary in parsing subexpressions,
608 but that can be handled there. Not handling backtracking here may get
609 expensive in the case of the m68k. Deal with later.
611 Returns NULL for success, an error message for failure. */
614 parse_insn_normal (CGEN_CPU_DESC cd
,
615 const CGEN_INSN
*insn
,
619 /* ??? Runtime added insns not handled yet. */
620 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
621 const char *str
= *strp
;
624 const CGEN_SYNTAX_CHAR_TYPE
* syn
;
625 #ifdef CGEN_MNEMONIC_OPERANDS
630 /* For now we assume the mnemonic is first (there are no leading operands).
631 We can parse it without needing to set up operand parsing.
632 GAS's input scrubber will ensure mnemonics are lowercase, but we may
633 not be called from GAS. */
634 p
= CGEN_INSN_MNEMONIC (insn
);
635 while (*p
&& TOLOWER (*p
) == TOLOWER (*str
))
639 return _("unrecognized instruction");
641 #ifndef CGEN_MNEMONIC_OPERANDS
642 if (* str
&& ! ISSPACE (* str
))
643 return _("unrecognized instruction");
646 CGEN_INIT_PARSE (cd
);
647 cgen_init_parse_operand (cd
);
648 #ifdef CGEN_MNEMONIC_OPERANDS
652 /* We don't check for (*str != '\0') here because we want to parse
653 any trailing fake arguments in the syntax string. */
654 syn
= CGEN_SYNTAX_STRING (syntax
);
656 /* Mnemonics come first for now, ensure valid string. */
657 if (! CGEN_SYNTAX_MNEMONIC_P (* syn
))
664 /* Non operand chars must match exactly. */
665 if (CGEN_SYNTAX_CHAR_P (* syn
))
667 /* FIXME: While we allow for non-GAS callers above, we assume the
668 first char after the mnemonic part is a space. */
669 /* FIXME: We also take inappropriate advantage of the fact that
670 GAS's input scrubber will remove extraneous blanks. */
671 if (TOLOWER (*str
) == TOLOWER (CGEN_SYNTAX_CHAR (* syn
)))
673 #ifdef CGEN_MNEMONIC_OPERANDS
674 if (CGEN_SYNTAX_CHAR(* syn
) == ' ')
682 /* Syntax char didn't match. Can't be this insn. */
683 static char msg
[80];
685 /* xgettext:c-format */
686 sprintf (msg
, _("syntax error (expected char `%c', found `%c')"),
687 CGEN_SYNTAX_CHAR(*syn
), *str
);
692 /* Ran out of input. */
693 static char msg
[80];
695 /* xgettext:c-format */
696 sprintf (msg
, _("syntax error (expected char `%c', found end of instruction)"),
697 CGEN_SYNTAX_CHAR(*syn
));
703 /* We have an operand of some sort. */
704 errmsg
= cd
->parse_operand (cd
, CGEN_SYNTAX_FIELD (*syn
),
709 /* Done with this operand, continue with next one. */
713 /* If we're at the end of the syntax string, we're done. */
716 /* FIXME: For the moment we assume a valid `str' can only contain
717 blanks now. IE: We needn't try again with a longer version of
718 the insn and it is assumed that longer versions of insns appear
719 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
720 while (ISSPACE (* str
))
724 return _("junk at end of line"); /* FIXME: would like to include `str' */
729 /* We couldn't parse it. */
730 return _("unrecognized instruction");
734 This routine is called for each instruction to be assembled.
735 STR points to the insn to be assembled.
736 We assume all necessary tables have been initialized.
737 The assembled instruction, less any fixups, is stored in BUF.
738 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
739 still needs to be converted to target byte order, otherwise BUF is an array
740 of bytes in target byte order.
741 The result is a pointer to the insn's entry in the opcode table,
742 or NULL if an error occured (an error message will have already been
745 Note that when processing (non-alias) macro-insns,
746 this function recurses.
748 ??? It's possible to make this cpu-independent.
749 One would have to deal with a few minor things.
750 At this point in time doing so would be more of a curiosity than useful
751 [for example this file isn't _that_ big], but keeping the possibility in
752 mind helps keep the design clean. */
755 iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd
,
758 CGEN_INSN_BYTES_PTR buf
,
762 CGEN_INSN_LIST
*ilist
;
763 const char *parse_errmsg
= NULL
;
764 const char *insert_errmsg
= NULL
;
765 int recognized_mnemonic
= 0;
767 /* Skip leading white space. */
768 while (ISSPACE (* str
))
771 /* The instructions are stored in hashed lists.
772 Get the first in the list. */
773 ilist
= CGEN_ASM_LOOKUP_INSN (cd
, str
);
775 /* Keep looking until we find a match. */
777 for ( ; ilist
!= NULL
; ilist
= CGEN_ASM_NEXT_INSN (ilist
))
779 const CGEN_INSN
*insn
= ilist
->insn
;
780 recognized_mnemonic
= 1;
782 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
783 /* Not usually needed as unsupported opcodes
784 shouldn't be in the hash lists. */
785 /* Is this insn supported by the selected cpu? */
786 if (! iq2000_cgen_insn_supported (cd
, insn
))
789 /* If the RELAXED attribute is set, this is an insn that shouldn't be
790 chosen immediately. Instead, it is used during assembler/linker
791 relaxation if possible. */
792 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_RELAXED
) != 0)
797 /* Skip this insn if str doesn't look right lexically. */
798 if (CGEN_INSN_RX (insn
) != NULL
&&
799 regexec ((regex_t
*) CGEN_INSN_RX (insn
), str
, 0, NULL
, 0) == REG_NOMATCH
)
802 /* Allow parse/insert handlers to obtain length of insn. */
803 CGEN_FIELDS_BITSIZE (fields
) = CGEN_INSN_BITSIZE (insn
);
805 parse_errmsg
= CGEN_PARSE_FN (cd
, insn
) (cd
, insn
, & str
, fields
);
806 if (parse_errmsg
!= NULL
)
809 /* ??? 0 is passed for `pc'. */
810 insert_errmsg
= CGEN_INSERT_FN (cd
, insn
) (cd
, insn
, fields
, buf
,
812 if (insert_errmsg
!= NULL
)
815 /* It is up to the caller to actually output the insn and any
821 static char errbuf
[150];
822 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
823 const char *tmp_errmsg
;
825 /* If requesting verbose error messages, use insert_errmsg.
826 Failing that, use parse_errmsg. */
827 tmp_errmsg
= (insert_errmsg
? insert_errmsg
:
828 parse_errmsg
? parse_errmsg
:
829 recognized_mnemonic
?
830 _("unrecognized form of instruction") :
831 _("unrecognized instruction"));
833 if (strlen (start
) > 50)
834 /* xgettext:c-format */
835 sprintf (errbuf
, "%s `%.50s...'", tmp_errmsg
, start
);
837 /* xgettext:c-format */
838 sprintf (errbuf
, "%s `%.50s'", tmp_errmsg
, start
);
840 if (strlen (start
) > 50)
841 /* xgettext:c-format */
842 sprintf (errbuf
, _("bad instruction `%.50s...'"), start
);
844 /* xgettext:c-format */
845 sprintf (errbuf
, _("bad instruction `%.50s'"), start
);