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[binutils.git] / opcodes / mt-opc.c
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1 /* Instruction opcode table for mt.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2005 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #include "sysdep.h"
26 #include "ansidecl.h"
27 #include "bfd.h"
28 #include "symcat.h"
29 #include "mt-desc.h"
30 #include "mt-opc.h"
31 #include "libiberty.h"
33 /* -- opc.c */
34 #include "safe-ctype.h"
36 /* Special check to ensure that instruction exists for given machine. */
38 int
39 mt_cgen_insn_supported (CGEN_CPU_DESC cd,
40 const CGEN_INSN *insn)
42 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
44 /* No mach attribute? Assume it's supported for all machs. */
45 if (machs == 0)
46 return 1;
48 return ((machs & cd->machs) != 0);
51 /* A better hash function for instruction mnemonics. */
53 unsigned int
54 mt_asm_hash (const char* insn)
56 unsigned int hash;
57 const char* m = insn;
59 for (hash = 0; *m && ! ISSPACE (*m); m++)
60 hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
62 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
64 return hash % CGEN_ASM_HASH_SIZE;
68 /* -- asm.c */
69 /* The hash functions are recorded here to help keep assembler code out of
70 the disassembler and vice versa. */
72 static int asm_hash_insn_p (const CGEN_INSN *);
73 static unsigned int asm_hash_insn (const char *);
74 static int dis_hash_insn_p (const CGEN_INSN *);
75 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
77 /* Instruction formats. */
79 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80 #define F(f) & mt_cgen_ifld_table[MT_##f]
81 #else
82 #define F(f) & mt_cgen_ifld_table[MT_/**/f]
83 #endif
84 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
85 0, 0, 0x0, { { 0 } }
88 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
89 32, 32, 0xff000fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
92 static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
93 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16S) }, { 0 } }
96 static const CGEN_IFMT ifmt_addui ATTRIBUTE_UNUSED = {
97 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } }
100 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
101 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU24) }, { 0 } }
104 static const CGEN_IFMT ifmt_ldui ATTRIBUTE_UNUSED = {
105 32, 32, 0xfff00000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } }
108 static const CGEN_IFMT ifmt_brlt ATTRIBUTE_UNUSED = {
109 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } }
112 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
113 32, 32, 0xffff0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } }
116 static const CGEN_IFMT ifmt_jal ATTRIBUTE_UNUSED = {
117 32, 32, 0xff0f0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
120 static const CGEN_IFMT ifmt_dbnz ATTRIBUTE_UNUSED = {
121 32, 32, 0xff0f0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } }
124 static const CGEN_IFMT ifmt_ei ATTRIBUTE_UNUSED = {
125 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } }
128 static const CGEN_IFMT ifmt_si ATTRIBUTE_UNUSED = {
129 32, 32, 0xffff0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
132 static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED = {
133 32, 32, 0xff0fffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } }
136 static const CGEN_IFMT ifmt_stw ATTRIBUTE_UNUSED = {
137 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } }
140 static const CGEN_IFMT ifmt_ldctxt ATTRIBUTE_UNUSED = {
141 32, 32, 0xff000e00, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_RC) }, { F (F_RCNUM) }, { F (F_UU_3_11) }, { F (F_CONTNUM) }, { 0 } }
144 static const CGEN_IFMT ifmt_ldfb ATTRIBUTE_UNUSED = {
145 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16U) }, { 0 } }
148 static const CGEN_IFMT ifmt_fbcb ATTRIBUTE_UNUSED = {
149 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_4_15) }, { F (F_RC) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
152 static const CGEN_IFMT ifmt_mfbcb ATTRIBUTE_UNUSED = {
153 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_4_15) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
156 static const CGEN_IFMT ifmt_fbcci ATTRIBUTE_UNUSED = {
157 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
160 static const CGEN_IFMT ifmt_mfbcci ATTRIBUTE_UNUSED = {
161 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
164 static const CGEN_IFMT ifmt_fbcbdr ATTRIBUTE_UNUSED = {
165 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_BALL2) }, { F (F_BRC2) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
168 static const CGEN_IFMT ifmt_rcfbcb ATTRIBUTE_UNUSED = {
169 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
172 static const CGEN_IFMT ifmt_mrcfbcb ATTRIBUTE_UNUSED = {
173 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
176 static const CGEN_IFMT ifmt_cbcast ATTRIBUTE_UNUSED = {
177 32, 32, 0xfc000380, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_UU_3_9) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
180 static const CGEN_IFMT ifmt_dupcbcast ATTRIBUTE_UNUSED = {
181 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_CELL) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
184 static const CGEN_IFMT ifmt_wfbi ATTRIBUTE_UNUSED = {
185 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_BANKADDR) }, { F (F_ROWNUM1) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
188 static const CGEN_IFMT ifmt_wfb ATTRIBUTE_UNUSED = {
189 32, 32, 0xff000040, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_UU_1_6) }, { F (F_CTXDISP) }, { 0 } }
192 static const CGEN_IFMT ifmt_rcrisc ATTRIBUTE_UNUSED = {
193 32, 32, 0xfc080000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_UU_1_19) }, { F (F_COLNUM) }, { F (F_DRRR) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
196 static const CGEN_IFMT ifmt_fbcbinc ATTRIBUTE_UNUSED = {
197 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_INCAMT) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
200 static const CGEN_IFMT ifmt_rcxmode ATTRIBUTE_UNUSED = {
201 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_XMODE) }, { F (F_MASK1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
204 static const CGEN_IFMT ifmt_interleaver ATTRIBUTE_UNUSED = {
205 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MODE) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ID) }, { F (F_SIZE) }, { 0 } }
208 static const CGEN_IFMT ifmt_wfbinc ATTRIBUTE_UNUSED = {
209 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
212 static const CGEN_IFMT ifmt_mwfbinc ATTRIBUTE_UNUSED = {
213 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
216 static const CGEN_IFMT ifmt_wfbincr ATTRIBUTE_UNUSED = {
217 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
220 static const CGEN_IFMT ifmt_mwfbincr ATTRIBUTE_UNUSED = {
221 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
224 static const CGEN_IFMT ifmt_fbcbincs ATTRIBUTE_UNUSED = {
225 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_A23) }, { F (F_CR) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
228 static const CGEN_IFMT ifmt_mfbcbincs ATTRIBUTE_UNUSED = {
229 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
232 static const CGEN_IFMT ifmt_fbcbincrs ATTRIBUTE_UNUSED = {
233 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
236 static const CGEN_IFMT ifmt_mfbcbincrs ATTRIBUTE_UNUSED = {
237 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
240 static const CGEN_IFMT ifmt_loop ATTRIBUTE_UNUSED = {
241 32, 32, 0xff0fff00, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU8) }, { F (F_LOOPO) }, { 0 } }
244 static const CGEN_IFMT ifmt_loopi ATTRIBUTE_UNUSED = {
245 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_IMM16L) }, { F (F_LOOPO) }, { 0 } }
248 static const CGEN_IFMT ifmt_dfbc ATTRIBUTE_UNUSED = {
249 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_RC3) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
252 static const CGEN_IFMT ifmt_dwfb ATTRIBUTE_UNUSED = {
253 32, 32, 0xfc000080, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_UU1) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
256 static const CGEN_IFMT ifmt_dfbr ATTRIBUTE_UNUSED = {
257 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
260 #undef F
262 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
263 #define A(a) (1 << CGEN_INSN_##a)
264 #else
265 #define A(a) (1 << CGEN_INSN_/**/a)
266 #endif
267 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
268 #define OPERAND(op) MT_OPERAND_##op
269 #else
270 #define OPERAND(op) MT_OPERAND_/**/op
271 #endif
272 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
273 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
275 /* The instruction table. */
277 static const CGEN_OPCODE mt_cgen_insn_opcode_table[MAX_INSNS] =
279 /* Special null first entry.
280 A `num' value of zero is thus invalid.
281 Also, the special `invalid' insn resides here. */
282 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
283 /* add $frdrrr,$frsr1,$frsr2 */
285 { 0, 0, 0, 0 },
286 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
287 & ifmt_add, { 0x0 }
289 /* addu $frdrrr,$frsr1,$frsr2 */
291 { 0, 0, 0, 0 },
292 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
293 & ifmt_add, { 0x2000000 }
295 /* addi $frdr,$frsr1,#$imm16 */
297 { 0, 0, 0, 0 },
298 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
299 & ifmt_addi, { 0x1000000 }
301 /* addui $frdr,$frsr1,#$imm16z */
303 { 0, 0, 0, 0 },
304 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
305 & ifmt_addui, { 0x3000000 }
307 /* sub $frdrrr,$frsr1,$frsr2 */
309 { 0, 0, 0, 0 },
310 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
311 & ifmt_add, { 0x4000000 }
313 /* subu $frdrrr,$frsr1,$frsr2 */
315 { 0, 0, 0, 0 },
316 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
317 & ifmt_add, { 0x6000000 }
319 /* subi $frdr,$frsr1,#$imm16 */
321 { 0, 0, 0, 0 },
322 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
323 & ifmt_addi, { 0x5000000 }
325 /* subui $frdr,$frsr1,#$imm16z */
327 { 0, 0, 0, 0 },
328 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
329 & ifmt_addui, { 0x7000000 }
331 /* mul $frdrrr,$frsr1,$frsr2 */
333 { 0, 0, 0, 0 },
334 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
335 & ifmt_add, { 0x8000000 }
337 /* muli $frdr,$frsr1,#$imm16 */
339 { 0, 0, 0, 0 },
340 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
341 & ifmt_addi, { 0x9000000 }
343 /* and $frdrrr,$frsr1,$frsr2 */
345 { 0, 0, 0, 0 },
346 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
347 & ifmt_add, { 0x10000000 }
349 /* andi $frdr,$frsr1,#$imm16z */
351 { 0, 0, 0, 0 },
352 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
353 & ifmt_addui, { 0x11000000 }
355 /* or $frdrrr,$frsr1,$frsr2 */
357 { 0, 0, 0, 0 },
358 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
359 & ifmt_add, { 0x12000000 }
361 /* nop */
363 { 0, 0, 0, 0 },
364 { { MNEM, 0 } },
365 & ifmt_nop, { 0x12000000 }
367 /* ori $frdr,$frsr1,#$imm16z */
369 { 0, 0, 0, 0 },
370 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
371 & ifmt_addui, { 0x13000000 }
373 /* xor $frdrrr,$frsr1,$frsr2 */
375 { 0, 0, 0, 0 },
376 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
377 & ifmt_add, { 0x14000000 }
379 /* xori $frdr,$frsr1,#$imm16z */
381 { 0, 0, 0, 0 },
382 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
383 & ifmt_addui, { 0x15000000 }
385 /* nand $frdrrr,$frsr1,$frsr2 */
387 { 0, 0, 0, 0 },
388 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
389 & ifmt_add, { 0x16000000 }
391 /* nandi $frdr,$frsr1,#$imm16z */
393 { 0, 0, 0, 0 },
394 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
395 & ifmt_addui, { 0x17000000 }
397 /* nor $frdrrr,$frsr1,$frsr2 */
399 { 0, 0, 0, 0 },
400 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
401 & ifmt_add, { 0x18000000 }
403 /* nori $frdr,$frsr1,#$imm16z */
405 { 0, 0, 0, 0 },
406 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
407 & ifmt_addui, { 0x19000000 }
409 /* xnor $frdrrr,$frsr1,$frsr2 */
411 { 0, 0, 0, 0 },
412 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
413 & ifmt_add, { 0x1a000000 }
415 /* xnori $frdr,$frsr1,#$imm16z */
417 { 0, 0, 0, 0 },
418 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
419 & ifmt_addui, { 0x1b000000 }
421 /* ldui $frdr,#$imm16z */
423 { 0, 0, 0, 0 },
424 { { MNEM, ' ', OP (FRDR), ',', '#', OP (IMM16Z), 0 } },
425 & ifmt_ldui, { 0x1d000000 }
427 /* lsl $frdrrr,$frsr1,$frsr2 */
429 { 0, 0, 0, 0 },
430 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
431 & ifmt_add, { 0x20000000 }
433 /* lsli $frdr,$frsr1,#$imm16 */
435 { 0, 0, 0, 0 },
436 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
437 & ifmt_addi, { 0x21000000 }
439 /* lsr $frdrrr,$frsr1,$frsr2 */
441 { 0, 0, 0, 0 },
442 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
443 & ifmt_add, { 0x22000000 }
445 /* lsri $frdr,$frsr1,#$imm16 */
447 { 0, 0, 0, 0 },
448 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
449 & ifmt_addi, { 0x23000000 }
451 /* asr $frdrrr,$frsr1,$frsr2 */
453 { 0, 0, 0, 0 },
454 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
455 & ifmt_add, { 0x24000000 }
457 /* asri $frdr,$frsr1,#$imm16 */
459 { 0, 0, 0, 0 },
460 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
461 & ifmt_addi, { 0x25000000 }
463 /* brlt $frsr1,$frsr2,$imm16o */
465 { 0, 0, 0, 0 },
466 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
467 & ifmt_brlt, { 0x31000000 }
469 /* brle $frsr1,$frsr2,$imm16o */
471 { 0, 0, 0, 0 },
472 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
473 & ifmt_brlt, { 0x33000000 }
475 /* breq $frsr1,$frsr2,$imm16o */
477 { 0, 0, 0, 0 },
478 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
479 & ifmt_brlt, { 0x35000000 }
481 /* brne $frsr1,$frsr2,$imm16o */
483 { 0, 0, 0, 0 },
484 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
485 & ifmt_brlt, { 0x3b000000 }
487 /* jmp $imm16o */
489 { 0, 0, 0, 0 },
490 { { MNEM, ' ', OP (IMM16O), 0 } },
491 & ifmt_jmp, { 0x37000000 }
493 /* jal $frdrrr,$frsr1 */
495 { 0, 0, 0, 0 },
496 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), 0 } },
497 & ifmt_jal, { 0x38000000 }
499 /* dbnz $frsr1,$imm16o */
501 { 0, 0, 0, 0 },
502 { { MNEM, ' ', OP (FRSR1), ',', OP (IMM16O), 0 } },
503 & ifmt_dbnz, { 0x3d000000 }
505 /* ei */
507 { 0, 0, 0, 0 },
508 { { MNEM, 0 } },
509 & ifmt_ei, { 0x60000000 }
511 /* di */
513 { 0, 0, 0, 0 },
514 { { MNEM, 0 } },
515 & ifmt_ei, { 0x62000000 }
517 /* si $frdrrr */
519 { 0, 0, 0, 0 },
520 { { MNEM, ' ', OP (FRDRRR), 0 } },
521 & ifmt_si, { 0x64000000 }
523 /* reti $frsr1 */
525 { 0, 0, 0, 0 },
526 { { MNEM, ' ', OP (FRSR1), 0 } },
527 & ifmt_reti, { 0x66000000 }
529 /* ldw $frdr,$frsr1,#$imm16 */
531 { 0, 0, 0, 0 },
532 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
533 & ifmt_addi, { 0x41000000 }
535 /* stw $frsr2,$frsr1,#$imm16 */
537 { 0, 0, 0, 0 },
538 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
539 & ifmt_stw, { 0x43000000 }
541 /* break */
543 { 0, 0, 0, 0 },
544 { { MNEM, 0 } },
545 & ifmt_nop, { 0x68000000 }
547 /* iflush */
549 { 0, 0, 0, 0 },
550 { { MNEM, 0 } },
551 & ifmt_nop, { 0x6a000000 }
553 /* ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum */
555 { 0, 0, 0, 0 },
556 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RC), ',', '#', OP (RCNUM), ',', '#', OP (CONTNUM), 0 } },
557 & ifmt_ldctxt, { 0x80000000 }
559 /* ldfb $frsr1,$frsr2,#$imm16z */
561 { 0, 0, 0, 0 },
562 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } },
563 & ifmt_ldfb, { 0x84000000 }
565 /* stfb $frsr1,$frsr2,#$imm16z */
567 { 0, 0, 0, 0 },
568 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } },
569 & ifmt_ldfb, { 0x88000000 }
571 /* fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
573 { 0, 0, 0, 0 },
574 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
575 & ifmt_fbcb, { 0x8c000000 }
577 /* mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
579 { 0, 0, 0, 0 },
580 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
581 & ifmt_mfbcb, { 0x90000000 }
583 /* fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
585 { 0, 0, 0, 0 },
586 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
587 & ifmt_fbcci, { 0x94000000 }
589 /* fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
591 { 0, 0, 0, 0 },
592 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
593 & ifmt_fbcci, { 0x98000000 }
595 /* fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
597 { 0, 0, 0, 0 },
598 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
599 & ifmt_fbcci, { 0x9c000000 }
601 /* fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
603 { 0, 0, 0, 0 },
604 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
605 & ifmt_fbcci, { 0xa0000000 }
607 /* mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
609 { 0, 0, 0, 0 },
610 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
611 & ifmt_mfbcci, { 0xa4000000 }
613 /* mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
615 { 0, 0, 0, 0 },
616 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
617 & ifmt_mfbcci, { 0xa8000000 }
619 /* mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
621 { 0, 0, 0, 0 },
622 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
623 & ifmt_mfbcci, { 0xac000000 }
625 /* mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
627 { 0, 0, 0, 0 },
628 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
629 & ifmt_mfbcci, { 0xb0000000 }
631 /* fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
633 { 0, 0, 0, 0 },
634 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (BALL2), ',', '#', OP (BRC2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
635 & ifmt_fbcbdr, { 0xb4000000 }
637 /* rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
639 { 0, 0, 0, 0 },
640 { { MNEM, ' ', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
641 & ifmt_rcfbcb, { 0xb8000000 }
643 /* mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
645 { 0, 0, 0, 0 },
646 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
647 & ifmt_mrcfbcb, { 0xbc000000 }
649 /* cbcast #$mask,#$rc2,#$ctxdisp */
651 { 0, 0, 0, 0 },
652 { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
653 & ifmt_cbcast, { 0xc0000000 }
655 /* dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp */
657 { 0, 0, 0, 0 },
658 { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (CELL), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
659 & ifmt_dupcbcast, { 0xc4000000 }
661 /* wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp */
663 { 0, 0, 0, 0 },
664 { { MNEM, ' ', '#', OP (BANKADDR), ',', '#', OP (ROWNUM1), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
665 & ifmt_wfbi, { 0xc8000000 }
667 /* wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp */
669 { 0, 0, 0, 0 },
670 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (CTXDISP), 0 } },
671 & ifmt_wfb, { 0xcc000000 }
673 /* rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
675 { 0, 0, 0, 0 },
676 { { MNEM, ' ', OP (FRDRRR), ',', '#', OP (RBBC), ',', OP (FRSR1), ',', '#', OP (COLNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
677 & ifmt_rcrisc, { 0xd0000000 }
679 /* fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
681 { 0, 0, 0, 0 },
682 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (INCAMT), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
683 & ifmt_fbcbinc, { 0xd4000000 }
685 /* rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp */
687 { 0, 0, 0, 0 },
688 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (XMODE), ',', '#', OP (MASK1), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
689 & ifmt_rcxmode, { 0xd8000000 }
691 /* intlvr $frsr1,#$mode,$frsr2,#$id,#$size */
693 { 0, 0, 0, 0 },
694 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (MODE), ',', OP (FRSR2), ',', '#', OP (ID), ',', '#', OP (SIZE), 0 } },
695 & ifmt_interleaver, { 0xdc000000 }
697 /* wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
699 { 0, 0, 0, 0 },
700 { { MNEM, ' ', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
701 & ifmt_wfbinc, { 0xe0000000 }
703 /* mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
705 { 0, 0, 0, 0 },
706 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
707 & ifmt_mwfbinc, { 0xe4000000 }
709 /* wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
711 { 0, 0, 0, 0 },
712 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
713 & ifmt_wfbincr, { 0xe8000000 }
715 /* mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
717 { 0, 0, 0, 0 },
718 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
719 & ifmt_mwfbincr, { 0xec000000 }
721 /* fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
723 { 0, 0, 0, 0 },
724 { { MNEM, ' ', '#', OP (PERM), ',', '#', OP (A23), ',', '#', OP (CR), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
725 & ifmt_fbcbincs, { 0xf0000000 }
727 /* mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
729 { 0, 0, 0, 0 },
730 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
731 & ifmt_mfbcbincs, { 0xf4000000 }
733 /* fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
735 { 0, 0, 0, 0 },
736 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
737 & ifmt_fbcbincrs, { 0xf8000000 }
739 /* mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
741 { 0, 0, 0, 0 },
742 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (PERM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
743 & ifmt_mfbcbincrs, { 0xfc000000 }
745 /* loop $frsr1,$loopsize */
747 { 0, 0, 0, 0 },
748 { { MNEM, ' ', OP (FRSR1), ',', OP (LOOPSIZE), 0 } },
749 & ifmt_loop, { 0x3e000000 }
751 /* loopi #$imm16l,$loopsize */
753 { 0, 0, 0, 0 },
754 { { MNEM, ' ', '#', OP (IMM16L), ',', OP (LOOPSIZE), 0 } },
755 & ifmt_loopi, { 0x3f000000 }
757 /* dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
759 { 0, 0, 0, 0 },
760 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
761 & ifmt_dfbc, { 0x80000000 }
763 /* dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp */
765 { 0, 0, 0, 0 },
766 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
767 & ifmt_dwfb, { 0x84000000 }
769 /* fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
771 { 0, 0, 0, 0 },
772 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
773 & ifmt_dfbc, { 0x88000000 }
775 /* dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp */
777 { 0, 0, 0, 0 },
778 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', OP (FRSR2), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
779 & ifmt_dfbr, { 0x8c000000 }
783 #undef A
784 #undef OPERAND
785 #undef MNEM
786 #undef OP
788 /* Formats for ALIAS macro-insns. */
790 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
791 #define F(f) & mt_cgen_ifld_table[MT_##f]
792 #else
793 #define F(f) & mt_cgen_ifld_table[MT_/**/f]
794 #endif
795 #undef F
797 /* Each non-simple macro entry points to an array of expansion possibilities. */
799 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
800 #define A(a) (1 << CGEN_INSN_##a)
801 #else
802 #define A(a) (1 << CGEN_INSN_/**/a)
803 #endif
804 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
805 #define OPERAND(op) MT_OPERAND_##op
806 #else
807 #define OPERAND(op) MT_OPERAND_/**/op
808 #endif
809 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
810 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
812 /* The macro instruction table. */
814 static const CGEN_IBASE mt_cgen_macro_insn_table[] =
818 /* The macro instruction opcode table. */
820 static const CGEN_OPCODE mt_cgen_macro_insn_opcode_table[] =
824 #undef A
825 #undef OPERAND
826 #undef MNEM
827 #undef OP
829 #ifndef CGEN_ASM_HASH_P
830 #define CGEN_ASM_HASH_P(insn) 1
831 #endif
833 #ifndef CGEN_DIS_HASH_P
834 #define CGEN_DIS_HASH_P(insn) 1
835 #endif
837 /* Return non-zero if INSN is to be added to the hash table.
838 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
840 static int
841 asm_hash_insn_p (insn)
842 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
844 return CGEN_ASM_HASH_P (insn);
847 static int
848 dis_hash_insn_p (insn)
849 const CGEN_INSN *insn;
851 /* If building the hash table and the NO-DIS attribute is present,
852 ignore. */
853 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
854 return 0;
855 return CGEN_DIS_HASH_P (insn);
858 #ifndef CGEN_ASM_HASH
859 #define CGEN_ASM_HASH_SIZE 127
860 #ifdef CGEN_MNEMONIC_OPERANDS
861 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
862 #else
863 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
864 #endif
865 #endif
867 /* It doesn't make much sense to provide a default here,
868 but while this is under development we do.
869 BUFFER is a pointer to the bytes of the insn, target order.
870 VALUE is the first base_insn_bitsize bits as an int in host order. */
872 #ifndef CGEN_DIS_HASH
873 #define CGEN_DIS_HASH_SIZE 256
874 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
875 #endif
877 /* The result is the hash value of the insn.
878 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
880 static unsigned int
881 asm_hash_insn (mnem)
882 const char * mnem;
884 return CGEN_ASM_HASH (mnem);
887 /* BUF is a pointer to the bytes of the insn, target order.
888 VALUE is the first base_insn_bitsize bits as an int in host order. */
890 static unsigned int
891 dis_hash_insn (buf, value)
892 const char * buf ATTRIBUTE_UNUSED;
893 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
895 return CGEN_DIS_HASH (buf, value);
898 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
900 static void
901 set_fields_bitsize (CGEN_FIELDS *fields, int size)
903 CGEN_FIELDS_BITSIZE (fields) = size;
906 /* Function to call before using the operand instance table.
907 This plugs the opcode entries and macro instructions into the cpu table. */
909 void
910 mt_cgen_init_opcode_table (CGEN_CPU_DESC cd)
912 int i;
913 int num_macros = (sizeof (mt_cgen_macro_insn_table) /
914 sizeof (mt_cgen_macro_insn_table[0]));
915 const CGEN_IBASE *ib = & mt_cgen_macro_insn_table[0];
916 const CGEN_OPCODE *oc = & mt_cgen_macro_insn_opcode_table[0];
917 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
919 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
920 for (i = 0; i < num_macros; ++i)
922 insns[i].base = &ib[i];
923 insns[i].opcode = &oc[i];
924 mt_cgen_build_insn_regex (& insns[i]);
926 cd->macro_insn_table.init_entries = insns;
927 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
928 cd->macro_insn_table.num_init_entries = num_macros;
930 oc = & mt_cgen_insn_opcode_table[0];
931 insns = (CGEN_INSN *) cd->insn_table.init_entries;
932 for (i = 0; i < MAX_INSNS; ++i)
934 insns[i].opcode = &oc[i];
935 mt_cgen_build_insn_regex (& insns[i]);
938 cd->sizeof_fields = sizeof (CGEN_FIELDS);
939 cd->set_fields_bitsize = set_fields_bitsize;
941 cd->asm_hash_p = asm_hash_insn_p;
942 cd->asm_hash = asm_hash_insn;
943 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
945 cd->dis_hash_p = dis_hash_insn_p;
946 cd->dis_hash = dis_hash_insn;
947 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;