| blob | 39dfcc480fe0da0f4e628e21fbe0d98705a00596 |
1 2006-05-14 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (macro_build): Test for currently active
4 mips16 option.
5 (mips16_ip): Reject invalid opcodes.
7 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
9 * doc/as.texinfo: Rename "Index" to "AS Index",
10 and "ABORT" to "ABORT (COFF)".
12 2006-05-11 Paul Brook <paul@codesourcery.com>
14 * config/tc-arm.c (parse_half): New function.
15 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
16 (parse_operands): Ditto.
17 (do_mov16): Reject invalid relocations.
18 (do_t_mov16): Ditto. Use Thumb reloc numbers.
19 (insns): Replace Iffff with HALF.
20 (md_apply_fix): Add MOVW and MOVT relocs.
21 (tc_gen_reloc): Ditto.
22 * doc/c-arm.texi: Document relocation operators
24 2006-05-11 Paul Brook <paul@codesourcery.com>
26 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
28 2006-05-11 Thiemo Seufer <ths@mips.com>
30 * config/tc-mips.c (append_insn): Don't check the range of j or
31 jal addresses.
33 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
35 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
36 relocs against external symbols for WinCE targets.
37 (md_apply_fix): Likewise.
39 2006-05-09 David Ung <davidu@mips.com>
41 * config/tc-mips.c (append_insn): Only warn about an out-of-range
42 j or jal address.
44 2006-05-09 Nick Clifton <nickc@redhat.com>
46 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
47 against symbols which are not going to be placed into the symbol
48 table.
50 2006-05-09 Ben Elliston <bje@au.ibm.com>
52 * expr.c (operand): Remove `if (0 && ..)' statement and
53 subsequently unused target_op label. Collapse `if (1 || ..)'
54 statement.
55 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
56 separately above the switch.
58 2006-05-08 Nick Clifton <nickc@redhat.com>
60 PR gas/2623
61 * config/tc-msp430.c (line_separator_character): Define as |.
63 2006-05-08 Thiemo Seufer <ths@mips.com>
64 Nigel Stephens <nigel@mips.com>
65 David Ung <davidu@mips.com>
67 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
68 (mips_opts): Likewise.
69 (file_ase_smartmips): New variable.
70 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
71 (macro_build): Handle SmartMIPS instructions.
72 (mips_ip): Likewise.
73 (md_longopts): Add argument handling for smartmips.
74 (md_parse_options, mips_after_parse_args): Likewise.
75 (s_mipsset): Add .set smartmips support.
76 (md_show_usage): Document -msmartmips/-mno-smartmips.
77 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
78 .set smartmips.
79 * doc/c-mips.texi: Likewise.
81 2006-05-08 Alan Modra <amodra@bigpond.net.au>
83 * write.c (relax_segment): Add pass count arg. Don't error on
84 negative org/space on first two passes.
85 (relax_seg_info): New struct.
86 (relax_seg, write_object_file): Adjust.
87 * write.h (relax_segment): Update prototype.
89 2006-05-05 Julian Brown <julian@codesourcery.com>
91 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
92 checking.
93 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
94 architecture version checks.
95 (insns): Allow overlapping instructions to be used in VFP mode.
97 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
99 PR gas/2598
100 * config/obj-elf.c (obj_elf_change_section): Allow user
101 specified SHF_ALPHA_GPREL.
103 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
105 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
106 for PMEM related expressions.
108 2006-05-05 Nick Clifton <nickc@redhat.com>
110 PR gas/2582
111 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
112 insertion of a directory separator character into a string at a
113 given offset. Uses heuristics to decide when to use a backslash
114 character rather than a forward-slash character.
115 (dwarf2_directive_loc): Use the macro.
116 (out_debug_info): Likewise.
118 2006-05-05 Thiemo Seufer <ths@mips.com>
119 David Ung <davidu@mips.com>
121 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
122 instruction.
123 (macro): Add new case M_CACHE_AB.
125 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
127 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
128 (opcode_lookup): Issue a warning for opcode with
129 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
130 identical to OT_cinfix3.
131 (TxC3w, TC3w, tC3w): New.
132 (insns): Use tC3w and TC3w for comparison instructions with
133 's' suffix.
135 2006-05-04 Alan Modra <amodra@bigpond.net.au>
137 * subsegs.h (struct frchain): Delete frch_seg.
138 (frchain_root): Delete.
139 (seg_info): Define as macro.
140 * subsegs.c (frchain_root): Delete.
141 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
142 (subsegs_begin, subseg_change): Adjust for above.
143 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
144 rather than to one big list.
145 (subseg_get): Don't special case abs, und sections.
146 (subseg_new, subseg_force_new): Don't set frchainP here.
147 (seg_info): Delete.
148 (subsegs_print_statistics): Adjust frag chain control list traversal.
149 * debug.c (dmp_frags): Likewise.
150 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
151 at frchain_root. Make use of known frchain ordering.
152 (last_frag_for_seg): Likewise.
153 (get_frag_fix): Likewise. Add seg param.
154 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
155 * write.c (chain_frchains_together_1): Adjust for struct frchain.
156 (SUB_SEGMENT_ALIGN): Likewise.
157 (subsegs_finish): Adjust frchain list traversal.
158 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
159 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
160 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
161 (xtensa_fix_b_j_loop_end_frags): Likewise.
162 (xtensa_fix_close_loop_end_frags): Likewise.
163 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
164 (retrieve_segment_info): Delete frch_seg initialisation.
166 2006-05-03 Alan Modra <amodra@bigpond.net.au>
168 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
169 * config/obj-elf.h (obj_sec_set_private_data): Delete.
170 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
171 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
173 2006-05-02 Joseph Myers <joseph@codesourcery.com>
175 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
176 here.
177 (md_apply_fix3): Multiply offset by 4 here for
178 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
180 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
181 Jan Beulich <jbeulich@novell.com>
183 * config/tc-i386.c (output_invalid_buf): Change size for
184 unsigned char.
185 * config/tc-tic30.c (output_invalid_buf): Likewise.
187 * config/tc-i386.c (output_invalid): Cast none-ascii char to
188 unsigned char.
189 * config/tc-tic30.c (output_invalid): Likewise.
191 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
193 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
194 (TEXI2POD): Use AM_MAKEINFOFLAGS.
195 (asconfig.texi): Don't set top_srcdir.
196 * doc/as.texinfo: Don't use top_srcdir.
197 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
199 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
201 * config/tc-i386.c (output_invalid_buf): Change size to 16.
202 * config/tc-tic30.c (output_invalid_buf): Likewise.
204 * config/tc-i386.c (output_invalid): Use snprintf instead of
205 sprintf.
206 * config/tc-ia64.c (declare_register_set): Likewise.
207 (emit_one_bundle): Likewise.
208 (check_dependencies): Likewise.
209 * config/tc-tic30.c (output_invalid): Likewise.
211 2006-05-02 Paul Brook <paul@codesourcery.com>
213 * config/tc-arm.c (arm_optimize_expr): New function.
214 * config/tc-arm.h (md_optimize_expr): Define
215 (arm_optimize_expr): Add prototype.
216 (TC_FORCE_RELOCATION_SUB_SAME): Define.
218 2006-05-02 Ben Elliston <bje@au.ibm.com>
220 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
221 field unsigned.
223 * sb.h (sb_list_vector): Move to sb.c.
224 * sb.c (free_list): Use type of sb_list_vector directly.
225 (sb_build): Fix off-by-one error in assertion about `size'.
227 2006-05-01 Ben Elliston <bje@au.ibm.com>
229 * listing.c (listing_listing): Remove useless loop.
230 * macro.c (macro_expand): Remove is_positional local variable.
231 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
232 and simplify surrounding expressions, where possible.
233 (assign_symbol): Likewise.
234 (s_weakref): Likewise.
235 * symbols.c (colon): Likewise.
237 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
239 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
241 2006-04-30 Thiemo Seufer <ths@mips.com>
242 David Ung <davidu@mips.com>
244 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
245 (mips_immed): New table that records various handling of udi
246 instruction patterns.
247 (mips_ip): Adds udi handling.
249 2006-04-28 Alan Modra <amodra@bigpond.net.au>
251 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
252 of list rather than beginning.
254 2006-04-26 Julian Brown <julian@codesourcery.com>
256 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
257 (is_quarter_float): Rename from above. Simplify slightly.
258 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
259 number.
260 (parse_neon_mov): Parse floating-point constants.
261 (neon_qfloat_bits): Fix encoding.
262 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
263 preference to integer encoding when using the F32 type.
265 2006-04-26 Julian Brown <julian@codesourcery.com>
267 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
268 zero-initialising structures containing it will lead to invalid types).
269 (arm_it): Add vectype to each operand.
270 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
271 defined field.
272 (neon_typed_alias): New structure. Extra information for typed
273 register aliases.
274 (reg_entry): Add neon type info field.
275 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
276 Break out alternative syntax for coprocessor registers, etc. into...
277 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
278 out from arm_reg_parse.
279 (parse_neon_type): Move. Return SUCCESS/FAIL.
280 (first_error): New function. Call to ensure first error which occurs is
281 reported.
282 (parse_neon_operand_type): Parse exactly one type.
283 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
284 (parse_typed_reg_or_scalar): New function. Handle core of both
285 arm_typed_reg_parse and parse_scalar.
286 (arm_typed_reg_parse): Parse a register with an optional type.
287 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
288 result.
289 (parse_scalar): Parse a Neon scalar with optional type.
290 (parse_reg_list): Use first_error.
291 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
292 (neon_alias_types_same): New function. Return true if two (alias) types
293 are the same.
294 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
295 of elements.
296 (insert_reg_alias): Return new reg_entry not void.
297 (insert_neon_reg_alias): New function. Insert type/index information as
298 well as register for alias.
299 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
300 make typed register aliases accordingly.
301 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
302 of line.
303 (s_unreq): Delete type information if present.
304 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
305 (s_arm_unwind_save_mmxwcg): Likewise.
306 (s_arm_unwind_movsp): Likewise.
307 (s_arm_unwind_setfp): Likewise.
308 (parse_shift): Likewise.
309 (parse_shifter_operand): Likewise.
310 (parse_address): Likewise.
311 (parse_tb): Likewise.
312 (tc_arm_regname_to_dw2regnum): Likewise.
313 (md_pseudo_table): Add dn, qn.
314 (parse_neon_mov): Handle typed operands.
315 (parse_operands): Likewise.
316 (neon_type_mask): Add N_SIZ.
317 (N_ALLMODS): New macro.
318 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
319 (el_type_of_type_chk): Add some safeguards.
320 (modify_types_allowed): Fix logic bug.
321 (neon_check_type): Handle operands with types.
322 (neon_three_same): Remove redundant optional arg handling.
323 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
324 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
325 (do_neon_step): Adjust accordingly.
326 (neon_cmode_for_logic_imm): Use first_error.
327 (do_neon_bitfield): Call neon_check_type.
328 (neon_dyadic): Rename to...
329 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
330 to allow modification of type of the destination.
331 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
332 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
333 (do_neon_compare): Make destination be an untyped bitfield.
334 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
335 (neon_mul_mac): Return early in case of errors.
336 (neon_move_immediate): Use first_error.
337 (neon_mac_reg_scalar_long): Fix type to include scalar.
338 (do_neon_dup): Likewise.
339 (do_neon_mov): Likewise (in several places).
340 (do_neon_tbl_tbx): Fix type.
341 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
342 (do_neon_ld_dup): Exit early in case of errors and/or use
343 first_error.
344 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
345 Handle .dn/.qn directives.
346 (REGDEF): Add zero for reg_entry neon field.
348 2006-04-26 Julian Brown <julian@codesourcery.com>
350 * config/tc-arm.c (limits.h): Include.
351 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
352 (fpu_vfp_v3_or_neon_ext): Declare constants.
353 (neon_el_type): New enumeration of types for Neon vector elements.
354 (neon_type_el): New struct. Define type and size of a vector element.
355 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
356 instruction.
357 (neon_type): Define struct. The type of an instruction.
358 (arm_it): Add 'vectype' for the current instruction.
359 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
360 (vfp_sp_reg_pos): Rename to...
361 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
362 tags.
363 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
364 (Neon D or Q register).
365 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
366 register.
367 (GE_OPT_PREFIX_BIG): Define constant, for use in...
368 (my_get_expression): Allow above constant as argument to accept
369 64-bit constants with optional prefix.
370 (arm_reg_parse): Add extra argument to return the specific type of
371 register in when either a D or Q register (REG_TYPE_NDQ) is
372 requested. Can be NULL.
373 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
374 (parse_reg_list): Update for new arm_reg_parse args.
375 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
376 (parse_neon_el_struct_list): New function. Parse element/structure
377 register lists for VLD<n>/VST<n> instructions.
378 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
379 (s_arm_unwind_save_mmxwr): Likewise.
380 (s_arm_unwind_save_mmxwcg): Likewise.
381 (s_arm_unwind_movsp): Likewise.
382 (s_arm_unwind_setfp): Likewise.
383 (parse_big_immediate): New function. Parse an immediate, which may be
384 64 bits wide. Put results in inst.operands[i].
385 (parse_shift): Update for new arm_reg_parse args.
386 (parse_address): Likewise. Add parsing of alignment specifiers.
387 (parse_neon_mov): Parse the operands of a VMOV instruction.
388 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
389 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
390 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
391 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
392 (parse_operands): Handle new codes above.
393 (encode_arm_vfp_sp_reg): Rename to...
394 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
395 selected VFP version only supports D0-D15.
396 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
397 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
398 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
399 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
400 encode_arm_vfp_reg name, and allow 32 D regs.
401 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
402 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
403 regs.
404 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
405 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
406 constant-load and conversion insns introduced with VFPv3.
407 (neon_tab_entry): New struct.
408 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
409 those which are the targets of pseudo-instructions.
410 (neon_opc): Enumerate opcodes, use as indices into...
411 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
412 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
413 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
414 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
415 neon_enc_tab.
416 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
417 Neon instructions.
418 (neon_type_mask): New. Compact type representation for type checking.
419 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
420 permitted type combinations.
421 (N_IGNORE_TYPE): New macro.
422 (neon_check_shape): New function. Check an instruction shape for
423 multiple alternatives. Return the specific shape for the current
424 instruction.
425 (neon_modify_type_size): New function. Modify a vector type and size,
426 depending on the bit mask in argument 1.
427 (neon_type_promote): New function. Convert a given "key" type (of an
428 operand) into the correct type for a different operand, based on a bit
429 mask.
430 (type_chk_of_el_type): New function. Convert a type and size into the
431 compact representation used for type checking.
432 (el_type_of_type_ckh): New function. Reverse of above (only when a
433 single bit is set in the bit mask).
434 (modify_types_allowed): New function. Alter a mask of allowed types
435 based on a bit mask of modifications.
436 (neon_check_type): New function. Check the type of the current
437 instruction against the variable argument list. The "key" type of the
438 instruction is returned.
439 (neon_dp_fixup): New function. Fill in and modify instruction bits for
440 a Neon data-processing instruction depending on whether we're in ARM
441 mode or Thumb-2 mode.
442 (neon_logbits): New function.
443 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
444 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
445 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
446 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
447 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
448 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
449 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
450 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
451 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
452 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
453 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
454 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
455 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
456 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
457 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
458 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
459 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
460 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
461 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
462 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
463 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
464 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
465 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
466 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
467 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
468 helpers.
469 (parse_neon_type): New function. Parse Neon type specifier.
470 (opcode_lookup): Allow parsing of Neon type specifiers.
471 (REGNUM2, REGSETH, REGSET2): New macros.
472 (reg_names): Add new VFPv3 and Neon registers.
473 (NUF, nUF, NCE, nCE): New macros for opcode table.
474 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
475 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
476 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
477 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
478 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
479 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
480 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
481 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
482 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
483 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
484 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
485 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
486 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
487 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
488 fto[us][lh][sd].
489 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
490 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
491 (arm_option_cpu_value): Add vfp3 and neon.
492 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
493 VFPv1 attribute.
495 2006-04-25 Bob Wilson <bob.wilson@acm.org>
497 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
498 syntax instead of hardcoded opcodes with ".w18" suffixes.
499 (wide_branch_opcode): New.
500 (build_transition): Use it to check for wide branch opcodes with
501 either ".w18" or ".w15" suffixes.
503 2006-04-25 Bob Wilson <bob.wilson@acm.org>
505 * config/tc-xtensa.c (xtensa_create_literal_symbol,
506 xg_assemble_literal, xg_assemble_literal_space): Do not set the
507 frag's is_literal flag.
509 2006-04-25 Bob Wilson <bob.wilson@acm.org>
511 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
513 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
515 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
516 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
517 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
518 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
519 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
521 2005-04-20 Paul Brook <paul@codesourcery.com>
523 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
524 all targets.
525 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
527 2006-04-19 Alan Modra <amodra@bigpond.net.au>
529 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
530 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
531 Make some cpus unsupported on ELF. Run "make dep-am".
532 * Makefile.in: Regenerate.
534 2006-04-19 Alan Modra <amodra@bigpond.net.au>
536 * configure.in (--enable-targets): Indent help message.
537 * configure: Regenerate.
539 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
541 PR gas/2533
542 * config/tc-i386.c (i386_immediate): Check illegal immediate
543 register operand.
545 2006-04-18 Alan Modra <amodra@bigpond.net.au>
547 * config/tc-i386.c: Formatting.
548 (output_disp, output_imm): ISO C90 params.
550 * frags.c (frag_offset_fixed_p): Constify args.
551 * frags.h (frag_offset_fixed_p): Ditto.
553 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
554 (COFF_MAGIC): Delete.
556 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
558 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
560 * po/POTFILES.in: Regenerated.
562 2006-04-16 Mark Mitchell <mark@codesourcery.com>
564 * doc/as.texinfo: Mention that some .type syntaxes are not
565 supported on all architectures.
567 2006-04-14 Sterling Augustine <sterling@tensilica.com>
569 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
570 instructions when such transformations have been disabled.
572 2006-04-10 Sterling Augustine <sterling@tensilica.com>
574 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
575 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
576 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
577 decoding the loop instructions. Remove current_offset variable.
578 (xtensa_fix_short_loop_frags): Likewise.
579 (min_bytes_to_other_loop_end): Remove current_offset argument.
581 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
583 * config/tc-z80.c (z80_optimize_expr): Removed.
584 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
586 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
588 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
589 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
590 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
591 atmega644, atmega329, atmega3290, atmega649, atmega6490,
592 atmega406, atmega640, atmega1280, atmega1281, at90can32,
593 at90can64, at90usb646, at90usb647, at90usb1286 and
594 at90usb1287.
595 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
597 2006-04-07 Paul Brook <paul@codesourcery.com>
599 * config/tc-arm.c (parse_operands): Set default error message.
601 2006-04-07 Paul Brook <paul@codesourcery.com>
603 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
605 2006-04-07 Paul Brook <paul@codesourcery.com>
607 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
609 2006-04-07 Paul Brook <paul@codesourcery.com>
611 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
612 (move_or_literal_pool): Handle Thumb-2 instructions.
613 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
615 2006-04-07 Alan Modra <amodra@bigpond.net.au>
617 PR 2512.
618 * config/tc-i386.c (match_template): Move 64-bit operand tests
619 inside loop.
621 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
623 * po/Make-in: Add install-html target.
624 * Makefile.am: Add install-html and install-html-recursive targets.
625 * Makefile.in: Regenerate.
626 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
627 * configure: Regenerate.
628 * doc/Makefile.am: Add install-html and install-html-am targets.
629 * doc/Makefile.in: Regenerate.
631 2006-04-06 Alan Modra <amodra@bigpond.net.au>
633 * frags.c (frag_offset_fixed_p): Reinitialise offset before
634 second scan.
636 2006-04-05 Richard Sandiford <richard@codesourcery.com>
637 Daniel Jacobowitz <dan@codesourcery.com>
639 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
640 (GOTT_BASE, GOTT_INDEX): New.
641 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
642 GOTT_INDEX when generating VxWorks PIC.
643 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
644 use the generic *-*-vxworks* stanza instead.
646 2006-04-04 Alan Modra <amodra@bigpond.net.au>
648 PR 997
649 * frags.c (frag_offset_fixed_p): New function.
650 * frags.h (frag_offset_fixed_p): Declare.
651 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
652 (resolve_expression): Likewise.
654 2006-04-03 Sterling Augustine <sterling@tensilica.com>
656 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
657 of the same length but different numbers of slots.
659 2006-03-30 Andreas Schwab <schwab@suse.de>
661 * configure.in: Fix help string for --enable-targets option.
662 * configure: Regenerate.
664 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
666 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
667 (m68k_ip): ... here. Use for all chips. Protect against buffer
668 overrun and avoid excessive copying.
670 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
671 m68020_control_regs, m68040_control_regs, m68060_control_regs,
672 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
673 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
674 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
675 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
676 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
677 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
678 mcf5282_ctrl, mcfv4e_ctrl): ... these.
679 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
680 (struct m68k_cpu): Change chip field to control_regs.
681 (current_chip): Remove.
682 (control_regs): New.
683 (m68k_archs, m68k_extensions): Adjust.
684 (m68k_cpus): Reorder to be in cpu number order. Adjust.
685 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
686 (find_cf_chip): Reimplement for new organization of cpu table.
687 (select_control_regs): Remove.
688 (mri_chip): Adjust.
689 (struct save_opts): Save control regs, not chip.
690 (s_save, s_restore): Adjust.
691 (m68k_lookup_cpu): Give deprecated warning when necessary.
692 (m68k_init_arch): Adjust.
693 (md_show_usage): Adjust for new cpu table organization.
695 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
697 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
698 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
699 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
700 "elf/bfin.h".
701 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
702 (any_gotrel): New rule.
703 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
704 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
705 "elf/bfin.h".
706 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
707 (bfin_pic_ptr): New function.
708 (md_pseudo_table): Add it for ".picptr".
709 (OPTION_FDPIC): New macro.
710 (md_longopts): Add -mfdpic.
711 (md_parse_option): Handle it.
712 (md_begin): Set BFD flags.
713 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
714 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
715 us for GOT relocs.
716 * Makefile.am (bfin-parse.o): Update dependencies.
717 (DEPTC_bfin_elf): Likewise.
718 * Makefile.in: Regenerate.
720 2006-03-25 Richard Sandiford <richard@codesourcery.com>
722 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
723 mcfemac instead of mcfmac.
725 2006-03-23 Michael Matz <matz@suse.de>
727 * config/tc-i386.c (type_names): Correct placement of 'static'.
728 (reloc): Map some more relocs to their 64 bit counterpart when
729 size is 8.
730 (output_insn): Work around breakage if DEBUG386 is defined.
731 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
732 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
733 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
734 different from i386.
735 (output_imm): Ditto.
736 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
737 Imm64.
738 (md_convert_frag): Jumps can now be larger than 2GB away, error
739 out in that case.
740 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
741 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
743 2006-03-22 Richard Sandiford <richard@codesourcery.com>
744 Daniel Jacobowitz <dan@codesourcery.com>
745 Phil Edwards <phil@codesourcery.com>
746 Zack Weinberg <zack@codesourcery.com>
747 Mark Mitchell <mark@codesourcery.com>
748 Nathan Sidwell <nathan@codesourcery.com>
750 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
751 (md_begin): Complain about -G being used for PIC. Don't change
752 the text, data and bss alignments on VxWorks.
753 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
754 generating VxWorks PIC.
755 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
756 (macro): Likewise, but do not treat la $25 specially for
757 VxWorks PIC, and do not handle jal.
758 (OPTION_MVXWORKS_PIC): New macro.
759 (md_longopts): Add -mvxworks-pic.
760 (md_parse_option): Don't complain about using PIC and -G together here.
761 Handle OPTION_MVXWORKS_PIC.
762 (md_estimate_size_before_relax): Always use the first relaxation
763 sequence on VxWorks.
764 * config/tc-mips.h (VXWORKS_PIC): New.
766 2006-03-21 Paul Brook <paul@codesourcery.com>
768 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
770 2006-03-21 Sterling Augustine <sterling@tensilica.com>
772 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
773 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
774 (get_loop_align_size): New.
775 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
776 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
777 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
778 (get_noop_aligned_address): Use get_loop_align_size.
779 (get_aligned_diff): Likewise.
781 2006-03-21 Paul Brook <paul@codesourcery.com>
783 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
785 2006-03-20 Paul Brook <paul@codesourcery.com>
787 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
788 (do_t_branch): Encode branches inside IT blocks as unconditional.
789 (do_t_cps): New function.
790 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
791 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
792 (opcode_lookup): Allow conditional suffixes on all instructions in
793 Thumb mode.
794 (md_assemble): Advance condexec state before checking for errors.
795 (insns): Use do_t_cps.
797 2006-03-20 Paul Brook <paul@codesourcery.com>
799 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
800 outputting the insn.
802 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
804 * config/tc-vax.c: Update copyright year.
805 * config/tc-vax.h: Likewise.
807 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
809 * config/tc-vax.c (md_chars_to_number): Used only locally, so
810 make it static.
811 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
813 2006-03-17 Paul Brook <paul@codesourcery.com>
815 * config/tc-arm.c (insns): Add ldm and stm.
817 2006-03-17 Ben Elliston <bje@au.ibm.com>
819 PR gas/2446
820 * doc/as.texinfo (Ident): Document this directive more thoroughly.
822 2006-03-16 Paul Brook <paul@codesourcery.com>
824 * config/tc-arm.c (insns): Add "svc".
826 2006-03-13 Bob Wilson <bob.wilson@acm.org>
828 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
829 flag and avoid double underscore prefixes.
831 2006-03-10 Paul Brook <paul@codesourcery.com>
833 * config/tc-arm.c (md_begin): Handle EABIv5.
834 (arm_eabis): Add EF_ARM_EABI_VER5.
835 * doc/c-arm.texi: Document -meabi=5.
837 2006-03-10 Ben Elliston <bje@au.ibm.com>
839 * app.c (do_scrub_chars): Simplify string handling.
841 2006-03-07 Richard Sandiford <richard@codesourcery.com>
842 Daniel Jacobowitz <dan@codesourcery.com>
843 Zack Weinberg <zack@codesourcery.com>
844 Nathan Sidwell <nathan@codesourcery.com>
845 Paul Brook <paul@codesourcery.com>
846 Ricardo Anguiano <anguiano@codesourcery.com>
847 Phil Edwards <phil@codesourcery.com>
849 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
850 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
851 R_ARM_ABS12 reloc.
852 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
853 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
854 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
856 2006-03-06 Bob Wilson <bob.wilson@acm.org>
858 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
859 even when using the text-section-literals option.
861 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
863 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
864 and cf.
865 (m68k_ip): <case 'J'> Check we have some control regs.
866 (md_parse_option): Allow raw arch switch.
867 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
868 whether 68881 or cfloat was meant by -mfloat.
869 (md_show_usage): Adjust extension display.
870 (m68k_elf_final_processing): Adjust.
872 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
874 * config/tc-avr.c (avr_mod_hash_value): New function.
875 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
876 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
877 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
878 instead of int avr_ldi_expression: use avr_mod_hash_value instead
879 of (int).
880 (tc_gen_reloc): Handle substractions of symbols, if possible do
881 fixups, abort otherwise.
882 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
883 tc_fix_adjustable): Define.
885 2006-03-02 James E Wilson <wilson@specifix.com>
887 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
888 change the template, then clear md.slot[curr].end_of_insn_group.
890 2006-02-28 Jan Beulich <jbeulich@novell.com>
892 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
894 2006-02-28 Jan Beulich <jbeulich@novell.com>
896 PR/1070
897 * macro.c (getstring): Don't treat parentheses special anymore.
898 (get_any_string): Don't consider '(' and ')' as quoting anymore.
899 Special-case '(', ')', '[', and ']' when dealing with non-quoting
900 characters.
902 2006-02-28 Mat <mat@csail.mit.edu>
904 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
906 2006-02-27 Jakub Jelinek <jakub@redhat.com>
908 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
909 field.
910 (CFI_signal_frame): Define.
911 (cfi_pseudo_table): Add .cfi_signal_frame.
912 (dot_cfi): Handle CFI_signal_frame.
913 (output_cie): Handle cie->signal_frame.
914 (select_cie_for_fde): Don't share CIE if signal_frame flag is
915 different. Copy signal_frame from FDE to newly created CIE.
916 * doc/as.texinfo: Document .cfi_signal_frame.
918 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
920 * doc/Makefile.am: Add html target.
921 * doc/Makefile.in: Regenerate.
922 * po/Make-in: Add html target.
924 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
926 * config/tc-i386.c (output_insn): Support Intel Merom New
927 Instructions.
929 * config/tc-i386.h (CpuMNI): New.
930 (CpuUnknownFlags): Add CpuMNI.
932 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
934 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
935 (hpriv_reg_table): New table for hyperprivileged registers.
936 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
937 register encoding.
939 2006-02-24 DJ Delorie <dj@redhat.com>
941 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
942 (tc_gen_reloc): Don't define.
943 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
944 (OPTION_LINKRELAX): New.
945 (md_longopts): Add it.
946 (m32c_relax): New.
947 (md_parse_options): Set it.
948 (md_assemble): Emit relaxation relocs as needed.
949 (md_convert_frag): Emit relaxation relocs as needed.
950 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
951 (m32c_apply_fix): New.
952 (tc_gen_reloc): New.
953 (m32c_force_relocation): Force out jump relocs when relaxing.
954 (m32c_fix_adjustable): Return false if relaxing.
956 2006-02-24 Paul Brook <paul@codesourcery.com>
958 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
959 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
960 (struct asm_barrier_opt): Define.
961 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
962 (parse_psr): Accept V7M psr names.
963 (parse_barrier): New function.
964 (enum operand_parse_code): Add OP_oBARRIER.
965 (parse_operands): Implement OP_oBARRIER.
966 (do_barrier): New function.
967 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
968 (do_t_cpsi): Add V7M restrictions.
969 (do_t_mrs, do_t_msr): Validate V7M variants.
970 (md_assemble): Check for NULL variants.
971 (v7m_psrs, barrier_opt_names): New tables.
972 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
973 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
974 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
975 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
976 (struct cpu_arch_ver_table): Define.
977 (cpu_arch_ver): New.
978 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
979 Tag_CPU_arch_profile.
980 * doc/c-arm.texi: Document new cpu and arch options.
982 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
984 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
986 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
988 * config/tc-ia64.c: Update copyright years.
990 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
992 * config/tc-ia64.c (specify_resource): Add the rule 17 from
993 SDM 2.2.
995 2005-02-22 Paul Brook <paul@codesourcery.com>
997 * config/tc-arm.c (do_pld): Remove incorrect write to
998 inst.instruction.
999 (encode_thumb32_addr_mode): Use correct operand.
1001 2006-02-21 Paul Brook <paul@codesourcery.com>
1003 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1005 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1006 Anil Paranjape <anilp1@kpitcummins.com>
1007 Shilin Shakti <shilins@kpitcummins.com>
1009 * Makefile.am: Add xc16x related entry.
1010 * Makefile.in: Regenerate.
1011 * configure.in: Added xc16x related entry.
1012 * configure: Regenerate.
1013 * config/tc-xc16x.h: New file
1014 * config/tc-xc16x.c: New file
1015 * doc/c-xc16x.texi: New file for xc16x
1016 * doc/all.texi: Entry for xc16x
1017 * doc/Makefile.texi: Added c-xc16x.texi
1018 * NEWS: Announce the support for the new target.
1020 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1022 * configure.tgt: set emulation for mips-*-netbsd*
1024 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1026 * config.in: Rebuilt.
1028 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1030 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1031 from 1, not 0, in error messages.
1032 (md_assemble): Simplify special-case check for ENTRY instructions.
1033 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1034 operand in error message.
1036 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1038 * configure.tgt (arm-*-linux-gnueabi*): Change to
1039 arm-*-linux-*eabi*.
1041 2006-02-10 Nick Clifton <nickc@redhat.com>
1043 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1044 32-bit value is propagated into the upper bits of a 64-bit long.
1046 * config/tc-arc.c (init_opcode_tables): Fix cast.
1047 (arc_extoper, md_operand): Likewise.
1049 2006-02-09 David Heine <dlheine@tensilica.com>
1051 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1052 each relaxation step.
1054 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1056 * configure.in (CHECK_DECLS): Add vsnprintf.
1057 * configure: Regenerate.
1058 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1059 include/declare here, but...
1060 * as.h: Move code detecting VARARGS idiom to the top.
1061 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1062 (vsnprintf): Declare if not already declared.
1064 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1066 * as.c (close_output_file): New.
1067 (main): Register close_output_file with xatexit before
1068 dump_statistics. Don't call output_file_close.
1070 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1072 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1073 mcf5329_control_regs): New.
1074 (not_current_architecture, selected_arch, selected_cpu): New.
1075 (m68k_archs, m68k_extensions): New.
1076 (archs): Renamed to ...
1077 (m68k_cpus): ... here. Adjust.
1078 (n_arches): Remove.
1079 (md_pseudo_table): Add arch and cpu directives.
1080 (find_cf_chip, m68k_ip): Adjust table scanning.
1081 (no_68851, no_68881): Remove.
1082 (md_assemble): Lazily initialize.
1083 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1084 (md_init_after_args): Move functionality to m68k_init_arch.
1085 (mri_chip): Adjust table scanning.
1086 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1087 options with saner parsing.
1088 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1089 m68k_init_arch): New.
1090 (s_m68k_cpu, s_m68k_arch): New.
1091 (md_show_usage): Adjust.
1092 (m68k_elf_final_processing): Set CF EF flags.
1093 * config/tc-m68k.h (m68k_init_after_args): Remove.
1094 (tc_init_after_args): Remove.
1095 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1096 (M68k-Directives): Document .arch and .cpu directives.
1098 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1100 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1101 synonyms for equ and defl.
1102 (z80_cons_fix_new): New function.
1103 (emit_byte): Disallow relative jumps to absolute locations.
1104 (emit_data): Only handle defb, prototype changed, because defb is
1105 now handled as pseudo-op rather than an instruction.
1106 (instab): Entries for defb,defw,db,dw moved from here...
1107 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1108 Add entries for def24,def32,d24,d32.
1109 (md_assemble): Improved error handling.
1110 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1111 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1112 (z80_cons_fix_new): Declare.
1113 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1114 (def24,d24,def32,d32): New pseudo-ops.
1116 2006-02-02 Paul Brook <paul@codesourcery.com>
1118 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1120 2005-02-02 Paul Brook <paul@codesourcery.com>
1122 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1123 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1124 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1125 T2_OPCODE_RSB): Define.
1126 (thumb32_negate_data_op): New function.
1127 (md_apply_fix): Use it.
1129 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1131 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1132 fields.
1133 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1134 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1135 subtracted symbols.
1136 (relaxation_requirements): Add pfinish_frag argument and use it to
1137 replace setting tinsn->record_fix fields.
1138 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1139 and vinsn_to_insnbuf. Remove references to record_fix and
1140 slot_sub_symbols fields.
1141 (xtensa_mark_narrow_branches): Delete unused code.
1142 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1143 a symbol.
1144 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1145 record_fix fields.
1146 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1147 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1148 of the record_fix field. Simplify error messages for unexpected
1149 symbolic operands.
1150 (set_expr_symbol_offset_diff): Delete.
1152 2006-01-31 Paul Brook <paul@codesourcery.com>
1154 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1156 2006-01-31 Paul Brook <paul@codesourcery.com>
1157 Richard Earnshaw <rearnsha@arm.com>
1159 * config/tc-arm.c: Use arm_feature_set.
1160 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1161 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1162 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1163 New variables.
1164 (insns): Use them.
1165 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1166 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1167 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1168 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1169 feature flags.
1170 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1171 (arm_opts): Move old cpu/arch options from here...
1172 (arm_legacy_opts): ... to here.
1173 (md_parse_option): Search arm_legacy_opts.
1174 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1175 (arm_float_abis, arm_eabis): Make const.
1177 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1179 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1181 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1183 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1184 in load immediate intruction.
1186 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1188 * config/bfin-parse.y (value_match): Use correct conversion
1189 specifications in template string for __FILE__ and __LINE__.
1190 (binary): Ditto.
1191 (unary): Ditto.
1193 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1195 Introduce TLS descriptors for i386 and x86_64.
1196 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1197 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1198 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1199 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1200 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1201 displacement bits.
1202 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1203 (lex_got): Handle @tlsdesc and @tlscall.
1204 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1206 2006-01-11 Nick Clifton <nickc@redhat.com>
1208 Fixes for building on 64-bit hosts:
1209 * config/tc-avr.c (mod_index): New union to allow conversion
1210 between pointers and integers.
1211 (md_begin, avr_ldi_expression): Use it.
1212 * config/tc-i370.c (md_assemble): Add cast for argument to print
1213 statement.
1214 * config/tc-tic54x.c (subsym_substitute): Likewise.
1215 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1216 opindex field of fr_cgen structure into a pointer so that it can
1217 be stored in a frag.
1218 * config/tc-mn10300.c (md_assemble): Likewise.
1219 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1220 types.
1221 * config/tc-v850.c: Replace uses of (int) casts with correct
1222 types.
1224 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1226 PR gas/2117
1227 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1229 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1231 PR gas/2101
1232 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1233 a local-label reference.
1235 For older changes see ChangeLog-2005
1236 \f
1237 Local Variables:
1238 mode: change-log
1239 left-margin: 8
1240 fill-column: 74
1241 version-control: never
1242 End: