Add support for the M32R2 processor.
[binutils.git] / ld / testsuite / ld-powerpc / tlsexetoc.d
blob7947149ce43dc607cd0b8d0ef24ee45b2f8efa78
1 #source: tlstoc.s
2 #as: -a64
3 #ld: -melf64ppc tmpdir/libtlslib.so
4 #objdump: -dr
5 #target: powerpc64*-*-*
7 .*: +file format elf64-powerpc
9 Disassembly of section \.text:
11 .* <_start-0x1c>:
12 .* 3d 82 00 00 addis r12,r2,0
13 .* f8 41 00 28 std r2,40\(r1\)
14 .* e9 6c 80 70 ld r11,-32656\(r12\)
15 .* e8 4c 80 78 ld r2,-32648\(r12\)
16 .* 7d 69 03 a6 mtctr r11
17 .* e9 6c 80 80 ld r11,-32640\(r12\)
18 .* 4e 80 04 20 bctr
20 .* <_start>:
21 .* 38 62 80 08 addi r3,r2,-32760
22 .* 4b ff ff e1 bl .*
23 .* e8 41 00 28 ld r2,40\(r1\)
24 .* 38 62 80 18 addi r3,r2,-32744
25 .* 4b ff ff d5 bl .*
26 .* e8 41 00 28 ld r2,40\(r1\)
27 .* 3c 6d 00 00 addis r3,r13,0
28 .* 60 00 00 00 nop
29 .* 38 63 90 38 addi r3,r3,-28616
30 .* 3c 6d 00 00 addis r3,r13,0
31 .* 60 00 00 00 nop
32 .* 38 63 10 00 addi r3,r3,4096
33 .* 39 23 80 40 addi r9,r3,-32704
34 .* 3d 23 00 00 addis r9,r3,0
35 .* 81 49 80 48 lwz r10,-32696\(r9\)
36 .* e9 22 80 48 ld r9,-32696\(r2\)
37 .* 7d 49 18 2a ldx r10,r9,r3
38 .* 3d 2d 00 00 addis r9,r13,0
39 .* a1 49 90 58 lhz r10,-28584\(r9\)
40 .* 89 4d 90 60 lbz r10,-28576\(r13\)
41 .* 3d 2d 00 00 addis r9,r13,0
42 .* 99 49 90 68 stb r10,-28568\(r9\)
43 .* 7d 89 02 a6 mfctr r12
44 .* 78 0b 1f 24 rldicr r11,r0,3,60
45 .* 34 40 80 00 addic\. r2,r0,-32768
46 .* 7d 8b 60 50 subf r12,r11,r12
47 .* 7c 42 fe 76 sradi r2,r2,63
48 .* 78 0b 17 64 rldicr r11,r0,2,61
49 .* 7c 42 58 38 and r2,r2,r11
50 .* 7d 8b 60 50 subf r12,r11,r12
51 .* 7d 8c 12 14 add r12,r12,r2
52 .* 3d 8c 00 01 addis r12,r12,1
53 .* e9 6c 01 ec ld r11,492\(r12\)
54 .* 39 8c 01 ec addi r12,r12,492
55 .* e8 4c 00 08 ld r2,8\(r12\)
56 .* 7d 69 03 a6 mtctr r11
57 .* e9 6c 00 10 ld r11,16\(r12\)
58 .* 4e 80 04 20 bctr
59 .* 38 00 00 00 li r0,0
60 .* 4b ff ff bc b .*