Add support for generating DWARF2 debug sections in the x86 PE port
[binutils.git] / opcodes / m68k-dis.c
blob365d54aafa48b9c1a9fdbaf05d726490bd4e7488
1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
6 This file is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20 #include "sysdep.h"
21 #include "dis-asm.h"
22 #include "floatformat.h"
23 #include "libiberty.h"
24 #include "opintl.h"
26 #include "opcode/m68k.h"
28 /* Local function prototypes */
30 static int
31 fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
33 static void
34 dummy_print_address PARAMS ((bfd_vma, struct disassemble_info *));
36 static int
37 fetch_arg PARAMS ((unsigned char *, int, int, disassemble_info *));
39 static void
40 print_base PARAMS ((int, bfd_vma, disassemble_info *));
42 static unsigned char *
43 print_indexed PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *));
45 static int
46 print_insn_arg PARAMS ((const char *, unsigned char *, unsigned char *,
47 bfd_vma, disassemble_info *));
49 const char * const fpcr_names[] = {
50 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
51 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
54 static char *const reg_names[] = {
55 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
56 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
57 "%ps", "%pc"
60 /* Sign-extend an (unsigned char). */
61 #if __STDC__ == 1
62 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
63 #else
64 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
65 #endif
67 /* Get a 1 byte signed integer. */
68 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
70 /* Get a 2 byte signed integer. */
71 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
72 #define NEXTWORD(p) \
73 (p += 2, FETCH_DATA (info, p), \
74 COERCE16 ((p[-2] << 8) + p[-1]))
76 /* Get a 4 byte signed integer. */
77 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
78 #define NEXTLONG(p) \
79 (p += 4, FETCH_DATA (info, p), \
80 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
82 /* Get a 4 byte unsigned integer. */
83 #define NEXTULONG(p) \
84 (p += 4, FETCH_DATA (info, p), \
85 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
87 /* Get a single precision float. */
88 #define NEXTSINGLE(val, p) \
89 (p += 4, FETCH_DATA (info, p), \
90 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
92 /* Get a double precision float. */
93 #define NEXTDOUBLE(val, p) \
94 (p += 8, FETCH_DATA (info, p), \
95 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
97 /* Get an extended precision float. */
98 #define NEXTEXTEND(val, p) \
99 (p += 12, FETCH_DATA (info, p), \
100 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
102 /* Need a function to convert from packed to double
103 precision. Actually, it's easier to print a
104 packed number than a double anyway, so maybe
105 there should be a special case to handle this... */
106 #define NEXTPACKED(p) \
107 (p += 12, FETCH_DATA (info, p), 0.0)
109 /* Maximum length of an instruction. */
110 #define MAXLEN 22
112 #include <setjmp.h>
114 struct private {
115 /* Points to first byte not fetched. */
116 bfd_byte *max_fetched;
117 bfd_byte the_buffer[MAXLEN];
118 bfd_vma insn_start;
119 jmp_buf bailout;
122 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
123 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
124 on error. */
125 #define FETCH_DATA(info, addr) \
126 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
127 ? 1 : fetch_data ((info), (addr)))
129 static int
130 fetch_data (info, addr)
131 struct disassemble_info *info;
132 bfd_byte *addr;
134 int status;
135 struct private *priv = (struct private *)info->private_data;
136 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
138 status = (*info->read_memory_func) (start,
139 priv->max_fetched,
140 addr - priv->max_fetched,
141 info);
142 if (status != 0)
144 (*info->memory_error_func) (status, start, info);
145 longjmp (priv->bailout, 1);
147 else
148 priv->max_fetched = addr;
149 return 1;
152 /* This function is used to print to the bit-bucket. */
153 static int
154 #ifdef __STDC__
155 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
156 const char *format ATTRIBUTE_UNUSED, ...)
157 #else
158 dummy_printer (file)
159 FILE *file ATTRIBUTE_UNUSED;
160 #endif
162 return 0;
165 static void
166 dummy_print_address (vma, info)
167 bfd_vma vma ATTRIBUTE_UNUSED;
168 struct disassemble_info *info ATTRIBUTE_UNUSED;
172 /* Print the m68k instruction at address MEMADDR in debugged memory,
173 on INFO->STREAM. Returns length of the instruction, in bytes. */
176 print_insn_m68k (memaddr, info)
177 bfd_vma memaddr;
178 disassemble_info *info;
180 register int i;
181 register unsigned char *p;
182 unsigned char *save_p;
183 register const char *d;
184 register unsigned long bestmask;
185 const struct m68k_opcode *best;
186 unsigned int arch_mask;
187 struct private priv;
188 bfd_byte *buffer = priv.the_buffer;
189 fprintf_ftype save_printer = info->fprintf_func;
190 void (*save_print_address) PARAMS ((bfd_vma, struct disassemble_info *))
191 = info->print_address_func;
192 int major_opcode;
193 static int numopcodes[16];
194 static const struct m68k_opcode **opcodes[16];
196 if (!opcodes[0])
198 /* Speed up the matching by sorting the opcode table on the upper
199 four bits of the opcode. */
200 const struct m68k_opcode **opc_pointer[16];
202 /* First count how many opcodes are in each of the sixteen buckets. */
203 for (i = 0; i < m68k_numopcodes; i++)
204 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
206 /* Then create a sorted table of pointers that point into the
207 unsorted table. */
208 opc_pointer[0] = ((const struct m68k_opcode **)
209 xmalloc (sizeof (struct m68k_opcode *)
210 * m68k_numopcodes));
211 opcodes[0] = opc_pointer[0];
212 for (i = 1; i < 16; i++)
214 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
215 opcodes[i] = opc_pointer[i];
218 for (i = 0; i < m68k_numopcodes; i++)
219 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
223 info->private_data = (PTR) &priv;
224 /* Tell objdump to use two bytes per chunk and six bytes per line for
225 displaying raw data. */
226 info->bytes_per_chunk = 2;
227 info->bytes_per_line = 6;
228 info->display_endian = BFD_ENDIAN_BIG;
229 priv.max_fetched = priv.the_buffer;
230 priv.insn_start = memaddr;
231 if (setjmp (priv.bailout) != 0)
232 /* Error return. */
233 return -1;
235 best = NULL;
236 switch (info->mach)
238 default:
239 case 0:
240 arch_mask = (unsigned int) -1;
241 break;
242 case bfd_mach_m68000:
243 arch_mask = m68000;
244 break;
245 case bfd_mach_m68008:
246 arch_mask = m68008;
247 break;
248 case bfd_mach_m68010:
249 arch_mask = m68010;
250 break;
251 case bfd_mach_m68020:
252 arch_mask = m68020;
253 break;
254 case bfd_mach_m68030:
255 arch_mask = m68030;
256 break;
257 case bfd_mach_m68040:
258 arch_mask = m68040;
259 break;
260 case bfd_mach_m68060:
261 arch_mask = m68060;
262 break;
263 case bfd_mach_mcf5200:
264 arch_mask = mcf5200;
265 break;
266 case bfd_mach_mcf528x:
267 arch_mask = mcf528x | mcfmac;
268 break;
269 case bfd_mach_mcf5206e:
270 arch_mask = mcf5206e | mcfmac;
271 break;
272 case bfd_mach_mcf5307:
273 arch_mask = mcf5307 | mcfmac;
274 break;
275 case bfd_mach_mcf5407:
276 arch_mask = mcf5407 | mcfmac;
277 break;
278 case bfd_mach_mcfv4e:
279 arch_mask = mcfv4e | mcfemac;
280 break;
283 arch_mask |= m68881 | m68851;
285 bestmask = 0;
286 FETCH_DATA (info, buffer + 2);
287 major_opcode = (buffer[0] >> 4) & 15;
288 for (i = 0; i < numopcodes[major_opcode]; i++)
290 const struct m68k_opcode *opc = opcodes[major_opcode][i];
291 unsigned long opcode = opc->opcode;
292 unsigned long match = opc->match;
294 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
295 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
296 /* Only fetch the next two bytes if we need to. */
297 && (((0xffff & match) == 0)
299 (FETCH_DATA (info, buffer + 4)
300 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
301 && ((0xff & buffer[3] & match) == (0xff & opcode)))
303 && (opc->arch & arch_mask) != 0)
305 /* Don't use for printout the variants of divul and divsl
306 that have the same register number in two places.
307 The more general variants will match instead. */
308 for (d = opc->args; *d; d += 2)
309 if (d[1] == 'D')
310 break;
312 /* Don't use for printout the variants of most floating
313 point coprocessor instructions which use the same
314 register number in two places, as above. */
315 if (*d == '\0')
316 for (d = opc->args; *d; d += 2)
317 if (d[1] == 't')
318 break;
320 /* Don't match fmovel with more than one register; wait for
321 fmoveml. */
322 if (*d == '\0')
324 for (d = opc->args; *d; d += 2)
326 if (d[0] == 's' && d[1] == '8')
328 int val;
330 val = fetch_arg (buffer, d[1], 3, info);
331 if ((val & (val - 1)) != 0)
332 break;
337 if (*d == '\0' && match > bestmask)
339 best = opc;
340 bestmask = match;
345 if (best == NULL)
346 goto invalid;
348 /* Point at first word of argument data,
349 and at descriptor for first argument. */
350 p = buffer + 2;
352 /* Figure out how long the fixed-size portion of the instruction is.
353 The only place this is stored in the opcode table is
354 in the arguments--look for arguments which specify fields in the 2nd
355 or 3rd words of the instruction. */
356 for (d = best->args; *d; d += 2)
358 /* I don't think it is necessary to be checking d[0] here; I suspect
359 all this could be moved to the case statement below. */
360 if (d[0] == '#')
362 if (d[1] == 'l' && p - buffer < 6)
363 p = buffer + 6;
364 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
365 p = buffer + 4;
367 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
368 p = buffer + 4;
369 switch (d[1])
371 case '1':
372 case '2':
373 case '3':
374 case '7':
375 case '8':
376 case '9':
377 case 'i':
378 if (p - buffer < 4)
379 p = buffer + 4;
380 break;
381 case '4':
382 case '5':
383 case '6':
384 if (p - buffer < 6)
385 p = buffer + 6;
386 break;
387 default:
388 break;
392 /* pflusha is an exceptions. It takes no arguments but is two words
393 long. Recognize it by looking at the lower 16 bits of the mask. */
394 if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
395 p = buffer + 4;
397 /* lpstop is another exception. It takes a one word argument but is
398 three words long. */
399 if (p - buffer < 6
400 && (best->match & 0xffff) == 0xffff
401 && best->args[0] == '#'
402 && best->args[1] == 'w')
404 /* Copy the one word argument into the usual location for a one
405 word argument, to simplify printing it. We can get away with
406 this because we know exactly what the second word is, and we
407 aren't going to print anything based on it. */
408 p = buffer + 6;
409 FETCH_DATA (info, p);
410 buffer[2] = buffer[4];
411 buffer[3] = buffer[5];
414 FETCH_DATA (info, p);
416 d = best->args;
418 /* We scan the operands twice. The first time we don't print anything,
419 but look for errors. */
421 save_p = p;
422 info->print_address_func = dummy_print_address;
423 info->fprintf_func = (fprintf_ftype) dummy_printer;
424 for (; *d; d += 2)
426 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
427 if (eaten >= 0)
428 p += eaten;
429 else if (eaten == -1)
430 goto invalid;
431 else
433 (*info->fprintf_func) (info->stream,
434 /* xgettext:c-format */
435 _("<internal error in opcode table: %s %s>\n"),
436 best->name,
437 best->args);
438 goto invalid;
442 p = save_p;
443 info->fprintf_func = save_printer;
444 info->print_address_func = save_print_address;
446 d = best->args;
448 (*info->fprintf_func) (info->stream, "%s", best->name);
450 if (*d)
451 (*info->fprintf_func) (info->stream, " ");
453 while (*d)
455 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
456 d += 2;
457 if (*d && *(d - 2) != 'I' && *d != 'k')
458 (*info->fprintf_func) (info->stream, ",");
460 return p - buffer;
462 invalid:
463 /* Handle undefined instructions. */
464 info->fprintf_func = save_printer;
465 info->print_address_func = save_print_address;
466 (*info->fprintf_func) (info->stream, "0%o",
467 (buffer[0] << 8) + buffer[1]);
468 return 2;
471 /* Returns number of bytes "eaten" by the operand, or
472 return -1 if an invalid operand was found, or -2 if
473 an opcode tabe error was found. */
475 static int
476 print_insn_arg (d, buffer, p0, addr, info)
477 const char *d;
478 unsigned char *buffer;
479 unsigned char *p0;
480 bfd_vma addr; /* PC for this arg to be relative to */
481 disassemble_info *info;
483 register int val = 0;
484 register int place = d[1];
485 register unsigned char *p = p0;
486 int regno;
487 register const char *regname;
488 register unsigned char *p1;
489 double flval;
490 int flt_p;
491 bfd_signed_vma disp;
492 unsigned int uval;
494 switch (*d)
496 case 'c': /* cache identifier */
498 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
499 val = fetch_arg (buffer, place, 2, info);
500 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
501 break;
504 case 'a': /* address register indirect only. Cf. case '+'. */
506 (*info->fprintf_func)
507 (info->stream,
508 "%s@",
509 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
510 break;
513 case '_': /* 32-bit absolute address for move16. */
515 uval = NEXTULONG (p);
516 (*info->print_address_func) (uval, info);
517 break;
520 case 'C':
521 (*info->fprintf_func) (info->stream, "%%ccr");
522 break;
524 case 'S':
525 (*info->fprintf_func) (info->stream, "%%sr");
526 break;
528 case 'U':
529 (*info->fprintf_func) (info->stream, "%%usp");
530 break;
532 case 'E':
533 (*info->fprintf_func) (info->stream, "%%acc");
534 break;
536 case 'G':
537 (*info->fprintf_func) (info->stream, "%%macsr");
538 break;
540 case 'H':
541 (*info->fprintf_func) (info->stream, "%%mask");
542 break;
544 case 'J':
546 /* FIXME: There's a problem here, different m68k processors call the
547 same address different names. This table can't get it right
548 because it doesn't know which processor it's disassembling for. */
549 static const struct { char *name; int value; } names[]
550 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
551 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
552 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
553 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
554 {"%msp", 0x803}, {"%isp", 0x804},
555 {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
557 /* Should we be calling this psr like we do in case 'Y'? */
558 {"%mmusr",0x805},
560 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
562 val = fetch_arg (buffer, place, 12, info);
563 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
564 if (names[regno].value == val)
566 (*info->fprintf_func) (info->stream, "%s", names[regno].name);
567 break;
569 if (regno < 0)
570 (*info->fprintf_func) (info->stream, "%d", val);
572 break;
574 case 'Q':
575 val = fetch_arg (buffer, place, 3, info);
576 /* 0 means 8, except for the bkpt instruction... */
577 if (val == 0 && d[1] != 's')
578 val = 8;
579 (*info->fprintf_func) (info->stream, "#%d", val);
580 break;
582 case 'x':
583 val = fetch_arg (buffer, place, 3, info);
584 /* 0 means -1. */
585 if (val == 0)
586 val = -1;
587 (*info->fprintf_func) (info->stream, "#%d", val);
588 break;
590 case 'M':
591 if (place == 'h')
593 static char *const scalefactor_name[] = { "<<", ">>" };
594 val = fetch_arg (buffer, place, 1, info);
595 (*info->fprintf_func) (info->stream, scalefactor_name[val]);
597 else
599 val = fetch_arg (buffer, place, 8, info);
600 if (val & 0x80)
601 val = val - 0x100;
602 (*info->fprintf_func) (info->stream, "#%d", val);
604 break;
606 case 'T':
607 val = fetch_arg (buffer, place, 4, info);
608 (*info->fprintf_func) (info->stream, "#%d", val);
609 break;
611 case 'D':
612 (*info->fprintf_func) (info->stream, "%s",
613 reg_names[fetch_arg (buffer, place, 3, info)]);
614 break;
616 case 'A':
617 (*info->fprintf_func)
618 (info->stream, "%s",
619 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
620 break;
622 case 'R':
623 (*info->fprintf_func)
624 (info->stream, "%s",
625 reg_names[fetch_arg (buffer, place, 4, info)]);
626 break;
628 case 'r':
629 regno = fetch_arg (buffer, place, 4, info);
630 if (regno > 7)
631 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
632 else
633 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
634 break;
636 case 'F':
637 (*info->fprintf_func)
638 (info->stream, "%%fp%d",
639 fetch_arg (buffer, place, 3, info));
640 break;
642 case 'O':
643 val = fetch_arg (buffer, place, 6, info);
644 if (val & 0x20)
645 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
646 else
647 (*info->fprintf_func) (info->stream, "%d", val);
648 break;
650 case '+':
651 (*info->fprintf_func)
652 (info->stream, "%s@+",
653 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
654 break;
656 case '-':
657 (*info->fprintf_func)
658 (info->stream, "%s@-",
659 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
660 break;
662 case 'k':
663 if (place == 'k')
664 (*info->fprintf_func)
665 (info->stream, "{%s}",
666 reg_names[fetch_arg (buffer, place, 3, info)]);
667 else if (place == 'C')
669 val = fetch_arg (buffer, place, 7, info);
670 if (val > 63) /* This is a signed constant. */
671 val -= 128;
672 (*info->fprintf_func) (info->stream, "{#%d}", val);
674 else
675 return -2;
676 break;
678 case '#':
679 case '^':
680 p1 = buffer + (*d == '#' ? 2 : 4);
681 if (place == 's')
682 val = fetch_arg (buffer, place, 4, info);
683 else if (place == 'C')
684 val = fetch_arg (buffer, place, 7, info);
685 else if (place == '8')
686 val = fetch_arg (buffer, place, 3, info);
687 else if (place == '3')
688 val = fetch_arg (buffer, place, 8, info);
689 else if (place == 'b')
690 val = NEXTBYTE (p1);
691 else if (place == 'w' || place == 'W')
692 val = NEXTWORD (p1);
693 else if (place == 'l')
694 val = NEXTLONG (p1);
695 else
696 return -2;
697 (*info->fprintf_func) (info->stream, "#%d", val);
698 break;
700 case 'B':
701 if (place == 'b')
702 disp = NEXTBYTE (p);
703 else if (place == 'B')
704 disp = COERCE_SIGNED_CHAR (buffer[1]);
705 else if (place == 'w' || place == 'W')
706 disp = NEXTWORD (p);
707 else if (place == 'l' || place == 'L' || place == 'C')
708 disp = NEXTLONG (p);
709 else if (place == 'g')
711 disp = NEXTBYTE (buffer);
712 if (disp == 0)
713 disp = NEXTWORD (p);
714 else if (disp == -1)
715 disp = NEXTLONG (p);
717 else if (place == 'c')
719 if (buffer[1] & 0x40) /* If bit six is one, long offset */
720 disp = NEXTLONG (p);
721 else
722 disp = NEXTWORD (p);
724 else
725 return -2;
727 (*info->print_address_func) (addr + disp, info);
728 break;
730 case 'd':
731 val = NEXTWORD (p);
732 (*info->fprintf_func)
733 (info->stream, "%s@(%d)",
734 reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
735 break;
737 case 's':
738 (*info->fprintf_func) (info->stream, "%s",
739 fpcr_names[fetch_arg (buffer, place, 3, info)]);
740 break;
742 case 'e':
743 val = fetch_arg(buffer, place, 2, info);
744 (*info->fprintf_func) (info->stream, "%%acc%d", val);
745 break;
747 case 'g':
748 val = fetch_arg(buffer, place, 2, info);
749 (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23");
750 break;
752 case 'i':
753 val = fetch_arg(buffer, place, 2, info);
754 if (val == 1)
755 (*info->fprintf_func) (info->stream, "<<");
756 else if (val == 3)
757 (*info->fprintf_func) (info->stream, ">>");
758 break;
760 case 'I':
761 /* Get coprocessor ID... */
762 val = fetch_arg (buffer, 'd', 3, info);
764 if (val != 1) /* Unusual coprocessor ID? */
765 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
766 break;
768 case '4':
769 case '*':
770 case '~':
771 case '%':
772 case ';':
773 case '@':
774 case '!':
775 case '$':
776 case '?':
777 case '/':
778 case '&':
779 case '|':
780 case '<':
781 case '>':
782 case 'm':
783 case 'n':
784 case 'o':
785 case 'p':
786 case 'q':
787 case 'v':
788 case 'b':
789 case 'w':
790 case 'y':
791 case 'z':
792 if (place == 'd')
794 val = fetch_arg (buffer, 'x', 6, info);
795 val = ((val & 7) << 3) + ((val >> 3) & 7);
797 else
798 val = fetch_arg (buffer, 's', 6, info);
800 /* Get register number assuming address register. */
801 regno = (val & 7) + 8;
802 regname = reg_names[regno];
803 switch (val >> 3)
805 case 0:
806 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
807 break;
809 case 1:
810 (*info->fprintf_func) (info->stream, "%s", regname);
811 break;
813 case 2:
814 (*info->fprintf_func) (info->stream, "%s@", regname);
815 break;
817 case 3:
818 (*info->fprintf_func) (info->stream, "%s@+", regname);
819 break;
821 case 4:
822 (*info->fprintf_func) (info->stream, "%s@-", regname);
823 break;
825 case 5:
826 val = NEXTWORD (p);
827 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
828 break;
830 case 6:
831 p = print_indexed (regno, p, addr, info);
832 break;
834 case 7:
835 switch (val & 7)
837 case 0:
838 val = NEXTWORD (p);
839 (*info->print_address_func) (val, info);
840 break;
842 case 1:
843 uval = NEXTULONG (p);
844 (*info->print_address_func) (uval, info);
845 break;
847 case 2:
848 val = NEXTWORD (p);
849 (*info->fprintf_func) (info->stream, "%%pc@(");
850 (*info->print_address_func) (addr + val, info);
851 (*info->fprintf_func) (info->stream, ")");
852 break;
854 case 3:
855 p = print_indexed (-1, p, addr, info);
856 break;
858 case 4:
859 flt_p = 1; /* Assume it's a float... */
860 switch (place)
862 case 'b':
863 val = NEXTBYTE (p);
864 flt_p = 0;
865 break;
867 case 'w':
868 val = NEXTWORD (p);
869 flt_p = 0;
870 break;
872 case 'l':
873 val = NEXTLONG (p);
874 flt_p = 0;
875 break;
877 case 'f':
878 NEXTSINGLE (flval, p);
879 break;
881 case 'F':
882 NEXTDOUBLE (flval, p);
883 break;
885 case 'x':
886 NEXTEXTEND (flval, p);
887 break;
889 case 'p':
890 flval = NEXTPACKED (p);
891 break;
893 default:
894 return -1;
896 if (flt_p) /* Print a float? */
897 (*info->fprintf_func) (info->stream, "#%g", flval);
898 else
899 (*info->fprintf_func) (info->stream, "#%d", val);
900 break;
902 default:
903 return -1;
907 /* If place is '/', then this is the case of the mask bit for
908 mac/emac loads. Now that the arg has been printed, grab the
909 mask bit and if set, add a '&' to the arg. */
910 if (place == '/')
912 val = fetch_arg (buffer, place, 1, info);
913 if (val)
914 (*info->fprintf_func) (info->stream, "&");
916 break;
918 case 'L':
919 case 'l':
920 if (place == 'w')
922 char doneany;
923 p1 = buffer + 2;
924 val = NEXTWORD (p1);
925 /* Move the pointer ahead if this point is farther ahead
926 than the last. */
927 p = p1 > p ? p1 : p;
928 if (val == 0)
930 (*info->fprintf_func) (info->stream, "#0");
931 break;
933 if (*d == 'l')
935 register int newval = 0;
936 for (regno = 0; regno < 16; ++regno)
937 if (val & (0x8000 >> regno))
938 newval |= 1 << regno;
939 val = newval;
941 val &= 0xffff;
942 doneany = 0;
943 for (regno = 0; regno < 16; ++regno)
944 if (val & (1 << regno))
946 int first_regno;
947 if (doneany)
948 (*info->fprintf_func) (info->stream, "/");
949 doneany = 1;
950 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
951 first_regno = regno;
952 while (val & (1 << (regno + 1)))
953 ++regno;
954 if (regno > first_regno)
955 (*info->fprintf_func) (info->stream, "-%s",
956 reg_names[regno]);
959 else if (place == '3')
961 /* `fmovem' insn. */
962 char doneany;
963 val = fetch_arg (buffer, place, 8, info);
964 if (val == 0)
966 (*info->fprintf_func) (info->stream, "#0");
967 break;
969 if (*d == 'l')
971 register int newval = 0;
972 for (regno = 0; regno < 8; ++regno)
973 if (val & (0x80 >> regno))
974 newval |= 1 << regno;
975 val = newval;
977 val &= 0xff;
978 doneany = 0;
979 for (regno = 0; regno < 8; ++regno)
980 if (val & (1 << regno))
982 int first_regno;
983 if (doneany)
984 (*info->fprintf_func) (info->stream, "/");
985 doneany = 1;
986 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
987 first_regno = regno;
988 while (val & (1 << (regno + 1)))
989 ++regno;
990 if (regno > first_regno)
991 (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
994 else if (place == '8')
996 /* fmoveml for FP status registers */
997 (*info->fprintf_func) (info->stream, "%s",
998 fpcr_names[fetch_arg (buffer, place, 3,
999 info)]);
1001 else
1002 return -2;
1003 break;
1005 case 'X':
1006 place = '8';
1007 case 'Y':
1008 case 'Z':
1009 case 'W':
1010 case '0':
1011 case '1':
1012 case '2':
1013 case '3':
1015 int val = fetch_arg (buffer, place, 5, info);
1016 char *name = 0;
1017 switch (val)
1019 case 2: name = "%tt0"; break;
1020 case 3: name = "%tt1"; break;
1021 case 0x10: name = "%tc"; break;
1022 case 0x11: name = "%drp"; break;
1023 case 0x12: name = "%srp"; break;
1024 case 0x13: name = "%crp"; break;
1025 case 0x14: name = "%cal"; break;
1026 case 0x15: name = "%val"; break;
1027 case 0x16: name = "%scc"; break;
1028 case 0x17: name = "%ac"; break;
1029 case 0x18: name = "%psr"; break;
1030 case 0x19: name = "%pcsr"; break;
1031 case 0x1c:
1032 case 0x1d:
1034 int break_reg = ((buffer[3] >> 2) & 7);
1035 (*info->fprintf_func)
1036 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1037 break_reg);
1039 break;
1040 default:
1041 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1043 if (name)
1044 (*info->fprintf_func) (info->stream, "%s", name);
1046 break;
1048 case 'f':
1050 int fc = fetch_arg (buffer, place, 5, info);
1051 if (fc == 1)
1052 (*info->fprintf_func) (info->stream, "%%dfc");
1053 else if (fc == 0)
1054 (*info->fprintf_func) (info->stream, "%%sfc");
1055 else
1056 /* xgettext:c-format */
1057 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1059 break;
1061 case 'V':
1062 (*info->fprintf_func) (info->stream, "%%val");
1063 break;
1065 case 't':
1067 int level = fetch_arg (buffer, place, 3, info);
1068 (*info->fprintf_func) (info->stream, "%d", level);
1070 break;
1072 case 'u':
1074 short is_upper = 0;
1075 int reg = fetch_arg (buffer, place, 5, info);
1077 if (reg & 0x10)
1079 is_upper = 1;
1080 reg &= 0xf;
1082 (*info->fprintf_func) (info->stream, "%s%s",
1083 reg_names[reg],
1084 is_upper ? "u" : "l");
1086 break;
1088 default:
1089 return -2;
1092 return p - p0;
1095 /* Fetch BITS bits from a position in the instruction specified by CODE.
1096 CODE is a "place to put an argument", or 'x' for a destination
1097 that is a general address (mode and register).
1098 BUFFER contains the instruction. */
1100 static int
1101 fetch_arg (buffer, code, bits, info)
1102 unsigned char *buffer;
1103 int code;
1104 int bits;
1105 disassemble_info *info;
1107 register int val = 0;
1108 switch (code)
1110 case '/': /* MAC/EMAC mask bit. */
1111 val = buffer[3] >> 5;
1112 break;
1114 case 'G': /* EMAC ACC load. */
1115 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[2] >> 7) & 0x1);
1116 break;
1118 case 'H': /* EMAC ACC !load. */
1119 val = ((buffer[3] >> 3) & 0x2) | ((buffer[2] >> 7) & 0x1);
1120 break;
1122 case ']': /* EMAC ACCEXT bit. */
1123 val = buffer[0] >> 2;
1124 break;
1126 case 'I': /* MAC/EMAC scale factor. */
1127 val = buffer[0] >> 1;
1128 break;
1130 case 'F': /* EMAC ACCx. */
1131 val = buffer[0] >> 1;
1132 break;
1134 case 'f':
1135 val = buffer[0];
1136 break;
1138 case 's':
1139 val = buffer[1];
1140 break;
1142 case 'd': /* Destination, for register or quick. */
1143 val = (buffer[0] << 8) + buffer[1];
1144 val >>= 9;
1145 break;
1147 case 'x': /* Destination, for general arg */
1148 val = (buffer[0] << 8) + buffer[1];
1149 val >>= 6;
1150 break;
1152 case 'k':
1153 FETCH_DATA (info, buffer + 3);
1154 val = (buffer[3] >> 4);
1155 break;
1157 case 'C':
1158 FETCH_DATA (info, buffer + 3);
1159 val = buffer[3];
1160 break;
1162 case '1':
1163 FETCH_DATA (info, buffer + 3);
1164 val = (buffer[2] << 8) + buffer[3];
1165 val >>= 12;
1166 break;
1168 case '2':
1169 FETCH_DATA (info, buffer + 3);
1170 val = (buffer[2] << 8) + buffer[3];
1171 val >>= 6;
1172 break;
1174 case '3':
1175 case 'j':
1176 FETCH_DATA (info, buffer + 3);
1177 val = (buffer[2] << 8) + buffer[3];
1178 break;
1180 case '4':
1181 FETCH_DATA (info, buffer + 5);
1182 val = (buffer[4] << 8) + buffer[5];
1183 val >>= 12;
1184 break;
1186 case '5':
1187 FETCH_DATA (info, buffer + 5);
1188 val = (buffer[4] << 8) + buffer[5];
1189 val >>= 6;
1190 break;
1192 case '6':
1193 FETCH_DATA (info, buffer + 5);
1194 val = (buffer[4] << 8) + buffer[5];
1195 break;
1197 case '7':
1198 FETCH_DATA (info, buffer + 3);
1199 val = (buffer[2] << 8) + buffer[3];
1200 val >>= 7;
1201 break;
1203 case '8':
1204 FETCH_DATA (info, buffer + 3);
1205 val = (buffer[2] << 8) + buffer[3];
1206 val >>= 10;
1207 break;
1209 case '9':
1210 FETCH_DATA (info, buffer + 3);
1211 val = (buffer[2] << 8) + buffer[3];
1212 val >>= 5;
1213 break;
1215 case 'e':
1216 val = (buffer[1] >> 6);
1217 break;
1219 case 'm':
1220 val = (buffer[1] & 0x40 ? 0x8 : 0)
1221 | ((buffer[0] >> 1) & 0x7)
1222 | (buffer[3] & 0x80 ? 0x10 : 0);
1223 break;
1225 case 'n':
1226 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
1227 break;
1229 case 'o':
1230 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
1231 break;
1233 case 'M':
1234 val = buffer[1] | (buffer[3] & 0x40 ? 0x10 : 0);
1235 break;
1237 case 'N':
1238 val = buffer[3] | (buffer[3] & 0x40 ? 0x10 : 0);
1239 break;
1241 case 'h':
1242 val = buffer[2] >> 2;
1243 break;
1245 default:
1246 abort ();
1249 switch (bits)
1251 case 1:
1252 return val & 1;
1253 case 2:
1254 return val & 3;
1255 case 3:
1256 return val & 7;
1257 case 4:
1258 return val & 017;
1259 case 5:
1260 return val & 037;
1261 case 6:
1262 return val & 077;
1263 case 7:
1264 return val & 0177;
1265 case 8:
1266 return val & 0377;
1267 case 12:
1268 return val & 07777;
1269 default:
1270 abort ();
1274 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
1275 P points to extension word, in buffer.
1276 ADDR is the nominal core address of that extension word. */
1278 static unsigned char *
1279 print_indexed (basereg, p, addr, info)
1280 int basereg;
1281 unsigned char *p;
1282 bfd_vma addr;
1283 disassemble_info *info;
1285 register int word;
1286 static char *const scales[] = { "", ":2", ":4", ":8" };
1287 bfd_vma base_disp;
1288 bfd_vma outer_disp;
1289 char buf[40];
1290 char vmabuf[50];
1292 word = NEXTWORD (p);
1294 /* Generate the text for the index register.
1295 Where this will be output is not yet determined. */
1296 sprintf (buf, "%s:%c%s",
1297 reg_names[(word >> 12) & 0xf],
1298 (word & 0x800) ? 'l' : 'w',
1299 scales[(word >> 9) & 3]);
1301 /* Handle the 68000 style of indexing. */
1303 if ((word & 0x100) == 0)
1305 base_disp = word & 0xff;
1306 if ((base_disp & 0x80) != 0)
1307 base_disp -= 0x100;
1308 if (basereg == -1)
1309 base_disp += addr;
1310 print_base (basereg, base_disp, info);
1311 (*info->fprintf_func) (info->stream, ",%s)", buf);
1312 return p;
1315 /* Handle the generalized kind. */
1316 /* First, compute the displacement to add to the base register. */
1318 if (word & 0200)
1320 if (basereg == -1)
1321 basereg = -3;
1322 else
1323 basereg = -2;
1325 if (word & 0100)
1326 buf[0] = '\0';
1327 base_disp = 0;
1328 switch ((word >> 4) & 3)
1330 case 2:
1331 base_disp = NEXTWORD (p);
1332 break;
1333 case 3:
1334 base_disp = NEXTLONG (p);
1336 if (basereg == -1)
1337 base_disp += addr;
1339 /* Handle single-level case (not indirect) */
1341 if ((word & 7) == 0)
1343 print_base (basereg, base_disp, info);
1344 if (buf[0] != '\0')
1345 (*info->fprintf_func) (info->stream, ",%s", buf);
1346 (*info->fprintf_func) (info->stream, ")");
1347 return p;
1350 /* Two level. Compute displacement to add after indirection. */
1352 outer_disp = 0;
1353 switch (word & 3)
1355 case 2:
1356 outer_disp = NEXTWORD (p);
1357 break;
1358 case 3:
1359 outer_disp = NEXTLONG (p);
1362 print_base (basereg, base_disp, info);
1363 if ((word & 4) == 0 && buf[0] != '\0')
1365 (*info->fprintf_func) (info->stream, ",%s", buf);
1366 buf[0] = '\0';
1368 sprintf_vma (vmabuf, outer_disp);
1369 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
1370 if (buf[0] != '\0')
1371 (*info->fprintf_func) (info->stream, ",%s", buf);
1372 (*info->fprintf_func) (info->stream, ")");
1374 return p;
1377 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1378 REGNO = -1 for pc, -2 for none (suppressed). */
1380 static void
1381 print_base (regno, disp, info)
1382 int regno;
1383 bfd_vma disp;
1384 disassemble_info *info;
1386 if (regno == -1)
1388 (*info->fprintf_func) (info->stream, "%%pc@(");
1389 (*info->print_address_func) (disp, info);
1391 else
1393 char buf[50];
1395 if (regno == -2)
1396 (*info->fprintf_func) (info->stream, "@(");
1397 else if (regno == -3)
1398 (*info->fprintf_func) (info->stream, "%%zpc@(");
1399 else
1400 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
1402 sprintf_vma (buf, disp);
1403 (*info->fprintf_func) (info->stream, "%s", buf);