1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
6 This file is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "floatformat.h"
23 #include "libiberty.h"
26 #include "opcode/m68k.h"
28 /* Local function prototypes */
31 fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
34 dummy_print_address
PARAMS ((bfd_vma
, struct disassemble_info
*));
37 fetch_arg
PARAMS ((unsigned char *, int, int, disassemble_info
*));
40 print_base
PARAMS ((int, bfd_vma
, disassemble_info
*));
42 static unsigned char *
43 print_indexed
PARAMS ((int, unsigned char *, bfd_vma
, disassemble_info
*));
46 print_insn_arg
PARAMS ((const char *, unsigned char *, unsigned char *,
47 bfd_vma
, disassemble_info
*));
49 const char * const fpcr_names
[] = {
50 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
51 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
54 static char *const reg_names
[] = {
55 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
56 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
60 /* Sign-extend an (unsigned char). */
62 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
64 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
67 /* Get a 1 byte signed integer. */
68 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
70 /* Get a 2 byte signed integer. */
71 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
73 (p += 2, FETCH_DATA (info, p), \
74 COERCE16 ((p[-2] << 8) + p[-1]))
76 /* Get a 4 byte signed integer. */
77 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
79 (p += 4, FETCH_DATA (info, p), \
80 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
82 /* Get a 4 byte unsigned integer. */
83 #define NEXTULONG(p) \
84 (p += 4, FETCH_DATA (info, p), \
85 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
87 /* Get a single precision float. */
88 #define NEXTSINGLE(val, p) \
89 (p += 4, FETCH_DATA (info, p), \
90 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
92 /* Get a double precision float. */
93 #define NEXTDOUBLE(val, p) \
94 (p += 8, FETCH_DATA (info, p), \
95 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
97 /* Get an extended precision float. */
98 #define NEXTEXTEND(val, p) \
99 (p += 12, FETCH_DATA (info, p), \
100 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
102 /* Need a function to convert from packed to double
103 precision. Actually, it's easier to print a
104 packed number than a double anyway, so maybe
105 there should be a special case to handle this... */
106 #define NEXTPACKED(p) \
107 (p += 12, FETCH_DATA (info, p), 0.0)
109 /* Maximum length of an instruction. */
115 /* Points to first byte not fetched. */
116 bfd_byte
*max_fetched
;
117 bfd_byte the_buffer
[MAXLEN
];
122 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
123 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
125 #define FETCH_DATA(info, addr) \
126 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
127 ? 1 : fetch_data ((info), (addr)))
130 fetch_data (info
, addr
)
131 struct disassemble_info
*info
;
135 struct private *priv
= (struct private *)info
->private_data
;
136 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
138 status
= (*info
->read_memory_func
) (start
,
140 addr
- priv
->max_fetched
,
144 (*info
->memory_error_func
) (status
, start
, info
);
145 longjmp (priv
->bailout
, 1);
148 priv
->max_fetched
= addr
;
152 /* This function is used to print to the bit-bucket. */
155 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
156 const char *format ATTRIBUTE_UNUSED
, ...)
159 FILE *file ATTRIBUTE_UNUSED
;
166 dummy_print_address (vma
, info
)
167 bfd_vma vma ATTRIBUTE_UNUSED
;
168 struct disassemble_info
*info ATTRIBUTE_UNUSED
;
172 /* Print the m68k instruction at address MEMADDR in debugged memory,
173 on INFO->STREAM. Returns length of the instruction, in bytes. */
176 print_insn_m68k (memaddr
, info
)
178 disassemble_info
*info
;
181 register unsigned char *p
;
182 unsigned char *save_p
;
183 register const char *d
;
184 register unsigned long bestmask
;
185 const struct m68k_opcode
*best
;
186 unsigned int arch_mask
;
188 bfd_byte
*buffer
= priv
.the_buffer
;
189 fprintf_ftype save_printer
= info
->fprintf_func
;
190 void (*save_print_address
) PARAMS ((bfd_vma
, struct disassemble_info
*))
191 = info
->print_address_func
;
193 static int numopcodes
[16];
194 static const struct m68k_opcode
**opcodes
[16];
198 /* Speed up the matching by sorting the opcode table on the upper
199 four bits of the opcode. */
200 const struct m68k_opcode
**opc_pointer
[16];
202 /* First count how many opcodes are in each of the sixteen buckets. */
203 for (i
= 0; i
< m68k_numopcodes
; i
++)
204 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
206 /* Then create a sorted table of pointers that point into the
208 opc_pointer
[0] = ((const struct m68k_opcode
**)
209 xmalloc (sizeof (struct m68k_opcode
*)
211 opcodes
[0] = opc_pointer
[0];
212 for (i
= 1; i
< 16; i
++)
214 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
215 opcodes
[i
] = opc_pointer
[i
];
218 for (i
= 0; i
< m68k_numopcodes
; i
++)
219 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
223 info
->private_data
= (PTR
) &priv
;
224 /* Tell objdump to use two bytes per chunk and six bytes per line for
225 displaying raw data. */
226 info
->bytes_per_chunk
= 2;
227 info
->bytes_per_line
= 6;
228 info
->display_endian
= BFD_ENDIAN_BIG
;
229 priv
.max_fetched
= priv
.the_buffer
;
230 priv
.insn_start
= memaddr
;
231 if (setjmp (priv
.bailout
) != 0)
240 arch_mask
= (unsigned int) -1;
242 case bfd_mach_m68000
:
245 case bfd_mach_m68008
:
248 case bfd_mach_m68010
:
251 case bfd_mach_m68020
:
254 case bfd_mach_m68030
:
257 case bfd_mach_m68040
:
260 case bfd_mach_m68060
:
263 case bfd_mach_mcf5200
:
266 case bfd_mach_mcf528x
:
267 arch_mask
= mcf528x
| mcfmac
;
269 case bfd_mach_mcf5206e
:
270 arch_mask
= mcf5206e
| mcfmac
;
272 case bfd_mach_mcf5307
:
273 arch_mask
= mcf5307
| mcfmac
;
275 case bfd_mach_mcf5407
:
276 arch_mask
= mcf5407
| mcfmac
;
278 case bfd_mach_mcfv4e
:
279 arch_mask
= mcfv4e
| mcfemac
;
283 arch_mask
|= m68881
| m68851
;
286 FETCH_DATA (info
, buffer
+ 2);
287 major_opcode
= (buffer
[0] >> 4) & 15;
288 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
290 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
291 unsigned long opcode
= opc
->opcode
;
292 unsigned long match
= opc
->match
;
294 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
295 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
296 /* Only fetch the next two bytes if we need to. */
297 && (((0xffff & match
) == 0)
299 (FETCH_DATA (info
, buffer
+ 4)
300 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
301 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
303 && (opc
->arch
& arch_mask
) != 0)
305 /* Don't use for printout the variants of divul and divsl
306 that have the same register number in two places.
307 The more general variants will match instead. */
308 for (d
= opc
->args
; *d
; d
+= 2)
312 /* Don't use for printout the variants of most floating
313 point coprocessor instructions which use the same
314 register number in two places, as above. */
316 for (d
= opc
->args
; *d
; d
+= 2)
320 /* Don't match fmovel with more than one register; wait for
324 for (d
= opc
->args
; *d
; d
+= 2)
326 if (d
[0] == 's' && d
[1] == '8')
330 val
= fetch_arg (buffer
, d
[1], 3, info
);
331 if ((val
& (val
- 1)) != 0)
337 if (*d
== '\0' && match
> bestmask
)
348 /* Point at first word of argument data,
349 and at descriptor for first argument. */
352 /* Figure out how long the fixed-size portion of the instruction is.
353 The only place this is stored in the opcode table is
354 in the arguments--look for arguments which specify fields in the 2nd
355 or 3rd words of the instruction. */
356 for (d
= best
->args
; *d
; d
+= 2)
358 /* I don't think it is necessary to be checking d[0] here; I suspect
359 all this could be moved to the case statement below. */
362 if (d
[1] == 'l' && p
- buffer
< 6)
364 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
367 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
392 /* pflusha is an exceptions. It takes no arguments but is two words
393 long. Recognize it by looking at the lower 16 bits of the mask. */
394 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
397 /* lpstop is another exception. It takes a one word argument but is
400 && (best
->match
& 0xffff) == 0xffff
401 && best
->args
[0] == '#'
402 && best
->args
[1] == 'w')
404 /* Copy the one word argument into the usual location for a one
405 word argument, to simplify printing it. We can get away with
406 this because we know exactly what the second word is, and we
407 aren't going to print anything based on it. */
409 FETCH_DATA (info
, p
);
410 buffer
[2] = buffer
[4];
411 buffer
[3] = buffer
[5];
414 FETCH_DATA (info
, p
);
418 /* We scan the operands twice. The first time we don't print anything,
419 but look for errors. */
422 info
->print_address_func
= dummy_print_address
;
423 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
426 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
429 else if (eaten
== -1)
433 (*info
->fprintf_func
) (info
->stream
,
434 /* xgettext:c-format */
435 _("<internal error in opcode table: %s %s>\n"),
443 info
->fprintf_func
= save_printer
;
444 info
->print_address_func
= save_print_address
;
448 (*info
->fprintf_func
) (info
->stream
, "%s", best
->name
);
451 (*info
->fprintf_func
) (info
->stream
, " ");
455 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
457 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
458 (*info
->fprintf_func
) (info
->stream
, ",");
463 /* Handle undefined instructions. */
464 info
->fprintf_func
= save_printer
;
465 info
->print_address_func
= save_print_address
;
466 (*info
->fprintf_func
) (info
->stream
, "0%o",
467 (buffer
[0] << 8) + buffer
[1]);
471 /* Returns number of bytes "eaten" by the operand, or
472 return -1 if an invalid operand was found, or -2 if
473 an opcode tabe error was found. */
476 print_insn_arg (d
, buffer
, p0
, addr
, info
)
478 unsigned char *buffer
;
480 bfd_vma addr
; /* PC for this arg to be relative to */
481 disassemble_info
*info
;
483 register int val
= 0;
484 register int place
= d
[1];
485 register unsigned char *p
= p0
;
487 register const char *regname
;
488 register unsigned char *p1
;
496 case 'c': /* cache identifier */
498 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
499 val
= fetch_arg (buffer
, place
, 2, info
);
500 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
504 case 'a': /* address register indirect only. Cf. case '+'. */
506 (*info
->fprintf_func
)
509 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
513 case '_': /* 32-bit absolute address for move16. */
515 uval
= NEXTULONG (p
);
516 (*info
->print_address_func
) (uval
, info
);
521 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
525 (*info
->fprintf_func
) (info
->stream
, "%%sr");
529 (*info
->fprintf_func
) (info
->stream
, "%%usp");
533 (*info
->fprintf_func
) (info
->stream
, "%%acc");
537 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
541 (*info
->fprintf_func
) (info
->stream
, "%%mask");
546 /* FIXME: There's a problem here, different m68k processors call the
547 same address different names. This table can't get it right
548 because it doesn't know which processor it's disassembling for. */
549 static const struct { char *name
; int value
; } names
[]
550 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
551 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
552 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
553 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
554 {"%msp", 0x803}, {"%isp", 0x804},
555 {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
557 /* Should we be calling this psr like we do in case 'Y'? */
560 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
562 val
= fetch_arg (buffer
, place
, 12, info
);
563 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
564 if (names
[regno
].value
== val
)
566 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
570 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
575 val
= fetch_arg (buffer
, place
, 3, info
);
576 /* 0 means 8, except for the bkpt instruction... */
577 if (val
== 0 && d
[1] != 's')
579 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
583 val
= fetch_arg (buffer
, place
, 3, info
);
587 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
593 static char *const scalefactor_name
[] = { "<<", ">>" };
594 val
= fetch_arg (buffer
, place
, 1, info
);
595 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
599 val
= fetch_arg (buffer
, place
, 8, info
);
602 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
607 val
= fetch_arg (buffer
, place
, 4, info
);
608 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
612 (*info
->fprintf_func
) (info
->stream
, "%s",
613 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
617 (*info
->fprintf_func
)
619 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
623 (*info
->fprintf_func
)
625 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
629 regno
= fetch_arg (buffer
, place
, 4, info
);
631 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
633 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
637 (*info
->fprintf_func
)
638 (info
->stream
, "%%fp%d",
639 fetch_arg (buffer
, place
, 3, info
));
643 val
= fetch_arg (buffer
, place
, 6, info
);
645 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
647 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
651 (*info
->fprintf_func
)
652 (info
->stream
, "%s@+",
653 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
657 (*info
->fprintf_func
)
658 (info
->stream
, "%s@-",
659 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
664 (*info
->fprintf_func
)
665 (info
->stream
, "{%s}",
666 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
667 else if (place
== 'C')
669 val
= fetch_arg (buffer
, place
, 7, info
);
670 if (val
> 63) /* This is a signed constant. */
672 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
680 p1
= buffer
+ (*d
== '#' ? 2 : 4);
682 val
= fetch_arg (buffer
, place
, 4, info
);
683 else if (place
== 'C')
684 val
= fetch_arg (buffer
, place
, 7, info
);
685 else if (place
== '8')
686 val
= fetch_arg (buffer
, place
, 3, info
);
687 else if (place
== '3')
688 val
= fetch_arg (buffer
, place
, 8, info
);
689 else if (place
== 'b')
691 else if (place
== 'w' || place
== 'W')
693 else if (place
== 'l')
697 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
703 else if (place
== 'B')
704 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
705 else if (place
== 'w' || place
== 'W')
707 else if (place
== 'l' || place
== 'L' || place
== 'C')
709 else if (place
== 'g')
711 disp
= NEXTBYTE (buffer
);
717 else if (place
== 'c')
719 if (buffer
[1] & 0x40) /* If bit six is one, long offset */
727 (*info
->print_address_func
) (addr
+ disp
, info
);
732 (*info
->fprintf_func
)
733 (info
->stream
, "%s@(%d)",
734 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8], val
);
738 (*info
->fprintf_func
) (info
->stream
, "%s",
739 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
743 val
= fetch_arg(buffer
, place
, 2, info
);
744 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
748 val
= fetch_arg(buffer
, place
, 2, info
);
749 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
==0 ? "01" : "23");
753 val
= fetch_arg(buffer
, place
, 2, info
);
755 (*info
->fprintf_func
) (info
->stream
, "<<");
757 (*info
->fprintf_func
) (info
->stream
, ">>");
761 /* Get coprocessor ID... */
762 val
= fetch_arg (buffer
, 'd', 3, info
);
764 if (val
!= 1) /* Unusual coprocessor ID? */
765 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
794 val
= fetch_arg (buffer
, 'x', 6, info
);
795 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
798 val
= fetch_arg (buffer
, 's', 6, info
);
800 /* Get register number assuming address register. */
801 regno
= (val
& 7) + 8;
802 regname
= reg_names
[regno
];
806 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
810 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
814 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
818 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
822 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
827 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
831 p
= print_indexed (regno
, p
, addr
, info
);
839 (*info
->print_address_func
) (val
, info
);
843 uval
= NEXTULONG (p
);
844 (*info
->print_address_func
) (uval
, info
);
849 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
850 (*info
->print_address_func
) (addr
+ val
, info
);
851 (*info
->fprintf_func
) (info
->stream
, ")");
855 p
= print_indexed (-1, p
, addr
, info
);
859 flt_p
= 1; /* Assume it's a float... */
878 NEXTSINGLE (flval
, p
);
882 NEXTDOUBLE (flval
, p
);
886 NEXTEXTEND (flval
, p
);
890 flval
= NEXTPACKED (p
);
896 if (flt_p
) /* Print a float? */
897 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
899 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
907 /* If place is '/', then this is the case of the mask bit for
908 mac/emac loads. Now that the arg has been printed, grab the
909 mask bit and if set, add a '&' to the arg. */
912 val
= fetch_arg (buffer
, place
, 1, info
);
914 (*info
->fprintf_func
) (info
->stream
, "&");
925 /* Move the pointer ahead if this point is farther ahead
930 (*info
->fprintf_func
) (info
->stream
, "#0");
935 register int newval
= 0;
936 for (regno
= 0; regno
< 16; ++regno
)
937 if (val
& (0x8000 >> regno
))
938 newval
|= 1 << regno
;
943 for (regno
= 0; regno
< 16; ++regno
)
944 if (val
& (1 << regno
))
948 (*info
->fprintf_func
) (info
->stream
, "/");
950 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
952 while (val
& (1 << (regno
+ 1)))
954 if (regno
> first_regno
)
955 (*info
->fprintf_func
) (info
->stream
, "-%s",
959 else if (place
== '3')
963 val
= fetch_arg (buffer
, place
, 8, info
);
966 (*info
->fprintf_func
) (info
->stream
, "#0");
971 register int newval
= 0;
972 for (regno
= 0; regno
< 8; ++regno
)
973 if (val
& (0x80 >> regno
))
974 newval
|= 1 << regno
;
979 for (regno
= 0; regno
< 8; ++regno
)
980 if (val
& (1 << regno
))
984 (*info
->fprintf_func
) (info
->stream
, "/");
986 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
988 while (val
& (1 << (regno
+ 1)))
990 if (regno
> first_regno
)
991 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
994 else if (place
== '8')
996 /* fmoveml for FP status registers */
997 (*info
->fprintf_func
) (info
->stream
, "%s",
998 fpcr_names
[fetch_arg (buffer
, place
, 3,
1015 int val
= fetch_arg (buffer
, place
, 5, info
);
1019 case 2: name
= "%tt0"; break;
1020 case 3: name
= "%tt1"; break;
1021 case 0x10: name
= "%tc"; break;
1022 case 0x11: name
= "%drp"; break;
1023 case 0x12: name
= "%srp"; break;
1024 case 0x13: name
= "%crp"; break;
1025 case 0x14: name
= "%cal"; break;
1026 case 0x15: name
= "%val"; break;
1027 case 0x16: name
= "%scc"; break;
1028 case 0x17: name
= "%ac"; break;
1029 case 0x18: name
= "%psr"; break;
1030 case 0x19: name
= "%pcsr"; break;
1034 int break_reg
= ((buffer
[3] >> 2) & 7);
1035 (*info
->fprintf_func
)
1036 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1041 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1044 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1050 int fc
= fetch_arg (buffer
, place
, 5, info
);
1052 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1054 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1056 /* xgettext:c-format */
1057 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1062 (*info
->fprintf_func
) (info
->stream
, "%%val");
1067 int level
= fetch_arg (buffer
, place
, 3, info
);
1068 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1075 int reg
= fetch_arg (buffer
, place
, 5, info
);
1082 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1084 is_upper
? "u" : "l");
1095 /* Fetch BITS bits from a position in the instruction specified by CODE.
1096 CODE is a "place to put an argument", or 'x' for a destination
1097 that is a general address (mode and register).
1098 BUFFER contains the instruction. */
1101 fetch_arg (buffer
, code
, bits
, info
)
1102 unsigned char *buffer
;
1105 disassemble_info
*info
;
1107 register int val
= 0;
1110 case '/': /* MAC/EMAC mask bit. */
1111 val
= buffer
[3] >> 5;
1114 case 'G': /* EMAC ACC load. */
1115 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[2] >> 7) & 0x1);
1118 case 'H': /* EMAC ACC !load. */
1119 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[2] >> 7) & 0x1);
1122 case ']': /* EMAC ACCEXT bit. */
1123 val
= buffer
[0] >> 2;
1126 case 'I': /* MAC/EMAC scale factor. */
1127 val
= buffer
[0] >> 1;
1130 case 'F': /* EMAC ACCx. */
1131 val
= buffer
[0] >> 1;
1142 case 'd': /* Destination, for register or quick. */
1143 val
= (buffer
[0] << 8) + buffer
[1];
1147 case 'x': /* Destination, for general arg */
1148 val
= (buffer
[0] << 8) + buffer
[1];
1153 FETCH_DATA (info
, buffer
+ 3);
1154 val
= (buffer
[3] >> 4);
1158 FETCH_DATA (info
, buffer
+ 3);
1163 FETCH_DATA (info
, buffer
+ 3);
1164 val
= (buffer
[2] << 8) + buffer
[3];
1169 FETCH_DATA (info
, buffer
+ 3);
1170 val
= (buffer
[2] << 8) + buffer
[3];
1176 FETCH_DATA (info
, buffer
+ 3);
1177 val
= (buffer
[2] << 8) + buffer
[3];
1181 FETCH_DATA (info
, buffer
+ 5);
1182 val
= (buffer
[4] << 8) + buffer
[5];
1187 FETCH_DATA (info
, buffer
+ 5);
1188 val
= (buffer
[4] << 8) + buffer
[5];
1193 FETCH_DATA (info
, buffer
+ 5);
1194 val
= (buffer
[4] << 8) + buffer
[5];
1198 FETCH_DATA (info
, buffer
+ 3);
1199 val
= (buffer
[2] << 8) + buffer
[3];
1204 FETCH_DATA (info
, buffer
+ 3);
1205 val
= (buffer
[2] << 8) + buffer
[3];
1210 FETCH_DATA (info
, buffer
+ 3);
1211 val
= (buffer
[2] << 8) + buffer
[3];
1216 val
= (buffer
[1] >> 6);
1220 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
1221 | ((buffer
[0] >> 1) & 0x7)
1222 | (buffer
[3] & 0x80 ? 0x10 : 0);
1226 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
1230 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
1234 val
= buffer
[1] | (buffer
[3] & 0x40 ? 0x10 : 0);
1238 val
= buffer
[3] | (buffer
[3] & 0x40 ? 0x10 : 0);
1242 val
= buffer
[2] >> 2;
1274 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
1275 P points to extension word, in buffer.
1276 ADDR is the nominal core address of that extension word. */
1278 static unsigned char *
1279 print_indexed (basereg
, p
, addr
, info
)
1283 disassemble_info
*info
;
1286 static char *const scales
[] = { "", ":2", ":4", ":8" };
1292 word
= NEXTWORD (p
);
1294 /* Generate the text for the index register.
1295 Where this will be output is not yet determined. */
1296 sprintf (buf
, "%s:%c%s",
1297 reg_names
[(word
>> 12) & 0xf],
1298 (word
& 0x800) ? 'l' : 'w',
1299 scales
[(word
>> 9) & 3]);
1301 /* Handle the 68000 style of indexing. */
1303 if ((word
& 0x100) == 0)
1305 base_disp
= word
& 0xff;
1306 if ((base_disp
& 0x80) != 0)
1310 print_base (basereg
, base_disp
, info
);
1311 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
1315 /* Handle the generalized kind. */
1316 /* First, compute the displacement to add to the base register. */
1328 switch ((word
>> 4) & 3)
1331 base_disp
= NEXTWORD (p
);
1334 base_disp
= NEXTLONG (p
);
1339 /* Handle single-level case (not indirect) */
1341 if ((word
& 7) == 0)
1343 print_base (basereg
, base_disp
, info
);
1345 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1346 (*info
->fprintf_func
) (info
->stream
, ")");
1350 /* Two level. Compute displacement to add after indirection. */
1356 outer_disp
= NEXTWORD (p
);
1359 outer_disp
= NEXTLONG (p
);
1362 print_base (basereg
, base_disp
, info
);
1363 if ((word
& 4) == 0 && buf
[0] != '\0')
1365 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1368 sprintf_vma (vmabuf
, outer_disp
);
1369 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
1371 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1372 (*info
->fprintf_func
) (info
->stream
, ")");
1377 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1378 REGNO = -1 for pc, -2 for none (suppressed). */
1381 print_base (regno
, disp
, info
)
1384 disassemble_info
*info
;
1388 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1389 (*info
->print_address_func
) (disp
, info
);
1396 (*info
->fprintf_func
) (info
->stream
, "@(");
1397 else if (regno
== -3)
1398 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
1400 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
1402 sprintf_vma (buf
, disp
);
1403 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);