1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
31 #include "libiberty.h"
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
41 struct funcvec_hash_entry
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root
;
46 /* The offset within the vectors section where
51 struct funcvec_hash_table
53 /* The basic hash table. */
54 struct bfd_hash_table root
;
58 /* Offset at which we'll add the next entry. */
62 static struct bfd_hash_entry
*
64 (struct bfd_hash_entry
*, struct bfd_hash_table
*, const char *);
67 funcvec_hash_table_init
68 (struct funcvec_hash_table
*, bfd
*,
69 struct bfd_hash_entry
*(*) (struct bfd_hash_entry
*,
70 struct bfd_hash_table
*,
73 static bfd_reloc_status_type special
74 (bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **);
75 static int select_reloc
77 static void rtype2howto
78 (arelent
*, struct internal_reloc
*);
79 static void reloc_processing
80 (arelent
*, struct internal_reloc
*, asymbol
**, bfd
*, asection
*);
81 static bfd_boolean h8300_symbol_address_p
82 (bfd
*, asection
*, bfd_vma
);
83 static int h8300_reloc16_estimate
84 (bfd
*, asection
*, arelent
*, unsigned int,
85 struct bfd_link_info
*);
86 static void h8300_reloc16_extra_cases
87 (bfd
*, struct bfd_link_info
*, struct bfd_link_order
*, arelent
*,
88 bfd_byte
*, unsigned int *, unsigned int *);
89 static bfd_boolean h8300_bfd_link_add_symbols
90 (bfd
*, struct bfd_link_info
*);
92 /* To lookup a value in the function vector hash table. */
93 #define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
97 /* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
101 struct h8300_coff_link_hash_table
{
102 /* The main hash table. */
103 struct generic_link_hash_table root
;
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection
*vectors_sec
;
109 /* Hash table of the functions we need to enter into the function
111 struct funcvec_hash_table
*funcvec_hash_table
;
114 static struct bfd_link_hash_table
*h8300_coff_link_hash_table_create (bfd
*);
116 /* Get the H8/300 COFF linker hash table from a link_info structure. */
118 #define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
121 /* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
124 static struct bfd_hash_entry
*
125 funcvec_hash_newfunc (struct bfd_hash_entry
*entry
,
126 struct bfd_hash_table
*gen_table
,
129 struct funcvec_hash_entry
*ret
;
130 struct funcvec_hash_table
*table
;
132 ret
= (struct funcvec_hash_entry
*) entry
;
133 table
= (struct funcvec_hash_table
*) gen_table
;
135 /* Allocate the structure if it has not already been allocated by a
138 ret
= ((struct funcvec_hash_entry
*)
139 bfd_hash_allocate (gen_table
,
140 sizeof (struct funcvec_hash_entry
)));
144 /* Call the allocation method of the superclass. */
145 ret
= ((struct funcvec_hash_entry
*)
146 bfd_hash_newfunc ((struct bfd_hash_entry
*) ret
, gen_table
, string
));
151 /* Note where this entry will reside in the function vector table. */
152 ret
->offset
= table
->offset
;
154 /* Bump the offset at which we store entries in the function
155 vector. We'd like to bump up the size of the vectors section,
156 but it's not easily available here. */
157 switch (bfd_get_mach (table
->abfd
))
160 case bfd_mach_h8300hn
:
161 case bfd_mach_h8300sn
:
164 case bfd_mach_h8300h
:
165 case bfd_mach_h8300s
:
172 /* Everything went OK. */
173 return (struct bfd_hash_entry
*) ret
;
176 /* Initialize the function vector hash table. */
179 funcvec_hash_table_init (struct funcvec_hash_table
*table
,
181 struct bfd_hash_entry
*(*newfunc
)
182 (struct bfd_hash_entry
*,
183 struct bfd_hash_table
*,
186 /* Initialize our local fields, then call the generic initialization
190 return (bfd_hash_table_init (&table
->root
, newfunc
));
193 /* Create the derived linker hash table. We use a derived hash table
194 basically to hold "static" information during an H8/300 coff link
195 without using static variables. */
197 static struct bfd_link_hash_table
*
198 h8300_coff_link_hash_table_create (bfd
*abfd
)
200 struct h8300_coff_link_hash_table
*ret
;
201 bfd_size_type amt
= sizeof (struct h8300_coff_link_hash_table
);
203 ret
= (struct h8300_coff_link_hash_table
*) bfd_malloc (amt
);
206 if (!_bfd_link_hash_table_init (&ret
->root
.root
, abfd
,
207 _bfd_generic_link_hash_newfunc
))
213 /* Initialize our data. */
214 ret
->vectors_sec
= NULL
;
215 ret
->funcvec_hash_table
= NULL
;
217 /* OK. Everything's initialized, return the base pointer. */
218 return &ret
->root
.root
;
221 /* Special handling for H8/300 relocs.
222 We only come here for pcrel stuff and return normally if not an -r link.
223 When doing -r, we can't do any arithmetic for the pcrel stuff, because
224 the code in reloc.c assumes that we can manipulate the targets of
225 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
226 which means that the gap after the instruction may not be enough to
227 contain the offset required for the branch, so we have to use only
228 the addend until the final link. */
230 static bfd_reloc_status_type
231 special (bfd
*abfd ATTRIBUTE_UNUSED
,
232 arelent
*reloc_entry ATTRIBUTE_UNUSED
,
233 asymbol
*symbol ATTRIBUTE_UNUSED
,
234 PTR data ATTRIBUTE_UNUSED
,
235 asection
*input_section ATTRIBUTE_UNUSED
,
237 char **error_message ATTRIBUTE_UNUSED
)
239 if (output_bfd
== (bfd
*) NULL
)
240 return bfd_reloc_continue
;
242 /* Adjust the reloc address to that in the output section. */
243 reloc_entry
->address
+= input_section
->output_offset
;
247 static reloc_howto_type howto_table
[] = {
248 HOWTO (R_RELBYTE
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "8", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
249 HOWTO (R_RELWORD
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "16", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
250 HOWTO (R_RELLONG
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "32", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
251 HOWTO (R_PCRBYTE
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "DISP8", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
252 HOWTO (R_PCRWORD
, 0, 1, 16, TRUE
, 0, complain_overflow_signed
, special
, "DISP16", FALSE
, 0x0000ffff, 0x0000ffff, TRUE
),
253 HOWTO (R_PCRLONG
, 0, 2, 32, TRUE
, 0, complain_overflow_signed
, special
, "DISP32", FALSE
, 0xffffffff, 0xffffffff, TRUE
),
254 HOWTO (R_MOV16B1
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxable mov.b:16", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
255 HOWTO (R_MOV16B2
, 0, 1, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxed mov.b:16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
256 HOWTO (R_JMP1
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "16/pcrel", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
257 HOWTO (R_JMP2
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "pcrecl/16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
258 HOWTO (R_JMPL1
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "24/pcrell", FALSE
, 0x00ffffff, 0x00ffffff, FALSE
),
259 HOWTO (R_JMPL2
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "pc8/24", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
260 HOWTO (R_MOV24B1
, 0, 1, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxable mov.b:24", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
261 HOWTO (R_MOV24B2
, 0, 1, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxed mov.b:24", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
263 /* An indirect reference to a function. This causes the function's address
264 to be added to the function vector in lo-mem and puts the address of
265 the function vector's entry in the jsr instruction. */
266 HOWTO (R_MEM_INDIRECT
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "8/indirect", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
268 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative
269 branch is turned into an 8-bit pc-relative branch. */
270 HOWTO (R_PCRWORD_B
, 0, 0, 8, TRUE
, 0, complain_overflow_bitfield
, special
, "relaxed bCC:16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
272 HOWTO (R_MOVL1
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
,special
, "32/24 relaxable move", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
274 HOWTO (R_MOVL2
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "32/24 relaxed move", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
276 HOWTO (R_BCC_INV
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "DISP8 inverted", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
278 HOWTO (R_JMP_DEL
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "Deleted jump", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
281 /* Turn a howto into a reloc number. */
283 #define SELECT_RELOC(x,howto) \
284 { x.r_type = select_reloc (howto); }
286 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
287 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
288 #define H8300 1 /* Customize coffcode.h */
289 #define __A_MAGIC_SET__
291 /* Code to swap in the reloc. */
292 #define SWAP_IN_RELOC_OFFSET H_GET_32
293 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
294 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
295 dst->r_stuff[0] = 'S'; \
296 dst->r_stuff[1] = 'C';
299 select_reloc (reloc_howto_type
*howto
)
304 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
307 rtype2howto (arelent
*internal
, struct internal_reloc
*dst
)
312 internal
->howto
= howto_table
+ 0;
315 internal
->howto
= howto_table
+ 1;
318 internal
->howto
= howto_table
+ 2;
321 internal
->howto
= howto_table
+ 3;
324 internal
->howto
= howto_table
+ 4;
327 internal
->howto
= howto_table
+ 5;
330 internal
->howto
= howto_table
+ 6;
333 internal
->howto
= howto_table
+ 7;
336 internal
->howto
= howto_table
+ 8;
339 internal
->howto
= howto_table
+ 9;
342 internal
->howto
= howto_table
+ 10;
345 internal
->howto
= howto_table
+ 11;
348 internal
->howto
= howto_table
+ 12;
351 internal
->howto
= howto_table
+ 13;
354 internal
->howto
= howto_table
+ 14;
357 internal
->howto
= howto_table
+ 15;
360 internal
->howto
= howto_table
+ 16;
363 internal
->howto
= howto_table
+ 17;
366 internal
->howto
= howto_table
+ 18;
369 internal
->howto
= howto_table
+ 19;
377 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
379 /* Perform any necessary magic to the addend in a reloc entry. */
381 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
382 cache_ptr->addend = ext_reloc.r_offset;
384 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
385 reloc_processing (relent, reloc, symbols, abfd, section)
388 reloc_processing (arelent
*relent
, struct internal_reloc
*reloc
,
389 asymbol
**symbols
, bfd
*abfd
, asection
*section
)
391 relent
->address
= reloc
->r_vaddr
;
392 rtype2howto (relent
, reloc
);
394 if (((int) reloc
->r_symndx
) > 0)
395 relent
->sym_ptr_ptr
= symbols
+ obj_convert (abfd
)[reloc
->r_symndx
];
397 relent
->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
399 relent
->addend
= reloc
->r_offset
;
401 relent
->address
-= section
->vma
;
408 h8300_symbol_address_p (bfd
*abfd
, asection
*input_section
, bfd_vma address
)
412 s
= _bfd_generic_link_get_symbols (abfd
);
413 BFD_ASSERT (s
!= (asymbol
**) NULL
);
415 /* Search all the symbols for one in INPUT_SECTION with
421 if (p
->section
== input_section
422 && (input_section
->output_section
->vma
423 + input_section
->output_offset
424 + p
->value
) == address
)
431 /* If RELOC represents a relaxable instruction/reloc, change it into
432 the relaxed reloc, notify the linker that symbol addresses
433 have changed (bfd_perform_slip) and return how much the current
434 section has shrunk by.
436 FIXME: Much of this code has knowledge of the ordering of entries
437 in the howto table. This needs to be fixed. */
440 h8300_reloc16_estimate (bfd
*abfd
, asection
*input_section
, arelent
*reloc
,
441 unsigned int shrink
, struct bfd_link_info
*link_info
)
446 static asection
*last_input_section
= NULL
;
447 static arelent
*last_reloc
= NULL
;
449 /* The address of the thing to be relocated will have moved back by
450 the size of the shrink - but we don't change reloc->address here,
451 since we need it to know where the relocation lives in the source
453 bfd_vma address
= reloc
->address
- shrink
;
455 if (input_section
!= last_input_section
)
458 /* Only examine the relocs which might be relaxable. */
459 switch (reloc
->howto
->type
)
461 /* This is the 16-/24-bit absolute branch which could become an
462 8-bit pc-relative branch. */
465 /* Get the address of the target of this branch. */
466 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
468 /* Get the address of the next instruction (not the reloc). */
469 dot
= (input_section
->output_section
->vma
470 + input_section
->output_offset
+ address
);
472 /* Adjust for R_JMP1 vs R_JMPL1. */
473 dot
+= (reloc
->howto
->type
== R_JMP1
? 1 : 2);
475 /* Compute the distance from this insn to the branch target. */
478 /* If the distance is within -128..+128 inclusive, then we can relax
479 this jump. +128 is valid since the target will move two bytes
480 closer if we do relax this branch. */
481 if ((int) gap
>= -128 && (int) gap
<= 128)
485 if (!bfd_get_section_contents (abfd
, input_section
, & code
,
488 code
= bfd_get_8 (abfd
, & code
);
490 /* It's possible we may be able to eliminate this branch entirely;
491 if the previous instruction is a branch around this instruction,
492 and there's no label at this instruction, then we can reverse
493 the condition on the previous branch and eliminate this jump.
500 This saves 4 bytes instead of two, and should be relatively
503 Only perform this optimisation for jumps (code 0x5a) not
504 subroutine calls, as otherwise it could transform:
517 which changes the call (jsr) into a branch (bne). */
521 && last_reloc
->howto
->type
== R_PCRBYTE
)
524 last_value
= bfd_coff_reloc16_get_value (last_reloc
, link_info
,
527 if (last_value
== dot
+ 2
528 && last_reloc
->address
+ 1 == reloc
->address
529 && !h8300_symbol_address_p (abfd
, input_section
, dot
- 2))
531 reloc
->howto
= howto_table
+ 19;
532 last_reloc
->howto
= howto_table
+ 18;
533 last_reloc
->sym_ptr_ptr
= reloc
->sym_ptr_ptr
;
534 last_reloc
->addend
= reloc
->addend
;
536 bfd_perform_slip (abfd
, 4, input_section
, address
);
541 /* Change the reloc type. */
542 reloc
->howto
= reloc
->howto
+ 1;
544 /* This shrinks this section by two bytes. */
546 bfd_perform_slip (abfd
, 2, input_section
, address
);
550 /* This is the 16-bit pc-relative branch which could become an 8-bit
551 pc-relative branch. */
553 /* Get the address of the target of this branch, add one to the value
554 because the addend field in PCrel jumps is off by -1. */
555 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
) + 1;
557 /* Get the address of the next instruction if we were to relax. */
558 dot
= input_section
->output_section
->vma
+
559 input_section
->output_offset
+ address
;
561 /* Compute the distance from this insn to the branch target. */
564 /* If the distance is within -128..+128 inclusive, then we can relax
565 this jump. +128 is valid since the target will move two bytes
566 closer if we do relax this branch. */
567 if ((int) gap
>= -128 && (int) gap
<= 128)
569 /* Change the reloc type. */
570 reloc
->howto
= howto_table
+ 15;
572 /* This shrinks this section by two bytes. */
574 bfd_perform_slip (abfd
, 2, input_section
, address
);
578 /* This is a 16-bit absolute address in a mov.b insn, which can
579 become an 8-bit absolute address if it's in the right range. */
581 /* Get the address of the data referenced by this mov.b insn. */
582 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
583 value
= bfd_h8300_pad_address (abfd
, value
);
585 /* If the address is in the top 256 bytes of the address space
586 then we can relax this instruction. */
587 if (value
>= 0xffffff00u
)
589 /* Change the reloc type. */
590 reloc
->howto
= reloc
->howto
+ 1;
592 /* This shrinks this section by two bytes. */
594 bfd_perform_slip (abfd
, 2, input_section
, address
);
598 /* Similarly for a 24-bit absolute address in a mov.b. Note that
599 if we can't relax this into an 8-bit absolute, we'll fall through
600 and try to relax it into a 16-bit absolute. */
602 /* Get the address of the data referenced by this mov.b insn. */
603 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
604 value
= bfd_h8300_pad_address (abfd
, value
);
606 if (value
>= 0xffffff00u
)
608 /* Change the reloc type. */
609 reloc
->howto
= reloc
->howto
+ 1;
611 /* This shrinks this section by four bytes. */
613 bfd_perform_slip (abfd
, 4, input_section
, address
);
615 /* Done with this reloc. */
619 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
622 /* This is a 24-/32-bit absolute address in a mov insn, which can
623 become an 16-bit absolute address if it's in the right range. */
625 /* Get the address of the data referenced by this mov insn. */
626 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
627 value
= bfd_h8300_pad_address (abfd
, value
);
629 /* If the address is a sign-extended 16-bit value then we can
630 relax this instruction. */
631 if (value
<= 0x7fff || value
>= 0xffff8000u
)
633 /* Change the reloc type. */
634 reloc
->howto
= howto_table
+ 17;
636 /* This shrinks this section by two bytes. */
638 bfd_perform_slip (abfd
, 2, input_section
, address
);
642 /* No other reloc types represent relaxing opportunities. */
648 last_input_section
= input_section
;
652 /* Handle relocations for the H8/300, including relocs for relaxed
655 FIXME: Not all relocations check for overflow! */
658 h8300_reloc16_extra_cases (bfd
*abfd
, struct bfd_link_info
*link_info
,
659 struct bfd_link_order
*link_order
, arelent
*reloc
,
660 bfd_byte
*data
, unsigned int *src_ptr
,
661 unsigned int *dst_ptr
)
663 unsigned int src_address
= *src_ptr
;
664 unsigned int dst_address
= *dst_ptr
;
665 asection
*input_section
= link_order
->u
.indirect
.section
;
669 unsigned char temp_code
;
671 switch (reloc
->howto
->type
)
673 /* Generic 8-bit pc-relative relocation. */
675 /* Get the address of the target of this branch. */
676 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
678 dot
= (link_order
->offset
680 + link_order
->u
.indirect
.section
->output_section
->vma
);
685 if (gap
< -128 || gap
> 126)
687 if (! ((*link_info
->callbacks
->reloc_overflow
)
688 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
689 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
690 input_section
, reloc
->address
)))
694 /* Everything looks OK. Apply the relocation and update the
695 src/dst address appropriately. */
696 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
703 /* Generic 16-bit pc-relative relocation. */
705 /* Get the address of the target of this branch. */
706 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
708 /* Get the address of the instruction (not the reloc). */
709 dot
= (link_order
->offset
711 + link_order
->u
.indirect
.section
->output_section
->vma
+ 1);
716 if (gap
> 32766 || gap
< -32768)
718 if (! ((*link_info
->callbacks
->reloc_overflow
)
719 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
720 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
721 input_section
, reloc
->address
)))
725 /* Everything looks OK. Apply the relocation and update the
726 src/dst address appropriately. */
727 bfd_put_16 (abfd
, (bfd_vma
) gap
, data
+ dst_address
);
734 /* Generic 8-bit absolute relocation. */
736 /* Get the address of the object referenced by this insn. */
737 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
739 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
);
746 /* Various simple 16-bit absolute relocations. */
750 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
751 bfd_put_16 (abfd
, value
, data
+ dst_address
);
756 /* Various simple 24-/32-bit absolute relocations. */
760 /* Get the address of the target of this branch. */
761 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
762 bfd_put_32 (abfd
, value
, data
+ dst_address
);
767 /* Another 24-/32-bit absolute relocation. */
769 /* Get the address of the target of this branch. */
770 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
772 value
= ((value
& 0x00ffffff)
773 | (bfd_get_32 (abfd
, data
+ src_address
) & 0xff000000));
774 bfd_put_32 (abfd
, value
, data
+ dst_address
);
779 /* This is a 24-/32-bit absolute address in one of the following
782 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
783 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w",
784 "stc.w" and "mov.[bwl]"
786 We may relax this into an 16-bit absolute address if it's in
789 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
790 value
= bfd_h8300_pad_address (abfd
, value
);
793 if (value
<= 0x7fff || value
>= 0xffff8000u
)
795 /* Insert the 16-bit value into the proper location. */
796 bfd_put_16 (abfd
, value
, data
+ dst_address
);
798 /* Fix the opcode. For all the instructions that belong to
799 this relaxation, we simply need to turn off bit 0x20 in
800 the previous byte. */
801 data
[dst_address
- 1] &= ~0x20;
807 if (! ((*link_info
->callbacks
->reloc_overflow
)
808 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
809 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
810 input_section
, reloc
->address
)))
815 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */
817 /* Get the address of the target of this branch. */
818 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
820 /* Get the address of the next instruction. */
821 dot
= (link_order
->offset
823 + link_order
->u
.indirect
.section
->output_section
->vma
+ 1);
828 if (gap
< -128 || gap
> 126)
830 if (! ((*link_info
->callbacks
->reloc_overflow
)
831 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
832 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
833 input_section
, reloc
->address
)))
837 /* Now fix the instruction itself. */
838 switch (data
[dst_address
- 1])
842 bfd_put_8 (abfd
, 0x55, data
+ dst_address
- 1);
846 bfd_put_8 (abfd
, 0x40, data
+ dst_address
- 1);
853 /* Write out the 8-bit value. */
854 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
861 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */
863 /* Get the address of the target of this branch. */
864 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
866 /* Get the address of the instruction (not the reloc). */
867 dot
= (link_order
->offset
869 + link_order
->u
.indirect
.section
->output_section
->vma
- 1);
874 if (gap
< -128 || gap
> 126)
876 if (! ((*link_info
->callbacks
->reloc_overflow
)
877 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
878 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
879 input_section
, reloc
->address
)))
883 /* Now fix the instruction. */
884 switch (data
[dst_address
- 2])
887 /* bCC:16 -> bCC:8 */
888 /* Get the second byte of the original insn, which contains
889 the condition code. */
890 tmp
= data
[dst_address
- 1];
892 /* Compute the fisrt byte of the relaxed instruction. The
893 original sequence 0x58 0xX0 is relaxed to 0x4X, where X
894 represents the condition code. */
900 bfd_put_8 (abfd
, tmp
, data
+ dst_address
- 2);
904 /* bsr:16 -> bsr:8 */
905 bfd_put_8 (abfd
, 0x55, data
+ dst_address
- 2);
912 /* Output the target. */
913 bfd_put_8 (abfd
, gap
, data
+ dst_address
- 1);
915 /* We don't advance dst_address -- the 8-bit reloc is applied at
916 dst_address - 1, so the next insn should begin at dst_address. */
921 /* Similarly for a 24-bit absolute that is now 8 bits. */
923 /* Get the address of the target of this branch. */
924 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
926 /* Get the address of the instruction (not the reloc). */
927 dot
= (link_order
->offset
929 + link_order
->u
.indirect
.section
->output_section
->vma
+ 2);
933 /* Fix the instruction. */
934 switch (data
[src_address
])
938 bfd_put_8 (abfd
, 0x55, data
+ dst_address
);
942 bfd_put_8 (abfd
, 0x40, data
+ dst_address
);
948 bfd_put_8 (abfd
, gap
, data
+ dst_address
+ 1);
954 /* This is a 16-bit absolute address in one of the following
957 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
958 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
961 We may relax this into an 8-bit absolute address if it's in
964 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
966 /* All instructions with R_H8_DIR16B2 start with 0x6a. */
967 if (data
[dst_address
- 2] != 0x6a)
970 temp_code
= data
[src_address
- 1];
972 /* If this is a mov.b instruction, clear the lower nibble, which
973 contains the source/destination register number. */
974 if ((temp_code
& 0x10) != 0x10)
977 /* Fix up the opcode. */
981 /* This is mov.b @aa:16,Rd. */
982 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x20;
985 /* This is mov.b Rs,@aa:16. */
986 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x30;
989 /* This is a bit-maniputation instruction that stores one
990 bit into memory, one of "bclr", "bist", "bnot", "bset",
992 data
[dst_address
- 2] = 0x7f;
995 /* This is a bit-maniputation instruction that loads one bit
996 from memory, one of "band", "biand", "bild", "bior",
997 "bixor", "bld", "bor", "btst", and "bxor". */
998 data
[dst_address
- 2] = 0x7e;
1004 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
- 1);
1008 /* This is a 24-bit absolute address in one of the following
1011 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1012 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1015 We may relax this into an 8-bit absolute address if it's in
1018 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1020 /* All instructions with R_MOV24B2 start with 0x6a. */
1021 if (data
[dst_address
- 2] != 0x6a)
1024 temp_code
= data
[src_address
- 1];
1026 /* If this is a mov.b instruction, clear the lower nibble, which
1027 contains the source/destination register number. */
1028 if ((temp_code
& 0x30) != 0x30)
1031 /* Fix up the opcode. */
1035 /* This is mov.b @aa:24/32,Rd. */
1036 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x20;
1039 /* This is mov.b Rs,@aa:24/32. */
1040 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x30;
1043 /* This is a bit-maniputation instruction that stores one
1044 bit into memory, one of "bclr", "bist", "bnot", "bset",
1046 data
[dst_address
- 2] = 0x7f;
1049 /* This is a bit-maniputation instruction that loads one bit
1050 from memory, one of "band", "biand", "bild", "bior",
1051 "bixor", "bld", "bor", "btst", and "bxor". */
1052 data
[dst_address
- 2] = 0x7e;
1058 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
- 1);
1063 /* Get the address of the target of this branch. */
1064 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1066 dot
= (link_order
->offset
1068 + link_order
->u
.indirect
.section
->output_section
->vma
) + 1;
1073 if (gap
< -128 || gap
> 126)
1075 if (! ((*link_info
->callbacks
->reloc_overflow
)
1076 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
1077 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
1078 input_section
, reloc
->address
)))
1082 /* Everything looks OK. Fix the condition in the instruction, apply
1083 the relocation, and update the src/dst address appropriately. */
1085 bfd_put_8 (abfd
, bfd_get_8 (abfd
, data
+ dst_address
- 1) ^ 1,
1086 data
+ dst_address
- 1);
1087 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
1098 /* An 8-bit memory indirect instruction (jmp/jsr).
1100 There's several things that need to be done to handle
1103 If this is a reloc against the absolute symbol, then
1104 we should handle it just R_RELBYTE. Likewise if it's
1105 for a symbol with a value ge 0 and le 0xff.
1107 Otherwise it's a jump/call through the function vector,
1108 and the linker is expected to set up the function vector
1109 and put the right value into the jump/call instruction. */
1110 case R_MEM_INDIRECT
:
1112 /* We need to find the symbol so we can determine it's
1113 address in the function vector table. */
1116 struct funcvec_hash_table
*ftab
;
1117 struct funcvec_hash_entry
*h
;
1118 struct h8300_coff_link_hash_table
*htab
;
1119 asection
*vectors_sec
;
1121 if (link_info
->hash
->creator
!= abfd
->xvec
)
1123 (*_bfd_error_handler
)
1124 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1125 link_info
->hash
->creator
->name
);
1127 /* What else can we do? This function doesn't allow return
1128 of an error, and we don't want to call abort as that
1129 indicates an internal error. */
1130 #ifndef EXIT_FAILURE
1131 #define EXIT_FAILURE 1
1133 xexit (EXIT_FAILURE
);
1135 htab
= h8300_coff_hash_table (link_info
);
1136 vectors_sec
= htab
->vectors_sec
;
1138 /* First see if this is a reloc against the absolute symbol
1139 or against a symbol with a nonnegative value <= 0xff. */
1140 symbol
= *(reloc
->sym_ptr_ptr
);
1141 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1142 if (symbol
== bfd_abs_section_ptr
->symbol
1145 /* This should be handled in a manner very similar to
1146 R_RELBYTES. If the value is in range, then just slam
1147 the value into the right location. Else trigger a
1148 reloc overflow callback. */
1151 bfd_put_8 (abfd
, value
, data
+ dst_address
);
1157 if (! ((*link_info
->callbacks
->reloc_overflow
)
1158 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
1159 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
1160 input_section
, reloc
->address
)))
1166 /* This is a jump/call through a function vector, and we're
1167 expected to create the function vector ourselves.
1169 First look up this symbol in the linker hash table -- we need
1170 the derived linker symbol which holds this symbol's index
1171 in the function vector. */
1172 name
= symbol
->name
;
1173 if (symbol
->flags
& BSF_LOCAL
)
1175 char *new_name
= bfd_malloc ((bfd_size_type
) strlen (name
) + 9);
1177 if (new_name
== NULL
)
1180 strcpy (new_name
, name
);
1181 sprintf (new_name
+ strlen (name
), "_%08x",
1182 (int) symbol
->section
);
1186 ftab
= htab
->funcvec_hash_table
;
1187 h
= funcvec_hash_lookup (ftab
, name
, FALSE
, FALSE
);
1189 /* This shouldn't ever happen. If it does that means we've got
1190 data corruption of some kind. Aborting seems like a reasonable
1191 thing to do here. */
1192 if (h
== NULL
|| vectors_sec
== NULL
)
1195 /* Place the address of the function vector entry into the
1198 vectors_sec
->output_offset
+ h
->offset
,
1199 data
+ dst_address
);
1204 /* Now create an entry in the function vector itself. */
1205 switch (bfd_get_mach (input_section
->owner
))
1207 case bfd_mach_h8300
:
1208 case bfd_mach_h8300hn
:
1209 case bfd_mach_h8300sn
:
1211 bfd_coff_reloc16_get_value (reloc
,
1214 vectors_sec
->contents
+ h
->offset
);
1216 case bfd_mach_h8300h
:
1217 case bfd_mach_h8300s
:
1219 bfd_coff_reloc16_get_value (reloc
,
1222 vectors_sec
->contents
+ h
->offset
);
1228 /* Gross. We've already written the contents of the vector section
1229 before we get here... So we write it again with the new data. */
1230 bfd_set_section_contents (vectors_sec
->output_section
->owner
,
1231 vectors_sec
->output_section
,
1232 vectors_sec
->contents
,
1233 (file_ptr
) vectors_sec
->output_offset
,
1234 vectors_sec
->_raw_size
);
1244 *src_ptr
= src_address
;
1245 *dst_ptr
= dst_address
;
1248 /* Routine for the h8300 linker.
1250 This routine is necessary to handle the special R_MEM_INDIRECT
1251 relocs on the h8300. It's responsible for generating a vectors
1252 section and attaching it to an input bfd as well as sizing
1253 the vectors section. It also creates our vectors hash table.
1255 It uses the generic linker routines to actually add the symbols.
1256 from this BFD to the bfd linker hash table. It may add a few
1257 selected static symbols to the bfd linker hash table. */
1260 h8300_bfd_link_add_symbols (bfd
*abfd
, struct bfd_link_info
*info
)
1263 struct funcvec_hash_table
*funcvec_hash_table
;
1265 struct h8300_coff_link_hash_table
*htab
;
1267 /* Add the symbols using the generic code. */
1268 _bfd_generic_link_add_symbols (abfd
, info
);
1270 if (info
->hash
->creator
!= abfd
->xvec
)
1273 htab
= h8300_coff_hash_table (info
);
1275 /* If we haven't created a vectors section, do so now. */
1276 if (!htab
->vectors_sec
)
1280 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1281 flags
= (SEC_ALLOC
| SEC_LOAD
1282 | SEC_HAS_CONTENTS
| SEC_IN_MEMORY
| SEC_READONLY
);
1283 htab
->vectors_sec
= bfd_make_section (abfd
, ".vectors");
1285 /* If the section wasn't created, or we couldn't set the flags,
1286 quit quickly now, rather than dying a painful death later. */
1287 if (!htab
->vectors_sec
1288 || !bfd_set_section_flags (abfd
, htab
->vectors_sec
, flags
))
1291 /* Also create the vector hash table. */
1292 amt
= sizeof (struct funcvec_hash_table
);
1293 funcvec_hash_table
= (struct funcvec_hash_table
*) bfd_alloc (abfd
, amt
);
1295 if (!funcvec_hash_table
)
1298 /* And initialize the funcvec hash table. */
1299 if (!funcvec_hash_table_init (funcvec_hash_table
, abfd
,
1300 funcvec_hash_newfunc
))
1302 bfd_release (abfd
, funcvec_hash_table
);
1306 /* Store away a pointer to the funcvec hash table. */
1307 htab
->funcvec_hash_table
= funcvec_hash_table
;
1310 /* Load up the function vector hash table. */
1311 funcvec_hash_table
= htab
->funcvec_hash_table
;
1313 /* Now scan the relocs for all the sections in this bfd; create
1314 additional space in the .vectors section as needed. */
1315 for (sec
= abfd
->sections
; sec
; sec
= sec
->next
)
1317 long reloc_size
, reloc_count
, i
;
1321 /* Suck in the relocs, symbols & canonicalize them. */
1322 reloc_size
= bfd_get_reloc_upper_bound (abfd
, sec
);
1323 if (reloc_size
<= 0)
1326 relocs
= (arelent
**) bfd_malloc ((bfd_size_type
) reloc_size
);
1330 /* The symbols should have been read in by _bfd_generic link_add_symbols
1331 call abovec, so we can cheat and use the pointer to them that was
1332 saved in the above call. */
1333 symbols
= _bfd_generic_link_get_symbols(abfd
);
1334 reloc_count
= bfd_canonicalize_reloc (abfd
, sec
, relocs
, symbols
);
1335 if (reloc_count
<= 0)
1341 /* Now walk through all the relocations in this section. */
1342 for (i
= 0; i
< reloc_count
; i
++)
1344 arelent
*reloc
= relocs
[i
];
1345 asymbol
*symbol
= *(reloc
->sym_ptr_ptr
);
1348 /* We've got an indirect reloc. See if we need to add it
1349 to the function vector table. At this point, we have
1350 to add a new entry for each unique symbol referenced
1351 by an R_MEM_INDIRECT relocation except for a reloc
1352 against the absolute section symbol. */
1353 if (reloc
->howto
->type
== R_MEM_INDIRECT
1354 && symbol
!= bfd_abs_section_ptr
->symbol
)
1357 struct funcvec_hash_table
*ftab
;
1358 struct funcvec_hash_entry
*h
;
1360 name
= symbol
->name
;
1361 if (symbol
->flags
& BSF_LOCAL
)
1365 new_name
= bfd_malloc ((bfd_size_type
) strlen (name
) + 9);
1366 if (new_name
== NULL
)
1369 strcpy (new_name
, name
);
1370 sprintf (new_name
+ strlen (name
), "_%08x",
1371 (int) symbol
->section
);
1375 /* Look this symbol up in the function vector hash table. */
1376 ftab
= htab
->funcvec_hash_table
;
1377 h
= funcvec_hash_lookup (ftab
, name
, FALSE
, FALSE
);
1379 /* If this symbol isn't already in the hash table, add
1380 it and bump up the size of the hash table. */
1383 h
= funcvec_hash_lookup (ftab
, name
, TRUE
, TRUE
);
1390 /* Bump the size of the vectors section. Each vector
1391 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1392 switch (bfd_get_mach (abfd
))
1394 case bfd_mach_h8300
:
1395 case bfd_mach_h8300hn
:
1396 case bfd_mach_h8300sn
:
1397 htab
->vectors_sec
->_raw_size
+= 2;
1399 case bfd_mach_h8300h
:
1400 case bfd_mach_h8300s
:
1401 htab
->vectors_sec
->_raw_size
+= 4;
1410 /* We're done with the relocations, release them. */
1414 /* Now actually allocate some space for the function vector. It's
1415 wasteful to do this more than once, but this is easier. */
1416 sec
= htab
->vectors_sec
;
1417 if (sec
->_raw_size
!= 0)
1419 /* Free the old contents. */
1421 free (sec
->contents
);
1423 /* Allocate new contents. */
1424 sec
->contents
= bfd_malloc (sec
->_raw_size
);
1430 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1431 #define coff_reloc16_estimate h8300_reloc16_estimate
1432 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1433 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1435 #define COFF_LONG_FILENAMES
1436 #include "coffcode.h"
1438 #undef coff_bfd_get_relocated_section_contents
1439 #undef coff_bfd_relax_section
1440 #define coff_bfd_get_relocated_section_contents \
1441 bfd_coff_reloc16_get_relocated_section_contents
1442 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1444 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec
, "coff-h8300", BFD_IS_RELAXABLE
, 0, '_', NULL
, COFF_SWAP_TABLE
)