1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
38 #include "dw2gencfi.h"
44 expressionS immediate
;
48 const char comment_chars
[] = "!";
49 const char line_separator_chars
[] = ";";
50 const char line_comment_chars
[] = "!#";
52 static void s_uses (int);
53 static void s_uacons (int);
56 static void sh_elf_cons (int);
58 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
62 big (int ignore ATTRIBUTE_UNUSED
)
64 if (! target_big_endian
)
65 as_bad (_("directive .big encountered when option -big required"));
67 /* Stop further messages. */
68 target_big_endian
= 1;
72 little (int ignore ATTRIBUTE_UNUSED
)
74 if (target_big_endian
)
75 as_bad (_("directive .little encountered when option -little required"));
77 /* Stop further messages. */
78 target_big_endian
= 0;
81 /* This table describes all the machine specific pseudo-ops the assembler
82 has to support. The fields are:
83 pseudo-op name without dot
84 function to call to execute this pseudo-op
85 Integer arg to pass to the function. */
87 const pseudo_typeS md_pseudo_table
[] =
90 {"long", sh_elf_cons
, 4},
91 {"int", sh_elf_cons
, 4},
92 {"word", sh_elf_cons
, 2},
93 {"short", sh_elf_cons
, 2},
99 {"form", listing_psize
, 0},
100 {"little", little
, 0},
101 {"heading", listing_title
, 0},
102 {"import", s_ignore
, 0},
103 {"page", listing_eject
, 0},
104 {"program", s_ignore
, 0},
106 {"uaword", s_uacons
, 2},
107 {"ualong", s_uacons
, 4},
108 {"uaquad", s_uacons
, 8},
109 {"2byte", s_uacons
, 2},
110 {"4byte", s_uacons
, 4},
111 {"8byte", s_uacons
, 8},
113 {"mode", s_sh64_mode
, 0 },
115 /* Have the old name too. */
116 {"isa", s_sh64_mode
, 0 },
118 /* Assert that the right ABI is used. */
119 {"abi", s_sh64_abi
, 0 },
121 { "vtable_inherit", sh64_vtable_inherit
, 0 },
122 { "vtable_entry", sh64_vtable_entry
, 0 },
123 #endif /* HAVE_SH64 */
127 /*int md_reloc_size; */
129 int sh_relax
; /* set if -relax seen */
131 /* Whether -small was seen. */
135 /* Flag to generate relocations against symbol values for local symbols. */
137 static int dont_adjust_reloc_32
;
139 /* preset architecture set, if given; zero otherwise. */
141 static int preset_target_arch
;
143 /* The bit mask of architectures that could
144 accommodate the insns seen so far. */
145 static int valid_arch
;
147 const char EXP_CHARS
[] = "eE";
149 /* Chars that mean this number is a floating point constant. */
152 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
154 #define C(a,b) ENCODE_RELAX(a,b)
156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
157 #define GET_WHAT(x) ((x>>4))
159 /* These are the three types of relaxable instruction. */
160 /* These are the types of relaxable instructions; except for END which is
163 #define COND_JUMP_DELAY 2
164 #define UNCOND_JUMP 3
168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
169 #define SH64PCREL16_32 4
170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
171 #define SH64PCREL16_64 5
173 /* Variants of the above for adjusting the insn to PTA or PTB according to
175 #define SH64PCREL16PT_32 6
176 #define SH64PCREL16PT_64 7
178 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
179 #define MOVI_IMM_32 8
180 #define MOVI_IMM_32_PCREL 9
181 #define MOVI_IMM_64 10
182 #define MOVI_IMM_64_PCREL 11
185 #else /* HAVE_SH64 */
189 #endif /* HAVE_SH64 */
195 #define UNDEF_WORD_DISP 4
201 #define UNDEF_SH64PCREL 0
202 #define SH64PCREL16 1
203 #define SH64PCREL32 2
204 #define SH64PCREL48 3
205 #define SH64PCREL64 4
206 #define SH64PCRELPLT 5
214 #define MOVI_GOTOFF 6
216 #endif /* HAVE_SH64 */
218 /* Branch displacements are from the address of the branch plus
219 four, thus all minimum and maximum values have 4 added to them. */
222 #define COND8_LENGTH 2
224 /* There is one extra instruction before the branch, so we must add
225 two more bytes to account for it. */
226 #define COND12_F 4100
227 #define COND12_M -4090
228 #define COND12_LENGTH 6
230 #define COND12_DELAY_LENGTH 4
232 /* ??? The minimum and maximum values are wrong, but this does not matter
233 since this relocation type is not supported yet. */
234 #define COND32_F (1<<30)
235 #define COND32_M -(1<<30)
236 #define COND32_LENGTH 14
238 #define UNCOND12_F 4098
239 #define UNCOND12_M -4092
240 #define UNCOND12_LENGTH 2
242 /* ??? The minimum and maximum values are wrong, but this does not matter
243 since this relocation type is not supported yet. */
244 #define UNCOND32_F (1<<30)
245 #define UNCOND32_M -(1<<30)
246 #define UNCOND32_LENGTH 14
249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
250 TRd" as is the current insn, so no extra length. Note that the "reach"
251 is calculated from the address *after* that insn, but the offset in the
252 insn is calculated from the beginning of the insn. We also need to
253 take into account the implicit 1 coded as the "A" in PTA when counting
254 forward. If PTB reaches an odd address, we trap that as an error
255 elsewhere, so we don't have to have different relaxation entries. We
256 don't add a one to the negative range, since PTB would then have the
257 farthest backward-reaching value skipped, not generated at relaxation. */
258 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
259 #define SH64PCREL16_M (-32768 * 4 - 4)
260 #define SH64PCREL16_LENGTH 0
262 /* The next step is to change that PT insn into
263 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
264 SHORI (label - datalabel Ln) & 65535, R25
267 which means two extra insns, 8 extra bytes. This is the limit for the
270 The expressions look a bit bad since we have to adjust this to avoid overflow on a
272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
273 #define SH64PCREL32_LENGTH (2 * 4)
275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
277 #if BFD_HOST_64BIT_LONG
278 /* The "reach" type is long, so we can only do this for a 64-bit-long
280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
282 #define SH64PCREL48_M (((long) -1 << 47) - 4)
283 #define SH64PCREL48_LENGTH (3 * 4)
285 /* If the host does not have 64-bit longs, just make this state identical
286 in reach to the 32-bit state. Note that we have a slightly incorrect
287 reach, but the correct one above will overflow a 32-bit number. */
288 #define SH64PCREL32_M (((long) -1 << 30) * 2)
289 #define SH64PCREL48_F SH64PCREL32_F
290 #define SH64PCREL48_M SH64PCREL32_M
291 #define SH64PCREL48_LENGTH (3 * 4)
292 #endif /* BFD_HOST_64BIT_LONG */
294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
296 #define SH64PCREL64_LENGTH (4 * 4)
298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
299 SH64PCREL expansions. The PCREL one is similar, but the other has no
300 pc-relative reach; it must be fully expanded in
301 shmedia_md_estimate_size_before_relax. */
302 #define MOVI_16_LENGTH 0
303 #define MOVI_16_F (32767 - 4)
304 #define MOVI_16_M (-32768 - 4)
305 #define MOVI_32_LENGTH 4
306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
307 #define MOVI_48_LENGTH 8
309 #if BFD_HOST_64BIT_LONG
310 /* The "reach" type is long, so we can only do this for a 64-bit-long
312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
314 #define MOVI_48_M (((long) -1 << 47) - 4)
316 /* If the host does not have 64-bit longs, just make this state identical
317 in reach to the 32-bit state. Note that we have a slightly incorrect
318 reach, but the correct one above will overflow a 32-bit number. */
319 #define MOVI_32_M (((long) -1 << 30) * 2)
320 #define MOVI_48_F MOVI_32_F
321 #define MOVI_48_M MOVI_32_M
322 #endif /* BFD_HOST_64BIT_LONG */
324 #define MOVI_64_LENGTH 12
325 #endif /* HAVE_SH64 */
327 #define EMPTY { 0, 0, 0, 0 }
329 const relax_typeS md_relax_table
[C (END
, 0)] = {
330 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
331 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
334 /* C (COND_JUMP, COND8) */
335 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
336 /* C (COND_JUMP, COND12) */
337 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
338 /* C (COND_JUMP, COND32) */
339 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
340 /* C (COND_JUMP, UNDEF_WORD_DISP) */
341 { 0, 0, COND32_LENGTH
, 0, },
343 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
346 /* C (COND_JUMP_DELAY, COND8) */
347 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
348 /* C (COND_JUMP_DELAY, COND12) */
349 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
350 /* C (COND_JUMP_DELAY, COND32) */
351 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
352 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
353 { 0, 0, COND32_LENGTH
, 0, },
355 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
358 /* C (UNCOND_JUMP, UNCOND12) */
359 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
360 /* C (UNCOND_JUMP, UNCOND32) */
361 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
363 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
364 { 0, 0, UNCOND32_LENGTH
, 0, },
366 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
369 /* C (SH64PCREL16_32, SH64PCREL16) */
371 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
372 /* C (SH64PCREL16_32, SH64PCREL32) */
373 { 0, 0, SH64PCREL32_LENGTH
, 0 },
375 /* C (SH64PCREL16_32, SH64PCRELPLT) */
376 { 0, 0, SH64PCREL32_LENGTH
, 0 },
378 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
380 /* C (SH64PCREL16_64, SH64PCREL16) */
382 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
383 /* C (SH64PCREL16_64, SH64PCREL32) */
384 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
385 /* C (SH64PCREL16_64, SH64PCREL48) */
386 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
387 /* C (SH64PCREL16_64, SH64PCREL64) */
388 { 0, 0, SH64PCREL64_LENGTH
, 0 },
389 /* C (SH64PCREL16_64, SH64PCRELPLT) */
390 { 0, 0, SH64PCREL64_LENGTH
, 0 },
392 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
394 /* C (SH64PCREL16PT_32, SH64PCREL16) */
396 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
397 /* C (SH64PCREL16PT_32, SH64PCREL32) */
398 { 0, 0, SH64PCREL32_LENGTH
, 0 },
400 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
401 { 0, 0, SH64PCREL32_LENGTH
, 0 },
403 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
405 /* C (SH64PCREL16PT_64, SH64PCREL16) */
407 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL32) */
412 C (SH64PCREL16PT_64
, SH64PCREL48
) },
413 /* C (SH64PCREL16PT_64, SH64PCREL48) */
414 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
415 /* C (SH64PCREL16PT_64, SH64PCREL64) */
416 { 0, 0, SH64PCREL64_LENGTH
, 0 },
417 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
418 { 0, 0, SH64PCREL64_LENGTH
, 0},
420 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
422 /* C (MOVI_IMM_32, UNDEF_MOVI) */
423 { 0, 0, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_16) */
425 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
426 /* C (MOVI_IMM_32, MOVI_32) */
427 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
429 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
430 { 0, 0, MOVI_32_LENGTH
, 0 },
431 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
433 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
435 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
436 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
437 { 0, 0, MOVI_32_LENGTH
, 0 },
439 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
440 { 0, 0, MOVI_32_LENGTH
, 0 },
442 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
443 { 0, 0, MOVI_32_LENGTH
, 0 },
444 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
446 /* C (MOVI_IMM_64, UNDEF_MOVI) */
447 { 0, 0, MOVI_64_LENGTH
, 0 },
448 /* C (MOVI_IMM_64, MOVI_16) */
449 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
450 /* C (MOVI_IMM_64, MOVI_32) */
451 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
452 /* C (MOVI_IMM_64, MOVI_48) */
453 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
454 /* C (MOVI_IMM_64, MOVI_64) */
455 { 0, 0, MOVI_64_LENGTH
, 0 },
457 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
458 { 0, 0, MOVI_64_LENGTH
, 0 },
459 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
461 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
463 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
465 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
466 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
467 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
471 { 0, 0, MOVI_64_LENGTH
, 0 },
473 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
474 { 0, 0, MOVI_64_LENGTH
, 0 },
475 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
477 #endif /* HAVE_SH64 */
483 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
487 /* Determinet whether the symbol needs any kind of PIC relocation. */
490 sh_PIC_related_p (symbolS
*sym
)
497 if (sym
== GOT_symbol
)
501 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
505 exp
= symbol_get_value_expression (sym
);
507 return (exp
->X_op
== O_PIC_reloc
508 || sh_PIC_related_p (exp
->X_add_symbol
)
509 || sh_PIC_related_p (exp
->X_op_symbol
));
512 /* Determine the relocation type to be used to represent the
513 expression, that may be rearranged. */
516 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
518 expressionS
*exp
= main_exp
;
520 /* This is here for backward-compatibility only. GCC used to generated:
522 f@PLT + . - (.LPCS# + 2)
524 but we'd rather be able to handle this as a PIC-related reference
525 plus/minus a symbol. However, gas' parser gives us:
527 O_subtract (O_add (f@PLT, .), .LPCS#+2)
529 so we attempt to transform this into:
531 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
533 which we can handle simply below. */
534 if (exp
->X_op
== O_subtract
)
536 if (sh_PIC_related_p (exp
->X_op_symbol
))
539 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
541 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
544 if (exp
&& exp
->X_op
== O_add
545 && sh_PIC_related_p (exp
->X_add_symbol
))
547 symbolS
*sym
= exp
->X_add_symbol
;
549 exp
->X_op
= O_subtract
;
550 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
552 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
553 main_exp
->X_add_symbol
= sym
;
555 main_exp
->X_add_number
+= exp
->X_add_number
;
556 exp
->X_add_number
= 0;
561 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
564 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
567 if (exp
->X_add_symbol
568 && (exp
->X_add_symbol
== GOT_symbol
570 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
574 case BFD_RELOC_SH_IMM_LOW16
:
575 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
578 case BFD_RELOC_SH_IMM_MEDLOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
582 case BFD_RELOC_SH_IMM_MEDHI16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
586 case BFD_RELOC_SH_IMM_HI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
591 case BFD_RELOC_UNUSED
:
592 *r_type_p
= BFD_RELOC_SH_GOTPC
;
601 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
603 *r_type_p
= BFD_RELOC_SH_GOTPC
;
607 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
612 if (exp
->X_op
== O_PIC_reloc
)
618 case BFD_RELOC_UNUSED
:
619 *r_type_p
= exp
->X_md
;
622 case BFD_RELOC_SH_IMM_LOW16
:
625 case BFD_RELOC_32_GOTOFF
:
626 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
629 case BFD_RELOC_SH_GOTPLT32
:
630 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
633 case BFD_RELOC_32_GOT_PCREL
:
634 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
637 case BFD_RELOC_32_PLT_PCREL
:
638 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
646 case BFD_RELOC_SH_IMM_MEDLOW16
:
649 case BFD_RELOC_32_GOTOFF
:
650 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
653 case BFD_RELOC_SH_GOTPLT32
:
654 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
657 case BFD_RELOC_32_GOT_PCREL
:
658 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
661 case BFD_RELOC_32_PLT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
670 case BFD_RELOC_SH_IMM_MEDHI16
:
673 case BFD_RELOC_32_GOTOFF
:
674 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
677 case BFD_RELOC_SH_GOTPLT32
:
678 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
681 case BFD_RELOC_32_GOT_PCREL
:
682 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
685 case BFD_RELOC_32_PLT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
694 case BFD_RELOC_SH_IMM_HI16
:
697 case BFD_RELOC_32_GOTOFF
:
698 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
701 case BFD_RELOC_SH_GOTPLT32
:
702 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
705 case BFD_RELOC_32_GOT_PCREL
:
706 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
709 case BFD_RELOC_32_PLT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
722 *r_type_p
= exp
->X_md
;
725 exp
->X_op
= O_symbol
;
728 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
729 main_exp
->X_add_number
+= exp
->X_add_number
;
733 return (sh_PIC_related_p (exp
->X_add_symbol
)
734 || sh_PIC_related_p (exp
->X_op_symbol
));
739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
742 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
744 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
746 if (sh_check_fixup (exp
, &r_type
))
747 as_bad (_("Invalid PIC expression."));
749 if (r_type
== BFD_RELOC_UNUSED
)
753 r_type
= BFD_RELOC_8
;
757 r_type
= BFD_RELOC_16
;
761 r_type
= BFD_RELOC_32
;
766 r_type
= BFD_RELOC_64
;
776 as_bad (_("unsupported BFD relocation size %u"), size
);
777 r_type
= BFD_RELOC_UNUSED
;
780 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
783 /* The regular cons() function, that reads constants, doesn't support
784 suffixes such as @GOT, @GOTOFF and @PLT, that generate
785 machine-specific relocation types. So we must define it here. */
786 /* Clobbers input_line_pointer, checks end-of-line. */
787 /* NBYTES 1=.byte, 2=.word, 4=.long */
789 sh_elf_cons (register int nbytes
)
795 /* Update existing range to include a previous insn, if there was one. */
796 sh64_update_contents_mark (TRUE
);
798 /* We need to make sure the contents type is set to data. */
801 #endif /* HAVE_SH64 */
803 if (is_it_end_of_statement ())
805 demand_empty_rest_of_line ();
810 md_cons_align (nbytes
);
816 emit_expr (&exp
, (unsigned int) nbytes
);
818 while (*input_line_pointer
++ == ',');
820 input_line_pointer
--; /* Put terminator back into stream. */
821 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
823 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
826 demand_empty_rest_of_line ();
831 /* This function is called once, at assembler startup time. This should
832 set up all the tables, etc that the MD part of the assembler needs. */
837 const sh_opcode_info
*opcode
;
838 char *prev_name
= "";
842 = preset_target_arch
? preset_target_arch
: arch_sh1_up
& ~arch_sh_dsp_up
;
843 valid_arch
= target_arch
;
849 opcode_hash_control
= hash_new ();
851 /* Insert unique names into hash table. */
852 for (opcode
= sh_table
; opcode
->name
; opcode
++)
854 if (strcmp (prev_name
, opcode
->name
) != 0)
856 if (! (opcode
->arch
& target_arch
))
858 prev_name
= opcode
->name
;
859 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
866 static int reg_x
, reg_y
;
870 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
872 /* Try to parse a reg name. Return the number of chars consumed. */
875 parse_reg (char *src
, int *mode
, int *reg
)
877 char l0
= TOLOWER (src
[0]);
878 char l1
= l0
? TOLOWER (src
[1]) : 0;
880 /* We use ! IDENT_CHAR for the next character after the register name, to
881 make sure that we won't accidentally recognize a symbol name such as
882 'sram' or sr_ram as being a reference to the register 'sr'. */
888 if (src
[2] >= '0' && src
[2] <= '5'
889 && ! IDENT_CHAR ((unsigned char) src
[3]))
892 *reg
= 10 + src
[2] - '0';
896 if (l1
>= '0' && l1
<= '9'
897 && ! IDENT_CHAR ((unsigned char) src
[2]))
903 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
904 && ! IDENT_CHAR ((unsigned char) src
[7]))
911 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
916 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
927 if (! IDENT_CHAR ((unsigned char) src
[2]))
933 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
942 if (! IDENT_CHAR ((unsigned char) src
[2]))
948 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
956 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
957 && ! IDENT_CHAR ((unsigned char) src
[3]))
960 *reg
= 4 + (l1
- '0');
963 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
964 && ! IDENT_CHAR ((unsigned char) src
[3]))
967 *reg
= 6 + (l1
- '0');
970 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
971 && ! IDENT_CHAR ((unsigned char) src
[3]))
976 *reg
= n
| ((~n
& 2) << 1);
981 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1003 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1004 && ! IDENT_CHAR ((unsigned char) src
[2]))
1007 *reg
= A_X0_NUM
+ l1
- '0';
1011 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1012 && ! IDENT_CHAR ((unsigned char) src
[2]))
1015 *reg
= A_Y0_NUM
+ l1
- '0';
1019 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1020 && ! IDENT_CHAR ((unsigned char) src
[2]))
1023 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1029 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1035 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1036 && ! IDENT_CHAR ((unsigned char) src
[3]))
1042 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1043 && ! IDENT_CHAR ((unsigned char) src
[3]))
1049 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1050 && ! IDENT_CHAR ((unsigned char) src
[3]))
1056 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1057 && ! IDENT_CHAR ((unsigned char) src
[3]))
1063 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1069 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1076 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1081 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1083 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1084 and use an uninitialized immediate. */
1088 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1089 && ! IDENT_CHAR ((unsigned char) src
[3]))
1094 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1095 && ! IDENT_CHAR ((unsigned char) src
[3]))
1101 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1102 && ! IDENT_CHAR ((unsigned char) src
[4]))
1104 if (TOLOWER (src
[3]) == 'l')
1109 if (TOLOWER (src
[3]) == 'h')
1115 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1116 && ! IDENT_CHAR ((unsigned char) src
[3]))
1121 if (l0
== 'f' && l1
== 'r')
1125 if (src
[3] >= '0' && src
[3] <= '5'
1126 && ! IDENT_CHAR ((unsigned char) src
[4]))
1129 *reg
= 10 + src
[3] - '0';
1133 if (src
[2] >= '0' && src
[2] <= '9'
1134 && ! IDENT_CHAR ((unsigned char) src
[3]))
1137 *reg
= (src
[2] - '0');
1141 if (l0
== 'd' && l1
== 'r')
1145 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1146 && ! IDENT_CHAR ((unsigned char) src
[4]))
1149 *reg
= 10 + src
[3] - '0';
1153 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1154 && ! IDENT_CHAR ((unsigned char) src
[3]))
1157 *reg
= (src
[2] - '0');
1161 if (l0
== 'x' && l1
== 'd')
1165 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1166 && ! IDENT_CHAR ((unsigned char) src
[4]))
1169 *reg
= 11 + src
[3] - '0';
1173 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1174 && ! IDENT_CHAR ((unsigned char) src
[3]))
1177 *reg
= (src
[2] - '0') + 1;
1181 if (l0
== 'f' && l1
== 'v')
1183 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1189 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1190 && ! IDENT_CHAR ((unsigned char) src
[3]))
1193 *reg
= (src
[2] - '0');
1197 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1198 && TOLOWER (src
[3]) == 'l'
1199 && ! IDENT_CHAR ((unsigned char) src
[4]))
1205 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1206 && TOLOWER (src
[3]) == 'c'
1207 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1213 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1214 && TOLOWER (src
[3]) == 'r'
1215 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1225 parse_exp (char *s
, sh_operand_info
*op
)
1230 save
= input_line_pointer
;
1231 input_line_pointer
= s
;
1232 expression (&op
->immediate
);
1233 if (op
->immediate
.X_op
== O_absent
)
1234 as_bad (_("missing operand"));
1236 else if (op
->immediate
.X_op
== O_PIC_reloc
1237 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1238 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1239 as_bad (_("misplaced PIC operand"));
1241 new = input_line_pointer
;
1242 input_line_pointer
= save
;
1246 /* The many forms of operand:
1249 @Rn Register indirect
1262 pr, gbr, vbr, macl, mach
1266 parse_at (char *src
, sh_operand_info
*op
)
1273 /* Must be predecrement. */
1276 len
= parse_reg (src
, &mode
, &(op
->reg
));
1277 if (mode
!= A_REG_N
)
1278 as_bad (_("illegal register after @-"));
1283 else if (src
[0] == '(')
1285 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1288 len
= parse_reg (src
, &mode
, &(op
->reg
));
1289 if (len
&& mode
== A_REG_N
)
1294 as_bad (_("must be @(r0,...)"));
1299 /* Now can be rn or gbr. */
1300 len
= parse_reg (src
, &mode
, &(op
->reg
));
1310 op
->type
= A_R0_GBR
;
1312 else if (mode
== A_REG_N
)
1314 op
->type
= A_IND_R0_REG_N
;
1318 as_bad (_("syntax error in @(r0,...)"));
1323 as_bad (_("syntax error in @(r0...)"));
1328 /* Must be an @(disp,.. thing). */
1329 src
= parse_exp (src
, op
);
1332 /* Now can be rn, gbr or pc. */
1333 len
= parse_reg (src
, &mode
, &op
->reg
);
1336 if (mode
== A_REG_N
)
1338 op
->type
= A_DISP_REG_N
;
1340 else if (mode
== A_GBR
)
1342 op
->type
= A_DISP_GBR
;
1344 else if (mode
== A_PC
)
1346 /* We want @(expr, pc) to uniformly address . + expr,
1347 no matter if expr is a constant, or a more complex
1348 expression, e.g. sym-. or sym1-sym2.
1349 However, we also used to accept @(sym,pc)
1350 as addressing sym, i.e. meaning the same as plain sym.
1351 Some existing code does use the @(sym,pc) syntax, so
1352 we give it the old semantics for now, but warn about
1353 its use, so that users have some time to fix their code.
1355 Note that due to this backward compatibility hack,
1356 we'll get unexpected results when @(offset, pc) is used,
1357 and offset is a symbol that is set later to an an address
1358 difference, or an external symbol that is set to an
1359 address difference in another source file, so we want to
1360 eventually remove it. */
1361 if (op
->immediate
.X_op
== O_symbol
)
1363 op
->type
= A_DISP_PC
;
1364 as_warn (_("Deprecated syntax."));
1368 op
->type
= A_DISP_PC_ABS
;
1369 /* Such operands don't get corrected for PC==.+4, so
1370 make the correction here. */
1371 op
->immediate
.X_add_number
-= 4;
1376 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1381 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1386 as_bad (_("expecting )"));
1392 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1393 if (mode
!= A_REG_N
)
1394 as_bad (_("illegal register after @"));
1401 l0
= TOLOWER (src
[0]);
1402 l1
= TOLOWER (src
[1]);
1404 if ((l0
== 'r' && l1
== '8')
1405 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1408 op
->type
= AX_PMOD_N
;
1410 else if ( (l0
== 'r' && l1
== '9')
1411 || (l0
== 'i' && l1
== 'y'))
1414 op
->type
= AY_PMOD_N
;
1426 get_operand (char **ptr
, sh_operand_info
*op
)
1435 *ptr
= parse_exp (src
, op
);
1440 else if (src
[0] == '@')
1442 *ptr
= parse_at (src
, op
);
1445 len
= parse_reg (src
, &mode
, &(op
->reg
));
1454 /* Not a reg, the only thing left is a displacement. */
1455 *ptr
= parse_exp (src
, op
);
1456 op
->type
= A_DISP_PC
;
1462 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1467 /* The pre-processor will eliminate whitespace in front of '@'
1468 after the first argument; we may be called multiple times
1469 from assemble_ppi, so don't insist on finding whitespace here. */
1473 get_operand (&ptr
, operand
+ 0);
1480 get_operand (&ptr
, operand
+ 1);
1481 /* ??? Hack: psha/pshl have a varying operand number depending on
1482 the type of the first operand. We handle this by having the
1483 three-operand version first and reducing the number of operands
1484 parsed to two if we see that the first operand is an immediate.
1485 This works because no insn with three operands has an immediate
1486 as first operand. */
1487 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1493 get_operand (&ptr
, operand
+ 2);
1497 operand
[2].type
= 0;
1502 operand
[1].type
= 0;
1503 operand
[2].type
= 0;
1508 operand
[0].type
= 0;
1509 operand
[1].type
= 0;
1510 operand
[2].type
= 0;
1515 /* Passed a pointer to a list of opcodes which use different
1516 addressing modes, return the opcode which matches the opcodes
1519 static sh_opcode_info
*
1520 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1522 sh_opcode_info
*this_try
= opcode
;
1523 char *name
= opcode
->name
;
1526 while (opcode
->name
)
1528 this_try
= opcode
++;
1529 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1531 /* We've looked so far down the table that we've run out of
1532 opcodes with the same name. */
1536 /* Look at both operands needed by the opcodes and provided by
1537 the user - since an arg test will often fail on the same arg
1538 again and again, we'll try and test the last failing arg the
1539 first on each opcode try. */
1540 for (n
= 0; this_try
->arg
[n
]; n
++)
1542 sh_operand_info
*user
= operands
+ n
;
1543 sh_arg_type arg
= this_try
->arg
[n
];
1548 if (user
->type
== A_DISP_PC_ABS
)
1558 if (user
->type
!= arg
)
1562 /* opcode needs r0 */
1563 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1567 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1571 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1579 case A_IND_R0_REG_N
:
1588 /* Opcode needs rn */
1589 if (user
->type
!= arg
)
1594 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1609 if (user
->type
!= arg
)
1614 if (user
->type
!= arg
)
1623 case A_IND_R0_REG_M
:
1626 /* Opcode needs rn */
1627 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1633 if (user
->type
!= A_DEC_N
)
1635 if (user
->reg
< 2 || user
->reg
> 5)
1641 if (user
->type
!= A_INC_N
)
1643 if (user
->reg
< 2 || user
->reg
> 5)
1649 if (user
->type
!= A_IND_N
)
1651 if (user
->reg
< 2 || user
->reg
> 5)
1657 if (user
->type
!= AX_PMOD_N
)
1659 if (user
->reg
< 2 || user
->reg
> 5)
1665 if (user
->type
!= A_INC_N
)
1667 if (user
->reg
< 4 || user
->reg
> 5)
1673 if (user
->type
!= A_IND_N
)
1675 if (user
->reg
< 4 || user
->reg
> 5)
1681 if (user
->type
!= AX_PMOD_N
)
1683 if (user
->reg
< 4 || user
->reg
> 5)
1689 if (user
->type
!= A_INC_N
)
1691 if ((user
->reg
< 4 || user
->reg
> 5)
1692 && (user
->reg
< 0 || user
->reg
> 1))
1698 if (user
->type
!= A_IND_N
)
1700 if ((user
->reg
< 4 || user
->reg
> 5)
1701 && (user
->reg
< 0 || user
->reg
> 1))
1707 if (user
->type
!= AX_PMOD_N
)
1709 if ((user
->reg
< 4 || user
->reg
> 5)
1710 && (user
->reg
< 0 || user
->reg
> 1))
1716 if (user
->type
!= A_INC_N
)
1718 if (user
->reg
< 6 || user
->reg
> 7)
1724 if (user
->type
!= A_IND_N
)
1726 if (user
->reg
< 6 || user
->reg
> 7)
1732 if (user
->type
!= AY_PMOD_N
)
1734 if (user
->reg
< 6 || user
->reg
> 7)
1740 if (user
->type
!= A_INC_N
)
1742 if ((user
->reg
< 6 || user
->reg
> 7)
1743 && (user
->reg
< 2 || user
->reg
> 3))
1749 if (user
->type
!= A_IND_N
)
1751 if ((user
->reg
< 6 || user
->reg
> 7)
1752 && (user
->reg
< 2 || user
->reg
> 3))
1758 if (user
->type
!= AY_PMOD_N
)
1760 if ((user
->reg
< 6 || user
->reg
> 7)
1761 && (user
->reg
< 2 || user
->reg
> 3))
1767 if (user
->type
!= DSP_REG_N
)
1769 if (user
->reg
!= A_A0_NUM
1770 && user
->reg
!= A_A1_NUM
)
1776 if (user
->type
!= DSP_REG_N
)
1798 if (user
->type
!= DSP_REG_N
)
1820 if (user
->type
!= DSP_REG_N
)
1842 if (user
->type
!= DSP_REG_N
)
1864 if (user
->type
!= DSP_REG_N
)
1886 if (user
->type
!= DSP_REG_N
)
1908 if (user
->type
!= DSP_REG_N
)
1930 if (user
->type
!= DSP_REG_N
)
1952 if (user
->type
!= DSP_REG_N
)
1974 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1978 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1982 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1986 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1990 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2000 /* Opcode needs rn */
2001 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2006 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2011 if (user
->type
!= XMTRX_M4
)
2017 printf (_("unhandled %d\n"), arg
);
2021 if ( !(valid_arch
& this_try
->arch
))
2023 valid_arch
&= this_try
->arch
;
2033 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2035 fix_new_exp (frag_now
,
2036 where
- frag_now
->fr_literal
,
2044 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2046 int high_byte
= target_big_endian
? 0 : 1;
2049 if (opcode
->arg
[0] == A_BDISP8
)
2051 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2052 p
= frag_var (rs_machine_dependent
,
2053 md_relax_table
[C (what
, COND32
)].rlx_length
,
2054 md_relax_table
[C (what
, COND8
)].rlx_length
,
2056 op
->immediate
.X_add_symbol
,
2057 op
->immediate
.X_add_number
,
2059 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2061 else if (opcode
->arg
[0] == A_BDISP12
)
2063 p
= frag_var (rs_machine_dependent
,
2064 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2065 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2067 op
->immediate
.X_add_symbol
,
2068 op
->immediate
.X_add_number
,
2070 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2075 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2078 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2083 /* Since the low byte of the opcode will be overwritten by the reloc, we
2084 can just stash the high byte into both bytes and ignore endianness. */
2087 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2088 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2092 static int count
= 0;
2094 /* If the last loop insn is a two-byte-insn, it is in danger of being
2095 swapped with the insn after it. To prevent this, create a new
2096 symbol - complete with SH_LABEL reloc - after the last loop insn.
2097 If the last loop insn is four bytes long, the symbol will be
2098 right in the middle, but four byte insns are not swapped anyways. */
2099 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2100 Hence a 9 digit number should be enough to count all REPEATs. */
2102 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2103 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2104 /* Make this a local symbol. */
2106 SF_SET_LOCAL (end_sym
);
2107 #endif /* OBJ_COFF */
2108 symbol_table_insert (end_sym
);
2109 end_sym
->sy_value
= operand
[1].immediate
;
2110 end_sym
->sy_value
.X_add_number
+= 2;
2111 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2114 output
= frag_more (2);
2117 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2118 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2120 return frag_more (2);
2123 /* Now we know what sort of opcodes it is, let's build the bytes. */
2126 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2130 char *output
= frag_more (2);
2131 unsigned int size
= 2;
2132 int low_byte
= target_big_endian
? 1 : 0;
2138 for (index
= 0; index
< 4; index
++)
2140 sh_nibble_type i
= opcode
->nibbles
[index
];
2151 nbuf
[index
] = reg_n
;
2154 nbuf
[index
] = reg_m
;
2157 if (reg_n
< 2 || reg_n
> 5)
2158 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2159 nbuf
[index
] = (reg_n
& 3) | 4;
2162 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2165 nbuf
[index
] = reg_b
| 0x08;
2168 nbuf
[index
] = reg_n
| 0x01;
2171 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2174 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2177 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2180 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2183 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2186 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2189 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2192 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2195 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2198 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2201 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2204 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2207 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2208 operand
->type
!= A_DISP_PC_ABS
, operand
);
2211 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2212 operand
->type
!= A_DISP_PC_ABS
, operand
);
2215 output
= insert_loop_bounds (output
, operand
);
2216 nbuf
[index
] = opcode
->nibbles
[3];
2220 printf (_("failed for %d\n"), i
);
2224 if (!target_big_endian
)
2226 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2227 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2231 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2232 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2237 /* Find an opcode at the start of *STR_P in the hash table, and set
2238 *STR_P to the first character after the last one read. */
2240 static sh_opcode_info
*
2241 find_cooked_opcode (char **str_p
)
2244 unsigned char *op_start
;
2245 unsigned char *op_end
;
2249 /* Drop leading whitespace. */
2253 /* Find the op code end.
2254 The pre-processor will eliminate whitespace in front of
2255 any '@' after the first argument; we may be called from
2256 assemble_ppi, so the opcode might be terminated by an '@'. */
2257 for (op_start
= op_end
= (unsigned char *) (str
);
2260 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2263 unsigned char c
= op_start
[nlen
];
2265 /* The machine independent code will convert CMP/EQ into cmp/EQ
2266 because it thinks the '/' is the end of the symbol. Moreover,
2267 all but the first sub-insn is a parallel processing insn won't
2268 be capitalized. Instead of hacking up the machine independent
2269 code, we just deal with it here. */
2279 as_bad (_("can't find opcode "));
2281 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2284 /* Assemble a parallel processing insn. */
2285 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2288 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2300 sh_operand_info operand
[3];
2302 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2303 Make sure we encode a defined insn pattern. */
2308 if (opcode
->arg
[0] != A_END
)
2309 op_end
= get_operands (opcode
, op_end
, operand
);
2311 opcode
= get_specific (opcode
, operand
);
2314 /* Couldn't find an opcode which matched the operands. */
2315 char *where
= frag_more (2);
2320 as_bad (_("invalid operands for opcode"));
2324 if (opcode
->nibbles
[0] != PPI
)
2325 as_bad (_("insn can't be combined with parallel processing insn"));
2327 switch (opcode
->nibbles
[1])
2332 as_bad (_("multiple movx specifications"));
2337 as_bad (_("multiple movy specifications"));
2343 as_bad (_("multiple movx specifications"));
2344 if ((reg_n
< 4 || reg_n
> 5)
2345 && (reg_n
< 0 || reg_n
> 1))
2346 as_bad (_("invalid movx address register"));
2347 if (movy
&& movy
!= DDT_BASE
)
2348 as_bad (_("insn cannot be combined with non-nopy"));
2349 movx
= ((((reg_n
& 1) != 0) << 9)
2350 + (((reg_n
& 4) == 0) << 8)
2352 + (opcode
->nibbles
[2] << 4)
2353 + opcode
->nibbles
[3]
2359 as_bad (_("multiple movy specifications"));
2360 if ((reg_n
< 6 || reg_n
> 7)
2361 && (reg_n
< 2 || reg_n
> 3))
2362 as_bad (_("invalid movy address register"));
2363 if (movx
&& movx
!= DDT_BASE
)
2364 as_bad (_("insn cannot be combined with non-nopx"));
2365 movy
= ((((reg_n
& 1) != 0) << 8)
2366 + (((reg_n
& 4) == 0) << 9)
2368 + (opcode
->nibbles
[2] << 4)
2369 + opcode
->nibbles
[3]
2375 as_bad (_("multiple movx specifications"));
2377 as_bad (_("previous movy requires nopx"));
2378 if (reg_n
< 4 || reg_n
> 5)
2379 as_bad (_("invalid movx address register"));
2380 if (opcode
->nibbles
[2] & 8)
2382 if (reg_m
== A_A1_NUM
)
2384 else if (reg_m
!= A_A0_NUM
)
2385 as_bad (_("invalid movx dsp register"));
2390 as_bad (_("invalid movx dsp register"));
2393 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2398 as_bad (_("multiple movy specifications"));
2400 as_bad (_("previous movx requires nopy"));
2401 if (opcode
->nibbles
[2] & 8)
2403 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2406 if (reg_m
== A_A1_NUM
)
2408 else if (reg_m
!= A_A0_NUM
)
2409 as_bad (_("invalid movy dsp register"));
2414 as_bad (_("invalid movy dsp register"));
2417 if (reg_n
< 6 || reg_n
> 7)
2418 as_bad (_("invalid movy address register"));
2419 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2423 if (operand
[0].immediate
.X_op
!= O_constant
)
2424 as_bad (_("dsp immediate shift value not constant"));
2425 field_b
= ((opcode
->nibbles
[2] << 12)
2426 | (operand
[0].immediate
.X_add_number
& 127) << 4
2433 goto try_another_opcode
;
2438 as_bad (_("multiple parallel processing specifications"));
2439 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2440 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2441 switch (opcode
->nibbles
[4])
2449 field_b
+= opcode
->nibbles
[4] << 4;
2457 as_bad (_("multiple condition specifications"));
2458 cond
= opcode
->nibbles
[2] << 8;
2460 goto skip_cond_check
;
2464 as_bad (_("multiple parallel processing specifications"));
2465 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2466 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2468 switch (opcode
->nibbles
[4])
2476 field_b
+= opcode
->nibbles
[4] << 4;
2485 if ((field_b
& 0xef00) == 0xa100)
2487 /* pclr Dz pmuls Se,Sf,Dg */
2488 else if ((field_b
& 0xff00) == 0x8d00
2489 && (valid_arch
& arch_sh4al_dsp_up
))
2491 valid_arch
&= arch_sh4al_dsp_up
;
2495 as_bad (_("insn cannot be combined with pmuls"));
2496 switch (field_b
& 0xf)
2499 field_b
+= 0 - A_X0_NUM
;
2502 field_b
+= 1 - A_Y0_NUM
;
2505 field_b
+= 2 - A_A0_NUM
;
2508 field_b
+= 3 - A_A1_NUM
;
2511 as_bad (_("bad combined pmuls output operand"));
2513 /* Generate warning if the destination register for padd / psub
2514 and pmuls is the same ( only for A0 or A1 ).
2515 If the last nibble is 1010 then A0 is used in both
2516 padd / psub and pmuls. If it is 1111 then A1 is used
2517 as destination register in both padd / psub and pmuls. */
2519 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2520 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2521 as_warn (_("destination register is same for parallel insns"));
2523 field_b
+= 0x4000 + reg_efg
;
2530 as_bad (_("condition not followed by conditionalizable insn"));
2536 opcode
= find_cooked_opcode (&op_end
);
2540 (_("unrecognized characters at end of parallel processing insn")));
2545 move_code
= movx
| movy
;
2548 /* Parallel processing insn. */
2549 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2551 output
= frag_more (4);
2553 if (! target_big_endian
)
2555 output
[3] = ppi_code
>> 8;
2556 output
[2] = ppi_code
;
2560 output
[2] = ppi_code
>> 8;
2561 output
[3] = ppi_code
;
2563 move_code
|= 0xf800;
2567 /* Just a double data transfer. */
2568 output
= frag_more (2);
2571 if (! target_big_endian
)
2573 output
[1] = move_code
>> 8;
2574 output
[0] = move_code
;
2578 output
[0] = move_code
>> 8;
2579 output
[1] = move_code
;
2584 /* This is the guts of the machine-dependent assembler. STR points to a
2585 machine dependent instruction. This function is supposed to emit
2586 the frags/bytes it assembles to. */
2589 md_assemble (char *str
)
2591 unsigned char *op_end
;
2592 sh_operand_info operand
[3];
2593 sh_opcode_info
*opcode
;
2594 unsigned int size
= 0;
2595 char *initial_str
= str
;
2598 if (sh64_isa_mode
== sh64_isa_shmedia
)
2600 shmedia_md_assemble (str
);
2605 /* If we've seen pseudo-directives, make sure any emitted data or
2606 frags are marked as data. */
2609 sh64_update_contents_mark (TRUE
);
2610 sh64_set_contents_type (CRT_SH5_ISA16
);
2615 #endif /* HAVE_SH64 */
2617 opcode
= find_cooked_opcode (&str
);
2622 /* The opcode is not in the hash table.
2623 This means we definately have an assembly failure,
2624 but the instruction may be valid in another CPU variant.
2625 In this case emit something better than 'unknown opcode'.
2626 Search the full table in sh-opc.h to check. */
2628 char *name
= initial_str
;
2629 int name_length
= 0;
2630 const sh_opcode_info
*op
;
2633 /* identify opcode in string */
2634 while (isspace (*name
))
2638 while (!isspace (name
[name_length
]))
2643 /* search for opcode in full list */
2644 for (op
= sh_table
; op
->name
; op
++)
2646 if (strncasecmp (op
->name
, name
, name_length
) == 0)
2655 as_bad (_("opcode not valid for this cpu variant"));
2659 as_bad (_("unknown opcode"));
2665 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2667 /* Output a CODE reloc to tell the linker that the following
2668 bytes are instructions, not data. */
2669 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2671 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2674 if (opcode
->nibbles
[0] == PPI
)
2676 size
= assemble_ppi (op_end
, opcode
);
2680 if (opcode
->arg
[0] == A_BDISP12
2681 || opcode
->arg
[0] == A_BDISP8
)
2683 /* Since we skip get_specific here, we have to check & update
2685 if (valid_arch
& opcode
->arch
)
2686 valid_arch
&= opcode
->arch
;
2688 as_bad (_("Delayed branches not available on SH1"));
2689 parse_exp (op_end
+ 1, &operand
[0]);
2690 build_relax (opcode
, &operand
[0]);
2694 if (opcode
->arg
[0] == A_END
)
2696 /* Ignore trailing whitespace. If there is any, it has already
2697 been compressed to a single space. */
2703 op_end
= get_operands (opcode
, op_end
, operand
);
2705 opcode
= get_specific (opcode
, operand
);
2709 /* Couldn't find an opcode which matched the operands. */
2710 char *where
= frag_more (2);
2715 as_bad (_("invalid operands for opcode"));
2720 as_bad (_("excess operands: '%s'"), op_end
);
2722 size
= build_Mytes (opcode
, operand
);
2727 #ifdef BFD_ASSEMBLER
2728 dwarf2_emit_insn (size
);
2732 /* This routine is called each time a label definition is seen. It
2733 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2736 sh_frob_label (void)
2738 static fragS
*last_label_frag
;
2739 static int last_label_offset
;
2742 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2746 offset
= frag_now_fix ();
2747 if (frag_now
!= last_label_frag
2748 || offset
!= last_label_offset
)
2750 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2751 last_label_frag
= frag_now
;
2752 last_label_offset
= offset
;
2757 /* This routine is called when the assembler is about to output some
2758 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2761 sh_flush_pending_output (void)
2764 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2766 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2768 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2773 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2779 #ifndef BFD_ASSEMBLER
2782 tc_crawl_symbol_chain (object_headers
*headers ATTRIBUTE_UNUSED
)
2784 printf (_("call to tc_crawl_symbol_chain \n"));
2788 tc_headers_hook (object_headers
*headers ATTRIBUTE_UNUSED
)
2790 printf (_("call to tc_headers_hook \n"));
2796 /* Various routines to kill one day. */
2797 /* Equal to MAX_PRECISION in atof-ieee.c. */
2798 #define MAX_LITTLENUMS 6
2800 /* Turn a string in input_line_pointer into a floating point constant
2801 of type TYPE, and store the appropriate bytes in *LITP. The number
2802 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2803 returned, or NULL on OK. */
2806 md_atof (int type
, char *litP
, int *sizeP
)
2809 LITTLENUM_TYPE words
[4];
2825 return _("bad call to md_atof");
2828 t
= atof_ieee (input_line_pointer
, type
, words
);
2830 input_line_pointer
= t
;
2834 if (! target_big_endian
)
2836 for (i
= prec
- 1; i
>= 0; i
--)
2838 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2844 for (i
= 0; i
< prec
; i
++)
2846 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2854 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2855 call instruction. It refers to a label of the instruction which
2856 loads the register which the call uses. We use it to generate a
2857 special reloc for the linker. */
2860 s_uses (int ignore ATTRIBUTE_UNUSED
)
2865 as_warn (_(".uses pseudo-op seen when not relaxing"));
2869 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2871 as_bad (_("bad .uses format"));
2872 ignore_rest_of_line ();
2876 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2878 demand_empty_rest_of_line ();
2881 const char *md_shortopts
= "";
2882 struct option md_longopts
[] =
2884 #define OPTION_RELAX (OPTION_MD_BASE)
2885 #define OPTION_BIG (OPTION_MD_BASE + 1)
2886 #define OPTION_LITTLE (OPTION_BIG + 1)
2887 #define OPTION_SMALL (OPTION_LITTLE + 1)
2888 #define OPTION_DSP (OPTION_SMALL + 1)
2889 #define OPTION_ISA (OPTION_DSP + 1)
2890 #define OPTION_RENESAS (OPTION_ISA + 1)
2892 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2893 {"big", no_argument
, NULL
, OPTION_BIG
},
2894 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2895 {"small", no_argument
, NULL
, OPTION_SMALL
},
2896 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2897 {"isa", required_argument
, NULL
, OPTION_ISA
},
2898 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
2901 #define OPTION_ABI (OPTION_RENESAS + 1)
2902 #define OPTION_NO_MIX (OPTION_ABI + 1)
2903 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2904 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2905 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2906 {"abi", required_argument
, NULL
, OPTION_ABI
},
2907 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
2908 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
2909 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
2910 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
2911 #endif /* HAVE_SH64 */
2913 {NULL
, no_argument
, NULL
, 0}
2915 size_t md_longopts_size
= sizeof (md_longopts
);
2918 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
2927 target_big_endian
= 1;
2931 target_big_endian
= 0;
2939 preset_target_arch
= arch_sh1_up
& ~arch_sh2e_up
;
2942 case OPTION_RENESAS
:
2943 dont_adjust_reloc_32
= 1;
2947 if (strcasecmp (arg
, "sh4") == 0)
2948 preset_target_arch
= arch_sh4
;
2949 else if (strcasecmp (arg
, "sh4-nofpu") == 0)
2950 preset_target_arch
= arch_sh4_nofpu
;
2951 else if (strcasecmp (arg
, "sh4-nommu-nofpu") == 0)
2952 preset_target_arch
= arch_sh4_nommu_nofpu
;
2953 else if (strcasecmp (arg
, "sh4a") == 0)
2954 preset_target_arch
= arch_sh4a
;
2955 else if (strcasecmp (arg
, "dsp") == 0)
2956 preset_target_arch
= arch_sh1_up
& ~arch_sh2e_up
;
2957 else if (strcasecmp (arg
, "fp") == 0)
2958 preset_target_arch
= arch_sh2e_up
;
2959 else if (strcasecmp (arg
, "any") == 0)
2960 preset_target_arch
= arch_sh1_up
;
2962 else if (strcasecmp (arg
, "shmedia") == 0)
2964 if (sh64_isa_mode
== sh64_isa_shcompact
)
2965 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2966 sh64_isa_mode
= sh64_isa_shmedia
;
2968 else if (strcasecmp (arg
, "shcompact") == 0)
2970 if (sh64_isa_mode
== sh64_isa_shmedia
)
2971 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2972 if (sh64_abi
== sh64_abi_64
)
2973 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2974 sh64_isa_mode
= sh64_isa_shcompact
;
2976 #endif /* HAVE_SH64 */
2978 as_bad ("Invalid argument to --isa option: %s", arg
);
2983 if (strcmp (arg
, "32") == 0)
2985 if (sh64_abi
== sh64_abi_64
)
2986 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2987 sh64_abi
= sh64_abi_32
;
2989 else if (strcmp (arg
, "64") == 0)
2991 if (sh64_abi
== sh64_abi_32
)
2992 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2993 if (sh64_isa_mode
== sh64_isa_shcompact
)
2994 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2995 sh64_abi
= sh64_abi_64
;
2998 as_bad ("Invalid argument to --abi option: %s", arg
);
3005 case OPTION_SHCOMPACT_CONST_CRANGE
:
3006 sh64_shcompact_const_crange
= TRUE
;
3009 case OPTION_NO_EXPAND
:
3010 sh64_expand
= FALSE
;
3016 #endif /* HAVE_SH64 */
3026 md_show_usage (FILE *stream
)
3028 fprintf (stream
, _("\
3030 -little generate little endian code\n\
3031 -big generate big endian code\n\
3032 -relax alter jump instructions for long displacements\n\
3033 -renesas disable optimization with section symbol for\n\
3034 compatibility with Renesas assembler.\n\
3035 -small align sections to 4 byte boundaries, not 16\n\
3036 -dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3038 | sh4-nofpu sh4 with fpu disabled\n\
3039 | sh4-nommu-nofpu sh4 with no MMU or FPU\n\
3041 | dsp same as '-dsp'\n\
3043 | any] use most appropriate isa\n"));
3045 fprintf (stream
, _("\
3046 -isa=[shmedia set as the default instruction set for SH64\n\
3050 fprintf (stream
, _("\
3051 -abi=[32|64] set size of expanded SHmedia operands and object\n\
3053 -shcompact-const-crange emit code-range descriptors for constants in\n\
3054 SHcompact code sections\n\
3055 -no-mix disallow SHmedia code in the same section as\n\
3056 constants and SHcompact code\n\
3057 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3058 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3059 to 32 bits only\n"));
3060 #endif /* HAVE_SH64 */
3063 /* This struct is used to pass arguments to sh_count_relocs through
3064 bfd_map_over_sections. */
3066 struct sh_count_relocs
3068 /* Symbol we are looking for. */
3070 /* Count of relocs found. */
3074 /* Count the number of fixups in a section which refer to a particular
3075 symbol. When using BFD_ASSEMBLER, this is called via
3076 bfd_map_over_sections. */
3079 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3081 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3082 segment_info_type
*seginfo
;
3086 seginfo
= seg_info (sec
);
3087 if (seginfo
== NULL
)
3091 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3093 if (fix
->fx_addsy
== sym
)
3101 /* Handle the count relocs for a particular section. When using
3102 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
3105 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3106 void *ignore ATTRIBUTE_UNUSED
)
3108 segment_info_type
*seginfo
;
3111 seginfo
= seg_info (sec
);
3112 if (seginfo
== NULL
)
3115 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3120 struct sh_count_relocs info
;
3122 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3125 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3126 symbol in the same section. */
3127 sym
= fix
->fx_addsy
;
3129 || fix
->fx_subsy
!= NULL
3130 || fix
->fx_addnumber
!= 0
3131 || S_GET_SEGMENT (sym
) != sec
3132 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3133 || S_GET_STORAGE_CLASS (sym
) == C_EXT
3135 || S_IS_EXTERNAL (sym
))
3137 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3138 _(".uses does not refer to a local symbol in the same section"));
3142 /* Look through the fixups again, this time looking for one
3143 at the same location as sym. */
3144 val
= S_GET_VALUE (sym
);
3145 for (fscan
= seginfo
->fix_root
;
3147 fscan
= fscan
->fx_next
)
3148 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3149 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3150 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3151 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3152 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3156 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3157 _("can't find fixup pointed to by .uses"));
3161 if (fscan
->fx_tcbit
)
3163 /* We've already done this one. */
3167 /* The variable fscan should also be a fixup to a local symbol
3168 in the same section. */
3169 sym
= fscan
->fx_addsy
;
3171 || fscan
->fx_subsy
!= NULL
3172 || fscan
->fx_addnumber
!= 0
3173 || S_GET_SEGMENT (sym
) != sec
3174 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3175 || S_GET_STORAGE_CLASS (sym
) == C_EXT
3177 || S_IS_EXTERNAL (sym
))
3179 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3180 _(".uses target does not refer to a local symbol in the same section"));
3184 /* Now we look through all the fixups of all the sections,
3185 counting the number of times we find a reference to sym. */
3188 #ifdef BFD_ASSEMBLER
3189 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3194 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
3195 sh_count_relocs ((bfd
*) NULL
, iscan
, &info
);
3202 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3203 We have already adjusted the value of sym to include the
3204 fragment address, so we undo that adjustment here. */
3205 subseg_change (sec
, 0);
3206 fix_new (fscan
->fx_frag
,
3207 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3208 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3212 /* This function is called after the symbol table has been completed,
3213 but before the relocs or section contents have been written out.
3214 If we have seen any .uses pseudo-ops, they point to an instruction
3215 which loads a register with the address of a function. We look
3216 through the fixups to find where the function address is being
3217 loaded from. We then generate a COUNT reloc giving the number of
3218 times that function address is referred to. The linker uses this
3219 information when doing relaxing, to decide when it can eliminate
3220 the stored function address entirely. */
3226 shmedia_frob_file_before_adjust ();
3232 #ifdef BFD_ASSEMBLER
3233 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3238 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
3239 sh_frob_section ((bfd
*) NULL
, iseg
, NULL
);
3244 /* Called after relaxing. Set the correct sizes of the fragments, and
3245 create relocs so that md_apply_fix3 will fill in the correct values. */
3248 #ifdef BFD_ASSEMBLER
3249 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3251 md_convert_frag (object_headers
*headers ATTRIBUTE_UNUSED
, segT seg
,
3257 switch (fragP
->fr_subtype
)
3259 case C (COND_JUMP
, COND8
):
3260 case C (COND_JUMP_DELAY
, COND8
):
3261 subseg_change (seg
, 0);
3262 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3263 1, BFD_RELOC_SH_PCDISP8BY2
);
3268 case C (UNCOND_JUMP
, UNCOND12
):
3269 subseg_change (seg
, 0);
3270 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3271 1, BFD_RELOC_SH_PCDISP12BY2
);
3276 case C (UNCOND_JUMP
, UNCOND32
):
3277 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3278 if (fragP
->fr_symbol
== NULL
)
3279 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3280 _("displacement overflows 12-bit field"));
3281 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3282 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3283 _("displacement to defined symbol %s overflows 12-bit field"),
3284 S_GET_NAME (fragP
->fr_symbol
));
3286 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3287 _("displacement to undefined symbol %s overflows 12-bit field"),
3288 S_GET_NAME (fragP
->fr_symbol
));
3289 /* Stabilize this frag, so we don't trip an assert. */
3290 fragP
->fr_fix
+= fragP
->fr_var
;
3294 case C (COND_JUMP
, COND12
):
3295 case C (COND_JUMP_DELAY
, COND12
):
3296 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3297 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3298 was due to gas incorrectly relaxing an out-of-range conditional
3299 branch with delay slot. It turned:
3300 bf.s L6 (slot mov.l r12,@(44,r0))
3303 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3305 32: 10 cb mov.l r12,@(44,r0)
3306 Therefore, branches with delay slots have to be handled
3307 differently from ones without delay slots. */
3309 unsigned char *buffer
=
3310 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3311 int highbyte
= target_big_endian
? 0 : 1;
3312 int lowbyte
= target_big_endian
? 1 : 0;
3313 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3315 /* Toggle the true/false bit of the bcond. */
3316 buffer
[highbyte
] ^= 0x2;
3318 /* If this is a delayed branch, we may not put the bra in the
3319 slot. So we change it to a non-delayed branch, like that:
3320 b! cond slot_label; bra disp; slot_label: slot_insn
3321 ??? We should try if swapping the conditional branch and
3322 its delay-slot insn already makes the branch reach. */
3324 /* Build a relocation to six / four bytes farther on. */
3325 subseg_change (seg
, 0);
3326 fix_new (fragP
, fragP
->fr_fix
, 2,
3327 #ifdef BFD_ASSEMBLER
3328 section_symbol (seg
),
3330 seg_info (seg
)->dot
,
3332 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3333 1, BFD_RELOC_SH_PCDISP8BY2
);
3335 /* Set up a jump instruction. */
3336 buffer
[highbyte
+ 2] = 0xa0;
3337 buffer
[lowbyte
+ 2] = 0;
3338 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3339 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3343 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3348 /* Fill in a NOP instruction. */
3349 buffer
[highbyte
+ 4] = 0x0;
3350 buffer
[lowbyte
+ 4] = 0x9;
3359 case C (COND_JUMP
, COND32
):
3360 case C (COND_JUMP_DELAY
, COND32
):
3361 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3362 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3363 if (fragP
->fr_symbol
== NULL
)
3364 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3365 _("displacement overflows 8-bit field"));
3366 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3367 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3368 _("displacement to defined symbol %s overflows 8-bit field"),
3369 S_GET_NAME (fragP
->fr_symbol
));
3371 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3372 _("displacement to undefined symbol %s overflows 8-bit field "),
3373 S_GET_NAME (fragP
->fr_symbol
));
3374 /* Stabilize this frag, so we don't trip an assert. */
3375 fragP
->fr_fix
+= fragP
->fr_var
;
3381 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3387 if (donerelax
&& !sh_relax
)
3388 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3389 _("overflow in branch to %s; converted into longer instruction sequence"),
3390 (fragP
->fr_symbol
!= NULL
3391 ? S_GET_NAME (fragP
->fr_symbol
)
3396 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3398 #ifdef BFD_ASSEMBLER
3401 #else /* ! OBJ_ELF */
3402 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3403 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3404 #endif /* ! OBJ_ELF */
3405 #else /* ! BFD_ASSEMBLER */
3406 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
3407 & (-1 << section_alignment
[(int) seg
]));
3408 #endif /* ! BFD_ASSEMBLER */
3411 /* This static variable is set by s_uacons to tell sh_cons_align that
3412 the expression does not need to be aligned. */
3414 static int sh_no_align_cons
= 0;
3416 /* This handles the unaligned space allocation pseudo-ops, such as
3417 .uaword. .uaword is just like .word, but the value does not need
3421 s_uacons (int bytes
)
3423 /* Tell sh_cons_align not to align this value. */
3424 sh_no_align_cons
= 1;
3428 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3429 aligned correctly. Note that this can cause warnings to be issued
3430 when assembling initialized structured which were declared with the
3431 packed attribute. FIXME: Perhaps we should require an option to
3432 enable this warning? */
3435 sh_cons_align (int nbytes
)
3440 if (sh_no_align_cons
)
3442 /* This is an unaligned pseudo-op. */
3443 sh_no_align_cons
= 0;
3448 while ((nbytes
& 1) == 0)
3457 if (now_seg
== absolute_section
)
3459 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3460 as_warn (_("misaligned data"));
3464 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3465 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3467 record_alignment (now_seg
, nalign
);
3470 /* When relaxing, we need to output a reloc for any .align directive
3471 that requests alignment to a four byte boundary or larger. This is
3472 also where we check for misaligned data. */
3475 sh_handle_align (fragS
*frag
)
3477 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3479 if (frag
->fr_type
== rs_align_code
)
3481 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3482 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3484 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3493 if (target_big_endian
)
3495 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3496 frag
->fr_var
= sizeof big_nop_pattern
;
3500 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3501 frag
->fr_var
= sizeof little_nop_pattern
;
3504 else if (frag
->fr_type
== rs_align_test
)
3507 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3511 && (frag
->fr_type
== rs_align
3512 || frag
->fr_type
== rs_align_code
)
3513 && frag
->fr_address
+ frag
->fr_fix
> 0
3514 && frag
->fr_offset
> 1
3515 && now_seg
!= bss_section
)
3516 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3517 BFD_RELOC_SH_ALIGN
);
3520 /* See whether the relocation should be resolved locally. */
3523 sh_local_pcrel (fixS
*fix
)
3526 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3527 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3528 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3529 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3530 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3531 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3532 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3535 /* See whether we need to force a relocation into the output file.
3536 This is used to force out switch and PC relative relocations when
3540 sh_force_relocation (fixS
*fix
)
3542 /* These relocations can't make it into a DSO, so no use forcing
3543 them for global symbols. */
3544 if (sh_local_pcrel (fix
))
3547 /* Make sure some relocations get emitted. */
3548 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3549 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3550 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3551 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3552 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3553 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3554 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3555 || generic_force_reloc (fix
))
3561 return (fix
->fx_pcrel
3562 || SWITCH_TABLE (fix
)
3563 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3564 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3565 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3566 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3568 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3570 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3575 sh_fix_adjustable (fixS
*fixP
)
3577 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3578 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3579 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3580 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3581 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3584 /* We need the symbol name for the VTABLE entries */
3585 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3586 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3593 sh_elf_final_processing (void)
3597 /* Set file-specific flags to indicate if this code needs
3598 a processor with the sh-dsp / sh2e ISA to execute. */
3600 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3601 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3602 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3605 #endif /* HAVE_SH64 */
3606 if (valid_arch
& arch_sh1
)
3608 else if (valid_arch
& arch_sh2
)
3610 else if (valid_arch
& arch_sh2e
)
3612 else if (valid_arch
& arch_sh_dsp
)
3614 else if (valid_arch
& arch_sh3
)
3616 else if (valid_arch
& arch_sh3_dsp
)
3618 else if (valid_arch
& arch_sh3e
)
3620 else if (valid_arch
& arch_sh4_nommu_nofpu
)
3621 val
= EF_SH4_NOMMU_NOFPU
;
3622 else if (valid_arch
& arch_sh4_nofpu
)
3624 else if (valid_arch
& arch_sh4
)
3626 else if (valid_arch
& arch_sh4a_nofpu
)
3627 val
= EF_SH4A_NOFPU
;
3628 else if (valid_arch
& arch_sh4a
)
3630 else if (valid_arch
& arch_sh4al_dsp
)
3635 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3636 elf_elfheader (stdoutput
)->e_flags
|= val
;
3640 /* Apply a fixup to the object file. */
3643 md_apply_fix3 (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3645 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3646 int lowbyte
= target_big_endian
? 1 : 0;
3647 int highbyte
= target_big_endian
? 0 : 1;
3648 long val
= (long) *valP
;
3652 #ifdef BFD_ASSEMBLER
3653 /* A difference between two symbols, the second of which is in the
3654 current section, is transformed in a PC-relative relocation to
3655 the other symbol. We have to adjust the relocation type here. */
3658 switch (fixP
->fx_r_type
)
3664 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3667 /* Currently, we only support 32-bit PCREL relocations.
3668 We'd need a new reloc type to handle 16_PCREL, and
3669 8_PCREL is already taken for R_SH_SWITCH8, which
3670 apparently does something completely different than what
3673 bfd_set_error (bfd_error_bad_value
);
3677 bfd_set_error (bfd_error_bad_value
);
3682 /* The function adjust_reloc_syms won't convert a reloc against a weak
3683 symbol into a reloc against a section, but bfd_install_relocation
3684 will screw up if the symbol is defined, so we have to adjust val here
3685 to avoid the screw up later.
3687 For ordinary relocs, this does not happen for ELF, since for ELF,
3688 bfd_install_relocation uses the "special function" field of the
3689 howto, and does not execute the code that needs to be undone, as long
3690 as the special function does not return bfd_reloc_continue.
3691 It can happen for GOT- and PLT-type relocs the way they are
3692 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3693 doesn't matter here since those relocs don't use VAL; see below. */
3694 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3695 && fixP
->fx_addsy
!= NULL
3696 && S_IS_WEAK (fixP
->fx_addsy
))
3697 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3700 #ifdef BFD_ASSEMBLER
3701 if (SWITCH_TABLE (fixP
))
3702 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3704 if (fixP
->fx_r_type
== 0)
3706 if (fixP
->fx_size
== 2)
3707 fixP
->fx_r_type
= BFD_RELOC_16
;
3708 else if (fixP
->fx_size
== 4)
3709 fixP
->fx_r_type
= BFD_RELOC_32
;
3710 else if (fixP
->fx_size
== 1)
3711 fixP
->fx_r_type
= BFD_RELOC_8
;
3719 switch (fixP
->fx_r_type
)
3721 case BFD_RELOC_SH_IMM4
:
3723 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3726 case BFD_RELOC_SH_IMM4BY2
:
3729 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3732 case BFD_RELOC_SH_IMM4BY4
:
3735 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3738 case BFD_RELOC_SH_IMM8BY2
:
3744 case BFD_RELOC_SH_IMM8BY4
:
3751 case BFD_RELOC_SH_IMM8
:
3752 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3753 sometimes it is not (e.g., and). We permit any 8 bit value.
3754 Note that adding further restrictions may invalidate
3755 reasonable looking assembly code, such as ``and -0x1,r0''. */
3761 case BFD_RELOC_SH_PCRELIMM8BY4
:
3762 /* The lower two bits of the PC are cleared before the
3763 displacement is added in. We can assume that the destination
3764 is on a 4 byte boundary. If this instruction is also on a 4
3765 byte boundary, then we want
3767 and target - here is a multiple of 4.
3768 Otherwise, we are on a 2 byte boundary, and we want
3769 (target - (here - 2)) / 4
3770 and target - here is not a multiple of 4. Computing
3771 (target - (here - 2)) / 4 == (target - here + 2) / 4
3772 works for both cases, since in the first case the addition of
3773 2 will be removed by the division. target - here is in the
3775 val
= (val
+ 2) / 4;
3777 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3781 case BFD_RELOC_SH_PCRELIMM8BY2
:
3784 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3788 case BFD_RELOC_SH_PCDISP8BY2
:
3790 if (val
< -0x80 || val
> 0x7f)
3791 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3795 case BFD_RELOC_SH_PCDISP12BY2
:
3797 if (val
< -0x800 || val
> 0x7ff)
3798 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3799 buf
[lowbyte
] = val
& 0xff;
3800 buf
[highbyte
] |= (val
>> 8) & 0xf;
3804 case BFD_RELOC_32_PCREL
:
3805 md_number_to_chars (buf
, val
, 4);
3809 md_number_to_chars (buf
, val
, 2);
3812 case BFD_RELOC_SH_USES
:
3813 /* Pass the value into sh_coff_reloc_mangle. */
3814 fixP
->fx_addnumber
= val
;
3817 case BFD_RELOC_SH_COUNT
:
3818 case BFD_RELOC_SH_ALIGN
:
3819 case BFD_RELOC_SH_CODE
:
3820 case BFD_RELOC_SH_DATA
:
3821 case BFD_RELOC_SH_LABEL
:
3822 /* Nothing to do here. */
3825 case BFD_RELOC_SH_LOOP_START
:
3826 case BFD_RELOC_SH_LOOP_END
:
3828 case BFD_RELOC_VTABLE_INHERIT
:
3829 case BFD_RELOC_VTABLE_ENTRY
:
3834 case BFD_RELOC_32_PLT_PCREL
:
3835 /* Make the jump instruction point to the address of the operand. At
3836 runtime we merely add the offset to the actual PLT entry. */
3837 * valP
= 0xfffffffc;
3838 val
= fixP
->fx_offset
;
3840 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3841 fixP
->fx_addnumber
= val
;
3842 md_number_to_chars (buf
, val
, 4);
3845 case BFD_RELOC_SH_GOTPC
:
3846 /* This is tough to explain. We end up with this one if we have
3847 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3848 The goal here is to obtain the absolute address of the GOT,
3849 and it is strongly preferable from a performance point of
3850 view to avoid using a runtime relocation for this. There are
3851 cases where you have something like:
3853 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3855 and here no correction would be required. Internally in the
3856 assembler we treat operands of this form as not being pcrel
3857 since the '.' is explicitly mentioned, and I wonder whether
3858 it would simplify matters to do it this way. Who knows. In
3859 earlier versions of the PIC patches, the pcrel_adjust field
3860 was used to store the correction, but since the expression is
3861 not pcrel, I felt it would be confusing to do it this way. */
3863 md_number_to_chars (buf
, val
, 4);
3866 case BFD_RELOC_SH_TLS_GD_32
:
3867 case BFD_RELOC_SH_TLS_LD_32
:
3868 case BFD_RELOC_SH_TLS_IE_32
:
3869 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3871 case BFD_RELOC_32_GOT_PCREL
:
3872 case BFD_RELOC_SH_GOTPLT32
:
3873 * valP
= 0; /* Fully resolved at runtime. No addend. */
3874 md_number_to_chars (buf
, 0, 4);
3877 case BFD_RELOC_SH_TLS_LDO_32
:
3878 case BFD_RELOC_SH_TLS_LE_32
:
3879 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3881 case BFD_RELOC_32_GOTOFF
:
3882 md_number_to_chars (buf
, val
, 4);
3888 shmedia_md_apply_fix3 (fixP
, valP
);
3897 if ((val
& ((1 << shift
) - 1)) != 0)
3898 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3902 val
= ((val
>> shift
)
3903 | ((long) -1 & ~ ((long) -1 >> shift
)));
3905 if (max
!= 0 && (val
< min
|| val
> max
))
3906 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3908 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3912 /* Called just before address relaxation. Return the length
3913 by which a fragment must grow to reach it's destination. */
3916 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3920 switch (fragP
->fr_subtype
)
3924 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
3930 case C (UNCOND_JUMP
, UNDEF_DISP
):
3931 /* Used to be a branch to somewhere which was unknown. */
3932 if (!fragP
->fr_symbol
)
3934 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3936 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3938 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3942 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3946 case C (COND_JUMP
, UNDEF_DISP
):
3947 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3948 what
= GET_WHAT (fragP
->fr_subtype
);
3949 /* Used to be a branch to somewhere which was unknown. */
3950 if (fragP
->fr_symbol
3951 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3953 /* Got a symbol and it's defined in this segment, become byte
3954 sized - maybe it will fix up. */
3955 fragP
->fr_subtype
= C (what
, COND8
);
3957 else if (fragP
->fr_symbol
)
3959 /* Its got a segment, but its not ours, so it will always be long. */
3960 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3964 /* We know the abs value. */
3965 fragP
->fr_subtype
= C (what
, COND8
);
3969 case C (UNCOND_JUMP
, UNCOND12
):
3970 case C (UNCOND_JUMP
, UNCOND32
):
3971 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3972 case C (COND_JUMP
, COND8
):
3973 case C (COND_JUMP
, COND12
):
3974 case C (COND_JUMP
, COND32
):
3975 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3976 case C (COND_JUMP_DELAY
, COND8
):
3977 case C (COND_JUMP_DELAY
, COND12
):
3978 case C (COND_JUMP_DELAY
, COND32
):
3979 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3980 /* When relaxing a section for the second time, we don't need to
3981 do anything besides return the current size. */
3985 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3986 return fragP
->fr_var
;
3989 /* Put number into target byte order. */
3992 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3995 /* We might need to set the contents type to data. */
3996 sh64_flag_output ();
3999 if (! target_big_endian
)
4000 number_to_chars_littleendian (ptr
, use
, nbytes
);
4002 number_to_chars_bigendian (ptr
, use
, nbytes
);
4005 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
4006 eg for the sh-hms target. */
4009 md_pcrel_from (fixS
*fixP
)
4011 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4015 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4017 if (! sh_local_pcrel (fixP
)
4018 && fixP
->fx_addsy
!= (symbolS
*) NULL
4019 && (generic_force_reloc (fixP
)
4020 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4022 /* The symbol is undefined (or is defined but not in this section,
4023 or we're not sure about it being the final definition). Let the
4024 linker figure it out. We need to adjust the subtraction of a
4025 symbol to the position of the relocated data, though. */
4026 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4029 return md_pcrel_from (fixP
);
4035 tc_coff_sizemachdep (fragS
*frag
)
4037 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
4040 #endif /* OBJ_COFF */
4042 #ifndef BFD_ASSEMBLER
4045 /* Map BFD relocs to SH COFF relocs. */
4049 bfd_reloc_code_real_type bfd_reloc
;
4053 static const struct reloc_map coff_reloc_map
[] =
4055 { BFD_RELOC_32
, R_SH_IMM32
},
4056 { BFD_RELOC_16
, R_SH_IMM16
},
4057 { BFD_RELOC_8
, R_SH_IMM8
},
4058 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
4059 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
4060 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
4061 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
4062 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
4063 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
4064 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
4065 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
4066 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
4067 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
4068 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
4069 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
4070 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
4071 { BFD_RELOC_SH_USES
, R_SH_USES
},
4072 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
4073 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
4074 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
4075 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
4076 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
4077 { BFD_RELOC_UNUSED
, 0 }
4080 /* Adjust a reloc for the SH. This is similar to the generic code,
4081 but does some minor tweaking. */
4084 sh_coff_reloc_mangle (segment_info_type
*seg
, fixS
*fix
,
4085 struct internal_reloc
*intr
, unsigned int paddr
)
4087 symbolS
*symbol_ptr
= fix
->fx_addsy
;
4090 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
4092 if (! SWITCH_TABLE (fix
))
4094 const struct reloc_map
*rm
;
4096 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
4097 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
4099 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
4100 as_bad_where (fix
->fx_file
, fix
->fx_line
,
4101 _("Can not represent %s relocation in this object file format"),
4102 bfd_get_reloc_code_name (fix
->fx_r_type
));
4103 intr
->r_type
= rm
->sh_reloc
;
4110 if (fix
->fx_r_type
== BFD_RELOC_16
)
4111 intr
->r_type
= R_SH_SWITCH16
;
4112 else if (fix
->fx_r_type
== BFD_RELOC_8
)
4113 intr
->r_type
= R_SH_SWITCH8
;
4114 else if (fix
->fx_r_type
== BFD_RELOC_32
)
4115 intr
->r_type
= R_SH_SWITCH32
;
4119 /* For a switch reloc, we set r_offset to the difference between
4120 the reloc address and the subtrahend. When the linker is
4121 doing relaxing, it can use the determine the starting and
4122 ending points of the switch difference expression. */
4123 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
4126 /* PC relative relocs are always against the current section. */
4127 if (symbol_ptr
== NULL
)
4129 switch (fix
->fx_r_type
)
4131 case BFD_RELOC_SH_PCRELIMM8BY2
:
4132 case BFD_RELOC_SH_PCRELIMM8BY4
:
4133 case BFD_RELOC_SH_PCDISP8BY2
:
4134 case BFD_RELOC_SH_PCDISP12BY2
:
4135 case BFD_RELOC_SH_USES
:
4136 symbol_ptr
= seg
->dot
;
4143 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
4145 /* We can't store the offset in the object file, since this
4146 reloc does not take up any space, so we store it in r_offset.
4147 The fx_addnumber field was set in md_apply_fix3. */
4148 intr
->r_offset
= fix
->fx_addnumber
;
4150 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
4152 /* We can't store the count in the object file, since this reloc
4153 does not take up any space, so we store it in r_offset. The
4154 fx_offset field was set when the fixup was created in
4155 sh_coff_frob_file. */
4156 intr
->r_offset
= fix
->fx_offset
;
4157 /* This reloc is always absolute. */
4160 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
4162 /* Store the alignment in the r_offset field. */
4163 intr
->r_offset
= fix
->fx_offset
;
4164 /* This reloc is always absolute. */
4167 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
4168 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
4169 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
4171 /* These relocs are always absolute. */
4175 /* Turn the segment of the symbol into an offset. */
4176 if (symbol_ptr
!= NULL
)
4178 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
4180 intr
->r_symndx
= dot
->sy_number
;
4182 intr
->r_symndx
= symbol_ptr
->sy_number
;
4185 intr
->r_symndx
= -1;
4188 #endif /* OBJ_COFF */
4189 #endif /* ! BFD_ASSEMBLER */
4191 #ifdef BFD_ASSEMBLER
4193 /* Create a reloc. */
4196 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4199 bfd_reloc_code_real_type r_type
;
4201 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4202 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4203 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4204 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4206 r_type
= fixp
->fx_r_type
;
4208 if (SWITCH_TABLE (fixp
))
4210 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4212 if (r_type
== BFD_RELOC_16
)
4213 r_type
= BFD_RELOC_SH_SWITCH16
;
4214 else if (r_type
== BFD_RELOC_8
)
4215 r_type
= BFD_RELOC_8_PCREL
;
4216 else if (r_type
== BFD_RELOC_32
)
4217 r_type
= BFD_RELOC_SH_SWITCH32
;
4221 else if (r_type
== BFD_RELOC_SH_USES
)
4222 rel
->addend
= fixp
->fx_addnumber
;
4223 else if (r_type
== BFD_RELOC_SH_COUNT
)
4224 rel
->addend
= fixp
->fx_offset
;
4225 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4226 rel
->addend
= fixp
->fx_offset
;
4227 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4228 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4229 rel
->addend
= fixp
->fx_offset
;
4230 else if (r_type
== BFD_RELOC_SH_LOOP_START
4231 || r_type
== BFD_RELOC_SH_LOOP_END
)
4232 rel
->addend
= fixp
->fx_offset
;
4233 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4236 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4239 else if (shmedia_init_reloc (rel
, fixp
))
4242 else if (fixp
->fx_pcrel
)
4243 rel
->addend
= fixp
->fx_addnumber
;
4244 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
4245 rel
->addend
= fixp
->fx_addnumber
;
4249 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4251 if (rel
->howto
== NULL
)
4253 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4254 _("Cannot represent relocation type %s"),
4255 bfd_get_reloc_code_name (r_type
));
4256 /* Set howto to a garbage value so that we can keep going. */
4257 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4258 assert (rel
->howto
!= NULL
);
4261 else if (rel
->howto
->type
== R_SH_IND12W
)
4262 rel
->addend
+= fixp
->fx_offset
- 4;
4269 inline static char *
4270 sh_end_of_match (char *cont
, char *what
)
4272 int len
= strlen (what
);
4274 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4275 && ! is_part_of_name (cont
[len
]))
4282 sh_parse_name (char const *name
, expressionS
*exprP
, char *nextcharP
)
4284 char *next
= input_line_pointer
;
4289 exprP
->X_op_symbol
= NULL
;
4291 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4294 GOT_symbol
= symbol_find_or_make (name
);
4296 exprP
->X_add_symbol
= GOT_symbol
;
4298 /* If we have an absolute symbol or a reg, then we know its
4300 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4301 if (segment
== absolute_section
)
4303 exprP
->X_op
= O_constant
;
4304 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4305 exprP
->X_add_symbol
= NULL
;
4307 else if (segment
== reg_section
)
4309 exprP
->X_op
= O_register
;
4310 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4311 exprP
->X_add_symbol
= NULL
;
4315 exprP
->X_op
= O_symbol
;
4316 exprP
->X_add_number
= 0;
4322 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4324 if (*nextcharP
!= '@')
4326 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4327 reloc_type
= BFD_RELOC_32_GOTOFF
;
4328 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4329 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4330 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4331 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4332 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4333 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4334 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4335 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4336 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4337 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4338 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4339 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4340 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4341 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4342 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4343 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4347 *input_line_pointer
= *nextcharP
;
4348 input_line_pointer
= next_end
;
4349 *nextcharP
= *input_line_pointer
;
4350 *input_line_pointer
= '\0';
4352 exprP
->X_op
= O_PIC_reloc
;
4353 exprP
->X_add_number
= 0;
4354 exprP
->X_md
= reloc_type
;
4361 sh_cfi_frame_initial_instructions (void)
4363 cfi_add_CFA_def_cfa (15, 0);
4367 sh_regname_to_dw2regnum (const char *regname
)
4369 unsigned int regnum
= -1;
4373 static struct { char *name
; int dw2regnum
; } regnames
[] =
4375 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4376 { "macl", 21 }, { "fpul", 23 }
4379 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4380 if (strcmp (regnames
[i
].name
, regname
) == 0)
4381 return regnames
[i
].dw2regnum
;
4383 if (regname
[0] == 'r')
4386 regnum
= strtoul (p
, &q
, 10);
4387 if (p
== q
|| *q
|| regnum
>= 16)
4390 else if (regname
[0] == 'f' && regname
[1] == 'r')
4393 regnum
= strtoul (p
, &q
, 10);
4394 if (p
== q
|| *q
|| regnum
>= 16)
4398 else if (regname
[0] == 'x' && regname
[1] == 'd')
4401 regnum
= strtoul (p
, &q
, 10);
4402 if (p
== q
|| *q
|| regnum
>= 8)
4408 #endif /* BFD_ASSEMBLER */