| blob | 057ca7d80aacba5c232d954f45035c545b333b98 |
1 2006-06-05 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
4 appropriate.
5 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
6 (mips_ip): Make overflowed/underflowed constant arguments in DSP
7 and MT instructions a fatal error. Use INSERT_OPERAND where
8 appropriate. Improve warnings for break and wait code overflows.
9 Use symbolic constant of OP_MASK_COPZ.
10 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
12 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
14 * po/Make-in (top_builddir): Define.
16 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
18 * doc/Makefile.am (TEXI2DVI): Define.
19 * doc/Makefile.in: Regenerate.
20 * doc/c-arc.texi: Fix typo.
22 2006-06-01 Alan Modra <amodra@bigpond.net.au>
24 * config/obj-ieee.c: Delete.
25 * config/obj-ieee.h: Delete.
26 * Makefile.am (OBJ_FORMATS): Remove ieee.
27 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
28 (obj-ieee.o): Remove rule.
29 * Makefile.in: Regenerate.
30 * configure.in (atof): Remove tahoe.
31 (OBJ_MAYBE_IEEE): Don't define.
32 * configure: Regenerate.
33 * config.in: Regenerate.
34 * doc/Makefile.in: Regenerate.
35 * po/POTFILES.in: Regenerate.
37 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
39 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
40 and LIBINTL_DEP everywhere.
41 (INTLLIBS): Remove.
42 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
43 * acinclude.m4: Include new gettext macros.
44 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
45 Remove local code for po/Makefile.
46 * Makefile.in, configure, doc/Makefile.in: Regenerated.
48 2006-05-30 Nick Clifton <nickc@redhat.com>
50 * po/es.po: Updated Spanish translation.
52 2006-05-06 Denis Chertykov <denisc@overta.ru>
54 * doc/c-avr.texi: New file.
55 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
56 * doc/all.texi: Set AVR
57 * doc/as.texinfo: Include c-avr.texi
59 2006-05-28 Jie Zhang <jie.zhang@analog.com>
61 * config/bfin-parse.y (check_macfunc): Loose the condition of
62 calling check_multiply_halfregs ().
64 2006-05-25 Jie Zhang <jie.zhang@analog.com>
66 * config/bfin-parse.y (asm_1): Better check and deal with
67 vector and scalar Multiply 16-Bit Operands instructions.
69 2006-05-24 Nick Clifton <nickc@redhat.com>
71 * config/tc-hppa.c: Convert to ISO C90 format.
72 * config/tc-hppa.h: Likewise.
74 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
75 Randolph Chung <randolph@tausq.org>
77 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
78 is_tls_ieoff, is_tls_leoff): Define.
79 (fix_new_hppa): Handle TLS.
80 (cons_fix_new_hppa): Likewise.
81 (pa_ip): Likewise.
82 (md_apply_fix): Handle TLS relocs.
83 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
85 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
87 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
89 2006-05-23 Thiemo Seufer <ths@mips.com>
90 David Ung <davidu@mips.com>
91 Nigel Stephens <nigel@mips.com>
93 [ gas/ChangeLog ]
94 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
95 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
96 ISA_HAS_MXHC1): New macros.
97 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
98 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
99 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
100 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
101 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
102 (mips_after_parse_args): Change default handling of float register
103 size to account for 32bit code with 64bit FP. Better sanity checking
104 of ISA/ASE/ABI option combinations.
105 (s_mipsset): Support switching of GPR and FPR sizes via
106 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
107 options.
108 (mips_elf_final_processing): We should record the use of 64bit FP
109 registers in 32bit code but we don't, because ELF header flags are
110 a scarce ressource.
111 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
112 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
113 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
114 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
115 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
116 missing -march options. Document .set arch=CPU. Move .set smartmips
117 to ASE page. Use @code for .set FOO examples.
119 2006-05-23 Jie Zhang <jie.zhang@analog.com>
121 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
122 if needed.
124 2006-05-23 Jie Zhang <jie.zhang@analog.com>
126 * config/bfin-defs.h (bfin_equals): Remove declaration.
127 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
128 * config/tc-bfin.c (bfin_name_is_register): Remove.
129 (bfin_equals): Remove.
130 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
131 (bfin_name_is_register): Remove declaration.
133 2006-05-19 Thiemo Seufer <ths@mips.com>
134 Nigel Stephens <nigel@mips.com>
136 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
137 (mips_oddfpreg_ok): New function.
138 (mips_ip): Use it.
140 2006-05-19 Thiemo Seufer <ths@mips.com>
141 David Ung <davidu@mips.com>
143 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
144 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
145 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
146 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
147 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
148 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
149 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
150 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
151 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
152 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
153 reg_names_o32, reg_names_n32n64): Define register classes.
154 (reg_lookup): New function, use register classes.
155 (md_begin): Reserve register names in the symbol table. Simplify
156 OBJ_ELF defines.
157 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
158 Use reg_lookup.
159 (mips16_ip): Use reg_lookup.
160 (tc_get_register): Likewise.
161 (tc_mips_regname_to_dw2regnum): New function.
163 2006-05-19 Thiemo Seufer <ths@mips.com>
165 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
166 Un-constify string argument.
167 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
168 Likewise.
169 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
170 Likewise.
171 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
172 Likewise.
173 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
174 Likewise.
175 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
176 Likewise.
177 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
178 Likewise.
180 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
182 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
183 cfloat/m68881 to correct architecture before using it.
185 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
187 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
188 constant values.
190 2006-05-15 Paul Brook <paul@codesourcery.com>
192 * config/tc-arm.c (arm_adjust_symtab): Use
193 bfd_is_arm_special_symbol_name.
195 2006-05-15 Bob Wilson <bob.wilson@acm.org>
197 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
198 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
199 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
200 Handle errors from calls to xtensa_opcode_is_* functions.
202 2006-05-14 Thiemo Seufer <ths@mips.com>
204 * config/tc-mips.c (macro_build): Test for currently active
205 mips16 option.
206 (mips16_ip): Reject invalid opcodes.
208 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
210 * doc/as.texinfo: Rename "Index" to "AS Index",
211 and "ABORT" to "ABORT (COFF)".
213 2006-05-11 Paul Brook <paul@codesourcery.com>
215 * config/tc-arm.c (parse_half): New function.
216 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
217 (parse_operands): Ditto.
218 (do_mov16): Reject invalid relocations.
219 (do_t_mov16): Ditto. Use Thumb reloc numbers.
220 (insns): Replace Iffff with HALF.
221 (md_apply_fix): Add MOVW and MOVT relocs.
222 (tc_gen_reloc): Ditto.
223 * doc/c-arm.texi: Document relocation operators
225 2006-05-11 Paul Brook <paul@codesourcery.com>
227 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
229 2006-05-11 Thiemo Seufer <ths@mips.com>
231 * config/tc-mips.c (append_insn): Don't check the range of j or
232 jal addresses.
234 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
236 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
237 relocs against external symbols for WinCE targets.
238 (md_apply_fix): Likewise.
240 2006-05-09 David Ung <davidu@mips.com>
242 * config/tc-mips.c (append_insn): Only warn about an out-of-range
243 j or jal address.
245 2006-05-09 Nick Clifton <nickc@redhat.com>
247 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
248 against symbols which are not going to be placed into the symbol
249 table.
251 2006-05-09 Ben Elliston <bje@au.ibm.com>
253 * expr.c (operand): Remove `if (0 && ..)' statement and
254 subsequently unused target_op label. Collapse `if (1 || ..)'
255 statement.
256 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
257 separately above the switch.
259 2006-05-08 Nick Clifton <nickc@redhat.com>
261 PR gas/2623
262 * config/tc-msp430.c (line_separator_character): Define as |.
264 2006-05-08 Thiemo Seufer <ths@mips.com>
265 Nigel Stephens <nigel@mips.com>
266 David Ung <davidu@mips.com>
268 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
269 (mips_opts): Likewise.
270 (file_ase_smartmips): New variable.
271 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
272 (macro_build): Handle SmartMIPS instructions.
273 (mips_ip): Likewise.
274 (md_longopts): Add argument handling for smartmips.
275 (md_parse_options, mips_after_parse_args): Likewise.
276 (s_mipsset): Add .set smartmips support.
277 (md_show_usage): Document -msmartmips/-mno-smartmips.
278 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
279 .set smartmips.
280 * doc/c-mips.texi: Likewise.
282 2006-05-08 Alan Modra <amodra@bigpond.net.au>
284 * write.c (relax_segment): Add pass count arg. Don't error on
285 negative org/space on first two passes.
286 (relax_seg_info): New struct.
287 (relax_seg, write_object_file): Adjust.
288 * write.h (relax_segment): Update prototype.
290 2006-05-05 Julian Brown <julian@codesourcery.com>
292 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
293 checking.
294 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
295 architecture version checks.
296 (insns): Allow overlapping instructions to be used in VFP mode.
298 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
300 PR gas/2598
301 * config/obj-elf.c (obj_elf_change_section): Allow user
302 specified SHF_ALPHA_GPREL.
304 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
306 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
307 for PMEM related expressions.
309 2006-05-05 Nick Clifton <nickc@redhat.com>
311 PR gas/2582
312 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
313 insertion of a directory separator character into a string at a
314 given offset. Uses heuristics to decide when to use a backslash
315 character rather than a forward-slash character.
316 (dwarf2_directive_loc): Use the macro.
317 (out_debug_info): Likewise.
319 2006-05-05 Thiemo Seufer <ths@mips.com>
320 David Ung <davidu@mips.com>
322 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
323 instruction.
324 (macro): Add new case M_CACHE_AB.
326 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
328 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
329 (opcode_lookup): Issue a warning for opcode with
330 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
331 identical to OT_cinfix3.
332 (TxC3w, TC3w, tC3w): New.
333 (insns): Use tC3w and TC3w for comparison instructions with
334 's' suffix.
336 2006-05-04 Alan Modra <amodra@bigpond.net.au>
338 * subsegs.h (struct frchain): Delete frch_seg.
339 (frchain_root): Delete.
340 (seg_info): Define as macro.
341 * subsegs.c (frchain_root): Delete.
342 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
343 (subsegs_begin, subseg_change): Adjust for above.
344 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
345 rather than to one big list.
346 (subseg_get): Don't special case abs, und sections.
347 (subseg_new, subseg_force_new): Don't set frchainP here.
348 (seg_info): Delete.
349 (subsegs_print_statistics): Adjust frag chain control list traversal.
350 * debug.c (dmp_frags): Likewise.
351 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
352 at frchain_root. Make use of known frchain ordering.
353 (last_frag_for_seg): Likewise.
354 (get_frag_fix): Likewise. Add seg param.
355 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
356 * write.c (chain_frchains_together_1): Adjust for struct frchain.
357 (SUB_SEGMENT_ALIGN): Likewise.
358 (subsegs_finish): Adjust frchain list traversal.
359 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
360 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
361 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
362 (xtensa_fix_b_j_loop_end_frags): Likewise.
363 (xtensa_fix_close_loop_end_frags): Likewise.
364 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
365 (retrieve_segment_info): Delete frch_seg initialisation.
367 2006-05-03 Alan Modra <amodra@bigpond.net.au>
369 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
370 * config/obj-elf.h (obj_sec_set_private_data): Delete.
371 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
372 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
374 2006-05-02 Joseph Myers <joseph@codesourcery.com>
376 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
377 here.
378 (md_apply_fix3): Multiply offset by 4 here for
379 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
381 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
382 Jan Beulich <jbeulich@novell.com>
384 * config/tc-i386.c (output_invalid_buf): Change size for
385 unsigned char.
386 * config/tc-tic30.c (output_invalid_buf): Likewise.
388 * config/tc-i386.c (output_invalid): Cast none-ascii char to
389 unsigned char.
390 * config/tc-tic30.c (output_invalid): Likewise.
392 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
394 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
395 (TEXI2POD): Use AM_MAKEINFOFLAGS.
396 (asconfig.texi): Don't set top_srcdir.
397 * doc/as.texinfo: Don't use top_srcdir.
398 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
400 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
402 * config/tc-i386.c (output_invalid_buf): Change size to 16.
403 * config/tc-tic30.c (output_invalid_buf): Likewise.
405 * config/tc-i386.c (output_invalid): Use snprintf instead of
406 sprintf.
407 * config/tc-ia64.c (declare_register_set): Likewise.
408 (emit_one_bundle): Likewise.
409 (check_dependencies): Likewise.
410 * config/tc-tic30.c (output_invalid): Likewise.
412 2006-05-02 Paul Brook <paul@codesourcery.com>
414 * config/tc-arm.c (arm_optimize_expr): New function.
415 * config/tc-arm.h (md_optimize_expr): Define
416 (arm_optimize_expr): Add prototype.
417 (TC_FORCE_RELOCATION_SUB_SAME): Define.
419 2006-05-02 Ben Elliston <bje@au.ibm.com>
421 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
422 field unsigned.
424 * sb.h (sb_list_vector): Move to sb.c.
425 * sb.c (free_list): Use type of sb_list_vector directly.
426 (sb_build): Fix off-by-one error in assertion about `size'.
428 2006-05-01 Ben Elliston <bje@au.ibm.com>
430 * listing.c (listing_listing): Remove useless loop.
431 * macro.c (macro_expand): Remove is_positional local variable.
432 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
433 and simplify surrounding expressions, where possible.
434 (assign_symbol): Likewise.
435 (s_weakref): Likewise.
436 * symbols.c (colon): Likewise.
438 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
440 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
442 2006-04-30 Thiemo Seufer <ths@mips.com>
443 David Ung <davidu@mips.com>
445 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
446 (mips_immed): New table that records various handling of udi
447 instruction patterns.
448 (mips_ip): Adds udi handling.
450 2006-04-28 Alan Modra <amodra@bigpond.net.au>
452 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
453 of list rather than beginning.
455 2006-04-26 Julian Brown <julian@codesourcery.com>
457 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
458 (is_quarter_float): Rename from above. Simplify slightly.
459 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
460 number.
461 (parse_neon_mov): Parse floating-point constants.
462 (neon_qfloat_bits): Fix encoding.
463 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
464 preference to integer encoding when using the F32 type.
466 2006-04-26 Julian Brown <julian@codesourcery.com>
468 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
469 zero-initialising structures containing it will lead to invalid types).
470 (arm_it): Add vectype to each operand.
471 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
472 defined field.
473 (neon_typed_alias): New structure. Extra information for typed
474 register aliases.
475 (reg_entry): Add neon type info field.
476 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
477 Break out alternative syntax for coprocessor registers, etc. into...
478 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
479 out from arm_reg_parse.
480 (parse_neon_type): Move. Return SUCCESS/FAIL.
481 (first_error): New function. Call to ensure first error which occurs is
482 reported.
483 (parse_neon_operand_type): Parse exactly one type.
484 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
485 (parse_typed_reg_or_scalar): New function. Handle core of both
486 arm_typed_reg_parse and parse_scalar.
487 (arm_typed_reg_parse): Parse a register with an optional type.
488 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
489 result.
490 (parse_scalar): Parse a Neon scalar with optional type.
491 (parse_reg_list): Use first_error.
492 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
493 (neon_alias_types_same): New function. Return true if two (alias) types
494 are the same.
495 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
496 of elements.
497 (insert_reg_alias): Return new reg_entry not void.
498 (insert_neon_reg_alias): New function. Insert type/index information as
499 well as register for alias.
500 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
501 make typed register aliases accordingly.
502 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
503 of line.
504 (s_unreq): Delete type information if present.
505 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
506 (s_arm_unwind_save_mmxwcg): Likewise.
507 (s_arm_unwind_movsp): Likewise.
508 (s_arm_unwind_setfp): Likewise.
509 (parse_shift): Likewise.
510 (parse_shifter_operand): Likewise.
511 (parse_address): Likewise.
512 (parse_tb): Likewise.
513 (tc_arm_regname_to_dw2regnum): Likewise.
514 (md_pseudo_table): Add dn, qn.
515 (parse_neon_mov): Handle typed operands.
516 (parse_operands): Likewise.
517 (neon_type_mask): Add N_SIZ.
518 (N_ALLMODS): New macro.
519 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
520 (el_type_of_type_chk): Add some safeguards.
521 (modify_types_allowed): Fix logic bug.
522 (neon_check_type): Handle operands with types.
523 (neon_three_same): Remove redundant optional arg handling.
524 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
525 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
526 (do_neon_step): Adjust accordingly.
527 (neon_cmode_for_logic_imm): Use first_error.
528 (do_neon_bitfield): Call neon_check_type.
529 (neon_dyadic): Rename to...
530 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
531 to allow modification of type of the destination.
532 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
533 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
534 (do_neon_compare): Make destination be an untyped bitfield.
535 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
536 (neon_mul_mac): Return early in case of errors.
537 (neon_move_immediate): Use first_error.
538 (neon_mac_reg_scalar_long): Fix type to include scalar.
539 (do_neon_dup): Likewise.
540 (do_neon_mov): Likewise (in several places).
541 (do_neon_tbl_tbx): Fix type.
542 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
543 (do_neon_ld_dup): Exit early in case of errors and/or use
544 first_error.
545 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
546 Handle .dn/.qn directives.
547 (REGDEF): Add zero for reg_entry neon field.
549 2006-04-26 Julian Brown <julian@codesourcery.com>
551 * config/tc-arm.c (limits.h): Include.
552 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
553 (fpu_vfp_v3_or_neon_ext): Declare constants.
554 (neon_el_type): New enumeration of types for Neon vector elements.
555 (neon_type_el): New struct. Define type and size of a vector element.
556 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
557 instruction.
558 (neon_type): Define struct. The type of an instruction.
559 (arm_it): Add 'vectype' for the current instruction.
560 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
561 (vfp_sp_reg_pos): Rename to...
562 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
563 tags.
564 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
565 (Neon D or Q register).
566 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
567 register.
568 (GE_OPT_PREFIX_BIG): Define constant, for use in...
569 (my_get_expression): Allow above constant as argument to accept
570 64-bit constants with optional prefix.
571 (arm_reg_parse): Add extra argument to return the specific type of
572 register in when either a D or Q register (REG_TYPE_NDQ) is
573 requested. Can be NULL.
574 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
575 (parse_reg_list): Update for new arm_reg_parse args.
576 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
577 (parse_neon_el_struct_list): New function. Parse element/structure
578 register lists for VLD<n>/VST<n> instructions.
579 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
580 (s_arm_unwind_save_mmxwr): Likewise.
581 (s_arm_unwind_save_mmxwcg): Likewise.
582 (s_arm_unwind_movsp): Likewise.
583 (s_arm_unwind_setfp): Likewise.
584 (parse_big_immediate): New function. Parse an immediate, which may be
585 64 bits wide. Put results in inst.operands[i].
586 (parse_shift): Update for new arm_reg_parse args.
587 (parse_address): Likewise. Add parsing of alignment specifiers.
588 (parse_neon_mov): Parse the operands of a VMOV instruction.
589 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
590 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
591 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
592 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
593 (parse_operands): Handle new codes above.
594 (encode_arm_vfp_sp_reg): Rename to...
595 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
596 selected VFP version only supports D0-D15.
597 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
598 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
599 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
600 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
601 encode_arm_vfp_reg name, and allow 32 D regs.
602 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
603 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
604 regs.
605 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
606 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
607 constant-load and conversion insns introduced with VFPv3.
608 (neon_tab_entry): New struct.
609 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
610 those which are the targets of pseudo-instructions.
611 (neon_opc): Enumerate opcodes, use as indices into...
612 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
613 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
614 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
615 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
616 neon_enc_tab.
617 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
618 Neon instructions.
619 (neon_type_mask): New. Compact type representation for type checking.
620 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
621 permitted type combinations.
622 (N_IGNORE_TYPE): New macro.
623 (neon_check_shape): New function. Check an instruction shape for
624 multiple alternatives. Return the specific shape for the current
625 instruction.
626 (neon_modify_type_size): New function. Modify a vector type and size,
627 depending on the bit mask in argument 1.
628 (neon_type_promote): New function. Convert a given "key" type (of an
629 operand) into the correct type for a different operand, based on a bit
630 mask.
631 (type_chk_of_el_type): New function. Convert a type and size into the
632 compact representation used for type checking.
633 (el_type_of_type_ckh): New function. Reverse of above (only when a
634 single bit is set in the bit mask).
635 (modify_types_allowed): New function. Alter a mask of allowed types
636 based on a bit mask of modifications.
637 (neon_check_type): New function. Check the type of the current
638 instruction against the variable argument list. The "key" type of the
639 instruction is returned.
640 (neon_dp_fixup): New function. Fill in and modify instruction bits for
641 a Neon data-processing instruction depending on whether we're in ARM
642 mode or Thumb-2 mode.
643 (neon_logbits): New function.
644 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
645 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
646 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
647 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
648 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
649 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
650 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
651 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
652 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
653 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
654 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
655 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
656 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
657 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
658 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
659 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
660 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
661 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
662 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
663 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
664 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
665 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
666 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
667 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
668 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
669 helpers.
670 (parse_neon_type): New function. Parse Neon type specifier.
671 (opcode_lookup): Allow parsing of Neon type specifiers.
672 (REGNUM2, REGSETH, REGSET2): New macros.
673 (reg_names): Add new VFPv3 and Neon registers.
674 (NUF, nUF, NCE, nCE): New macros for opcode table.
675 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
676 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
677 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
678 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
679 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
680 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
681 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
682 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
683 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
684 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
685 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
686 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
687 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
688 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
689 fto[us][lh][sd].
690 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
691 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
692 (arm_option_cpu_value): Add vfp3 and neon.
693 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
694 VFPv1 attribute.
696 2006-04-25 Bob Wilson <bob.wilson@acm.org>
698 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
699 syntax instead of hardcoded opcodes with ".w18" suffixes.
700 (wide_branch_opcode): New.
701 (build_transition): Use it to check for wide branch opcodes with
702 either ".w18" or ".w15" suffixes.
704 2006-04-25 Bob Wilson <bob.wilson@acm.org>
706 * config/tc-xtensa.c (xtensa_create_literal_symbol,
707 xg_assemble_literal, xg_assemble_literal_space): Do not set the
708 frag's is_literal flag.
710 2006-04-25 Bob Wilson <bob.wilson@acm.org>
712 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
714 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
716 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
717 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
718 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
719 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
720 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
722 2005-04-20 Paul Brook <paul@codesourcery.com>
724 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
725 all targets.
726 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
728 2006-04-19 Alan Modra <amodra@bigpond.net.au>
730 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
731 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
732 Make some cpus unsupported on ELF. Run "make dep-am".
733 * Makefile.in: Regenerate.
735 2006-04-19 Alan Modra <amodra@bigpond.net.au>
737 * configure.in (--enable-targets): Indent help message.
738 * configure: Regenerate.
740 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
742 PR gas/2533
743 * config/tc-i386.c (i386_immediate): Check illegal immediate
744 register operand.
746 2006-04-18 Alan Modra <amodra@bigpond.net.au>
748 * config/tc-i386.c: Formatting.
749 (output_disp, output_imm): ISO C90 params.
751 * frags.c (frag_offset_fixed_p): Constify args.
752 * frags.h (frag_offset_fixed_p): Ditto.
754 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
755 (COFF_MAGIC): Delete.
757 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
759 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
761 * po/POTFILES.in: Regenerated.
763 2006-04-16 Mark Mitchell <mark@codesourcery.com>
765 * doc/as.texinfo: Mention that some .type syntaxes are not
766 supported on all architectures.
768 2006-04-14 Sterling Augustine <sterling@tensilica.com>
770 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
771 instructions when such transformations have been disabled.
773 2006-04-10 Sterling Augustine <sterling@tensilica.com>
775 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
776 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
777 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
778 decoding the loop instructions. Remove current_offset variable.
779 (xtensa_fix_short_loop_frags): Likewise.
780 (min_bytes_to_other_loop_end): Remove current_offset argument.
782 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
784 * config/tc-z80.c (z80_optimize_expr): Removed.
785 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
787 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
789 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
790 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
791 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
792 atmega644, atmega329, atmega3290, atmega649, atmega6490,
793 atmega406, atmega640, atmega1280, atmega1281, at90can32,
794 at90can64, at90usb646, at90usb647, at90usb1286 and
795 at90usb1287.
796 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
798 2006-04-07 Paul Brook <paul@codesourcery.com>
800 * config/tc-arm.c (parse_operands): Set default error message.
802 2006-04-07 Paul Brook <paul@codesourcery.com>
804 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
806 2006-04-07 Paul Brook <paul@codesourcery.com>
808 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
810 2006-04-07 Paul Brook <paul@codesourcery.com>
812 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
813 (move_or_literal_pool): Handle Thumb-2 instructions.
814 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
816 2006-04-07 Alan Modra <amodra@bigpond.net.au>
818 PR 2512.
819 * config/tc-i386.c (match_template): Move 64-bit operand tests
820 inside loop.
822 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
824 * po/Make-in: Add install-html target.
825 * Makefile.am: Add install-html and install-html-recursive targets.
826 * Makefile.in: Regenerate.
827 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
828 * configure: Regenerate.
829 * doc/Makefile.am: Add install-html and install-html-am targets.
830 * doc/Makefile.in: Regenerate.
832 2006-04-06 Alan Modra <amodra@bigpond.net.au>
834 * frags.c (frag_offset_fixed_p): Reinitialise offset before
835 second scan.
837 2006-04-05 Richard Sandiford <richard@codesourcery.com>
838 Daniel Jacobowitz <dan@codesourcery.com>
840 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
841 (GOTT_BASE, GOTT_INDEX): New.
842 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
843 GOTT_INDEX when generating VxWorks PIC.
844 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
845 use the generic *-*-vxworks* stanza instead.
847 2006-04-04 Alan Modra <amodra@bigpond.net.au>
849 PR 997
850 * frags.c (frag_offset_fixed_p): New function.
851 * frags.h (frag_offset_fixed_p): Declare.
852 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
853 (resolve_expression): Likewise.
855 2006-04-03 Sterling Augustine <sterling@tensilica.com>
857 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
858 of the same length but different numbers of slots.
860 2006-03-30 Andreas Schwab <schwab@suse.de>
862 * configure.in: Fix help string for --enable-targets option.
863 * configure: Regenerate.
865 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
867 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
868 (m68k_ip): ... here. Use for all chips. Protect against buffer
869 overrun and avoid excessive copying.
871 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
872 m68020_control_regs, m68040_control_regs, m68060_control_regs,
873 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
874 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
875 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
876 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
877 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
878 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
879 mcf5282_ctrl, mcfv4e_ctrl): ... these.
880 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
881 (struct m68k_cpu): Change chip field to control_regs.
882 (current_chip): Remove.
883 (control_regs): New.
884 (m68k_archs, m68k_extensions): Adjust.
885 (m68k_cpus): Reorder to be in cpu number order. Adjust.
886 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
887 (find_cf_chip): Reimplement for new organization of cpu table.
888 (select_control_regs): Remove.
889 (mri_chip): Adjust.
890 (struct save_opts): Save control regs, not chip.
891 (s_save, s_restore): Adjust.
892 (m68k_lookup_cpu): Give deprecated warning when necessary.
893 (m68k_init_arch): Adjust.
894 (md_show_usage): Adjust for new cpu table organization.
896 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
898 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
899 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
900 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
901 "elf/bfin.h".
902 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
903 (any_gotrel): New rule.
904 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
905 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
906 "elf/bfin.h".
907 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
908 (bfin_pic_ptr): New function.
909 (md_pseudo_table): Add it for ".picptr".
910 (OPTION_FDPIC): New macro.
911 (md_longopts): Add -mfdpic.
912 (md_parse_option): Handle it.
913 (md_begin): Set BFD flags.
914 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
915 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
916 us for GOT relocs.
917 * Makefile.am (bfin-parse.o): Update dependencies.
918 (DEPTC_bfin_elf): Likewise.
919 * Makefile.in: Regenerate.
921 2006-03-25 Richard Sandiford <richard@codesourcery.com>
923 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
924 mcfemac instead of mcfmac.
926 2006-03-23 Michael Matz <matz@suse.de>
928 * config/tc-i386.c (type_names): Correct placement of 'static'.
929 (reloc): Map some more relocs to their 64 bit counterpart when
930 size is 8.
931 (output_insn): Work around breakage if DEBUG386 is defined.
932 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
933 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
934 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
935 different from i386.
936 (output_imm): Ditto.
937 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
938 Imm64.
939 (md_convert_frag): Jumps can now be larger than 2GB away, error
940 out in that case.
941 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
942 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
944 2006-03-22 Richard Sandiford <richard@codesourcery.com>
945 Daniel Jacobowitz <dan@codesourcery.com>
946 Phil Edwards <phil@codesourcery.com>
947 Zack Weinberg <zack@codesourcery.com>
948 Mark Mitchell <mark@codesourcery.com>
949 Nathan Sidwell <nathan@codesourcery.com>
951 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
952 (md_begin): Complain about -G being used for PIC. Don't change
953 the text, data and bss alignments on VxWorks.
954 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
955 generating VxWorks PIC.
956 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
957 (macro): Likewise, but do not treat la $25 specially for
958 VxWorks PIC, and do not handle jal.
959 (OPTION_MVXWORKS_PIC): New macro.
960 (md_longopts): Add -mvxworks-pic.
961 (md_parse_option): Don't complain about using PIC and -G together here.
962 Handle OPTION_MVXWORKS_PIC.
963 (md_estimate_size_before_relax): Always use the first relaxation
964 sequence on VxWorks.
965 * config/tc-mips.h (VXWORKS_PIC): New.
967 2006-03-21 Paul Brook <paul@codesourcery.com>
969 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
971 2006-03-21 Sterling Augustine <sterling@tensilica.com>
973 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
974 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
975 (get_loop_align_size): New.
976 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
977 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
978 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
979 (get_noop_aligned_address): Use get_loop_align_size.
980 (get_aligned_diff): Likewise.
982 2006-03-21 Paul Brook <paul@codesourcery.com>
984 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
986 2006-03-20 Paul Brook <paul@codesourcery.com>
988 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
989 (do_t_branch): Encode branches inside IT blocks as unconditional.
990 (do_t_cps): New function.
991 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
992 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
993 (opcode_lookup): Allow conditional suffixes on all instructions in
994 Thumb mode.
995 (md_assemble): Advance condexec state before checking for errors.
996 (insns): Use do_t_cps.
998 2006-03-20 Paul Brook <paul@codesourcery.com>
1000 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1001 outputting the insn.
1003 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1005 * config/tc-vax.c: Update copyright year.
1006 * config/tc-vax.h: Likewise.
1008 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1010 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1011 make it static.
1012 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1014 2006-03-17 Paul Brook <paul@codesourcery.com>
1016 * config/tc-arm.c (insns): Add ldm and stm.
1018 2006-03-17 Ben Elliston <bje@au.ibm.com>
1020 PR gas/2446
1021 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1023 2006-03-16 Paul Brook <paul@codesourcery.com>
1025 * config/tc-arm.c (insns): Add "svc".
1027 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1029 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1030 flag and avoid double underscore prefixes.
1032 2006-03-10 Paul Brook <paul@codesourcery.com>
1034 * config/tc-arm.c (md_begin): Handle EABIv5.
1035 (arm_eabis): Add EF_ARM_EABI_VER5.
1036 * doc/c-arm.texi: Document -meabi=5.
1038 2006-03-10 Ben Elliston <bje@au.ibm.com>
1040 * app.c (do_scrub_chars): Simplify string handling.
1042 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1043 Daniel Jacobowitz <dan@codesourcery.com>
1044 Zack Weinberg <zack@codesourcery.com>
1045 Nathan Sidwell <nathan@codesourcery.com>
1046 Paul Brook <paul@codesourcery.com>
1047 Ricardo Anguiano <anguiano@codesourcery.com>
1048 Phil Edwards <phil@codesourcery.com>
1050 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1051 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1052 R_ARM_ABS12 reloc.
1053 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1054 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1055 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1057 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1059 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1060 even when using the text-section-literals option.
1062 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1064 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1065 and cf.
1066 (m68k_ip): <case 'J'> Check we have some control regs.
1067 (md_parse_option): Allow raw arch switch.
1068 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1069 whether 68881 or cfloat was meant by -mfloat.
1070 (md_show_usage): Adjust extension display.
1071 (m68k_elf_final_processing): Adjust.
1073 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1075 * config/tc-avr.c (avr_mod_hash_value): New function.
1076 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1077 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1078 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1079 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1080 of (int).
1081 (tc_gen_reloc): Handle substractions of symbols, if possible do
1082 fixups, abort otherwise.
1083 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1084 tc_fix_adjustable): Define.
1086 2006-03-02 James E Wilson <wilson@specifix.com>
1088 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1089 change the template, then clear md.slot[curr].end_of_insn_group.
1091 2006-02-28 Jan Beulich <jbeulich@novell.com>
1093 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1095 2006-02-28 Jan Beulich <jbeulich@novell.com>
1097 PR/1070
1098 * macro.c (getstring): Don't treat parentheses special anymore.
1099 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1100 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1101 characters.
1103 2006-02-28 Mat <mat@csail.mit.edu>
1105 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1107 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1109 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1110 field.
1111 (CFI_signal_frame): Define.
1112 (cfi_pseudo_table): Add .cfi_signal_frame.
1113 (dot_cfi): Handle CFI_signal_frame.
1114 (output_cie): Handle cie->signal_frame.
1115 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1116 different. Copy signal_frame from FDE to newly created CIE.
1117 * doc/as.texinfo: Document .cfi_signal_frame.
1119 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1121 * doc/Makefile.am: Add html target.
1122 * doc/Makefile.in: Regenerate.
1123 * po/Make-in: Add html target.
1125 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1127 * config/tc-i386.c (output_insn): Support Intel Merom New
1128 Instructions.
1130 * config/tc-i386.h (CpuMNI): New.
1131 (CpuUnknownFlags): Add CpuMNI.
1133 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1135 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1136 (hpriv_reg_table): New table for hyperprivileged registers.
1137 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1138 register encoding.
1140 2006-02-24 DJ Delorie <dj@redhat.com>
1142 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1143 (tc_gen_reloc): Don't define.
1144 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1145 (OPTION_LINKRELAX): New.
1146 (md_longopts): Add it.
1147 (m32c_relax): New.
1148 (md_parse_options): Set it.
1149 (md_assemble): Emit relaxation relocs as needed.
1150 (md_convert_frag): Emit relaxation relocs as needed.
1151 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1152 (m32c_apply_fix): New.
1153 (tc_gen_reloc): New.
1154 (m32c_force_relocation): Force out jump relocs when relaxing.
1155 (m32c_fix_adjustable): Return false if relaxing.
1157 2006-02-24 Paul Brook <paul@codesourcery.com>
1159 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1160 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1161 (struct asm_barrier_opt): Define.
1162 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1163 (parse_psr): Accept V7M psr names.
1164 (parse_barrier): New function.
1165 (enum operand_parse_code): Add OP_oBARRIER.
1166 (parse_operands): Implement OP_oBARRIER.
1167 (do_barrier): New function.
1168 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1169 (do_t_cpsi): Add V7M restrictions.
1170 (do_t_mrs, do_t_msr): Validate V7M variants.
1171 (md_assemble): Check for NULL variants.
1172 (v7m_psrs, barrier_opt_names): New tables.
1173 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1174 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1175 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1176 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1177 (struct cpu_arch_ver_table): Define.
1178 (cpu_arch_ver): New.
1179 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1180 Tag_CPU_arch_profile.
1181 * doc/c-arm.texi: Document new cpu and arch options.
1183 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1185 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1187 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1189 * config/tc-ia64.c: Update copyright years.
1191 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1193 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1194 SDM 2.2.
1196 2005-02-22 Paul Brook <paul@codesourcery.com>
1198 * config/tc-arm.c (do_pld): Remove incorrect write to
1199 inst.instruction.
1200 (encode_thumb32_addr_mode): Use correct operand.
1202 2006-02-21 Paul Brook <paul@codesourcery.com>
1204 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1206 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1207 Anil Paranjape <anilp1@kpitcummins.com>
1208 Shilin Shakti <shilins@kpitcummins.com>
1210 * Makefile.am: Add xc16x related entry.
1211 * Makefile.in: Regenerate.
1212 * configure.in: Added xc16x related entry.
1213 * configure: Regenerate.
1214 * config/tc-xc16x.h: New file
1215 * config/tc-xc16x.c: New file
1216 * doc/c-xc16x.texi: New file for xc16x
1217 * doc/all.texi: Entry for xc16x
1218 * doc/Makefile.texi: Added c-xc16x.texi
1219 * NEWS: Announce the support for the new target.
1221 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1223 * configure.tgt: set emulation for mips-*-netbsd*
1225 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1227 * config.in: Rebuilt.
1229 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1231 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1232 from 1, not 0, in error messages.
1233 (md_assemble): Simplify special-case check for ENTRY instructions.
1234 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1235 operand in error message.
1237 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1239 * configure.tgt (arm-*-linux-gnueabi*): Change to
1240 arm-*-linux-*eabi*.
1242 2006-02-10 Nick Clifton <nickc@redhat.com>
1244 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1245 32-bit value is propagated into the upper bits of a 64-bit long.
1247 * config/tc-arc.c (init_opcode_tables): Fix cast.
1248 (arc_extoper, md_operand): Likewise.
1250 2006-02-09 David Heine <dlheine@tensilica.com>
1252 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1253 each relaxation step.
1255 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1257 * configure.in (CHECK_DECLS): Add vsnprintf.
1258 * configure: Regenerate.
1259 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1260 include/declare here, but...
1261 * as.h: Move code detecting VARARGS idiom to the top.
1262 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1263 (vsnprintf): Declare if not already declared.
1265 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1267 * as.c (close_output_file): New.
1268 (main): Register close_output_file with xatexit before
1269 dump_statistics. Don't call output_file_close.
1271 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1273 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1274 mcf5329_control_regs): New.
1275 (not_current_architecture, selected_arch, selected_cpu): New.
1276 (m68k_archs, m68k_extensions): New.
1277 (archs): Renamed to ...
1278 (m68k_cpus): ... here. Adjust.
1279 (n_arches): Remove.
1280 (md_pseudo_table): Add arch and cpu directives.
1281 (find_cf_chip, m68k_ip): Adjust table scanning.
1282 (no_68851, no_68881): Remove.
1283 (md_assemble): Lazily initialize.
1284 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1285 (md_init_after_args): Move functionality to m68k_init_arch.
1286 (mri_chip): Adjust table scanning.
1287 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1288 options with saner parsing.
1289 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1290 m68k_init_arch): New.
1291 (s_m68k_cpu, s_m68k_arch): New.
1292 (md_show_usage): Adjust.
1293 (m68k_elf_final_processing): Set CF EF flags.
1294 * config/tc-m68k.h (m68k_init_after_args): Remove.
1295 (tc_init_after_args): Remove.
1296 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1297 (M68k-Directives): Document .arch and .cpu directives.
1299 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1301 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1302 synonyms for equ and defl.
1303 (z80_cons_fix_new): New function.
1304 (emit_byte): Disallow relative jumps to absolute locations.
1305 (emit_data): Only handle defb, prototype changed, because defb is
1306 now handled as pseudo-op rather than an instruction.
1307 (instab): Entries for defb,defw,db,dw moved from here...
1308 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1309 Add entries for def24,def32,d24,d32.
1310 (md_assemble): Improved error handling.
1311 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1312 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1313 (z80_cons_fix_new): Declare.
1314 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1315 (def24,d24,def32,d32): New pseudo-ops.
1317 2006-02-02 Paul Brook <paul@codesourcery.com>
1319 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1321 2005-02-02 Paul Brook <paul@codesourcery.com>
1323 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1324 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1325 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1326 T2_OPCODE_RSB): Define.
1327 (thumb32_negate_data_op): New function.
1328 (md_apply_fix): Use it.
1330 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1332 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1333 fields.
1334 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1335 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1336 subtracted symbols.
1337 (relaxation_requirements): Add pfinish_frag argument and use it to
1338 replace setting tinsn->record_fix fields.
1339 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1340 and vinsn_to_insnbuf. Remove references to record_fix and
1341 slot_sub_symbols fields.
1342 (xtensa_mark_narrow_branches): Delete unused code.
1343 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1344 a symbol.
1345 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1346 record_fix fields.
1347 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1348 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1349 of the record_fix field. Simplify error messages for unexpected
1350 symbolic operands.
1351 (set_expr_symbol_offset_diff): Delete.
1353 2006-01-31 Paul Brook <paul@codesourcery.com>
1355 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1357 2006-01-31 Paul Brook <paul@codesourcery.com>
1358 Richard Earnshaw <rearnsha@arm.com>
1360 * config/tc-arm.c: Use arm_feature_set.
1361 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1362 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1363 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1364 New variables.
1365 (insns): Use them.
1366 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1367 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1368 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1369 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1370 feature flags.
1371 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1372 (arm_opts): Move old cpu/arch options from here...
1373 (arm_legacy_opts): ... to here.
1374 (md_parse_option): Search arm_legacy_opts.
1375 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1376 (arm_float_abis, arm_eabis): Make const.
1378 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1380 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1382 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1384 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1385 in load immediate intruction.
1387 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1389 * config/bfin-parse.y (value_match): Use correct conversion
1390 specifications in template string for __FILE__ and __LINE__.
1391 (binary): Ditto.
1392 (unary): Ditto.
1394 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1396 Introduce TLS descriptors for i386 and x86_64.
1397 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1398 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1399 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1400 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1401 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1402 displacement bits.
1403 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1404 (lex_got): Handle @tlsdesc and @tlscall.
1405 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1407 2006-01-11 Nick Clifton <nickc@redhat.com>
1409 Fixes for building on 64-bit hosts:
1410 * config/tc-avr.c (mod_index): New union to allow conversion
1411 between pointers and integers.
1412 (md_begin, avr_ldi_expression): Use it.
1413 * config/tc-i370.c (md_assemble): Add cast for argument to print
1414 statement.
1415 * config/tc-tic54x.c (subsym_substitute): Likewise.
1416 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1417 opindex field of fr_cgen structure into a pointer so that it can
1418 be stored in a frag.
1419 * config/tc-mn10300.c (md_assemble): Likewise.
1420 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1421 types.
1422 * config/tc-v850.c: Replace uses of (int) casts with correct
1423 types.
1425 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1427 PR gas/2117
1428 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1430 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1432 PR gas/2101
1433 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1434 a local-label reference.
1436 For older changes see ChangeLog-2005
1437 \f
1438 Local Variables:
1439 mode: change-log
1440 left-margin: 8
1441 fill-column: 74
1442 version-control: never
1443 End: