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* dw2gencfi.c (select_cie_for_fde): When separating CIE out
[binutils.git] / bfd / elf32-msp430.c
blobba59cf7f874f37db74c6d49dd07a3a27af58fa6a
1 /* MSP430-specific support for 32-bit ELF
2 Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
3 Contributed by Dmitry Diky <diwil@mail.ru>
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "bfd.h"
22 #include "sysdep.h"
23 #include "libiberty.h"
24 #include "libbfd.h"
25 #include "elf-bfd.h"
26 #include "elf/msp430.h"
27
28 /* Use RELA instead of REL. */
29 #undef USE_REL
30
31 static reloc_howto_type elf_msp430_howto_table[] =
32 {
33 HOWTO (R_MSP430_NONE, /* type */
34 0, /* rightshift */
35 2, /* size (0 = byte, 1 = short, 2 = long) */
36 32, /* bitsize */
37 FALSE, /* pc_relative */
38 0, /* bitpos */
39 complain_overflow_bitfield,/* complain_on_overflow */
40 bfd_elf_generic_reloc, /* special_function */
41 "R_MSP430_NONE", /* name */
42 FALSE, /* partial_inplace */
43 0, /* src_mask */
44 0, /* dst_mask */
45 FALSE), /* pcrel_offset */
46
47 HOWTO (R_MSP430_32, /* type */
48 0, /* rightshift */
49 2, /* size (0 = byte, 1 = short, 2 = long) */
50 32, /* bitsize */
51 FALSE, /* pc_relative */
52 0, /* bitpos */
53 complain_overflow_bitfield,/* complain_on_overflow */
54 bfd_elf_generic_reloc, /* special_function */
55 "R_MSP430_32", /* name */
56 FALSE, /* partial_inplace */
57 0xffffffff, /* src_mask */
58 0xffffffff, /* dst_mask */
59 FALSE), /* pcrel_offset */
60
61 /* A 13 bit PC relative relocation. */
62 HOWTO (R_MSP430_10_PCREL, /* type */
63 1, /* rightshift */
64 1, /* size (0 = byte, 1 = short, 2 = long) */
65 10, /* bitsize */
66 TRUE, /* pc_relative */
67 0, /* bitpos */
68 complain_overflow_bitfield,/* complain_on_overflow */
69 bfd_elf_generic_reloc, /* special_function */
70 "R_MSP430_13_PCREL", /* name */
71 FALSE, /* partial_inplace */
72 0xfff, /* src_mask */
73 0xfff, /* dst_mask */
74 TRUE), /* pcrel_offset */
75
76 /* A 16 bit absolute relocation. */
77 HOWTO (R_MSP430_16, /* type */
78 0, /* rightshift */
79 1, /* size (0 = byte, 1 = short, 2 = long) */
80 16, /* bitsize */
81 FALSE, /* pc_relative */
82 0, /* bitpos */
83 complain_overflow_dont,/* complain_on_overflow */
84 bfd_elf_generic_reloc, /* special_function */
85 "R_MSP430_16", /* name */
86 FALSE, /* partial_inplace */
87 0, /* src_mask */
88 0xffff, /* dst_mask */
89 FALSE), /* pcrel_offset */
90
91 /* A 16 bit absolute relocation for command address. */
92 HOWTO (R_MSP430_16_PCREL, /* type */
93 1, /* rightshift */
94 1, /* size (0 = byte, 1 = short, 2 = long) */
95 16, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_dont,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_MSP430_16_PCREL", /* name */
101 FALSE, /* partial_inplace */
102 0, /* src_mask */
103 0xffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* A 16 bit absolute relocation, byte operations. */
107 HOWTO (R_MSP430_16_BYTE, /* type */
108 0, /* rightshift */
109 1, /* size (0 = byte, 1 = short, 2 = long) */
110 16, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_dont,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_MSP430_16_BYTE", /* name */
116 FALSE, /* partial_inplace */
117 0xffff, /* src_mask */
118 0xffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* A 16 bit absolute relocation for command address. */
122 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
123 1, /* rightshift */
124 1, /* size (0 = byte, 1 = short, 2 = long) */
125 16, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_dont,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_MSP430_16_PCREL_BYTE",/* name */
131 FALSE, /* partial_inplace */
132 0xffff, /* src_mask */
133 0xffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
136 /* A 13 bit PC relative relocation for complicated polymorphs. */
137 HOWTO (R_MSP430_2X_PCREL, /* type */
138 1, /* rightshift */
139 2, /* size (0 = byte, 1 = short, 2 = long) */
140 10, /* bitsize */
141 TRUE, /* pc_relative */
142 0, /* bitpos */
143 complain_overflow_bitfield,/* complain_on_overflow */
144 bfd_elf_generic_reloc, /* special_function */
145 "R_MSP430_2X_PCREL", /* name */
146 FALSE, /* partial_inplace */
147 0xfff, /* src_mask */
148 0xfff, /* dst_mask */
149 TRUE), /* pcrel_offset */
150
151 /* A 16 bit relaxable relocation for command address. */
152 HOWTO (R_MSP430_RL_PCREL, /* type */
153 1, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 TRUE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_dont,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_MSP430_RL_PCREL", /* name */
161 FALSE, /* partial_inplace */
162 0, /* src_mask */
163 0xffff, /* dst_mask */
164 TRUE) /* pcrel_offset */
165 };
166
167 /* Map BFD reloc types to MSP430 ELF reloc types. */
168
169 struct msp430_reloc_map
170 {
171 bfd_reloc_code_real_type bfd_reloc_val;
172 unsigned int elf_reloc_val;
173 };
174
175 static const struct msp430_reloc_map msp430_reloc_map[] =
176 {
177 {BFD_RELOC_NONE, R_MSP430_NONE},
178 {BFD_RELOC_32, R_MSP430_32},
179 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
180 {BFD_RELOC_16, R_MSP430_16_BYTE},
181 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
182 {BFD_RELOC_MSP430_16, R_MSP430_16},
183 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
184 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
185 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
186 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
187 };
188
189 static reloc_howto_type *
190 bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
191 bfd_reloc_code_real_type code)
192 {
193 unsigned int i;
194
195 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
196 if (msp430_reloc_map[i].bfd_reloc_val == code)
197 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
198
199 return NULL;
200 }
201
202 /* Set the howto pointer for an MSP430 ELF reloc. */
203
204 static void
205 msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
206 arelent * cache_ptr,
207 Elf_Internal_Rela * dst)
208 {
209 unsigned int r_type;
210
211 r_type = ELF32_R_TYPE (dst->r_info);
212 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
213 cache_ptr->howto = &elf_msp430_howto_table[r_type];
214 }
215
216 static asection *
217 elf32_msp430_gc_mark_hook (asection * sec,
218 struct bfd_link_info * info ATTRIBUTE_UNUSED,
219 Elf_Internal_Rela * rel,
220 struct elf_link_hash_entry * h,
221 Elf_Internal_Sym * sym)
222 {
223 if (h != NULL)
224 {
225 switch (ELF32_R_TYPE (rel->r_info))
226 {
227 default:
228 switch (h->root.type)
229 {
230 case bfd_link_hash_defined:
231 case bfd_link_hash_defweak:
232 return h->root.u.def.section;
233
234 case bfd_link_hash_common:
235 return h->root.u.c.p->section;
236
237 default:
238 break;
239 }
240 }
241 }
242 else
243 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
244
245 return NULL;
246 }
247
248 static bfd_boolean
249 elf32_msp430_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
250 struct bfd_link_info * info ATTRIBUTE_UNUSED,
251 asection * sec ATTRIBUTE_UNUSED,
252 const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
253 {
254 /* We don't use got and plt entries for msp430. */
255 return TRUE;
256 }
257
258 /* Look through the relocs for a section during the first phase.
259 Since we don't do .gots or .plts, we just need to consider the
260 virtual table relocs for gc. */
261
262 static bfd_boolean
263 elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
264 asection * sec, const Elf_Internal_Rela * relocs)
265 {
266 Elf_Internal_Shdr *symtab_hdr;
267 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
268 const Elf_Internal_Rela *rel;
269 const Elf_Internal_Rela *rel_end;
270
271 if (info->relocatable)
272 return TRUE;
273
274 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
275 sym_hashes = elf_sym_hashes (abfd);
276 sym_hashes_end =
277 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
278 if (!elf_bad_symtab (abfd))
279 sym_hashes_end -= symtab_hdr->sh_info;
280
281 rel_end = relocs + sec->reloc_count;
282 for (rel = relocs; rel < rel_end; rel++)
283 {
284 struct elf_link_hash_entry *h;
285 unsigned long r_symndx;
286
287 r_symndx = ELF32_R_SYM (rel->r_info);
288 if (r_symndx < symtab_hdr->sh_info)
289 h = NULL;
290 else
291 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
292 }
293
294 return TRUE;
295 }
296
297 /* Perform a single relocation. By default we use the standard BFD
298 routines, but a few relocs, we have to do them ourselves. */
299
300 static bfd_reloc_status_type
301 msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
302 asection * input_section, bfd_byte * contents,
303 Elf_Internal_Rela * rel, bfd_vma relocation)
304 {
305 bfd_reloc_status_type r = bfd_reloc_ok;
306 bfd_vma x;
307 bfd_signed_vma srel;
308
309 switch (howto->type)
310 {
311 case R_MSP430_10_PCREL:
312 contents += rel->r_offset;
313 srel = (bfd_signed_vma) relocation;
314 srel += rel->r_addend;
315 srel -= rel->r_offset;
316 srel -= 2; /* Branch instructions add 2 to the PC... */
317 srel -= (input_section->output_section->vma +
318 input_section->output_offset);
319
320 if (srel & 1)
321 return bfd_reloc_outofrange;
322
323 /* MSP430 addresses commands as words. */
324 srel >>= 1;
325
326 /* Check for an overflow. */
327 if (srel < -512 || srel > 511)
328 return bfd_reloc_overflow;
329
330 x = bfd_get_16 (input_bfd, contents);
331 x = (x & 0xfc00) | (srel & 0x3ff);
332 bfd_put_16 (input_bfd, x, contents);
333 break;
334
335 case R_MSP430_2X_PCREL:
336 contents += rel->r_offset;
337 srel = (bfd_signed_vma) relocation;
338 srel += rel->r_addend;
339 srel -= rel->r_offset;
340 srel -= 2; /* Branch instructions add 2 to the PC... */
341 srel -= (input_section->output_section->vma +
342 input_section->output_offset);
343
344 if (srel & 1)
345 return bfd_reloc_outofrange;
346
347 /* MSP430 addresses commands as words. */
348 srel >>= 1;
349
350 /* Check for an overflow. */
351 if (srel < -512 || srel > 511)
352 return bfd_reloc_overflow;
353
354 x = bfd_get_16 (input_bfd, contents);
355 x = (x & 0xfc00) | (srel & 0x3ff);
356 bfd_put_16 (input_bfd, x, contents);
357 /* Handle second jump instruction. */
358 x = bfd_get_16 (input_bfd, contents - 2);
359 srel += 1;
360 x = (x & 0xfc00) | (srel & 0x3ff);
361 bfd_put_16 (input_bfd, x, contents - 2);
362 break;
363
364 case R_MSP430_16_PCREL:
365 case R_MSP430_RL_PCREL:
366 contents += rel->r_offset;
367 srel = (bfd_signed_vma) relocation;
368 srel += rel->r_addend;
369 srel -= rel->r_offset;
370 /* Only branch instructions add 2 to the PC... */
371 srel -= (input_section->output_section->vma +
372 input_section->output_offset);
373
374 if (srel & 1)
375 return bfd_reloc_outofrange;
376
377 bfd_put_16 (input_bfd, srel & 0xffff, contents);
378 break;
379
380 case R_MSP430_16_PCREL_BYTE:
381 contents += rel->r_offset;
382 srel = (bfd_signed_vma) relocation;
383 srel += rel->r_addend;
384 srel -= rel->r_offset;
385 /* Only branch instructions add 2 to the PC... */
386 srel -= (input_section->output_section->vma +
387 input_section->output_offset);
388
389 bfd_put_16 (input_bfd, srel & 0xffff, contents);
390 break;
391
392 case R_MSP430_16_BYTE:
393 contents += rel->r_offset;
394 srel = (bfd_signed_vma) relocation;
395 srel += rel->r_addend;
396 bfd_put_16 (input_bfd, srel & 0xffff, contents);
397 break;
398
399 case R_MSP430_16:
400 contents += rel->r_offset;
401 srel = (bfd_signed_vma) relocation;
402 srel += rel->r_addend;
403
404 if (srel & 1)
405 return bfd_reloc_notsupported;
406
407 bfd_put_16 (input_bfd, srel & 0xffff, contents);
408 break;
409
410 default:
411 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
412 contents, rel->r_offset,
413 relocation, rel->r_addend);
414 }
415
416 return r;
417 }
418
419 /* Relocate an MSP430 ELF section. */
420
421 static bfd_boolean
422 elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
423 struct bfd_link_info * info,
424 bfd * input_bfd,
425 asection * input_section,
426 bfd_byte * contents,
427 Elf_Internal_Rela * relocs,
428 Elf_Internal_Sym * local_syms,
429 asection ** local_sections)
430 {
431 Elf_Internal_Shdr *symtab_hdr;
432 struct elf_link_hash_entry **sym_hashes;
433 Elf_Internal_Rela *rel;
434 Elf_Internal_Rela *relend;
435
436 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
437 sym_hashes = elf_sym_hashes (input_bfd);
438 relend = relocs + input_section->reloc_count;
439
440 for (rel = relocs; rel < relend; rel++)
441 {
442 reloc_howto_type *howto;
443 unsigned long r_symndx;
444 Elf_Internal_Sym *sym;
445 asection *sec;
446 struct elf_link_hash_entry *h;
447 bfd_vma relocation;
448 bfd_reloc_status_type r;
449 const char *name = NULL;
450 int r_type;
451
452 /* This is a final link. */
453
454 r_type = ELF32_R_TYPE (rel->r_info);
455 r_symndx = ELF32_R_SYM (rel->r_info);
456 howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
457 h = NULL;
458 sym = NULL;
459 sec = NULL;
460
461 if (r_symndx < symtab_hdr->sh_info)
462 {
463 sym = local_syms + r_symndx;
464 sec = local_sections[r_symndx];
465 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
466
467 name = bfd_elf_string_from_elf_section
468 (input_bfd, symtab_hdr->sh_link, sym->st_name);
469 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
470 }
471 else
472 {
473 bfd_boolean unresolved_reloc, warned;
474
475 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
476 r_symndx, symtab_hdr, sym_hashes,
477 h, sec, relocation,
478 unresolved_reloc, warned);
479 }
480
481 r = msp430_final_link_relocate (howto, input_bfd, input_section,
482 contents, rel, relocation);
483
484 if (r != bfd_reloc_ok)
485 {
486 const char *msg = (const char *) NULL;
487
488 switch (r)
489 {
490 case bfd_reloc_overflow:
491 r = info->callbacks->reloc_overflow
492 (info, name, howto->name, (bfd_vma) 0,
493 input_bfd, input_section, rel->r_offset);
494 break;
495
496 case bfd_reloc_undefined:
497 r = info->callbacks->undefined_symbol
498 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
499 break;
500
501 case bfd_reloc_outofrange:
502 msg = _("internal error: out of range error");
503 break;
504
505 case bfd_reloc_notsupported:
506 msg = _("internal error: unsupported relocation error");
507 break;
508
509 case bfd_reloc_dangerous:
510 msg = _("internal error: dangerous relocation");
511 break;
512
513 default:
514 msg = _("internal error: unknown error");
515 break;
516 }
517
518 if (msg)
519 r = info->callbacks->warning
520 (info, msg, name, input_bfd, input_section, rel->r_offset);
521
522 if (!r)
523 return FALSE;
524 }
525
526 }
527
528 return TRUE;
529 }
530
531 /* The final processing done just before writing out a MSP430 ELF object
532 file. This gets the MSP430 architecture right based on the machine
533 number. */
534
535 static void
536 bfd_elf_msp430_final_write_processing (bfd * abfd,
537 bfd_boolean linker ATTRIBUTE_UNUSED)
538 {
539 unsigned long val;
540
541 switch (bfd_get_mach (abfd))
542 {
543 default:
544 case bfd_mach_msp110:
545 val = E_MSP430_MACH_MSP430x11x1;
546 break;
547
548 case bfd_mach_msp11:
549 val = E_MSP430_MACH_MSP430x11;
550 break;
551
552 case bfd_mach_msp12:
553 val = E_MSP430_MACH_MSP430x12;
554 break;
555
556 case bfd_mach_msp13:
557 val = E_MSP430_MACH_MSP430x13;
558 break;
559
560 case bfd_mach_msp14:
561 val = E_MSP430_MACH_MSP430x14;
562 break;
563
564 case bfd_mach_msp15:
565 val = E_MSP430_MACH_MSP430x15;
566 break;
567
568 case bfd_mach_msp16:
569 val = E_MSP430_MACH_MSP430x16;
570 break;
571
572 case bfd_mach_msp31:
573 val = E_MSP430_MACH_MSP430x31;
574 break;
575
576 case bfd_mach_msp32:
577 val = E_MSP430_MACH_MSP430x32;
578 break;
579
580 case bfd_mach_msp33:
581 val = E_MSP430_MACH_MSP430x33;
582 break;
583
584 case bfd_mach_msp41:
585 val = E_MSP430_MACH_MSP430x41;
586 break;
587
588 case bfd_mach_msp42:
589 val = E_MSP430_MACH_MSP430x42;
590 break;
591
592 case bfd_mach_msp43:
593 val = E_MSP430_MACH_MSP430x43;
594 break;
595
596 case bfd_mach_msp44:
597 val = E_MSP430_MACH_MSP430x44;
598 break;
599 }
600
601 elf_elfheader (abfd)->e_machine = EM_MSP430;
602 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
603 elf_elfheader (abfd)->e_flags |= val;
604 }
605
606 /* Set the right machine number. */
607
608 static bfd_boolean
609 elf32_msp430_object_p (bfd * abfd)
610 {
611 int e_set = bfd_mach_msp14;
612
613 if (elf_elfheader (abfd)->e_machine == EM_MSP430
614 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
615 {
616 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
617
618 switch (e_mach)
619 {
620 default:
621 case E_MSP430_MACH_MSP430x11:
622 e_set = bfd_mach_msp11;
623 break;
624
625 case E_MSP430_MACH_MSP430x11x1:
626 e_set = bfd_mach_msp110;
627 break;
628
629 case E_MSP430_MACH_MSP430x12:
630 e_set = bfd_mach_msp12;
631 break;
632
633 case E_MSP430_MACH_MSP430x13:
634 e_set = bfd_mach_msp13;
635 break;
636
637 case E_MSP430_MACH_MSP430x14:
638 e_set = bfd_mach_msp14;
639 break;
640
641 case E_MSP430_MACH_MSP430x15:
642 e_set = bfd_mach_msp15;
643 break;
644
645 case E_MSP430_MACH_MSP430x16:
646 e_set = bfd_mach_msp16;
647 break;
648
649 case E_MSP430_MACH_MSP430x31:
650 e_set = bfd_mach_msp31;
651 break;
652
653 case E_MSP430_MACH_MSP430x32:
654 e_set = bfd_mach_msp32;
655 break;
656
657 case E_MSP430_MACH_MSP430x33:
658 e_set = bfd_mach_msp33;
659 break;
660
661 case E_MSP430_MACH_MSP430x41:
662 e_set = bfd_mach_msp41;
663 break;
664
665 case E_MSP430_MACH_MSP430x42:
666 e_set = bfd_mach_msp42;
667 break;
668
669 case E_MSP430_MACH_MSP430x43:
670 e_set = bfd_mach_msp43;
671 break;
672
673 case E_MSP430_MACH_MSP430x44:
674 e_set = bfd_mach_msp44;
675 break;
676 }
677 }
678
679 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
680 }
681
682 static void
683 elf32_msp430_post_process_headers (bfd * abfd,
684 struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
685 {
686 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
687
688 i_ehdrp = elf_elfheader (abfd);
689
690 #ifndef ELFOSABI_STANDALONE
691 #define ELFOSABI_STANDALONE 255
692 #endif
693
694 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE;
695 }
696
697 /* These functions handle relaxing for the msp430.
698 Relaxation required only in two cases:
699 - Bad hand coding like jumps from one section to another or
700 from file to file.
701 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
702 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
703 do not work in gcc's port by the reason I do not know.
704 Anyway, if a relaxation required, user should pass -relax option to the
705 linker.
706
707 There are quite a few relaxing opportunities available on the msp430:
708
709 ================================================================
710
711 1. 3 words -> 1 word
712
713 eq == jeq label jne +4; br lab
714 ne != jne label jeq +4; br lab
715 lt < jl label jge +4; br lab
716 ltu < jlo label lhs +4; br lab
717 ge >= jge label jl +4; br lab
718 geu >= jhs label jlo +4; br lab
719
720 2. 4 words -> 1 word
721
722 ltn < jn jn +2; jmp +4; br lab
723
724 3. 4 words -> 2 words
725
726 gt > jeq +2; jge label jeq +6; jl +4; br label
727 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
728
729 4. 4 words -> 2 words and 2 labels
730
731 leu <= jeq label; jlo label jeq +2; jhs +4; br label
732 le <= jeq label; jl label jeq +2; jge +4; br label
733 =================================================================
734
735 codemap for first cases is (labels masked ):
736 eq: 0x2002,0x4010,0x0000 -> 0x2400
737 ne: 0x2402,0x4010,0x0000 -> 0x2000
738 lt: 0x3402,0x4010,0x0000 -> 0x3800
739 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
740 ge: 0x3802,0x4010,0x0000 -> 0x3400
741 geu: 0x2802,0x4010,0x0000 -> 0x2c00
742
743 second case:
744 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
745
746 third case:
747 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
748 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
749
750 fourth case:
751 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
752 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
753
754 Unspecified case :)
755 jump: 0x4010,0x0000 -> 0x3c00. */
756
757 #define NUMB_RELAX_CODES 12
758 static struct rcodes_s
759 {
760 int f0, f1; /* From code. */
761 int t0, t1; /* To code. */
762 int labels; /* Position of labels: 1 - one label at first
763 word, 2 - one at second word, 3 - two
764 labels at both. */
765 int cdx; /* Words to match. */
766 int bs; /* Shrink bytes. */
767 int off; /* Offset from old label for new code. */
768 int ncl; /* New code length. */
769 } rcode[] =
770 {/* lab,cdx,bs,off,ncl */
771 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
772 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
773 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
774 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
775 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
776 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
777 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
778 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
779 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
780 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
781 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
782 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
783 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
784 };
785
786 /* Return TRUE if a symbol exists at the given address. */
787
788 static bfd_boolean
789 msp430_elf_symbol_address_p (bfd * abfd,
790 asection * sec,
791 Elf_Internal_Sym * isym,
792 bfd_vma addr)
793 {
794 Elf_Internal_Shdr *symtab_hdr;
795 unsigned int sec_shndx;
796 Elf_Internal_Sym *isymend;
797 struct elf_link_hash_entry **sym_hashes;
798 struct elf_link_hash_entry **end_hashes;
799 unsigned int symcount;
800
801 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
802
803 /* Examine all the local symbols. */
804 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
805 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
806 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
807 return TRUE;
808
809 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
810 - symtab_hdr->sh_info);
811 sym_hashes = elf_sym_hashes (abfd);
812 end_hashes = sym_hashes + symcount;
813 for (; sym_hashes < end_hashes; sym_hashes++)
814 {
815 struct elf_link_hash_entry *sym_hash = *sym_hashes;
816
817 if ((sym_hash->root.type == bfd_link_hash_defined
818 || sym_hash->root.type == bfd_link_hash_defweak)
819 && sym_hash->root.u.def.section == sec
820 && sym_hash->root.u.def.value == addr)
821 return TRUE;
822 }
823
824 return FALSE;
825 }
826
827 /* Delete some bytes from a section while relaxing. */
828
829 static bfd_boolean
830 msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
831 int count)
832 {
833 Elf_Internal_Shdr *symtab_hdr;
834 unsigned int sec_shndx;
835 bfd_byte *contents;
836 Elf_Internal_Rela *irel;
837 Elf_Internal_Rela *irelend;
838 Elf_Internal_Rela *irelalign;
839 bfd_vma toaddr;
840 Elf_Internal_Sym *isym;
841 Elf_Internal_Sym *isymend;
842 struct elf_link_hash_entry **sym_hashes;
843 struct elf_link_hash_entry **end_hashes;
844 unsigned int symcount;
845
846 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
847
848 contents = elf_section_data (sec)->this_hdr.contents;
849
850 /* The deletion must stop at the next ALIGN reloc for an aligment
851 power larger than the number of bytes we are deleting. */
852
853 irelalign = NULL;
854 toaddr = sec->size;
855
856 irel = elf_section_data (sec)->relocs;
857 irelend = irel + sec->reloc_count;
858
859 /* Actually delete the bytes. */
860 memmove (contents + addr, contents + addr + count,
861 (size_t) (toaddr - addr - count));
862 sec->size -= count;
863
864 /* Adjust all the relocs. */
865 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
866 /* Get the new reloc address. */
867 if ((irel->r_offset > addr && irel->r_offset < toaddr))
868 irel->r_offset -= count;
869
870 /* Adjust the local symbols defined in this section. */
871 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
872 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
873 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
874 if (isym->st_shndx == sec_shndx
875 && isym->st_value > addr && isym->st_value < toaddr)
876 isym->st_value -= count;
877
878 /* Now adjust the global symbols defined in this section. */
879 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
880 - symtab_hdr->sh_info);
881 sym_hashes = elf_sym_hashes (abfd);
882 end_hashes = sym_hashes + symcount;
883 for (; sym_hashes < end_hashes; sym_hashes++)
884 {
885 struct elf_link_hash_entry *sym_hash = *sym_hashes;
886
887 if ((sym_hash->root.type == bfd_link_hash_defined
888 || sym_hash->root.type == bfd_link_hash_defweak)
889 && sym_hash->root.u.def.section == sec
890 && sym_hash->root.u.def.value > addr
891 && sym_hash->root.u.def.value < toaddr)
892 sym_hash->root.u.def.value -= count;
893 }
894
895 return TRUE;
896 }
897
898
899 static bfd_boolean
900 msp430_elf_relax_section (bfd * abfd, asection * sec,
901 struct bfd_link_info * link_info,
902 bfd_boolean * again)
903 {
904 Elf_Internal_Shdr * symtab_hdr;
905 Elf_Internal_Rela * internal_relocs;
906 Elf_Internal_Rela * irel;
907 Elf_Internal_Rela * irelend;
908 bfd_byte * contents = NULL;
909 Elf_Internal_Sym * isymbuf = NULL;
910
911 /* Assume nothing changes. */
912 *again = FALSE;
913
914 /* We don't have to do anything for a relocatable link, if
915 this section does not have relocs, or if this is not a
916 code section. */
917 if (link_info->relocatable
918 || (sec->flags & SEC_RELOC) == 0
919 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
920 return TRUE;
921
922 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
923
924 /* Get a copy of the native relocations. */
925 internal_relocs =
926 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
927 if (internal_relocs == NULL)
928 goto error_return;
929
930 /* Walk through them looking for relaxing opportunities. */
931 irelend = internal_relocs + sec->reloc_count;
932 for (irel = internal_relocs; irel < irelend; irel++)
933 {
934 bfd_vma symval;
935
936 /* If this isn't something that can be relaxed, then ignore
937 this reloc. */
938 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
939 continue;
940
941 /* Get the section contents if we haven't done so already. */
942 if (contents == NULL)
943 {
944 /* Get cached copy if it exists. */
945 if (elf_section_data (sec)->this_hdr.contents != NULL)
946 contents = elf_section_data (sec)->this_hdr.contents;
947 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
948 goto error_return;
949 }
950
951 /* Read this BFD's local symbols if we haven't done so already. */
952 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
953 {
954 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
955 if (isymbuf == NULL)
956 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
957 symtab_hdr->sh_info, 0,
958 NULL, NULL, NULL);
959 if (isymbuf == NULL)
960 goto error_return;
961 }
962
963 /* Get the value of the symbol referred to by the reloc. */
964 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
965 {
966 /* A local symbol. */
967 Elf_Internal_Sym *isym;
968 asection *sym_sec;
969
970 isym = isymbuf + ELF32_R_SYM (irel->r_info);
971 if (isym->st_shndx == SHN_UNDEF)
972 sym_sec = bfd_und_section_ptr;
973 else if (isym->st_shndx == SHN_ABS)
974 sym_sec = bfd_abs_section_ptr;
975 else if (isym->st_shndx == SHN_COMMON)
976 sym_sec = bfd_com_section_ptr;
977 else
978 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
979 symval = (isym->st_value
980 + sym_sec->output_section->vma + sym_sec->output_offset);
981 }
982 else
983 {
984 unsigned long indx;
985 struct elf_link_hash_entry *h;
986
987 /* An external symbol. */
988 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
989 h = elf_sym_hashes (abfd)[indx];
990 BFD_ASSERT (h != NULL);
991
992 if (h->root.type != bfd_link_hash_defined
993 && h->root.type != bfd_link_hash_defweak)
994 /* This appears to be a reference to an undefined
995 symbol. Just ignore it--it will be caught by the
996 regular reloc processing. */
997 continue;
998
999 symval = (h->root.u.def.value
1000 + h->root.u.def.section->output_section->vma
1001 + h->root.u.def.section->output_offset);
1002 }
1003
1004 /* For simplicity of coding, we are going to modify the section
1005 contents, the section relocs, and the BFD symbol table. We
1006 must tell the rest of the code not to free up this
1007 information. It would be possible to instead create a table
1008 of changes which have to be made, as is done in coff-mips.c;
1009 that would be more work, but would require less memory when
1010 the linker is run. */
1011
1012 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1013 branch. */
1014 /* Paranoia? paranoia... */
1015 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1016 {
1017 bfd_vma value = symval;
1018
1019 /* Deal with pc-relative gunk. */
1020 value -= (sec->output_section->vma + sec->output_offset);
1021 value -= irel->r_offset;
1022 value += irel->r_addend;
1023
1024 /* See if the value will fit in 10 bits, note the high value is
1025 1016 as the target will be two bytes closer if we are
1026 able to relax. */
1027 if ((long) value < 1016 && (long) value > -1016)
1028 {
1029 int code0 = 0, code1 = 0, code2 = 0;
1030 int i;
1031 struct rcodes_s *rx;
1032
1033 /* Get the opcode. */
1034 if (irel->r_offset >= 6)
1035 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1036
1037 if (irel->r_offset >= 4)
1038 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1039
1040 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1041
1042 if (code2 != 0x4010)
1043 continue;
1044
1045 /* Check r4 and r3. */
1046 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1047 {
1048 rx = &rcode[i];
1049 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1050 break;
1051 else if (rx->cdx == 1 && rx->f1 == code1)
1052 break;
1053 else if (rx->cdx == 0) /* This is an unconditional jump. */
1054 break;
1055 }
1056
1057 /* Check labels:
1058 .Label0: ; we do not care about this label
1059 jeq +6
1060 .Label1: ; make sure there is no label here
1061 jl +4
1062 .Label2: ; make sure there is no label here
1063 br .Label_dst
1064
1065 So, if there is .Label1 or .Label2 we cannot relax this code.
1066 This actually should not happen, cause for relaxable
1067 instructions we use RL_PCREL reloc instead of 16_PCREL.
1068 Will change this in the future. */
1069
1070 if (rx->cdx > 0
1071 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1072 irel->r_offset - 2))
1073 continue;
1074 if (rx->cdx > 1
1075 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1076 irel->r_offset - 4))
1077 continue;
1078
1079 /* Note that we've changed the relocs, section contents, etc. */
1080 elf_section_data (sec)->relocs = internal_relocs;
1081 elf_section_data (sec)->this_hdr.contents = contents;
1082 symtab_hdr->contents = (unsigned char *) isymbuf;
1083
1084 /* Fix the relocation's type. */
1085 if (rx->labels == 3) /* Handle special cases. */
1086 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1087 R_MSP430_2X_PCREL);
1088 else
1089 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1090 R_MSP430_10_PCREL);
1091
1092 /* Fix the opcode right way. */
1093 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1094 if (rx->t1)
1095 bfd_put_16 (abfd, rx->t1,
1096 contents + irel->r_offset - rx->off + 2);
1097
1098 /* Delete bytes. */
1099 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1100 irel->r_offset - rx->off +
1101 rx->ncl, rx->bs))
1102 goto error_return;
1103
1104 /* Handle unconditional jumps. */
1105 if (rx->cdx == 0)
1106 irel->r_offset -= 2;
1107
1108 /* That will change things, so, we should relax again.
1109 Note that this is not required, and it may be slow. */
1110 *again = TRUE;
1111 }
1112 }
1113 }
1114
1115 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1116 {
1117 if (!link_info->keep_memory)
1118 free (isymbuf);
1119 else
1120 {
1121 /* Cache the symbols for elf_link_input_bfd. */
1122 symtab_hdr->contents = (unsigned char *) isymbuf;
1123 }
1124 }
1125
1126 if (contents != NULL
1127 && elf_section_data (sec)->this_hdr.contents != contents)
1128 {
1129 if (!link_info->keep_memory)
1130 free (contents);
1131 else
1132 {
1133 /* Cache the section contents for elf_link_input_bfd. */
1134 elf_section_data (sec)->this_hdr.contents = contents;
1135 }
1136 }
1137
1138 if (internal_relocs != NULL
1139 && elf_section_data (sec)->relocs != internal_relocs)
1140 free (internal_relocs);
1141
1142 return TRUE;
1143
1144 error_return:
1145 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1146 free (isymbuf);
1147 if (contents != NULL
1148 && elf_section_data (sec)->this_hdr.contents != contents)
1149 free (contents);
1150 if (internal_relocs != NULL
1151 && elf_section_data (sec)->relocs != internal_relocs)
1152 free (internal_relocs);
1153
1154 return FALSE;
1155 }
1156
1157
1158 #define ELF_ARCH bfd_arch_msp430
1159 #define ELF_MACHINE_CODE EM_MSP430
1160 #define ELF_MACHINE_ALT1 EM_MSP430_OLD
1161 #define ELF_MAXPAGESIZE 1
1162
1163 #define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1164 #define TARGET_LITTLE_NAME "elf32-msp430"
1165
1166 #define elf_info_to_howto msp430_info_to_howto_rela
1167 #define elf_info_to_howto_rel NULL
1168 #define elf_backend_relocate_section elf32_msp430_relocate_section
1169 #define elf_backend_gc_mark_hook elf32_msp430_gc_mark_hook
1170 #define elf_backend_gc_sweep_hook elf32_msp430_gc_sweep_hook
1171 #define elf_backend_check_relocs elf32_msp430_check_relocs
1172 #define elf_backend_can_gc_sections 1
1173 #define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1174 #define elf_backend_object_p elf32_msp430_object_p
1175 #define elf_backend_post_process_headers elf32_msp430_post_process_headers
1176 #define bfd_elf32_bfd_relax_section msp430_elf_relax_section
1177
1178 #include "elf32-target.h"
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