2006-02-20 Paolo Bonzini <bonzini@gnu.org>
[binutils.git] / opcodes / ppc-dis.c
blob35875d1ac33f9f0ac8cf205e00c185871b4badf9
1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of GDB, GAS, and the GNU binutils.
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 2, or (at your option) any later version.
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
22 #include <stdio.h>
23 #include "sysdep.h"
24 #include "dis-asm.h"
25 #include "opcode/ppc.h"
27 /* This file provides several disassembler functions, all of which use
28 the disassembler interface defined in dis-asm.h. Several functions
29 are provided because this file handles disassembly for the PowerPC
30 in both big and little endian mode and also for the POWER (RS/6000)
31 chip. */
33 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
35 /* Determine which set of machines to disassemble for. PPC403/601 or
36 BookE. For convenience, also disassemble instructions supported
37 by the AltiVec vector unit. */
39 static int
40 powerpc_dialect (struct disassemble_info *info)
42 int dialect = PPC_OPCODE_PPC;
44 if (BFD_DEFAULT_TARGET_SIZE == 64)
45 dialect |= PPC_OPCODE_64;
47 if (info->disassembler_options
48 && strstr (info->disassembler_options, "booke") != NULL)
49 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
50 else if ((info->mach == bfd_mach_ppc_e500)
51 || (info->disassembler_options
52 && strstr (info->disassembler_options, "e500") != NULL))
53 dialect |= (PPC_OPCODE_BOOKE
54 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
55 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
56 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
57 | PPC_OPCODE_RFMCI);
58 else if (info->disassembler_options
59 && strstr (info->disassembler_options, "efs") != NULL)
60 dialect |= PPC_OPCODE_EFS;
61 else if (info->disassembler_options
62 && strstr (info->disassembler_options, "e300") != NULL)
63 dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
64 else
65 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
66 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
68 if (info->disassembler_options
69 && strstr (info->disassembler_options, "power4") != NULL)
70 dialect |= PPC_OPCODE_POWER4;
72 if (info->disassembler_options
73 && strstr (info->disassembler_options, "power5") != NULL)
74 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
76 if (info->disassembler_options
77 && strstr (info->disassembler_options, "any") != NULL)
78 dialect |= PPC_OPCODE_ANY;
80 if (info->disassembler_options)
82 if (strstr (info->disassembler_options, "32") != NULL)
83 dialect &= ~PPC_OPCODE_64;
84 else if (strstr (info->disassembler_options, "64") != NULL)
85 dialect |= PPC_OPCODE_64;
88 info->private_data = (char *) 0 + dialect;
89 return dialect;
92 /* Print a big endian PowerPC instruction. */
94 int
95 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
97 int dialect = (char *) info->private_data - (char *) 0;
98 return print_insn_powerpc (memaddr, info, 1, dialect);
101 /* Print a little endian PowerPC instruction. */
104 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
106 int dialect = (char *) info->private_data - (char *) 0;
107 return print_insn_powerpc (memaddr, info, 0, dialect);
110 /* Print a POWER (RS/6000) instruction. */
113 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
115 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
118 /* Print a PowerPC or POWER instruction. */
120 static int
121 print_insn_powerpc (bfd_vma memaddr,
122 struct disassemble_info *info,
123 int bigendian,
124 int dialect)
126 bfd_byte buffer[4];
127 int status;
128 unsigned long insn;
129 const struct powerpc_opcode *opcode;
130 const struct powerpc_opcode *opcode_end;
131 unsigned long op;
133 if (dialect == 0)
134 dialect = powerpc_dialect (info);
136 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
137 if (status != 0)
139 (*info->memory_error_func) (status, memaddr, info);
140 return -1;
143 if (bigendian)
144 insn = bfd_getb32 (buffer);
145 else
146 insn = bfd_getl32 (buffer);
148 /* Get the major opcode of the instruction. */
149 op = PPC_OP (insn);
151 /* Find the first match in the opcode table. We could speed this up
152 a bit by doing a binary search on the major opcode. */
153 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
154 again:
155 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
157 unsigned long table_op;
158 const unsigned char *opindex;
159 const struct powerpc_operand *operand;
160 int invalid;
161 int need_comma;
162 int need_paren;
164 table_op = PPC_OP (opcode->opcode);
165 if (op < table_op)
166 break;
167 if (op > table_op)
168 continue;
170 if ((insn & opcode->mask) != opcode->opcode
171 || (opcode->flags & dialect) == 0)
172 continue;
174 /* Make two passes over the operands. First see if any of them
175 have extraction functions, and, if they do, make sure the
176 instruction is valid. */
177 invalid = 0;
178 for (opindex = opcode->operands; *opindex != 0; opindex++)
180 operand = powerpc_operands + *opindex;
181 if (operand->extract)
182 (*operand->extract) (insn, dialect, &invalid);
184 if (invalid)
185 continue;
187 /* The instruction is valid. */
188 if (opcode->operands[0] != 0)
189 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
190 else
191 (*info->fprintf_func) (info->stream, "%s", opcode->name);
193 /* Now extract and print the operands. */
194 need_comma = 0;
195 need_paren = 0;
196 for (opindex = opcode->operands; *opindex != 0; opindex++)
198 long value;
200 operand = powerpc_operands + *opindex;
202 /* Operands that are marked FAKE are simply ignored. We
203 already made sure that the extract function considered
204 the instruction to be valid. */
205 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
206 continue;
208 /* Extract the value from the instruction. */
209 if (operand->extract)
210 value = (*operand->extract) (insn, dialect, &invalid);
211 else
213 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
214 if ((operand->flags & PPC_OPERAND_SIGNED) != 0
215 && (value & (1 << (operand->bits - 1))) != 0)
216 value -= 1 << operand->bits;
219 /* If the operand is optional, and the value is zero, don't
220 print anything. */
221 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
222 && (operand->flags & PPC_OPERAND_NEXT) == 0
223 && value == 0)
224 continue;
226 if (need_comma)
228 (*info->fprintf_func) (info->stream, ",");
229 need_comma = 0;
232 /* Print the operand as directed by the flags. */
233 if ((operand->flags & PPC_OPERAND_GPR) != 0
234 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
235 (*info->fprintf_func) (info->stream, "r%ld", value);
236 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
237 (*info->fprintf_func) (info->stream, "f%ld", value);
238 else if ((operand->flags & PPC_OPERAND_VR) != 0)
239 (*info->fprintf_func) (info->stream, "v%ld", value);
240 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
241 (*info->print_address_func) (memaddr + value, info);
242 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
243 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
244 else if ((operand->flags & PPC_OPERAND_CR) == 0
245 || (dialect & PPC_OPCODE_PPC) == 0)
246 (*info->fprintf_func) (info->stream, "%ld", value);
247 else
249 if (operand->bits == 3)
250 (*info->fprintf_func) (info->stream, "cr%ld", value);
251 else
253 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
254 int cr;
255 int cc;
257 cr = value >> 2;
258 if (cr != 0)
259 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
260 cc = value & 3;
261 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
265 if (need_paren)
267 (*info->fprintf_func) (info->stream, ")");
268 need_paren = 0;
271 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
272 need_comma = 1;
273 else
275 (*info->fprintf_func) (info->stream, "(");
276 need_paren = 1;
280 /* We have found and printed an instruction; return. */
281 return 4;
284 if ((dialect & PPC_OPCODE_ANY) != 0)
286 dialect = ~PPC_OPCODE_ANY;
287 goto again;
290 /* We could not find a match. */
291 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
293 return 4;
296 void
297 print_ppc_disassembler_options (FILE *stream)
299 fprintf (stream, "\n\
300 The following PPC specific disassembler options are supported for use with\n\
301 the -M switch:\n");
303 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
304 fprintf (stream, " e300 Disassemble the e300 instructions\n");
305 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
306 fprintf (stream, " efs Disassemble the EFS instructions\n");
307 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
308 fprintf (stream, " power5 Disassemble the Power5 instructions\n");
309 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
310 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");