| blob | 959a9e67185bee9c955d35bdb695be21d5d4b642 |
1 2006-08-01 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
4 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
5 BFD_RELOC_32 and BFD_RELOC_16.
6 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
7 md_convert_frag, md_obj_end): Fix comment formatting.
9 2006-07-31 Thiemo Seufer <ths@mips.com>
11 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
12 handling for BFD_RELOC_MIPS16_JMP.
14 2006-07-24 Andreas Schwab <schwab@suse.de>
16 PR/2756
17 * read.c (read_a_source_file): Ignore unknown text after line
18 comment character. Fix misleading comment.
20 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
22 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
23 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
24 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
25 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
26 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
27 doc/c-z80.texi, doc/internals.texi: Fix some typos.
29 2006-07-21 Nick Clifton <nickc@redhat.com>
31 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
32 linker testsuite.
34 2006-07-20 Thiemo Seufer <ths@mips.com>
35 Nigel Stephens <nigel@mips.com>
37 * config/tc-mips.c (md_parse_option): Don't infer optimisation
38 options from debug options.
40 2006-07-20 Thiemo Seufer <ths@mips.com>
42 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
43 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
45 2006-07-19 Paul Brook <paul@codesourcery.com>
47 * config/tc-arm.c (insns): Fix rbit Arm opcode.
49 2006-07-18 Paul Brook <paul@codesourcery.com>
51 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
52 (md_convert_frag): Use correct reloc for add_pc. Use
53 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
54 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
55 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
57 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
59 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
60 when file and line unknown.
62 2006-07-17 Thiemo Seufer <ths@mips.com>
64 * read.c (s_struct): Use IS_ELF.
65 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
66 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
67 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
68 s_mips_mask): Likewise.
70 2006-07-16 Thiemo Seufer <ths@mips.com>
71 David Ung <davidu@mips.com>
73 * read.c (s_struct): Handle ELF section changing.
74 * config/tc-mips.c (s_align): Leave enabling auto-align to the
75 generic code.
76 (s_change_sec): Try section changing only if we output ELF.
78 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
80 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
81 CpuAmdFam10.
82 (smallest_imm_type): Remove Cpu086.
83 (i386_target_format): Likewise.
85 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
86 Update CpuXXX.
88 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
89 Michael Meissner <michael.meissner@amd.com>
91 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
92 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
93 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
94 architecture.
95 (i386_align_code): Ditto.
96 (md_assemble_code): Add support for insertq/extrq instructions,
97 swapping as needed for intel syntax.
98 (swap_imm_operands): New function to swap immediate operands.
99 (swap_operands): Deal with 4 operand instructions.
100 (build_modrm_byte): Add support for insertq instruction.
102 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
104 * config/tc-i386.h (Size64): Fix a typo in comment.
106 2006-07-12 Nick Clifton <nickc@redhat.com>
108 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
109 fixup_segment() to repeat a range check on a value that has
110 already been checked here.
112 2006-07-07 James E Wilson <wilson@specifix.com>
114 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
116 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
117 Nick Clifton <nickc@redhat.com>
119 PR binutils/2877
120 * doc/as.texi: Fix spelling typo: branchs => branches.
121 * doc/c-m68hc11.texi: Likewise.
122 * config/tc-m68hc11.c: Likewise.
123 Support old spelling of command line switch for backwards
124 compatibility.
126 2006-07-04 Thiemo Seufer <ths@mips.com>
127 David Ung <davidu@mips.com>
129 * config/tc-mips.c (s_is_linkonce): New function.
130 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
131 weak, external, and linkonce symbols.
132 (pic_need_relax): Use s_is_linkonce.
134 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
136 * doc/as.texinfo (Org): Remove space.
137 (P2align): Add "@var{abs-expr},".
139 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
141 * config/tc-i386.c (cpu_arch_tune_set): New.
142 (cpu_arch_isa): Likewise.
143 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
144 nops with short or long nop sequences based on -march=/.arch
145 and -mtune=.
146 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
147 set cpu_arch_tune and cpu_arch_tune_flags.
148 (md_parse_option): For -march=, set cpu_arch_isa and set
149 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
150 0. Set cpu_arch_tune_set to 1 for -mtune=.
151 (i386_target_format): Don't set cpu_arch_tune.
153 2006-06-23 Nigel Stephens <nigel@mips.com>
155 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
156 generated .sbss.* and .gnu.linkonce.sb.*.
158 2006-06-23 Thiemo Seufer <ths@mips.com>
159 David Ung <davidu@mips.com>
161 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
162 label_list.
163 * config/tc-mips.c (label_list): Define per-segment label_list.
164 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
165 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
166 mips_from_file_after_relocs, mips_define_label): Use per-segment
167 label_list.
169 2006-06-22 Thiemo Seufer <ths@mips.com>
171 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
172 (append_insn): Use it.
173 (md_apply_fix): Whitespace formatting.
174 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
175 mips16_extended_frag): Remove register specifier.
176 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
177 constants.
179 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
181 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
182 a directive saving VFP registers for ARMv6 or later.
183 (s_arm_unwind_save): Add parameter arch_v6 and call
184 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
185 appropriate.
186 (md_pseudo_table): Add entry for new "vsave" directive.
187 * doc/c-arm.texi: Correct error in example for "save"
188 directive (fstmdf -> fstmdx). Also document "vsave" directive.
190 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
191 Anatoly Sokolov <aesok@post.ru>
193 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
194 and atmega644p devices. Rename atmega164/atmega324 devices to
195 atmega164p/atmega324p.
196 * doc/c-avr.texi: Document new mcu and arch options.
198 2006-06-17 Nick Clifton <nickc@redhat.com>
200 * config/tc-arm.c (enum parse_operand_result): Move outside of
201 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
203 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
205 * config/tc-i386.h (processor_type): New.
206 (arch_entry): Add type.
208 * config/tc-i386.c (cpu_arch_tune): New.
209 (cpu_arch_tune_flags): Likewise.
210 (cpu_arch_isa_flags): Likewise.
211 (cpu_arch): Updated.
212 (set_cpu_arch): Also update cpu_arch_isa_flags.
213 (md_assemble): Update cpu_arch_isa_flags.
214 (OPTION_MARCH): New.
215 (OPTION_MTUNE): Likewise.
216 (md_longopts): Add -march= and -mtune=.
217 (md_parse_option): Support -march= and -mtune=.
218 (md_show_usage): Add -march=CPU/-mtune=CPU.
219 (i386_target_format): Also update cpu_arch_isa_flags,
220 cpu_arch_tune and cpu_arch_tune_flags.
222 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
224 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
226 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
228 * config/tc-arm.c (enum parse_operand_result): New.
229 (struct group_reloc_table_entry): New.
230 (enum group_reloc_type): New.
231 (group_reloc_table): New array.
232 (find_group_reloc_table_entry): New function.
233 (parse_shifter_operand_group_reloc): New function.
234 (parse_address_main): New function, incorporating code
235 from the old parse_address function. To be used via...
236 (parse_address): wrapper for parse_address_main; and
237 (parse_address_group_reloc): new function, likewise.
238 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
239 OP_ADDRGLDRS, OP_ADDRGLDC.
240 (parse_operands): Support for these new operand codes.
241 New macro po_misc_or_fail_no_backtrack.
242 (encode_arm_cp_address): Preserve group relocations.
243 (insns): Modify to use the above operand codes where group
244 relocations are permitted.
245 (md_apply_fix): Handle the group relocations
246 ALU_PC_G0_NC through LDC_SB_G2.
247 (tc_gen_reloc): Likewise.
248 (arm_force_relocation): Leave group relocations for the linker.
249 (arm_fix_adjustable): Likewise.
251 2006-06-15 Julian Brown <julian@codesourcery.com>
253 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
254 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
255 relocs properly.
257 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
259 * config/tc-i386.c (process_suffix): Don't add rex64 for
260 "xchg %rax,%rax".
262 2006-06-09 Thiemo Seufer <ths@mips.com>
264 * config/tc-mips.c (mips_ip): Maintain argument count.
266 2006-06-09 Alan Modra <amodra@bigpond.net.au>
268 * config/tc-iq2000.c: Include sb.h.
270 2006-06-08 Nigel Stephens <nigel@mips.com>
272 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
273 aliases for better compatibility with SGI tools.
275 2006-06-08 Alan Modra <amodra@bigpond.net.au>
277 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
278 * Makefile.am (GASLIBS): Expand @BFDLIB@.
279 (BFDVER_H): Delete.
280 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
281 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
282 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
283 Run "make dep-am".
284 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
285 * Makefile.in: Regenerate.
286 * doc/Makefile.in: Regenerate.
287 * configure: Regenerate.
289 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
291 * po/Make-in (pdf, ps): New dummy targets.
293 2006-06-07 Julian Brown <julian@codesourcery.com>
295 * config/tc-arm.c (stdarg.h): include.
296 (arm_it): Add uncond_value field. Add isvec and issingle to operand
297 array.
298 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
299 REG_TYPE_NSDQ (single, double or quad vector reg).
300 (reg_expected_msgs): Update.
301 (BAD_FPU): Add macro for unsupported FPU instruction error.
302 (parse_neon_type): Support 'd' as an alias for .f64.
303 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
304 sets of registers.
305 (parse_vfp_reg_list): Don't update first arg on error.
306 (parse_neon_mov): Support extra syntax for VFP moves.
307 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
308 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
309 (parse_operands): Support isvec, issingle operands fields, new parse
310 codes above.
311 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
312 msr variants.
313 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
314 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
315 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
316 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
317 shapes.
318 (neon_shape): Redefine in terms of above.
319 (neon_shape_class): New enumeration, table of shape classes.
320 (neon_shape_el): New enumeration. One element of a shape.
321 (neon_shape_el_size): Register widths of above, where appropriate.
322 (neon_shape_info): New struct. Info for shape table.
323 (neon_shape_tab): New array.
324 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
325 (neon_check_shape): Rewrite as...
326 (neon_select_shape): New function to classify instruction shapes,
327 driven by new table neon_shape_tab array.
328 (neon_quad): New function. Return 1 if shape should set Q flag in
329 instructions (or equivalent), 0 otherwise.
330 (type_chk_of_el_type): Support F64.
331 (el_type_of_type_chk): Likewise.
332 (neon_check_type): Add support for VFP type checking (VFP data
333 elements fill their containing registers).
334 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
335 in thumb mode for VFP instructions.
336 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
337 and encode the current instruction as if it were that opcode.
338 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
339 arguments, call function in PFN.
340 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
341 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
342 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
343 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
344 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
345 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
346 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
347 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
348 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
349 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
350 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
351 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
352 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
353 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
354 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
355 neon_quad.
356 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
357 between VFP and Neon turns out to belong to Neon. Perform
358 architecture check and fill in condition field if appropriate.
359 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
360 (do_neon_cvt): Add support for VFP variants of instructions.
361 (neon_cvt_flavour): Extend to cover VFP conversions.
362 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
363 vmov variants.
364 (do_neon_ldr_str): Handle single-precision VFP load/store.
365 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
366 NS_NULL not NS_IGNORE.
367 (opcode_tag): Add OT_csuffixF for operands which either take a
368 conditional suffix, or have 0xF in the condition field.
369 (md_assemble): Add support for OT_csuffixF.
370 (NCE): Replace macro with...
371 (NCE_tag, NCE, NCEF): New macros.
372 (nCE): Replace macro with...
373 (nCE_tag, nCE, nCEF): New macros.
374 (insns): Add support for VFP insns or VFP versions of insns msr,
375 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
376 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
377 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
378 VFP/Neon insns together.
380 2006-06-07 Alan Modra <amodra@bigpond.net.au>
381 Ladislav Michl <ladis@linux-mips.org>
383 * app.c: Don't include headers already included by as.h.
384 * as.c: Likewise.
385 * atof-generic.c: Likewise.
386 * cgen.c: Likewise.
387 * dwarf2dbg.c: Likewise.
388 * expr.c: Likewise.
389 * input-file.c: Likewise.
390 * input-scrub.c: Likewise.
391 * macro.c: Likewise.
392 * output-file.c: Likewise.
393 * read.c: Likewise.
394 * sb.c: Likewise.
395 * config/bfin-lex.l: Likewise.
396 * config/obj-coff.h: Likewise.
397 * config/obj-elf.h: Likewise.
398 * config/obj-som.h: Likewise.
399 * config/tc-arc.c: Likewise.
400 * config/tc-arm.c: Likewise.
401 * config/tc-avr.c: Likewise.
402 * config/tc-bfin.c: Likewise.
403 * config/tc-cris.c: Likewise.
404 * config/tc-d10v.c: Likewise.
405 * config/tc-d30v.c: Likewise.
406 * config/tc-dlx.h: Likewise.
407 * config/tc-fr30.c: Likewise.
408 * config/tc-frv.c: Likewise.
409 * config/tc-h8300.c: Likewise.
410 * config/tc-hppa.c: Likewise.
411 * config/tc-i370.c: Likewise.
412 * config/tc-i860.c: Likewise.
413 * config/tc-i960.c: Likewise.
414 * config/tc-ip2k.c: Likewise.
415 * config/tc-iq2000.c: Likewise.
416 * config/tc-m32c.c: Likewise.
417 * config/tc-m32r.c: Likewise.
418 * config/tc-maxq.c: Likewise.
419 * config/tc-mcore.c: Likewise.
420 * config/tc-mips.c: Likewise.
421 * config/tc-mmix.c: Likewise.
422 * config/tc-mn10200.c: Likewise.
423 * config/tc-mn10300.c: Likewise.
424 * config/tc-msp430.c: Likewise.
425 * config/tc-mt.c: Likewise.
426 * config/tc-ns32k.c: Likewise.
427 * config/tc-openrisc.c: Likewise.
428 * config/tc-ppc.c: Likewise.
429 * config/tc-s390.c: Likewise.
430 * config/tc-sh.c: Likewise.
431 * config/tc-sh64.c: Likewise.
432 * config/tc-sparc.c: Likewise.
433 * config/tc-tic30.c: Likewise.
434 * config/tc-tic4x.c: Likewise.
435 * config/tc-tic54x.c: Likewise.
436 * config/tc-v850.c: Likewise.
437 * config/tc-vax.c: Likewise.
438 * config/tc-xc16x.c: Likewise.
439 * config/tc-xstormy16.c: Likewise.
440 * config/tc-xtensa.c: Likewise.
441 * config/tc-z80.c: Likewise.
442 * config/tc-z8k.c: Likewise.
443 * macro.h: Don't include sb.h or ansidecl.h.
444 * sb.h: Don't include stdio.h or ansidecl.h.
445 * cond.c: Include sb.h.
446 * itbl-lex.l: Include as.h instead of other system headers.
447 * itbl-parse.y: Likewise.
448 * itbl-ops.c: Similarly.
449 * itbl-ops.h: Don't include as.h or ansidecl.h.
450 * config/bfin-defs.h: Don't include bfd.h or as.h.
451 * config/bfin-parse.y: Include as.h instead of other system headers.
453 2006-06-06 Ben Elliston <bje@au.ibm.com>
454 Anton Blanchard <anton@samba.org>
456 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
457 (md_show_usage): Document it.
458 (ppc_setup_opcodes): Test power6 opcode flag bits.
459 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
461 2006-06-06 Thiemo Seufer <ths@mips.com>
462 Chao-ying Fu <fu@mips.com>
464 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
465 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
466 (macro_build): Update comment.
467 (mips_ip): Allow DSP64 instructions for MIPS64R2.
468 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
469 CPU_HAS_MDMX.
470 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
471 MIPS_CPU_ASE_MDMX flags for sb1.
473 2006-06-05 Thiemo Seufer <ths@mips.com>
475 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
476 appropriate.
477 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
478 (mips_ip): Make overflowed/underflowed constant arguments in DSP
479 and MT instructions a fatal error. Use INSERT_OPERAND where
480 appropriate. Improve warnings for break and wait code overflows.
481 Use symbolic constant of OP_MASK_COPZ.
482 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
484 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
486 * po/Make-in (top_builddir): Define.
488 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
490 * doc/Makefile.am (TEXI2DVI): Define.
491 * doc/Makefile.in: Regenerate.
492 * doc/c-arc.texi: Fix typo.
494 2006-06-01 Alan Modra <amodra@bigpond.net.au>
496 * config/obj-ieee.c: Delete.
497 * config/obj-ieee.h: Delete.
498 * Makefile.am (OBJ_FORMATS): Remove ieee.
499 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
500 (obj-ieee.o): Remove rule.
501 * Makefile.in: Regenerate.
502 * configure.in (atof): Remove tahoe.
503 (OBJ_MAYBE_IEEE): Don't define.
504 * configure: Regenerate.
505 * config.in: Regenerate.
506 * doc/Makefile.in: Regenerate.
507 * po/POTFILES.in: Regenerate.
509 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
511 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
512 and LIBINTL_DEP everywhere.
513 (INTLLIBS): Remove.
514 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
515 * acinclude.m4: Include new gettext macros.
516 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
517 Remove local code for po/Makefile.
518 * Makefile.in, configure, doc/Makefile.in: Regenerated.
520 2006-05-30 Nick Clifton <nickc@redhat.com>
522 * po/es.po: Updated Spanish translation.
524 2006-05-06 Denis Chertykov <denisc@overta.ru>
526 * doc/c-avr.texi: New file.
527 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
528 * doc/all.texi: Set AVR
529 * doc/as.texinfo: Include c-avr.texi
531 2006-05-28 Jie Zhang <jie.zhang@analog.com>
533 * config/bfin-parse.y (check_macfunc): Loose the condition of
534 calling check_multiply_halfregs ().
536 2006-05-25 Jie Zhang <jie.zhang@analog.com>
538 * config/bfin-parse.y (asm_1): Better check and deal with
539 vector and scalar Multiply 16-Bit Operands instructions.
541 2006-05-24 Nick Clifton <nickc@redhat.com>
543 * config/tc-hppa.c: Convert to ISO C90 format.
544 * config/tc-hppa.h: Likewise.
546 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
547 Randolph Chung <randolph@tausq.org>
549 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
550 is_tls_ieoff, is_tls_leoff): Define.
551 (fix_new_hppa): Handle TLS.
552 (cons_fix_new_hppa): Likewise.
553 (pa_ip): Likewise.
554 (md_apply_fix): Handle TLS relocs.
555 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
557 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
559 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
561 2006-05-23 Thiemo Seufer <ths@mips.com>
562 David Ung <davidu@mips.com>
563 Nigel Stephens <nigel@mips.com>
565 [ gas/ChangeLog ]
566 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
567 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
568 ISA_HAS_MXHC1): New macros.
569 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
570 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
571 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
572 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
573 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
574 (mips_after_parse_args): Change default handling of float register
575 size to account for 32bit code with 64bit FP. Better sanity checking
576 of ISA/ASE/ABI option combinations.
577 (s_mipsset): Support switching of GPR and FPR sizes via
578 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
579 options.
580 (mips_elf_final_processing): We should record the use of 64bit FP
581 registers in 32bit code but we don't, because ELF header flags are
582 a scarce ressource.
583 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
584 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
585 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
586 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
587 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
588 missing -march options. Document .set arch=CPU. Move .set smartmips
589 to ASE page. Use @code for .set FOO examples.
591 2006-05-23 Jie Zhang <jie.zhang@analog.com>
593 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
594 if needed.
596 2006-05-23 Jie Zhang <jie.zhang@analog.com>
598 * config/bfin-defs.h (bfin_equals): Remove declaration.
599 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
600 * config/tc-bfin.c (bfin_name_is_register): Remove.
601 (bfin_equals): Remove.
602 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
603 (bfin_name_is_register): Remove declaration.
605 2006-05-19 Thiemo Seufer <ths@mips.com>
606 Nigel Stephens <nigel@mips.com>
608 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
609 (mips_oddfpreg_ok): New function.
610 (mips_ip): Use it.
612 2006-05-19 Thiemo Seufer <ths@mips.com>
613 David Ung <davidu@mips.com>
615 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
616 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
617 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
618 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
619 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
620 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
621 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
622 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
623 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
624 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
625 reg_names_o32, reg_names_n32n64): Define register classes.
626 (reg_lookup): New function, use register classes.
627 (md_begin): Reserve register names in the symbol table. Simplify
628 OBJ_ELF defines.
629 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
630 Use reg_lookup.
631 (mips16_ip): Use reg_lookup.
632 (tc_get_register): Likewise.
633 (tc_mips_regname_to_dw2regnum): New function.
635 2006-05-19 Thiemo Seufer <ths@mips.com>
637 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
638 Un-constify string argument.
639 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
640 Likewise.
641 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
642 Likewise.
643 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
644 Likewise.
645 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
646 Likewise.
647 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
648 Likewise.
649 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
650 Likewise.
652 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
654 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
655 cfloat/m68881 to correct architecture before using it.
657 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
659 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
660 constant values.
662 2006-05-15 Paul Brook <paul@codesourcery.com>
664 * config/tc-arm.c (arm_adjust_symtab): Use
665 bfd_is_arm_special_symbol_name.
667 2006-05-15 Bob Wilson <bob.wilson@acm.org>
669 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
670 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
671 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
672 Handle errors from calls to xtensa_opcode_is_* functions.
674 2006-05-14 Thiemo Seufer <ths@mips.com>
676 * config/tc-mips.c (macro_build): Test for currently active
677 mips16 option.
678 (mips16_ip): Reject invalid opcodes.
680 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
682 * doc/as.texinfo: Rename "Index" to "AS Index",
683 and "ABORT" to "ABORT (COFF)".
685 2006-05-11 Paul Brook <paul@codesourcery.com>
687 * config/tc-arm.c (parse_half): New function.
688 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
689 (parse_operands): Ditto.
690 (do_mov16): Reject invalid relocations.
691 (do_t_mov16): Ditto. Use Thumb reloc numbers.
692 (insns): Replace Iffff with HALF.
693 (md_apply_fix): Add MOVW and MOVT relocs.
694 (tc_gen_reloc): Ditto.
695 * doc/c-arm.texi: Document relocation operators
697 2006-05-11 Paul Brook <paul@codesourcery.com>
699 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
701 2006-05-11 Thiemo Seufer <ths@mips.com>
703 * config/tc-mips.c (append_insn): Don't check the range of j or
704 jal addresses.
706 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
708 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
709 relocs against external symbols for WinCE targets.
710 (md_apply_fix): Likewise.
712 2006-05-09 David Ung <davidu@mips.com>
714 * config/tc-mips.c (append_insn): Only warn about an out-of-range
715 j or jal address.
717 2006-05-09 Nick Clifton <nickc@redhat.com>
719 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
720 against symbols which are not going to be placed into the symbol
721 table.
723 2006-05-09 Ben Elliston <bje@au.ibm.com>
725 * expr.c (operand): Remove `if (0 && ..)' statement and
726 subsequently unused target_op label. Collapse `if (1 || ..)'
727 statement.
728 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
729 separately above the switch.
731 2006-05-08 Nick Clifton <nickc@redhat.com>
733 PR gas/2623
734 * config/tc-msp430.c (line_separator_character): Define as |.
736 2006-05-08 Thiemo Seufer <ths@mips.com>
737 Nigel Stephens <nigel@mips.com>
738 David Ung <davidu@mips.com>
740 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
741 (mips_opts): Likewise.
742 (file_ase_smartmips): New variable.
743 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
744 (macro_build): Handle SmartMIPS instructions.
745 (mips_ip): Likewise.
746 (md_longopts): Add argument handling for smartmips.
747 (md_parse_options, mips_after_parse_args): Likewise.
748 (s_mipsset): Add .set smartmips support.
749 (md_show_usage): Document -msmartmips/-mno-smartmips.
750 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
751 .set smartmips.
752 * doc/c-mips.texi: Likewise.
754 2006-05-08 Alan Modra <amodra@bigpond.net.au>
756 * write.c (relax_segment): Add pass count arg. Don't error on
757 negative org/space on first two passes.
758 (relax_seg_info): New struct.
759 (relax_seg, write_object_file): Adjust.
760 * write.h (relax_segment): Update prototype.
762 2006-05-05 Julian Brown <julian@codesourcery.com>
764 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
765 checking.
766 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
767 architecture version checks.
768 (insns): Allow overlapping instructions to be used in VFP mode.
770 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
772 PR gas/2598
773 * config/obj-elf.c (obj_elf_change_section): Allow user
774 specified SHF_ALPHA_GPREL.
776 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
778 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
779 for PMEM related expressions.
781 2006-05-05 Nick Clifton <nickc@redhat.com>
783 PR gas/2582
784 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
785 insertion of a directory separator character into a string at a
786 given offset. Uses heuristics to decide when to use a backslash
787 character rather than a forward-slash character.
788 (dwarf2_directive_loc): Use the macro.
789 (out_debug_info): Likewise.
791 2006-05-05 Thiemo Seufer <ths@mips.com>
792 David Ung <davidu@mips.com>
794 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
795 instruction.
796 (macro): Add new case M_CACHE_AB.
798 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
800 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
801 (opcode_lookup): Issue a warning for opcode with
802 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
803 identical to OT_cinfix3.
804 (TxC3w, TC3w, tC3w): New.
805 (insns): Use tC3w and TC3w for comparison instructions with
806 's' suffix.
808 2006-05-04 Alan Modra <amodra@bigpond.net.au>
810 * subsegs.h (struct frchain): Delete frch_seg.
811 (frchain_root): Delete.
812 (seg_info): Define as macro.
813 * subsegs.c (frchain_root): Delete.
814 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
815 (subsegs_begin, subseg_change): Adjust for above.
816 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
817 rather than to one big list.
818 (subseg_get): Don't special case abs, und sections.
819 (subseg_new, subseg_force_new): Don't set frchainP here.
820 (seg_info): Delete.
821 (subsegs_print_statistics): Adjust frag chain control list traversal.
822 * debug.c (dmp_frags): Likewise.
823 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
824 at frchain_root. Make use of known frchain ordering.
825 (last_frag_for_seg): Likewise.
826 (get_frag_fix): Likewise. Add seg param.
827 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
828 * write.c (chain_frchains_together_1): Adjust for struct frchain.
829 (SUB_SEGMENT_ALIGN): Likewise.
830 (subsegs_finish): Adjust frchain list traversal.
831 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
832 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
833 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
834 (xtensa_fix_b_j_loop_end_frags): Likewise.
835 (xtensa_fix_close_loop_end_frags): Likewise.
836 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
837 (retrieve_segment_info): Delete frch_seg initialisation.
839 2006-05-03 Alan Modra <amodra@bigpond.net.au>
841 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
842 * config/obj-elf.h (obj_sec_set_private_data): Delete.
843 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
844 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
846 2006-05-02 Joseph Myers <joseph@codesourcery.com>
848 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
849 here.
850 (md_apply_fix3): Multiply offset by 4 here for
851 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
853 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
854 Jan Beulich <jbeulich@novell.com>
856 * config/tc-i386.c (output_invalid_buf): Change size for
857 unsigned char.
858 * config/tc-tic30.c (output_invalid_buf): Likewise.
860 * config/tc-i386.c (output_invalid): Cast none-ascii char to
861 unsigned char.
862 * config/tc-tic30.c (output_invalid): Likewise.
864 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
866 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
867 (TEXI2POD): Use AM_MAKEINFOFLAGS.
868 (asconfig.texi): Don't set top_srcdir.
869 * doc/as.texinfo: Don't use top_srcdir.
870 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
872 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
874 * config/tc-i386.c (output_invalid_buf): Change size to 16.
875 * config/tc-tic30.c (output_invalid_buf): Likewise.
877 * config/tc-i386.c (output_invalid): Use snprintf instead of
878 sprintf.
879 * config/tc-ia64.c (declare_register_set): Likewise.
880 (emit_one_bundle): Likewise.
881 (check_dependencies): Likewise.
882 * config/tc-tic30.c (output_invalid): Likewise.
884 2006-05-02 Paul Brook <paul@codesourcery.com>
886 * config/tc-arm.c (arm_optimize_expr): New function.
887 * config/tc-arm.h (md_optimize_expr): Define
888 (arm_optimize_expr): Add prototype.
889 (TC_FORCE_RELOCATION_SUB_SAME): Define.
891 2006-05-02 Ben Elliston <bje@au.ibm.com>
893 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
894 field unsigned.
896 * sb.h (sb_list_vector): Move to sb.c.
897 * sb.c (free_list): Use type of sb_list_vector directly.
898 (sb_build): Fix off-by-one error in assertion about `size'.
900 2006-05-01 Ben Elliston <bje@au.ibm.com>
902 * listing.c (listing_listing): Remove useless loop.
903 * macro.c (macro_expand): Remove is_positional local variable.
904 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
905 and simplify surrounding expressions, where possible.
906 (assign_symbol): Likewise.
907 (s_weakref): Likewise.
908 * symbols.c (colon): Likewise.
910 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
912 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
914 2006-04-30 Thiemo Seufer <ths@mips.com>
915 David Ung <davidu@mips.com>
917 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
918 (mips_immed): New table that records various handling of udi
919 instruction patterns.
920 (mips_ip): Adds udi handling.
922 2006-04-28 Alan Modra <amodra@bigpond.net.au>
924 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
925 of list rather than beginning.
927 2006-04-26 Julian Brown <julian@codesourcery.com>
929 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
930 (is_quarter_float): Rename from above. Simplify slightly.
931 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
932 number.
933 (parse_neon_mov): Parse floating-point constants.
934 (neon_qfloat_bits): Fix encoding.
935 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
936 preference to integer encoding when using the F32 type.
938 2006-04-26 Julian Brown <julian@codesourcery.com>
940 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
941 zero-initialising structures containing it will lead to invalid types).
942 (arm_it): Add vectype to each operand.
943 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
944 defined field.
945 (neon_typed_alias): New structure. Extra information for typed
946 register aliases.
947 (reg_entry): Add neon type info field.
948 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
949 Break out alternative syntax for coprocessor registers, etc. into...
950 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
951 out from arm_reg_parse.
952 (parse_neon_type): Move. Return SUCCESS/FAIL.
953 (first_error): New function. Call to ensure first error which occurs is
954 reported.
955 (parse_neon_operand_type): Parse exactly one type.
956 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
957 (parse_typed_reg_or_scalar): New function. Handle core of both
958 arm_typed_reg_parse and parse_scalar.
959 (arm_typed_reg_parse): Parse a register with an optional type.
960 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
961 result.
962 (parse_scalar): Parse a Neon scalar with optional type.
963 (parse_reg_list): Use first_error.
964 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
965 (neon_alias_types_same): New function. Return true if two (alias) types
966 are the same.
967 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
968 of elements.
969 (insert_reg_alias): Return new reg_entry not void.
970 (insert_neon_reg_alias): New function. Insert type/index information as
971 well as register for alias.
972 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
973 make typed register aliases accordingly.
974 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
975 of line.
976 (s_unreq): Delete type information if present.
977 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
978 (s_arm_unwind_save_mmxwcg): Likewise.
979 (s_arm_unwind_movsp): Likewise.
980 (s_arm_unwind_setfp): Likewise.
981 (parse_shift): Likewise.
982 (parse_shifter_operand): Likewise.
983 (parse_address): Likewise.
984 (parse_tb): Likewise.
985 (tc_arm_regname_to_dw2regnum): Likewise.
986 (md_pseudo_table): Add dn, qn.
987 (parse_neon_mov): Handle typed operands.
988 (parse_operands): Likewise.
989 (neon_type_mask): Add N_SIZ.
990 (N_ALLMODS): New macro.
991 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
992 (el_type_of_type_chk): Add some safeguards.
993 (modify_types_allowed): Fix logic bug.
994 (neon_check_type): Handle operands with types.
995 (neon_three_same): Remove redundant optional arg handling.
996 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
997 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
998 (do_neon_step): Adjust accordingly.
999 (neon_cmode_for_logic_imm): Use first_error.
1000 (do_neon_bitfield): Call neon_check_type.
1001 (neon_dyadic): Rename to...
1002 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1003 to allow modification of type of the destination.
1004 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1005 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1006 (do_neon_compare): Make destination be an untyped bitfield.
1007 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1008 (neon_mul_mac): Return early in case of errors.
1009 (neon_move_immediate): Use first_error.
1010 (neon_mac_reg_scalar_long): Fix type to include scalar.
1011 (do_neon_dup): Likewise.
1012 (do_neon_mov): Likewise (in several places).
1013 (do_neon_tbl_tbx): Fix type.
1014 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1015 (do_neon_ld_dup): Exit early in case of errors and/or use
1016 first_error.
1017 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1018 Handle .dn/.qn directives.
1019 (REGDEF): Add zero for reg_entry neon field.
1021 2006-04-26 Julian Brown <julian@codesourcery.com>
1023 * config/tc-arm.c (limits.h): Include.
1024 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1025 (fpu_vfp_v3_or_neon_ext): Declare constants.
1026 (neon_el_type): New enumeration of types for Neon vector elements.
1027 (neon_type_el): New struct. Define type and size of a vector element.
1028 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1029 instruction.
1030 (neon_type): Define struct. The type of an instruction.
1031 (arm_it): Add 'vectype' for the current instruction.
1032 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1033 (vfp_sp_reg_pos): Rename to...
1034 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1035 tags.
1036 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1037 (Neon D or Q register).
1038 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1039 register.
1040 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1041 (my_get_expression): Allow above constant as argument to accept
1042 64-bit constants with optional prefix.
1043 (arm_reg_parse): Add extra argument to return the specific type of
1044 register in when either a D or Q register (REG_TYPE_NDQ) is
1045 requested. Can be NULL.
1046 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1047 (parse_reg_list): Update for new arm_reg_parse args.
1048 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1049 (parse_neon_el_struct_list): New function. Parse element/structure
1050 register lists for VLD<n>/VST<n> instructions.
1051 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1052 (s_arm_unwind_save_mmxwr): Likewise.
1053 (s_arm_unwind_save_mmxwcg): Likewise.
1054 (s_arm_unwind_movsp): Likewise.
1055 (s_arm_unwind_setfp): Likewise.
1056 (parse_big_immediate): New function. Parse an immediate, which may be
1057 64 bits wide. Put results in inst.operands[i].
1058 (parse_shift): Update for new arm_reg_parse args.
1059 (parse_address): Likewise. Add parsing of alignment specifiers.
1060 (parse_neon_mov): Parse the operands of a VMOV instruction.
1061 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1062 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1063 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1064 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1065 (parse_operands): Handle new codes above.
1066 (encode_arm_vfp_sp_reg): Rename to...
1067 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1068 selected VFP version only supports D0-D15.
1069 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1070 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1071 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1072 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1073 encode_arm_vfp_reg name, and allow 32 D regs.
1074 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1075 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1076 regs.
1077 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1078 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1079 constant-load and conversion insns introduced with VFPv3.
1080 (neon_tab_entry): New struct.
1081 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1082 those which are the targets of pseudo-instructions.
1083 (neon_opc): Enumerate opcodes, use as indices into...
1084 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1085 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1086 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1087 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1088 neon_enc_tab.
1089 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1090 Neon instructions.
1091 (neon_type_mask): New. Compact type representation for type checking.
1092 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1093 permitted type combinations.
1094 (N_IGNORE_TYPE): New macro.
1095 (neon_check_shape): New function. Check an instruction shape for
1096 multiple alternatives. Return the specific shape for the current
1097 instruction.
1098 (neon_modify_type_size): New function. Modify a vector type and size,
1099 depending on the bit mask in argument 1.
1100 (neon_type_promote): New function. Convert a given "key" type (of an
1101 operand) into the correct type for a different operand, based on a bit
1102 mask.
1103 (type_chk_of_el_type): New function. Convert a type and size into the
1104 compact representation used for type checking.
1105 (el_type_of_type_ckh): New function. Reverse of above (only when a
1106 single bit is set in the bit mask).
1107 (modify_types_allowed): New function. Alter a mask of allowed types
1108 based on a bit mask of modifications.
1109 (neon_check_type): New function. Check the type of the current
1110 instruction against the variable argument list. The "key" type of the
1111 instruction is returned.
1112 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1113 a Neon data-processing instruction depending on whether we're in ARM
1114 mode or Thumb-2 mode.
1115 (neon_logbits): New function.
1116 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1117 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1118 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1119 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1120 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1121 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1122 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1123 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1124 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1125 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1126 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1127 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1128 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1129 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1130 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1131 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1132 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1133 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1134 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1135 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1136 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1137 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1138 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1139 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1140 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1141 helpers.
1142 (parse_neon_type): New function. Parse Neon type specifier.
1143 (opcode_lookup): Allow parsing of Neon type specifiers.
1144 (REGNUM2, REGSETH, REGSET2): New macros.
1145 (reg_names): Add new VFPv3 and Neon registers.
1146 (NUF, nUF, NCE, nCE): New macros for opcode table.
1147 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1148 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1149 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1150 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1151 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1152 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1153 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1154 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1155 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1156 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1157 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1158 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1159 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1160 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1161 fto[us][lh][sd].
1162 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1163 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1164 (arm_option_cpu_value): Add vfp3 and neon.
1165 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1166 VFPv1 attribute.
1168 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1170 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1171 syntax instead of hardcoded opcodes with ".w18" suffixes.
1172 (wide_branch_opcode): New.
1173 (build_transition): Use it to check for wide branch opcodes with
1174 either ".w18" or ".w15" suffixes.
1176 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1178 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1179 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1180 frag's is_literal flag.
1182 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1184 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1186 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1188 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1189 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1190 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1191 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1192 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1194 2005-04-20 Paul Brook <paul@codesourcery.com>
1196 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1197 all targets.
1198 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1200 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1202 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1203 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1204 Make some cpus unsupported on ELF. Run "make dep-am".
1205 * Makefile.in: Regenerate.
1207 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1209 * configure.in (--enable-targets): Indent help message.
1210 * configure: Regenerate.
1212 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1214 PR gas/2533
1215 * config/tc-i386.c (i386_immediate): Check illegal immediate
1216 register operand.
1218 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1220 * config/tc-i386.c: Formatting.
1221 (output_disp, output_imm): ISO C90 params.
1223 * frags.c (frag_offset_fixed_p): Constify args.
1224 * frags.h (frag_offset_fixed_p): Ditto.
1226 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1227 (COFF_MAGIC): Delete.
1229 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1231 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1233 * po/POTFILES.in: Regenerated.
1235 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1237 * doc/as.texinfo: Mention that some .type syntaxes are not
1238 supported on all architectures.
1240 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1242 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1243 instructions when such transformations have been disabled.
1245 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1247 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1248 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1249 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1250 decoding the loop instructions. Remove current_offset variable.
1251 (xtensa_fix_short_loop_frags): Likewise.
1252 (min_bytes_to_other_loop_end): Remove current_offset argument.
1254 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1256 * config/tc-z80.c (z80_optimize_expr): Removed.
1257 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1259 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1261 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1262 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1263 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1264 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1265 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1266 at90can64, at90usb646, at90usb647, at90usb1286 and
1267 at90usb1287.
1268 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1270 2006-04-07 Paul Brook <paul@codesourcery.com>
1272 * config/tc-arm.c (parse_operands): Set default error message.
1274 2006-04-07 Paul Brook <paul@codesourcery.com>
1276 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1278 2006-04-07 Paul Brook <paul@codesourcery.com>
1280 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1282 2006-04-07 Paul Brook <paul@codesourcery.com>
1284 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1285 (move_or_literal_pool): Handle Thumb-2 instructions.
1286 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1288 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1290 PR 2512.
1291 * config/tc-i386.c (match_template): Move 64-bit operand tests
1292 inside loop.
1294 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1296 * po/Make-in: Add install-html target.
1297 * Makefile.am: Add install-html and install-html-recursive targets.
1298 * Makefile.in: Regenerate.
1299 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1300 * configure: Regenerate.
1301 * doc/Makefile.am: Add install-html and install-html-am targets.
1302 * doc/Makefile.in: Regenerate.
1304 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1306 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1307 second scan.
1309 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1310 Daniel Jacobowitz <dan@codesourcery.com>
1312 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1313 (GOTT_BASE, GOTT_INDEX): New.
1314 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1315 GOTT_INDEX when generating VxWorks PIC.
1316 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1317 use the generic *-*-vxworks* stanza instead.
1319 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1321 PR 997
1322 * frags.c (frag_offset_fixed_p): New function.
1323 * frags.h (frag_offset_fixed_p): Declare.
1324 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1325 (resolve_expression): Likewise.
1327 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1329 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1330 of the same length but different numbers of slots.
1332 2006-03-30 Andreas Schwab <schwab@suse.de>
1334 * configure.in: Fix help string for --enable-targets option.
1335 * configure: Regenerate.
1337 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1339 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1340 (m68k_ip): ... here. Use for all chips. Protect against buffer
1341 overrun and avoid excessive copying.
1343 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1344 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1345 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1346 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1347 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1348 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1349 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1350 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1351 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1352 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1353 (struct m68k_cpu): Change chip field to control_regs.
1354 (current_chip): Remove.
1355 (control_regs): New.
1356 (m68k_archs, m68k_extensions): Adjust.
1357 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1358 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1359 (find_cf_chip): Reimplement for new organization of cpu table.
1360 (select_control_regs): Remove.
1361 (mri_chip): Adjust.
1362 (struct save_opts): Save control regs, not chip.
1363 (s_save, s_restore): Adjust.
1364 (m68k_lookup_cpu): Give deprecated warning when necessary.
1365 (m68k_init_arch): Adjust.
1366 (md_show_usage): Adjust for new cpu table organization.
1368 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1370 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1371 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1372 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1373 "elf/bfin.h".
1374 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1375 (any_gotrel): New rule.
1376 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1377 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1378 "elf/bfin.h".
1379 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1380 (bfin_pic_ptr): New function.
1381 (md_pseudo_table): Add it for ".picptr".
1382 (OPTION_FDPIC): New macro.
1383 (md_longopts): Add -mfdpic.
1384 (md_parse_option): Handle it.
1385 (md_begin): Set BFD flags.
1386 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1387 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1388 us for GOT relocs.
1389 * Makefile.am (bfin-parse.o): Update dependencies.
1390 (DEPTC_bfin_elf): Likewise.
1391 * Makefile.in: Regenerate.
1393 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1395 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1396 mcfemac instead of mcfmac.
1398 2006-03-23 Michael Matz <matz@suse.de>
1400 * config/tc-i386.c (type_names): Correct placement of 'static'.
1401 (reloc): Map some more relocs to their 64 bit counterpart when
1402 size is 8.
1403 (output_insn): Work around breakage if DEBUG386 is defined.
1404 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1405 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1406 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1407 different from i386.
1408 (output_imm): Ditto.
1409 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1410 Imm64.
1411 (md_convert_frag): Jumps can now be larger than 2GB away, error
1412 out in that case.
1413 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1414 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1416 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1417 Daniel Jacobowitz <dan@codesourcery.com>
1418 Phil Edwards <phil@codesourcery.com>
1419 Zack Weinberg <zack@codesourcery.com>
1420 Mark Mitchell <mark@codesourcery.com>
1421 Nathan Sidwell <nathan@codesourcery.com>
1423 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1424 (md_begin): Complain about -G being used for PIC. Don't change
1425 the text, data and bss alignments on VxWorks.
1426 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1427 generating VxWorks PIC.
1428 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1429 (macro): Likewise, but do not treat la $25 specially for
1430 VxWorks PIC, and do not handle jal.
1431 (OPTION_MVXWORKS_PIC): New macro.
1432 (md_longopts): Add -mvxworks-pic.
1433 (md_parse_option): Don't complain about using PIC and -G together here.
1434 Handle OPTION_MVXWORKS_PIC.
1435 (md_estimate_size_before_relax): Always use the first relaxation
1436 sequence on VxWorks.
1437 * config/tc-mips.h (VXWORKS_PIC): New.
1439 2006-03-21 Paul Brook <paul@codesourcery.com>
1441 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1443 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1445 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1446 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1447 (get_loop_align_size): New.
1448 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1449 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1450 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1451 (get_noop_aligned_address): Use get_loop_align_size.
1452 (get_aligned_diff): Likewise.
1454 2006-03-21 Paul Brook <paul@codesourcery.com>
1456 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1458 2006-03-20 Paul Brook <paul@codesourcery.com>
1460 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1461 (do_t_branch): Encode branches inside IT blocks as unconditional.
1462 (do_t_cps): New function.
1463 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1464 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1465 (opcode_lookup): Allow conditional suffixes on all instructions in
1466 Thumb mode.
1467 (md_assemble): Advance condexec state before checking for errors.
1468 (insns): Use do_t_cps.
1470 2006-03-20 Paul Brook <paul@codesourcery.com>
1472 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1473 outputting the insn.
1475 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1477 * config/tc-vax.c: Update copyright year.
1478 * config/tc-vax.h: Likewise.
1480 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1482 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1483 make it static.
1484 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1486 2006-03-17 Paul Brook <paul@codesourcery.com>
1488 * config/tc-arm.c (insns): Add ldm and stm.
1490 2006-03-17 Ben Elliston <bje@au.ibm.com>
1492 PR gas/2446
1493 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1495 2006-03-16 Paul Brook <paul@codesourcery.com>
1497 * config/tc-arm.c (insns): Add "svc".
1499 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1501 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1502 flag and avoid double underscore prefixes.
1504 2006-03-10 Paul Brook <paul@codesourcery.com>
1506 * config/tc-arm.c (md_begin): Handle EABIv5.
1507 (arm_eabis): Add EF_ARM_EABI_VER5.
1508 * doc/c-arm.texi: Document -meabi=5.
1510 2006-03-10 Ben Elliston <bje@au.ibm.com>
1512 * app.c (do_scrub_chars): Simplify string handling.
1514 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1515 Daniel Jacobowitz <dan@codesourcery.com>
1516 Zack Weinberg <zack@codesourcery.com>
1517 Nathan Sidwell <nathan@codesourcery.com>
1518 Paul Brook <paul@codesourcery.com>
1519 Ricardo Anguiano <anguiano@codesourcery.com>
1520 Phil Edwards <phil@codesourcery.com>
1522 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1523 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1524 R_ARM_ABS12 reloc.
1525 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1526 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1527 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1529 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1531 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1532 even when using the text-section-literals option.
1534 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1536 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1537 and cf.
1538 (m68k_ip): <case 'J'> Check we have some control regs.
1539 (md_parse_option): Allow raw arch switch.
1540 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1541 whether 68881 or cfloat was meant by -mfloat.
1542 (md_show_usage): Adjust extension display.
1543 (m68k_elf_final_processing): Adjust.
1545 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1547 * config/tc-avr.c (avr_mod_hash_value): New function.
1548 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1549 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1550 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1551 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1552 of (int).
1553 (tc_gen_reloc): Handle substractions of symbols, if possible do
1554 fixups, abort otherwise.
1555 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1556 tc_fix_adjustable): Define.
1558 2006-03-02 James E Wilson <wilson@specifix.com>
1560 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1561 change the template, then clear md.slot[curr].end_of_insn_group.
1563 2006-02-28 Jan Beulich <jbeulich@novell.com>
1565 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1567 2006-02-28 Jan Beulich <jbeulich@novell.com>
1569 PR/1070
1570 * macro.c (getstring): Don't treat parentheses special anymore.
1571 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1572 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1573 characters.
1575 2006-02-28 Mat <mat@csail.mit.edu>
1577 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1579 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1581 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1582 field.
1583 (CFI_signal_frame): Define.
1584 (cfi_pseudo_table): Add .cfi_signal_frame.
1585 (dot_cfi): Handle CFI_signal_frame.
1586 (output_cie): Handle cie->signal_frame.
1587 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1588 different. Copy signal_frame from FDE to newly created CIE.
1589 * doc/as.texinfo: Document .cfi_signal_frame.
1591 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1593 * doc/Makefile.am: Add html target.
1594 * doc/Makefile.in: Regenerate.
1595 * po/Make-in: Add html target.
1597 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1599 * config/tc-i386.c (output_insn): Support Intel Merom New
1600 Instructions.
1602 * config/tc-i386.h (CpuMNI): New.
1603 (CpuUnknownFlags): Add CpuMNI.
1605 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1607 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1608 (hpriv_reg_table): New table for hyperprivileged registers.
1609 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1610 register encoding.
1612 2006-02-24 DJ Delorie <dj@redhat.com>
1614 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1615 (tc_gen_reloc): Don't define.
1616 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1617 (OPTION_LINKRELAX): New.
1618 (md_longopts): Add it.
1619 (m32c_relax): New.
1620 (md_parse_options): Set it.
1621 (md_assemble): Emit relaxation relocs as needed.
1622 (md_convert_frag): Emit relaxation relocs as needed.
1623 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1624 (m32c_apply_fix): New.
1625 (tc_gen_reloc): New.
1626 (m32c_force_relocation): Force out jump relocs when relaxing.
1627 (m32c_fix_adjustable): Return false if relaxing.
1629 2006-02-24 Paul Brook <paul@codesourcery.com>
1631 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1632 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1633 (struct asm_barrier_opt): Define.
1634 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1635 (parse_psr): Accept V7M psr names.
1636 (parse_barrier): New function.
1637 (enum operand_parse_code): Add OP_oBARRIER.
1638 (parse_operands): Implement OP_oBARRIER.
1639 (do_barrier): New function.
1640 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1641 (do_t_cpsi): Add V7M restrictions.
1642 (do_t_mrs, do_t_msr): Validate V7M variants.
1643 (md_assemble): Check for NULL variants.
1644 (v7m_psrs, barrier_opt_names): New tables.
1645 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1646 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1647 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1648 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1649 (struct cpu_arch_ver_table): Define.
1650 (cpu_arch_ver): New.
1651 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1652 Tag_CPU_arch_profile.
1653 * doc/c-arm.texi: Document new cpu and arch options.
1655 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1657 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1659 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1661 * config/tc-ia64.c: Update copyright years.
1663 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1665 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1666 SDM 2.2.
1668 2005-02-22 Paul Brook <paul@codesourcery.com>
1670 * config/tc-arm.c (do_pld): Remove incorrect write to
1671 inst.instruction.
1672 (encode_thumb32_addr_mode): Use correct operand.
1674 2006-02-21 Paul Brook <paul@codesourcery.com>
1676 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1678 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1679 Anil Paranjape <anilp1@kpitcummins.com>
1680 Shilin Shakti <shilins@kpitcummins.com>
1682 * Makefile.am: Add xc16x related entry.
1683 * Makefile.in: Regenerate.
1684 * configure.in: Added xc16x related entry.
1685 * configure: Regenerate.
1686 * config/tc-xc16x.h: New file
1687 * config/tc-xc16x.c: New file
1688 * doc/c-xc16x.texi: New file for xc16x
1689 * doc/all.texi: Entry for xc16x
1690 * doc/Makefile.texi: Added c-xc16x.texi
1691 * NEWS: Announce the support for the new target.
1693 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1695 * configure.tgt: set emulation for mips-*-netbsd*
1697 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1699 * config.in: Rebuilt.
1701 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1703 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1704 from 1, not 0, in error messages.
1705 (md_assemble): Simplify special-case check for ENTRY instructions.
1706 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1707 operand in error message.
1709 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1711 * configure.tgt (arm-*-linux-gnueabi*): Change to
1712 arm-*-linux-*eabi*.
1714 2006-02-10 Nick Clifton <nickc@redhat.com>
1716 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1717 32-bit value is propagated into the upper bits of a 64-bit long.
1719 * config/tc-arc.c (init_opcode_tables): Fix cast.
1720 (arc_extoper, md_operand): Likewise.
1722 2006-02-09 David Heine <dlheine@tensilica.com>
1724 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1725 each relaxation step.
1727 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1729 * configure.in (CHECK_DECLS): Add vsnprintf.
1730 * configure: Regenerate.
1731 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1732 include/declare here, but...
1733 * as.h: Move code detecting VARARGS idiom to the top.
1734 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1735 (vsnprintf): Declare if not already declared.
1737 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1739 * as.c (close_output_file): New.
1740 (main): Register close_output_file with xatexit before
1741 dump_statistics. Don't call output_file_close.
1743 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1745 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1746 mcf5329_control_regs): New.
1747 (not_current_architecture, selected_arch, selected_cpu): New.
1748 (m68k_archs, m68k_extensions): New.
1749 (archs): Renamed to ...
1750 (m68k_cpus): ... here. Adjust.
1751 (n_arches): Remove.
1752 (md_pseudo_table): Add arch and cpu directives.
1753 (find_cf_chip, m68k_ip): Adjust table scanning.
1754 (no_68851, no_68881): Remove.
1755 (md_assemble): Lazily initialize.
1756 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1757 (md_init_after_args): Move functionality to m68k_init_arch.
1758 (mri_chip): Adjust table scanning.
1759 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1760 options with saner parsing.
1761 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1762 m68k_init_arch): New.
1763 (s_m68k_cpu, s_m68k_arch): New.
1764 (md_show_usage): Adjust.
1765 (m68k_elf_final_processing): Set CF EF flags.
1766 * config/tc-m68k.h (m68k_init_after_args): Remove.
1767 (tc_init_after_args): Remove.
1768 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1769 (M68k-Directives): Document .arch and .cpu directives.
1771 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1773 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1774 synonyms for equ and defl.
1775 (z80_cons_fix_new): New function.
1776 (emit_byte): Disallow relative jumps to absolute locations.
1777 (emit_data): Only handle defb, prototype changed, because defb is
1778 now handled as pseudo-op rather than an instruction.
1779 (instab): Entries for defb,defw,db,dw moved from here...
1780 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1781 Add entries for def24,def32,d24,d32.
1782 (md_assemble): Improved error handling.
1783 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1784 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1785 (z80_cons_fix_new): Declare.
1786 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1787 (def24,d24,def32,d32): New pseudo-ops.
1789 2006-02-02 Paul Brook <paul@codesourcery.com>
1791 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1793 2005-02-02 Paul Brook <paul@codesourcery.com>
1795 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1796 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1797 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1798 T2_OPCODE_RSB): Define.
1799 (thumb32_negate_data_op): New function.
1800 (md_apply_fix): Use it.
1802 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1804 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1805 fields.
1806 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1807 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1808 subtracted symbols.
1809 (relaxation_requirements): Add pfinish_frag argument and use it to
1810 replace setting tinsn->record_fix fields.
1811 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1812 and vinsn_to_insnbuf. Remove references to record_fix and
1813 slot_sub_symbols fields.
1814 (xtensa_mark_narrow_branches): Delete unused code.
1815 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1816 a symbol.
1817 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1818 record_fix fields.
1819 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1820 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1821 of the record_fix field. Simplify error messages for unexpected
1822 symbolic operands.
1823 (set_expr_symbol_offset_diff): Delete.
1825 2006-01-31 Paul Brook <paul@codesourcery.com>
1827 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1829 2006-01-31 Paul Brook <paul@codesourcery.com>
1830 Richard Earnshaw <rearnsha@arm.com>
1832 * config/tc-arm.c: Use arm_feature_set.
1833 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1834 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1835 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1836 New variables.
1837 (insns): Use them.
1838 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1839 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1840 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1841 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1842 feature flags.
1843 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1844 (arm_opts): Move old cpu/arch options from here...
1845 (arm_legacy_opts): ... to here.
1846 (md_parse_option): Search arm_legacy_opts.
1847 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1848 (arm_float_abis, arm_eabis): Make const.
1850 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1852 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1854 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1856 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1857 in load immediate intruction.
1859 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1861 * config/bfin-parse.y (value_match): Use correct conversion
1862 specifications in template string for __FILE__ and __LINE__.
1863 (binary): Ditto.
1864 (unary): Ditto.
1866 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1868 Introduce TLS descriptors for i386 and x86_64.
1869 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1870 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1871 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1872 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1873 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1874 displacement bits.
1875 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1876 (lex_got): Handle @tlsdesc and @tlscall.
1877 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1879 2006-01-11 Nick Clifton <nickc@redhat.com>
1881 Fixes for building on 64-bit hosts:
1882 * config/tc-avr.c (mod_index): New union to allow conversion
1883 between pointers and integers.
1884 (md_begin, avr_ldi_expression): Use it.
1885 * config/tc-i370.c (md_assemble): Add cast for argument to print
1886 statement.
1887 * config/tc-tic54x.c (subsym_substitute): Likewise.
1888 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1889 opindex field of fr_cgen structure into a pointer so that it can
1890 be stored in a frag.
1891 * config/tc-mn10300.c (md_assemble): Likewise.
1892 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1893 types.
1894 * config/tc-v850.c: Replace uses of (int) casts with correct
1895 types.
1897 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1899 PR gas/2117
1900 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1902 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1904 PR gas/2101
1905 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1906 a local-label reference.
1908 For older changes see ChangeLog-2005
1909 \f
1910 Local Variables:
1911 mode: change-log
1912 left-margin: 8
1913 fill-column: 74
1914 version-control: never
1915 End: