Fix SH2A machine variants in order to correctly select instruction inheritance
[binutils.git] / gas / config / tc-sh.c
blobda025412fe1d4448df3407f6dde1a53bd7309112
1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
24 #include <stdio.h>
25 #include "as.h"
26 #include "bfd.h"
27 #include "subsegs.h"
28 #define DEFINE_TABLE
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
33 #ifdef OBJ_ELF
34 #include "elf/sh.h"
35 #endif
37 #include "dwarf2dbg.h"
38 #include "dw2gencfi.h"
40 typedef struct
42 sh_arg_type type;
43 int reg;
44 expressionS immediate;
46 sh_operand_info;
48 const char comment_chars[] = "!";
49 const char line_separator_chars[] = ";";
50 const char line_comment_chars[] = "!#";
52 static void s_uses (int);
53 static void s_uacons (int);
55 #ifdef OBJ_ELF
56 static void sh_elf_cons (int);
58 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
59 #endif
61 static void
62 big (int ignore ATTRIBUTE_UNUSED)
64 if (! target_big_endian)
65 as_bad (_("directive .big encountered when option -big required"));
67 /* Stop further messages. */
68 target_big_endian = 1;
71 static void
72 little (int ignore ATTRIBUTE_UNUSED)
74 if (target_big_endian)
75 as_bad (_("directive .little encountered when option -little required"));
77 /* Stop further messages. */
78 target_big_endian = 0;
81 /* This table describes all the machine specific pseudo-ops the assembler
82 has to support. The fields are:
83 pseudo-op name without dot
84 function to call to execute this pseudo-op
85 Integer arg to pass to the function. */
87 const pseudo_typeS md_pseudo_table[] =
89 #ifdef OBJ_ELF
90 {"long", sh_elf_cons, 4},
91 {"int", sh_elf_cons, 4},
92 {"word", sh_elf_cons, 2},
93 {"short", sh_elf_cons, 2},
94 #else
95 {"int", cons, 4},
96 {"word", cons, 2},
97 #endif /* OBJ_ELF */
98 {"big", big, 0},
99 {"form", listing_psize, 0},
100 {"little", little, 0},
101 {"heading", listing_title, 0},
102 {"import", s_ignore, 0},
103 {"page", listing_eject, 0},
104 {"program", s_ignore, 0},
105 {"uses", s_uses, 0},
106 {"uaword", s_uacons, 2},
107 {"ualong", s_uacons, 4},
108 {"uaquad", s_uacons, 8},
109 {"2byte", s_uacons, 2},
110 {"4byte", s_uacons, 4},
111 {"8byte", s_uacons, 8},
112 #ifdef HAVE_SH64
113 {"mode", s_sh64_mode, 0 },
115 /* Have the old name too. */
116 {"isa", s_sh64_mode, 0 },
118 /* Assert that the right ABI is used. */
119 {"abi", s_sh64_abi, 0 },
121 { "vtable_inherit", sh64_vtable_inherit, 0 },
122 { "vtable_entry", sh64_vtable_entry, 0 },
123 #endif /* HAVE_SH64 */
124 {0, 0, 0}
127 /*int md_reloc_size; */
129 int sh_relax; /* set if -relax seen */
131 /* Whether -small was seen. */
133 int sh_small;
135 /* Flag to generate relocations against symbol values for local symbols. */
137 static int dont_adjust_reloc_32;
139 /* preset architecture set, if given; zero otherwise. */
141 static unsigned int preset_target_arch;
143 /* The bit mask of architectures that could
144 accommodate the insns seen so far. */
145 static unsigned int valid_arch;
147 const char EXP_CHARS[] = "eE";
149 /* Chars that mean this number is a floating point constant. */
150 /* As in 0f12.456 */
151 /* or 0d1.2345e12 */
152 const char FLT_CHARS[] = "rRsSfFdDxXpP";
154 #define C(a,b) ENCODE_RELAX(a,b)
156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
157 #define GET_WHAT(x) ((x>>4))
159 /* These are the three types of relaxable instruction. */
160 /* These are the types of relaxable instructions; except for END which is
161 a marker. */
162 #define COND_JUMP 1
163 #define COND_JUMP_DELAY 2
164 #define UNCOND_JUMP 3
166 #ifdef HAVE_SH64
168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
169 #define SH64PCREL16_32 4
170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
171 #define SH64PCREL16_64 5
173 /* Variants of the above for adjusting the insn to PTA or PTB according to
174 the label. */
175 #define SH64PCREL16PT_32 6
176 #define SH64PCREL16PT_64 7
178 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
179 #define MOVI_IMM_32 8
180 #define MOVI_IMM_32_PCREL 9
181 #define MOVI_IMM_64 10
182 #define MOVI_IMM_64_PCREL 11
183 #define END 12
185 #else /* HAVE_SH64 */
187 #define END 4
189 #endif /* HAVE_SH64 */
191 #define UNDEF_DISP 0
192 #define COND8 1
193 #define COND12 2
194 #define COND32 3
195 #define UNDEF_WORD_DISP 4
197 #define UNCOND12 1
198 #define UNCOND32 2
200 #ifdef HAVE_SH64
201 #define UNDEF_SH64PCREL 0
202 #define SH64PCREL16 1
203 #define SH64PCREL32 2
204 #define SH64PCREL48 3
205 #define SH64PCREL64 4
206 #define SH64PCRELPLT 5
208 #define UNDEF_MOVI 0
209 #define MOVI_16 1
210 #define MOVI_32 2
211 #define MOVI_48 3
212 #define MOVI_64 4
213 #define MOVI_PLT 5
214 #define MOVI_GOTOFF 6
215 #define MOVI_GOTPC 7
216 #endif /* HAVE_SH64 */
218 /* Branch displacements are from the address of the branch plus
219 four, thus all minimum and maximum values have 4 added to them. */
220 #define COND8_F 258
221 #define COND8_M -252
222 #define COND8_LENGTH 2
224 /* There is one extra instruction before the branch, so we must add
225 two more bytes to account for it. */
226 #define COND12_F 4100
227 #define COND12_M -4090
228 #define COND12_LENGTH 6
230 #define COND12_DELAY_LENGTH 4
232 /* ??? The minimum and maximum values are wrong, but this does not matter
233 since this relocation type is not supported yet. */
234 #define COND32_F (1<<30)
235 #define COND32_M -(1<<30)
236 #define COND32_LENGTH 14
238 #define UNCOND12_F 4098
239 #define UNCOND12_M -4092
240 #define UNCOND12_LENGTH 2
242 /* ??? The minimum and maximum values are wrong, but this does not matter
243 since this relocation type is not supported yet. */
244 #define UNCOND32_F (1<<30)
245 #define UNCOND32_M -(1<<30)
246 #define UNCOND32_LENGTH 14
248 #ifdef HAVE_SH64
249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
250 TRd" as is the current insn, so no extra length. Note that the "reach"
251 is calculated from the address *after* that insn, but the offset in the
252 insn is calculated from the beginning of the insn. We also need to
253 take into account the implicit 1 coded as the "A" in PTA when counting
254 forward. If PTB reaches an odd address, we trap that as an error
255 elsewhere, so we don't have to have different relaxation entries. We
256 don't add a one to the negative range, since PTB would then have the
257 farthest backward-reaching value skipped, not generated at relaxation. */
258 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
259 #define SH64PCREL16_M (-32768 * 4 - 4)
260 #define SH64PCREL16_LENGTH 0
262 /* The next step is to change that PT insn into
263 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
264 SHORI (label - datalabel Ln) & 65535, R25
266 PTREL R25,TRd
267 which means two extra insns, 8 extra bytes. This is the limit for the
268 32-bit ABI.
270 The expressions look a bit bad since we have to adjust this to avoid overflow on a
271 32-bit host. */
272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
273 #define SH64PCREL32_LENGTH (2 * 4)
275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
276 expansion. */
277 #if BFD_HOST_64BIT_LONG
278 /* The "reach" type is long, so we can only do this for a 64-bit-long
279 host. */
280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
282 #define SH64PCREL48_M (((long) -1 << 47) - 4)
283 #define SH64PCREL48_LENGTH (3 * 4)
284 #else
285 /* If the host does not have 64-bit longs, just make this state identical
286 in reach to the 32-bit state. Note that we have a slightly incorrect
287 reach, but the correct one above will overflow a 32-bit number. */
288 #define SH64PCREL32_M (((long) -1 << 30) * 2)
289 #define SH64PCREL48_F SH64PCREL32_F
290 #define SH64PCREL48_M SH64PCREL32_M
291 #define SH64PCREL48_LENGTH (3 * 4)
292 #endif /* BFD_HOST_64BIT_LONG */
294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
295 + PTREL sequence. */
296 #define SH64PCREL64_LENGTH (4 * 4)
298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
299 SH64PCREL expansions. The PCREL one is similar, but the other has no
300 pc-relative reach; it must be fully expanded in
301 shmedia_md_estimate_size_before_relax. */
302 #define MOVI_16_LENGTH 0
303 #define MOVI_16_F (32767 - 4)
304 #define MOVI_16_M (-32768 - 4)
305 #define MOVI_32_LENGTH 4
306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
307 #define MOVI_48_LENGTH 8
309 #if BFD_HOST_64BIT_LONG
310 /* The "reach" type is long, so we can only do this for a 64-bit-long
311 host. */
312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
314 #define MOVI_48_M (((long) -1 << 47) - 4)
315 #else
316 /* If the host does not have 64-bit longs, just make this state identical
317 in reach to the 32-bit state. Note that we have a slightly incorrect
318 reach, but the correct one above will overflow a 32-bit number. */
319 #define MOVI_32_M (((long) -1 << 30) * 2)
320 #define MOVI_48_F MOVI_32_F
321 #define MOVI_48_M MOVI_32_M
322 #endif /* BFD_HOST_64BIT_LONG */
324 #define MOVI_64_LENGTH 12
325 #endif /* HAVE_SH64 */
327 #define EMPTY { 0, 0, 0, 0 }
329 const relax_typeS md_relax_table[C (END, 0)] = {
330 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
331 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
333 EMPTY,
334 /* C (COND_JUMP, COND8) */
335 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
336 /* C (COND_JUMP, COND12) */
337 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
338 /* C (COND_JUMP, COND32) */
339 { COND32_F, COND32_M, COND32_LENGTH, 0, },
340 /* C (COND_JUMP, UNDEF_WORD_DISP) */
341 { 0, 0, COND32_LENGTH, 0, },
342 EMPTY, EMPTY, EMPTY,
343 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
345 EMPTY,
346 /* C (COND_JUMP_DELAY, COND8) */
347 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
348 /* C (COND_JUMP_DELAY, COND12) */
349 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
350 /* C (COND_JUMP_DELAY, COND32) */
351 { COND32_F, COND32_M, COND32_LENGTH, 0, },
352 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
353 { 0, 0, COND32_LENGTH, 0, },
354 EMPTY, EMPTY, EMPTY,
355 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
357 EMPTY,
358 /* C (UNCOND_JUMP, UNCOND12) */
359 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
360 /* C (UNCOND_JUMP, UNCOND32) */
361 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
362 EMPTY,
363 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
364 { 0, 0, UNCOND32_LENGTH, 0, },
365 EMPTY, EMPTY, EMPTY,
366 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
368 #ifdef HAVE_SH64
369 /* C (SH64PCREL16_32, SH64PCREL16) */
370 EMPTY,
371 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) },
372 /* C (SH64PCREL16_32, SH64PCREL32) */
373 { 0, 0, SH64PCREL32_LENGTH, 0 },
374 EMPTY, EMPTY,
375 /* C (SH64PCREL16_32, SH64PCRELPLT) */
376 { 0, 0, SH64PCREL32_LENGTH, 0 },
377 EMPTY, EMPTY,
378 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
380 /* C (SH64PCREL16_64, SH64PCREL16) */
381 EMPTY,
382 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) },
383 /* C (SH64PCREL16_64, SH64PCREL32) */
384 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) },
385 /* C (SH64PCREL16_64, SH64PCREL48) */
386 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) },
387 /* C (SH64PCREL16_64, SH64PCREL64) */
388 { 0, 0, SH64PCREL64_LENGTH, 0 },
389 /* C (SH64PCREL16_64, SH64PCRELPLT) */
390 { 0, 0, SH64PCREL64_LENGTH, 0 },
391 EMPTY, EMPTY,
392 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
394 /* C (SH64PCREL16PT_32, SH64PCREL16) */
395 EMPTY,
396 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) },
397 /* C (SH64PCREL16PT_32, SH64PCREL32) */
398 { 0, 0, SH64PCREL32_LENGTH, 0 },
399 EMPTY, EMPTY,
400 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
401 { 0, 0, SH64PCREL32_LENGTH, 0 },
402 EMPTY, EMPTY,
403 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
405 /* C (SH64PCREL16PT_64, SH64PCREL16) */
406 EMPTY,
407 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
408 /* C (SH64PCREL16PT_64, SH64PCREL32) */
409 { SH64PCREL32_F,
410 SH64PCREL32_M,
411 SH64PCREL32_LENGTH,
412 C (SH64PCREL16PT_64, SH64PCREL48) },
413 /* C (SH64PCREL16PT_64, SH64PCREL48) */
414 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) },
415 /* C (SH64PCREL16PT_64, SH64PCREL64) */
416 { 0, 0, SH64PCREL64_LENGTH, 0 },
417 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
418 { 0, 0, SH64PCREL64_LENGTH, 0},
419 EMPTY, EMPTY,
420 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
422 /* C (MOVI_IMM_32, UNDEF_MOVI) */
423 { 0, 0, MOVI_32_LENGTH, 0 },
424 /* C (MOVI_IMM_32, MOVI_16) */
425 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) },
426 /* C (MOVI_IMM_32, MOVI_32) */
427 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 },
428 EMPTY, EMPTY, EMPTY,
429 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
430 { 0, 0, MOVI_32_LENGTH, 0 },
431 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
433 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
434 EMPTY,
435 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) },
436 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
437 { 0, 0, MOVI_32_LENGTH, 0 },
438 EMPTY, EMPTY,
439 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
440 { 0, 0, MOVI_32_LENGTH, 0 },
441 EMPTY,
442 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
443 { 0, 0, MOVI_32_LENGTH, 0 },
444 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
446 /* C (MOVI_IMM_64, UNDEF_MOVI) */
447 { 0, 0, MOVI_64_LENGTH, 0 },
448 /* C (MOVI_IMM_64, MOVI_16) */
449 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) },
450 /* C (MOVI_IMM_64, MOVI_32) */
451 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) },
452 /* C (MOVI_IMM_64, MOVI_48) */
453 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) },
454 /* C (MOVI_IMM_64, MOVI_64) */
455 { 0, 0, MOVI_64_LENGTH, 0 },
456 EMPTY,
457 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
458 { 0, 0, MOVI_64_LENGTH, 0 },
459 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
461 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
462 EMPTY,
463 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
465 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) },
466 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
467 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
469 { 0, 0, MOVI_64_LENGTH, 0 },
470 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
471 { 0, 0, MOVI_64_LENGTH, 0 },
472 EMPTY,
473 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
474 { 0, 0, MOVI_64_LENGTH, 0 },
475 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
477 #endif /* HAVE_SH64 */
481 #undef EMPTY
483 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
486 #ifdef OBJ_ELF
487 /* Determinet whether the symbol needs any kind of PIC relocation. */
489 inline static int
490 sh_PIC_related_p (symbolS *sym)
492 expressionS *exp;
494 if (! sym)
495 return 0;
497 if (sym == GOT_symbol)
498 return 1;
500 #ifdef HAVE_SH64
501 if (sh_PIC_related_p (*symbol_get_tc (sym)))
502 return 1;
503 #endif
505 exp = symbol_get_value_expression (sym);
507 return (exp->X_op == O_PIC_reloc
508 || sh_PIC_related_p (exp->X_add_symbol)
509 || sh_PIC_related_p (exp->X_op_symbol));
512 /* Determine the relocation type to be used to represent the
513 expression, that may be rearranged. */
515 static int
516 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p)
518 expressionS *exp = main_exp;
520 /* This is here for backward-compatibility only. GCC used to generated:
522 f@PLT + . - (.LPCS# + 2)
524 but we'd rather be able to handle this as a PIC-related reference
525 plus/minus a symbol. However, gas' parser gives us:
527 O_subtract (O_add (f@PLT, .), .LPCS#+2)
529 so we attempt to transform this into:
531 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
533 which we can handle simply below. */
534 if (exp->X_op == O_subtract)
536 if (sh_PIC_related_p (exp->X_op_symbol))
537 return 1;
539 exp = symbol_get_value_expression (exp->X_add_symbol);
541 if (exp && sh_PIC_related_p (exp->X_op_symbol))
542 return 1;
544 if (exp && exp->X_op == O_add
545 && sh_PIC_related_p (exp->X_add_symbol))
547 symbolS *sym = exp->X_add_symbol;
549 exp->X_op = O_subtract;
550 exp->X_add_symbol = main_exp->X_op_symbol;
552 main_exp->X_op_symbol = main_exp->X_add_symbol;
553 main_exp->X_add_symbol = sym;
555 main_exp->X_add_number += exp->X_add_number;
556 exp->X_add_number = 0;
559 exp = main_exp;
561 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
562 return 1;
564 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
566 #ifdef HAVE_SH64
567 if (exp->X_add_symbol
568 && (exp->X_add_symbol == GOT_symbol
569 || (GOT_symbol
570 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol)))
572 switch (*r_type_p)
574 case BFD_RELOC_SH_IMM_LOW16:
575 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16;
576 break;
578 case BFD_RELOC_SH_IMM_MEDLOW16:
579 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16;
580 break;
582 case BFD_RELOC_SH_IMM_MEDHI16:
583 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16;
584 break;
586 case BFD_RELOC_SH_IMM_HI16:
587 *r_type_p = BFD_RELOC_SH_GOTPC_HI16;
588 break;
590 case BFD_RELOC_NONE:
591 case BFD_RELOC_UNUSED:
592 *r_type_p = BFD_RELOC_SH_GOTPC;
593 break;
595 default:
596 abort ();
598 return 0;
600 #else
601 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
603 *r_type_p = BFD_RELOC_SH_GOTPC;
604 return 0;
606 #endif
607 exp = symbol_get_value_expression (exp->X_add_symbol);
608 if (! exp)
609 return 0;
612 if (exp->X_op == O_PIC_reloc)
614 #ifdef HAVE_SH64
615 switch (*r_type_p)
617 case BFD_RELOC_NONE:
618 case BFD_RELOC_UNUSED:
619 *r_type_p = exp->X_md;
620 break;
622 case BFD_RELOC_SH_IMM_LOW16:
623 switch (exp->X_md)
625 case BFD_RELOC_32_GOTOFF:
626 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
627 break;
629 case BFD_RELOC_SH_GOTPLT32:
630 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
631 break;
633 case BFD_RELOC_32_GOT_PCREL:
634 *r_type_p = BFD_RELOC_SH_GOT_LOW16;
635 break;
637 case BFD_RELOC_32_PLT_PCREL:
638 *r_type_p = BFD_RELOC_SH_PLT_LOW16;
639 break;
641 default:
642 abort ();
644 break;
646 case BFD_RELOC_SH_IMM_MEDLOW16:
647 switch (exp->X_md)
649 case BFD_RELOC_32_GOTOFF:
650 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
651 break;
653 case BFD_RELOC_SH_GOTPLT32:
654 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
655 break;
657 case BFD_RELOC_32_GOT_PCREL:
658 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
659 break;
661 case BFD_RELOC_32_PLT_PCREL:
662 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
663 break;
665 default:
666 abort ();
668 break;
670 case BFD_RELOC_SH_IMM_MEDHI16:
671 switch (exp->X_md)
673 case BFD_RELOC_32_GOTOFF:
674 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
675 break;
677 case BFD_RELOC_SH_GOTPLT32:
678 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
679 break;
681 case BFD_RELOC_32_GOT_PCREL:
682 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
683 break;
685 case BFD_RELOC_32_PLT_PCREL:
686 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
687 break;
689 default:
690 abort ();
692 break;
694 case BFD_RELOC_SH_IMM_HI16:
695 switch (exp->X_md)
697 case BFD_RELOC_32_GOTOFF:
698 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
699 break;
701 case BFD_RELOC_SH_GOTPLT32:
702 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
703 break;
705 case BFD_RELOC_32_GOT_PCREL:
706 *r_type_p = BFD_RELOC_SH_GOT_HI16;
707 break;
709 case BFD_RELOC_32_PLT_PCREL:
710 *r_type_p = BFD_RELOC_SH_PLT_HI16;
711 break;
713 default:
714 abort ();
716 break;
718 default:
719 abort ();
721 #else
722 *r_type_p = exp->X_md;
723 #endif
724 if (exp == main_exp)
725 exp->X_op = O_symbol;
726 else
728 main_exp->X_add_symbol = exp->X_add_symbol;
729 main_exp->X_add_number += exp->X_add_number;
732 else
733 return (sh_PIC_related_p (exp->X_add_symbol)
734 || sh_PIC_related_p (exp->X_op_symbol));
736 return 0;
739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
741 void
742 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp)
744 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED;
746 if (sh_check_fixup (exp, &r_type))
747 as_bad (_("Invalid PIC expression."));
749 if (r_type == BFD_RELOC_UNUSED)
750 switch (size)
752 case 1:
753 r_type = BFD_RELOC_8;
754 break;
756 case 2:
757 r_type = BFD_RELOC_16;
758 break;
760 case 4:
761 r_type = BFD_RELOC_32;
762 break;
764 #ifdef HAVE_SH64
765 case 8:
766 r_type = BFD_RELOC_64;
767 break;
768 #endif
770 default:
771 goto error;
773 else if (size != 4)
775 error:
776 as_bad (_("unsupported BFD relocation size %u"), size);
777 r_type = BFD_RELOC_UNUSED;
780 fix_new_exp (frag, off, size, exp, 0, r_type);
783 /* The regular cons() function, that reads constants, doesn't support
784 suffixes such as @GOT, @GOTOFF and @PLT, that generate
785 machine-specific relocation types. So we must define it here. */
786 /* Clobbers input_line_pointer, checks end-of-line. */
787 /* NBYTES 1=.byte, 2=.word, 4=.long */
788 static void
789 sh_elf_cons (register int nbytes)
791 expressionS exp;
793 #ifdef HAVE_SH64
795 /* Update existing range to include a previous insn, if there was one. */
796 sh64_update_contents_mark (TRUE);
798 /* We need to make sure the contents type is set to data. */
799 sh64_flag_output ();
801 #endif /* HAVE_SH64 */
803 if (is_it_end_of_statement ())
805 demand_empty_rest_of_line ();
806 return;
809 #ifdef md_cons_align
810 md_cons_align (nbytes);
811 #endif
815 expression (&exp);
816 emit_expr (&exp, (unsigned int) nbytes);
818 while (*input_line_pointer++ == ',');
820 input_line_pointer--; /* Put terminator back into stream. */
821 if (*input_line_pointer == '#' || *input_line_pointer == '!')
823 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
825 else
826 demand_empty_rest_of_line ();
828 #endif /* OBJ_ELF */
831 /* This function is called once, at assembler startup time. This should
832 set up all the tables, etc that the MD part of the assembler needs. */
834 void
835 md_begin (void)
837 const sh_opcode_info *opcode;
838 char *prev_name = "";
839 unsigned int target_arch;
841 target_arch
842 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp;
843 valid_arch = target_arch;
845 #ifdef HAVE_SH64
846 shmedia_md_begin ();
847 #endif
849 opcode_hash_control = hash_new ();
851 /* Insert unique names into hash table. */
852 for (opcode = sh_table; opcode->name; opcode++)
854 if (strcmp (prev_name, opcode->name) != 0)
856 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch))
857 continue;
858 prev_name = opcode->name;
859 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
864 static int reg_m;
865 static int reg_n;
866 static int reg_x, reg_y;
867 static int reg_efg;
868 static int reg_b;
870 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
872 /* Try to parse a reg name. Return the number of chars consumed. */
874 static int
875 parse_reg (char *src, int *mode, int *reg)
877 char l0 = TOLOWER (src[0]);
878 char l1 = l0 ? TOLOWER (src[1]) : 0;
880 /* We use ! IDENT_CHAR for the next character after the register name, to
881 make sure that we won't accidentally recognize a symbol name such as
882 'sram' or sr_ram as being a reference to the register 'sr'. */
884 if (l0 == 'r')
886 if (l1 == '1')
888 if (src[2] >= '0' && src[2] <= '5'
889 && ! IDENT_CHAR ((unsigned char) src[3]))
891 *mode = A_REG_N;
892 *reg = 10 + src[2] - '0';
893 return 3;
896 if (l1 >= '0' && l1 <= '9'
897 && ! IDENT_CHAR ((unsigned char) src[2]))
899 *mode = A_REG_N;
900 *reg = (l1 - '0');
901 return 2;
903 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
904 && ! IDENT_CHAR ((unsigned char) src[7]))
906 *mode = A_REG_B;
907 *reg = (l1 - '0');
908 return 7;
911 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
913 *mode = A_RE;
914 return 2;
916 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
918 *mode = A_RS;
919 return 2;
923 if (l0 == 'a')
925 if (l1 == '0')
927 if (! IDENT_CHAR ((unsigned char) src[2]))
929 *mode = DSP_REG_N;
930 *reg = A_A0_NUM;
931 return 2;
933 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
935 *mode = DSP_REG_N;
936 *reg = A_A0G_NUM;
937 return 3;
940 if (l1 == '1')
942 if (! IDENT_CHAR ((unsigned char) src[2]))
944 *mode = DSP_REG_N;
945 *reg = A_A1_NUM;
946 return 2;
948 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
950 *mode = DSP_REG_N;
951 *reg = A_A1G_NUM;
952 return 3;
956 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
957 && ! IDENT_CHAR ((unsigned char) src[3]))
959 *mode = A_REG_N;
960 *reg = 4 + (l1 - '0');
961 return 3;
963 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
964 && ! IDENT_CHAR ((unsigned char) src[3]))
966 *mode = A_REG_N;
967 *reg = 6 + (l1 - '0');
968 return 3;
970 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
971 && ! IDENT_CHAR ((unsigned char) src[3]))
973 int n = l1 - '0';
975 *mode = A_REG_N;
976 *reg = n | ((~n & 2) << 1);
977 return 3;
981 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
983 if (l1 == 's')
985 *mode = A_REG_N;
986 *reg = 8;
987 return 2;
989 if (l1 == 'x')
991 *mode = A_REG_N;
992 *reg = 8;
993 return 2;
995 if (l1 == 'y')
997 *mode = A_REG_N;
998 *reg = 9;
999 return 2;
1003 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
1004 && ! IDENT_CHAR ((unsigned char) src[2]))
1006 *mode = DSP_REG_N;
1007 *reg = A_X0_NUM + l1 - '0';
1008 return 2;
1011 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
1012 && ! IDENT_CHAR ((unsigned char) src[2]))
1014 *mode = DSP_REG_N;
1015 *reg = A_Y0_NUM + l1 - '0';
1016 return 2;
1019 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
1020 && ! IDENT_CHAR ((unsigned char) src[2]))
1022 *mode = DSP_REG_N;
1023 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
1024 return 2;
1027 if (l0 == 's'
1028 && l1 == 's'
1029 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
1031 *mode = A_SSR;
1032 return 3;
1035 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
1036 && ! IDENT_CHAR ((unsigned char) src[3]))
1038 *mode = A_SPC;
1039 return 3;
1042 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
1043 && ! IDENT_CHAR ((unsigned char) src[3]))
1045 *mode = A_SGR;
1046 return 3;
1049 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
1050 && ! IDENT_CHAR ((unsigned char) src[3]))
1052 *mode = A_DSR;
1053 return 3;
1056 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1057 && ! IDENT_CHAR ((unsigned char) src[3]))
1059 *mode = A_DBR;
1060 return 3;
1063 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1065 *mode = A_SR;
1066 return 2;
1069 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
1071 *mode = A_REG_N;
1072 *reg = 15;
1073 return 2;
1076 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1078 *mode = A_PR;
1079 return 2;
1081 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
1083 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1084 and use an uninitialized immediate. */
1085 *mode = A_PC;
1086 return 2;
1088 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1089 && ! IDENT_CHAR ((unsigned char) src[3]))
1091 *mode = A_GBR;
1092 return 3;
1094 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1095 && ! IDENT_CHAR ((unsigned char) src[3]))
1097 *mode = A_VBR;
1098 return 3;
1101 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1102 && ! IDENT_CHAR ((unsigned char) src[3]))
1104 *mode = A_TBR;
1105 return 3;
1107 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
1108 && ! IDENT_CHAR ((unsigned char) src[4]))
1110 if (TOLOWER (src[3]) == 'l')
1112 *mode = A_MACL;
1113 return 4;
1115 if (TOLOWER (src[3]) == 'h')
1117 *mode = A_MACH;
1118 return 4;
1121 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
1122 && ! IDENT_CHAR ((unsigned char) src[3]))
1124 *mode = A_MOD;
1125 return 3;
1127 if (l0 == 'f' && l1 == 'r')
1129 if (src[2] == '1')
1131 if (src[3] >= '0' && src[3] <= '5'
1132 && ! IDENT_CHAR ((unsigned char) src[4]))
1134 *mode = F_REG_N;
1135 *reg = 10 + src[3] - '0';
1136 return 4;
1139 if (src[2] >= '0' && src[2] <= '9'
1140 && ! IDENT_CHAR ((unsigned char) src[3]))
1142 *mode = F_REG_N;
1143 *reg = (src[2] - '0');
1144 return 3;
1147 if (l0 == 'd' && l1 == 'r')
1149 if (src[2] == '1')
1151 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1152 && ! IDENT_CHAR ((unsigned char) src[4]))
1154 *mode = D_REG_N;
1155 *reg = 10 + src[3] - '0';
1156 return 4;
1159 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1160 && ! IDENT_CHAR ((unsigned char) src[3]))
1162 *mode = D_REG_N;
1163 *reg = (src[2] - '0');
1164 return 3;
1167 if (l0 == 'x' && l1 == 'd')
1169 if (src[2] == '1')
1171 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1172 && ! IDENT_CHAR ((unsigned char) src[4]))
1174 *mode = X_REG_N;
1175 *reg = 11 + src[3] - '0';
1176 return 4;
1179 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1180 && ! IDENT_CHAR ((unsigned char) src[3]))
1182 *mode = X_REG_N;
1183 *reg = (src[2] - '0') + 1;
1184 return 3;
1187 if (l0 == 'f' && l1 == 'v')
1189 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
1191 *mode = V_REG_N;
1192 *reg = 12;
1193 return 4;
1195 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
1196 && ! IDENT_CHAR ((unsigned char) src[3]))
1198 *mode = V_REG_N;
1199 *reg = (src[2] - '0');
1200 return 3;
1203 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
1204 && TOLOWER (src[3]) == 'l'
1205 && ! IDENT_CHAR ((unsigned char) src[4]))
1207 *mode = FPUL_N;
1208 return 4;
1211 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
1212 && TOLOWER (src[3]) == 'c'
1213 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
1215 *mode = FPSCR_N;
1216 return 5;
1219 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
1220 && TOLOWER (src[3]) == 'r'
1221 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
1223 *mode = XMTRX_M4;
1224 return 5;
1227 return 0;
1230 static char *
1231 parse_exp (char *s, sh_operand_info *op)
1233 char *save;
1234 char *new;
1236 save = input_line_pointer;
1237 input_line_pointer = s;
1238 expression (&op->immediate);
1239 if (op->immediate.X_op == O_absent)
1240 as_bad (_("missing operand"));
1241 #ifdef OBJ_ELF
1242 else if (op->immediate.X_op == O_PIC_reloc
1243 || sh_PIC_related_p (op->immediate.X_add_symbol)
1244 || sh_PIC_related_p (op->immediate.X_op_symbol))
1245 as_bad (_("misplaced PIC operand"));
1246 #endif
1247 new = input_line_pointer;
1248 input_line_pointer = save;
1249 return new;
1252 /* The many forms of operand:
1254 Rn Register direct
1255 @Rn Register indirect
1256 @Rn+ Autoincrement
1257 @-Rn Autodecrement
1258 @(disp:4,Rn)
1259 @(disp:8,GBR)
1260 @(disp:8,PC)
1262 @(R0,Rn)
1263 @(R0,GBR)
1265 disp:8
1266 disp:12
1267 #imm8
1268 pr, gbr, vbr, macl, mach
1271 static char *
1272 parse_at (char *src, sh_operand_info *op)
1274 int len;
1275 int mode;
1276 src++;
1277 if (src[0] == '@')
1279 src = parse_at (src, op);
1280 if (op->type == A_DISP_TBR)
1281 op->type = A_DISP2_TBR;
1282 else
1283 as_bad (_("illegal double indirection"));
1285 else if (src[0] == '-')
1287 /* Must be predecrement. */
1288 src++;
1290 len = parse_reg (src, &mode, &(op->reg));
1291 if (mode != A_REG_N)
1292 as_bad (_("illegal register after @-"));
1294 op->type = A_DEC_N;
1295 src += len;
1297 else if (src[0] == '(')
1299 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1300 @(r0, rn). */
1301 src++;
1302 len = parse_reg (src, &mode, &(op->reg));
1303 if (len && mode == A_REG_N)
1305 src += len;
1306 if (op->reg != 0)
1308 as_bad (_("must be @(r0,...)"));
1310 if (src[0] == ',')
1312 src++;
1313 /* Now can be rn or gbr. */
1314 len = parse_reg (src, &mode, &(op->reg));
1316 else
1318 len = 0;
1320 if (len)
1322 if (mode == A_GBR)
1324 op->type = A_R0_GBR;
1326 else if (mode == A_REG_N)
1328 op->type = A_IND_R0_REG_N;
1330 else
1332 as_bad (_("syntax error in @(r0,...)"));
1335 else
1337 as_bad (_("syntax error in @(r0...)"));
1340 else
1342 /* Must be an @(disp,.. thing). */
1343 src = parse_exp (src, op);
1344 if (src[0] == ',')
1345 src++;
1346 /* Now can be rn, gbr or pc. */
1347 len = parse_reg (src, &mode, &op->reg);
1348 if (len)
1350 if (mode == A_REG_N)
1352 op->type = A_DISP_REG_N;
1354 else if (mode == A_GBR)
1356 op->type = A_DISP_GBR;
1358 else if (mode == A_TBR)
1360 op->type = A_DISP_TBR;
1362 else if (mode == A_PC)
1364 /* We want @(expr, pc) to uniformly address . + expr,
1365 no matter if expr is a constant, or a more complex
1366 expression, e.g. sym-. or sym1-sym2.
1367 However, we also used to accept @(sym,pc)
1368 as addressing sym, i.e. meaning the same as plain sym.
1369 Some existing code does use the @(sym,pc) syntax, so
1370 we give it the old semantics for now, but warn about
1371 its use, so that users have some time to fix their code.
1373 Note that due to this backward compatibility hack,
1374 we'll get unexpected results when @(offset, pc) is used,
1375 and offset is a symbol that is set later to an an address
1376 difference, or an external symbol that is set to an
1377 address difference in another source file, so we want to
1378 eventually remove it. */
1379 if (op->immediate.X_op == O_symbol)
1381 op->type = A_DISP_PC;
1382 as_warn (_("Deprecated syntax."));
1384 else
1386 op->type = A_DISP_PC_ABS;
1387 /* Such operands don't get corrected for PC==.+4, so
1388 make the correction here. */
1389 op->immediate.X_add_number -= 4;
1392 else
1394 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1397 else
1399 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1402 src += len;
1403 if (src[0] != ')')
1404 as_bad (_("expecting )"));
1405 else
1406 src++;
1408 else
1410 src += parse_reg (src, &mode, &(op->reg));
1411 if (mode != A_REG_N)
1412 as_bad (_("illegal register after @"));
1414 if (src[0] == '+')
1416 char l0, l1;
1418 src++;
1419 l0 = TOLOWER (src[0]);
1420 l1 = TOLOWER (src[1]);
1422 if ((l0 == 'r' && l1 == '8')
1423 || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
1425 src += 2;
1426 op->type = AX_PMOD_N;
1428 else if ( (l0 == 'r' && l1 == '9')
1429 || (l0 == 'i' && l1 == 'y'))
1431 src += 2;
1432 op->type = AY_PMOD_N;
1434 else
1435 op->type = A_INC_N;
1437 else
1438 op->type = A_IND_N;
1440 return src;
1443 static void
1444 get_operand (char **ptr, sh_operand_info *op)
1446 char *src = *ptr;
1447 int mode = -1;
1448 unsigned int len;
1450 if (src[0] == '#')
1452 src++;
1453 *ptr = parse_exp (src, op);
1454 op->type = A_IMM;
1455 return;
1458 else if (src[0] == '@')
1460 *ptr = parse_at (src, op);
1461 return;
1463 len = parse_reg (src, &mode, &(op->reg));
1464 if (len)
1466 *ptr = src + len;
1467 op->type = mode;
1468 return;
1470 else
1472 /* Not a reg, the only thing left is a displacement. */
1473 *ptr = parse_exp (src, op);
1474 op->type = A_DISP_PC;
1475 return;
1479 static char *
1480 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
1482 char *ptr = args;
1483 if (info->arg[0])
1485 /* The pre-processor will eliminate whitespace in front of '@'
1486 after the first argument; we may be called multiple times
1487 from assemble_ppi, so don't insist on finding whitespace here. */
1488 if (*ptr == ' ')
1489 ptr++;
1491 get_operand (&ptr, operand + 0);
1492 if (info->arg[1])
1494 if (*ptr == ',')
1496 ptr++;
1498 get_operand (&ptr, operand + 1);
1499 /* ??? Hack: psha/pshl have a varying operand number depending on
1500 the type of the first operand. We handle this by having the
1501 three-operand version first and reducing the number of operands
1502 parsed to two if we see that the first operand is an immediate.
1503 This works because no insn with three operands has an immediate
1504 as first operand. */
1505 if (info->arg[2] && operand[0].type != A_IMM)
1507 if (*ptr == ',')
1509 ptr++;
1511 get_operand (&ptr, operand + 2);
1513 else
1515 operand[2].type = 0;
1518 else
1520 operand[1].type = 0;
1521 operand[2].type = 0;
1524 else
1526 operand[0].type = 0;
1527 operand[1].type = 0;
1528 operand[2].type = 0;
1530 return ptr;
1533 /* Passed a pointer to a list of opcodes which use different
1534 addressing modes, return the opcode which matches the opcodes
1535 provided. */
1537 static sh_opcode_info *
1538 get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
1540 sh_opcode_info *this_try = opcode;
1541 char *name = opcode->name;
1542 int n = 0;
1544 while (opcode->name)
1546 this_try = opcode++;
1547 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0))
1549 /* We've looked so far down the table that we've run out of
1550 opcodes with the same name. */
1551 return 0;
1554 /* Look at both operands needed by the opcodes and provided by
1555 the user - since an arg test will often fail on the same arg
1556 again and again, we'll try and test the last failing arg the
1557 first on each opcode try. */
1558 for (n = 0; this_try->arg[n]; n++)
1560 sh_operand_info *user = operands + n;
1561 sh_arg_type arg = this_try->arg[n];
1563 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
1564 && ( arg == A_DISP_REG_M
1565 || arg == A_DISP_REG_N))
1567 /* Check a few key IMM* fields for overflow. */
1568 int opf;
1569 long val = user->immediate.X_add_number;
1571 for (opf = 0; opf < 4; opf ++)
1572 switch (this_try->nibbles[opf])
1574 case IMM0_4:
1575 case IMM1_4:
1576 if (val < 0 || val > 15)
1577 goto fail;
1578 break;
1579 case IMM0_4BY2:
1580 case IMM1_4BY2:
1581 if (val < 0 || val > 15 * 2)
1582 goto fail;
1583 break;
1584 case IMM0_4BY4:
1585 case IMM1_4BY4:
1586 if (val < 0 || val > 15 * 4)
1587 goto fail;
1588 break;
1589 default:
1590 break;
1593 switch (arg)
1595 case A_DISP_PC:
1596 if (user->type == A_DISP_PC_ABS)
1597 break;
1598 /* Fall through. */
1599 case A_IMM:
1600 case A_BDISP12:
1601 case A_BDISP8:
1602 case A_DISP_GBR:
1603 case A_DISP2_TBR:
1604 case A_MACH:
1605 case A_PR:
1606 case A_MACL:
1607 if (user->type != arg)
1608 goto fail;
1609 break;
1610 case A_R0:
1611 /* opcode needs r0 */
1612 if (user->type != A_REG_N || user->reg != 0)
1613 goto fail;
1614 break;
1615 case A_R0_GBR:
1616 if (user->type != A_R0_GBR || user->reg != 0)
1617 goto fail;
1618 break;
1619 case F_FR0:
1620 if (user->type != F_REG_N || user->reg != 0)
1621 goto fail;
1622 break;
1624 case A_REG_N:
1625 case A_INC_N:
1626 case A_DEC_N:
1627 case A_IND_N:
1628 case A_IND_R0_REG_N:
1629 case A_DISP_REG_N:
1630 case F_REG_N:
1631 case D_REG_N:
1632 case X_REG_N:
1633 case V_REG_N:
1634 case FPUL_N:
1635 case FPSCR_N:
1636 case DSP_REG_N:
1637 /* Opcode needs rn */
1638 if (user->type != arg)
1639 goto fail;
1640 reg_n = user->reg;
1641 break;
1642 case DX_REG_N:
1643 if (user->type != D_REG_N && user->type != X_REG_N)
1644 goto fail;
1645 reg_n = user->reg;
1646 break;
1647 case A_GBR:
1648 case A_TBR:
1649 case A_SR:
1650 case A_VBR:
1651 case A_DSR:
1652 case A_MOD:
1653 case A_RE:
1654 case A_RS:
1655 case A_SSR:
1656 case A_SPC:
1657 case A_SGR:
1658 case A_DBR:
1659 if (user->type != arg)
1660 goto fail;
1661 break;
1663 case A_REG_B:
1664 if (user->type != arg)
1665 goto fail;
1666 reg_b = user->reg;
1667 break;
1669 case A_INC_R15:
1670 if (user->type != A_INC_N)
1671 goto fail;
1672 if (user->reg != 15)
1673 goto fail;
1674 reg_n = user->reg;
1675 break;
1677 case A_DEC_R15:
1678 if (user->type != A_DEC_N)
1679 goto fail;
1680 if (user->reg != 15)
1681 goto fail;
1682 reg_n = user->reg;
1683 break;
1685 case A_REG_M:
1686 case A_INC_M:
1687 case A_DEC_M:
1688 case A_IND_M:
1689 case A_IND_R0_REG_M:
1690 case A_DISP_REG_M:
1691 case DSP_REG_M:
1692 /* Opcode needs rn */
1693 if (user->type != arg - A_REG_M + A_REG_N)
1694 goto fail;
1695 reg_m = user->reg;
1696 break;
1698 case AS_DEC_N:
1699 if (user->type != A_DEC_N)
1700 goto fail;
1701 if (user->reg < 2 || user->reg > 5)
1702 goto fail;
1703 reg_n = user->reg;
1704 break;
1706 case AS_INC_N:
1707 if (user->type != A_INC_N)
1708 goto fail;
1709 if (user->reg < 2 || user->reg > 5)
1710 goto fail;
1711 reg_n = user->reg;
1712 break;
1714 case AS_IND_N:
1715 if (user->type != A_IND_N)
1716 goto fail;
1717 if (user->reg < 2 || user->reg > 5)
1718 goto fail;
1719 reg_n = user->reg;
1720 break;
1722 case AS_PMOD_N:
1723 if (user->type != AX_PMOD_N)
1724 goto fail;
1725 if (user->reg < 2 || user->reg > 5)
1726 goto fail;
1727 reg_n = user->reg;
1728 break;
1730 case AX_INC_N:
1731 if (user->type != A_INC_N)
1732 goto fail;
1733 if (user->reg < 4 || user->reg > 5)
1734 goto fail;
1735 reg_n = user->reg;
1736 break;
1738 case AX_IND_N:
1739 if (user->type != A_IND_N)
1740 goto fail;
1741 if (user->reg < 4 || user->reg > 5)
1742 goto fail;
1743 reg_n = user->reg;
1744 break;
1746 case AX_PMOD_N:
1747 if (user->type != AX_PMOD_N)
1748 goto fail;
1749 if (user->reg < 4 || user->reg > 5)
1750 goto fail;
1751 reg_n = user->reg;
1752 break;
1754 case AXY_INC_N:
1755 if (user->type != A_INC_N)
1756 goto fail;
1757 if ((user->reg < 4 || user->reg > 5)
1758 && (user->reg < 0 || user->reg > 1))
1759 goto fail;
1760 reg_n = user->reg;
1761 break;
1763 case AXY_IND_N:
1764 if (user->type != A_IND_N)
1765 goto fail;
1766 if ((user->reg < 4 || user->reg > 5)
1767 && (user->reg < 0 || user->reg > 1))
1768 goto fail;
1769 reg_n = user->reg;
1770 break;
1772 case AXY_PMOD_N:
1773 if (user->type != AX_PMOD_N)
1774 goto fail;
1775 if ((user->reg < 4 || user->reg > 5)
1776 && (user->reg < 0 || user->reg > 1))
1777 goto fail;
1778 reg_n = user->reg;
1779 break;
1781 case AY_INC_N:
1782 if (user->type != A_INC_N)
1783 goto fail;
1784 if (user->reg < 6 || user->reg > 7)
1785 goto fail;
1786 reg_n = user->reg;
1787 break;
1789 case AY_IND_N:
1790 if (user->type != A_IND_N)
1791 goto fail;
1792 if (user->reg < 6 || user->reg > 7)
1793 goto fail;
1794 reg_n = user->reg;
1795 break;
1797 case AY_PMOD_N:
1798 if (user->type != AY_PMOD_N)
1799 goto fail;
1800 if (user->reg < 6 || user->reg > 7)
1801 goto fail;
1802 reg_n = user->reg;
1803 break;
1805 case AYX_INC_N:
1806 if (user->type != A_INC_N)
1807 goto fail;
1808 if ((user->reg < 6 || user->reg > 7)
1809 && (user->reg < 2 || user->reg > 3))
1810 goto fail;
1811 reg_n = user->reg;
1812 break;
1814 case AYX_IND_N:
1815 if (user->type != A_IND_N)
1816 goto fail;
1817 if ((user->reg < 6 || user->reg > 7)
1818 && (user->reg < 2 || user->reg > 3))
1819 goto fail;
1820 reg_n = user->reg;
1821 break;
1823 case AYX_PMOD_N:
1824 if (user->type != AY_PMOD_N)
1825 goto fail;
1826 if ((user->reg < 6 || user->reg > 7)
1827 && (user->reg < 2 || user->reg > 3))
1828 goto fail;
1829 reg_n = user->reg;
1830 break;
1832 case DSP_REG_A_M:
1833 if (user->type != DSP_REG_N)
1834 goto fail;
1835 if (user->reg != A_A0_NUM
1836 && user->reg != A_A1_NUM)
1837 goto fail;
1838 reg_m = user->reg;
1839 break;
1841 case DSP_REG_AX:
1842 if (user->type != DSP_REG_N)
1843 goto fail;
1844 switch (user->reg)
1846 case A_A0_NUM:
1847 reg_x = 0;
1848 break;
1849 case A_A1_NUM:
1850 reg_x = 2;
1851 break;
1852 case A_X0_NUM:
1853 reg_x = 1;
1854 break;
1855 case A_X1_NUM:
1856 reg_x = 3;
1857 break;
1858 default:
1859 goto fail;
1861 break;
1863 case DSP_REG_XY:
1864 if (user->type != DSP_REG_N)
1865 goto fail;
1866 switch (user->reg)
1868 case A_X0_NUM:
1869 reg_x = 0;
1870 break;
1871 case A_X1_NUM:
1872 reg_x = 2;
1873 break;
1874 case A_Y0_NUM:
1875 reg_x = 1;
1876 break;
1877 case A_Y1_NUM:
1878 reg_x = 3;
1879 break;
1880 default:
1881 goto fail;
1883 break;
1885 case DSP_REG_AY:
1886 if (user->type != DSP_REG_N)
1887 goto fail;
1888 switch (user->reg)
1890 case A_A0_NUM:
1891 reg_y = 0;
1892 break;
1893 case A_A1_NUM:
1894 reg_y = 1;
1895 break;
1896 case A_Y0_NUM:
1897 reg_y = 2;
1898 break;
1899 case A_Y1_NUM:
1900 reg_y = 3;
1901 break;
1902 default:
1903 goto fail;
1905 break;
1907 case DSP_REG_YX:
1908 if (user->type != DSP_REG_N)
1909 goto fail;
1910 switch (user->reg)
1912 case A_Y0_NUM:
1913 reg_y = 0;
1914 break;
1915 case A_Y1_NUM:
1916 reg_y = 1;
1917 break;
1918 case A_X0_NUM:
1919 reg_y = 2;
1920 break;
1921 case A_X1_NUM:
1922 reg_y = 3;
1923 break;
1924 default:
1925 goto fail;
1927 break;
1929 case DSP_REG_X:
1930 if (user->type != DSP_REG_N)
1931 goto fail;
1932 switch (user->reg)
1934 case A_X0_NUM:
1935 reg_x = 0;
1936 break;
1937 case A_X1_NUM:
1938 reg_x = 1;
1939 break;
1940 case A_A0_NUM:
1941 reg_x = 2;
1942 break;
1943 case A_A1_NUM:
1944 reg_x = 3;
1945 break;
1946 default:
1947 goto fail;
1949 break;
1951 case DSP_REG_Y:
1952 if (user->type != DSP_REG_N)
1953 goto fail;
1954 switch (user->reg)
1956 case A_Y0_NUM:
1957 reg_y = 0;
1958 break;
1959 case A_Y1_NUM:
1960 reg_y = 1;
1961 break;
1962 case A_M0_NUM:
1963 reg_y = 2;
1964 break;
1965 case A_M1_NUM:
1966 reg_y = 3;
1967 break;
1968 default:
1969 goto fail;
1971 break;
1973 case DSP_REG_E:
1974 if (user->type != DSP_REG_N)
1975 goto fail;
1976 switch (user->reg)
1978 case A_X0_NUM:
1979 reg_efg = 0 << 10;
1980 break;
1981 case A_X1_NUM:
1982 reg_efg = 1 << 10;
1983 break;
1984 case A_Y0_NUM:
1985 reg_efg = 2 << 10;
1986 break;
1987 case A_A1_NUM:
1988 reg_efg = 3 << 10;
1989 break;
1990 default:
1991 goto fail;
1993 break;
1995 case DSP_REG_F:
1996 if (user->type != DSP_REG_N)
1997 goto fail;
1998 switch (user->reg)
2000 case A_Y0_NUM:
2001 reg_efg |= 0 << 8;
2002 break;
2003 case A_Y1_NUM:
2004 reg_efg |= 1 << 8;
2005 break;
2006 case A_X0_NUM:
2007 reg_efg |= 2 << 8;
2008 break;
2009 case A_A1_NUM:
2010 reg_efg |= 3 << 8;
2011 break;
2012 default:
2013 goto fail;
2015 break;
2017 case DSP_REG_G:
2018 if (user->type != DSP_REG_N)
2019 goto fail;
2020 switch (user->reg)
2022 case A_M0_NUM:
2023 reg_efg |= 0 << 2;
2024 break;
2025 case A_M1_NUM:
2026 reg_efg |= 1 << 2;
2027 break;
2028 case A_A0_NUM:
2029 reg_efg |= 2 << 2;
2030 break;
2031 case A_A1_NUM:
2032 reg_efg |= 3 << 2;
2033 break;
2034 default:
2035 goto fail;
2037 break;
2039 case A_A0:
2040 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
2041 goto fail;
2042 break;
2043 case A_X0:
2044 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
2045 goto fail;
2046 break;
2047 case A_X1:
2048 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
2049 goto fail;
2050 break;
2051 case A_Y0:
2052 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
2053 goto fail;
2054 break;
2055 case A_Y1:
2056 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
2057 goto fail;
2058 break;
2060 case F_REG_M:
2061 case D_REG_M:
2062 case X_REG_M:
2063 case V_REG_M:
2064 case FPUL_M:
2065 case FPSCR_M:
2066 /* Opcode needs rn */
2067 if (user->type != arg - F_REG_M + F_REG_N)
2068 goto fail;
2069 reg_m = user->reg;
2070 break;
2071 case DX_REG_M:
2072 if (user->type != D_REG_N && user->type != X_REG_N)
2073 goto fail;
2074 reg_m = user->reg;
2075 break;
2076 case XMTRX_M4:
2077 if (user->type != XMTRX_M4)
2078 goto fail;
2079 reg_m = 4;
2080 break;
2082 default:
2083 printf (_("unhandled %d\n"), arg);
2084 goto fail;
2087 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch))
2088 goto fail;
2089 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch);
2090 return this_try;
2091 fail:
2095 return 0;
2098 static void
2099 insert (char *where, int how, int pcrel, sh_operand_info *op)
2101 fix_new_exp (frag_now,
2102 where - frag_now->fr_literal,
2104 &op->immediate,
2105 pcrel,
2106 how);
2109 static void
2110 insert4 (char * where, int how, int pcrel, sh_operand_info * op)
2112 fix_new_exp (frag_now,
2113 where - frag_now->fr_literal,
2115 & op->immediate,
2116 pcrel,
2117 how);
2119 static void
2120 build_relax (sh_opcode_info *opcode, sh_operand_info *op)
2122 int high_byte = target_big_endian ? 0 : 1;
2123 char *p;
2125 if (opcode->arg[0] == A_BDISP8)
2127 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
2128 p = frag_var (rs_machine_dependent,
2129 md_relax_table[C (what, COND32)].rlx_length,
2130 md_relax_table[C (what, COND8)].rlx_length,
2131 C (what, 0),
2132 op->immediate.X_add_symbol,
2133 op->immediate.X_add_number,
2135 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
2137 else if (opcode->arg[0] == A_BDISP12)
2139 p = frag_var (rs_machine_dependent,
2140 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
2141 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
2142 C (UNCOND_JUMP, 0),
2143 op->immediate.X_add_symbol,
2144 op->immediate.X_add_number,
2146 p[high_byte] = (opcode->nibbles[0] << 4);
2151 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2153 static char *
2154 insert_loop_bounds (char *output, sh_operand_info *operand)
2156 char *name;
2157 symbolS *end_sym;
2159 /* Since the low byte of the opcode will be overwritten by the reloc, we
2160 can just stash the high byte into both bytes and ignore endianness. */
2161 output[0] = 0x8c;
2162 output[1] = 0x8c;
2163 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
2164 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
2166 if (sh_relax)
2168 static int count = 0;
2170 /* If the last loop insn is a two-byte-insn, it is in danger of being
2171 swapped with the insn after it. To prevent this, create a new
2172 symbol - complete with SH_LABEL reloc - after the last loop insn.
2173 If the last loop insn is four bytes long, the symbol will be
2174 right in the middle, but four byte insns are not swapped anyways. */
2175 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2176 Hence a 9 digit number should be enough to count all REPEATs. */
2177 name = alloca (11);
2178 sprintf (name, "_R%x", count++ & 0x3fffffff);
2179 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
2180 /* Make this a local symbol. */
2181 #ifdef OBJ_COFF
2182 SF_SET_LOCAL (end_sym);
2183 #endif /* OBJ_COFF */
2184 symbol_table_insert (end_sym);
2185 end_sym->sy_value = operand[1].immediate;
2186 end_sym->sy_value.X_add_number += 2;
2187 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
2190 output = frag_more (2);
2191 output[0] = 0x8e;
2192 output[1] = 0x8e;
2193 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
2194 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
2196 return frag_more (2);
2199 /* Now we know what sort of opcodes it is, let's build the bytes. */
2201 static unsigned int
2202 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
2204 int index;
2205 char nbuf[8];
2206 char *output;
2207 unsigned int size = 2;
2208 int low_byte = target_big_endian ? 1 : 0;
2209 int max_index = 4;
2211 nbuf[0] = 0;
2212 nbuf[1] = 0;
2213 nbuf[2] = 0;
2214 nbuf[3] = 0;
2215 nbuf[4] = 0;
2216 nbuf[5] = 0;
2217 nbuf[6] = 0;
2218 nbuf[7] = 0;
2220 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
2222 output = frag_more (4);
2223 size = 4;
2224 max_index = 8;
2226 else
2227 output = frag_more (2);
2229 for (index = 0; index < max_index; index++)
2231 sh_nibble_type i = opcode->nibbles[index];
2232 if (i < 16)
2234 nbuf[index] = i;
2236 else
2238 switch (i)
2240 case REG_N:
2241 case REG_N_D:
2242 nbuf[index] = reg_n;
2243 break;
2244 case REG_M:
2245 nbuf[index] = reg_m;
2246 break;
2247 case SDT_REG_N:
2248 if (reg_n < 2 || reg_n > 5)
2249 as_bad (_("Invalid register: 'r%d'"), reg_n);
2250 nbuf[index] = (reg_n & 3) | 4;
2251 break;
2252 case REG_NM:
2253 nbuf[index] = reg_n | (reg_m >> 2);
2254 break;
2255 case REG_B:
2256 nbuf[index] = reg_b | 0x08;
2257 break;
2258 case REG_N_B01:
2259 nbuf[index] = reg_n | 0x01;
2260 break;
2261 case IMM0_3s:
2262 nbuf[index] |= 0x08;
2263 case IMM0_3c:
2264 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
2265 break;
2266 case IMM0_3Us:
2267 nbuf[index] |= 0x80;
2268 case IMM0_3Uc:
2269 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
2270 break;
2271 case DISP0_12:
2272 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand);
2273 break;
2274 case DISP0_12BY2:
2275 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand);
2276 break;
2277 case DISP0_12BY4:
2278 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand);
2279 break;
2280 case DISP0_12BY8:
2281 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand);
2282 break;
2283 case DISP1_12:
2284 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1);
2285 break;
2286 case DISP1_12BY2:
2287 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1);
2288 break;
2289 case DISP1_12BY4:
2290 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1);
2291 break;
2292 case DISP1_12BY8:
2293 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1);
2294 break;
2295 case IMM0_20_4:
2296 break;
2297 case IMM0_20:
2298 insert4 (output, BFD_RELOC_SH_DISP20, 0, operand);
2299 break;
2300 case IMM0_20BY8:
2301 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand);
2302 break;
2303 case IMM0_4BY4:
2304 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
2305 break;
2306 case IMM0_4BY2:
2307 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
2308 break;
2309 case IMM0_4:
2310 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
2311 break;
2312 case IMM1_4BY4:
2313 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
2314 break;
2315 case IMM1_4BY2:
2316 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
2317 break;
2318 case IMM1_4:
2319 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
2320 break;
2321 case IMM0_8BY4:
2322 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
2323 break;
2324 case IMM0_8BY2:
2325 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
2326 break;
2327 case IMM0_8:
2328 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
2329 break;
2330 case IMM1_8BY4:
2331 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
2332 break;
2333 case IMM1_8BY2:
2334 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
2335 break;
2336 case IMM1_8:
2337 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
2338 break;
2339 case PCRELIMM_8BY4:
2340 insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
2341 operand->type != A_DISP_PC_ABS, operand);
2342 break;
2343 case PCRELIMM_8BY2:
2344 insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
2345 operand->type != A_DISP_PC_ABS, operand);
2346 break;
2347 case REPEAT:
2348 output = insert_loop_bounds (output, operand);
2349 nbuf[index] = opcode->nibbles[3];
2350 operand += 2;
2351 break;
2352 default:
2353 printf (_("failed for %d\n"), i);
2357 if (!target_big_endian)
2359 output[1] = (nbuf[0] << 4) | (nbuf[1]);
2360 output[0] = (nbuf[2] << 4) | (nbuf[3]);
2362 else
2364 output[0] = (nbuf[0] << 4) | (nbuf[1]);
2365 output[1] = (nbuf[2] << 4) | (nbuf[3]);
2367 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
2369 if (!target_big_endian)
2371 output[3] = (nbuf[4] << 4) | (nbuf[5]);
2372 output[2] = (nbuf[6] << 4) | (nbuf[7]);
2374 else
2376 output[2] = (nbuf[4] << 4) | (nbuf[5]);
2377 output[3] = (nbuf[6] << 4) | (nbuf[7]);
2380 return size;
2383 /* Find an opcode at the start of *STR_P in the hash table, and set
2384 *STR_P to the first character after the last one read. */
2386 static sh_opcode_info *
2387 find_cooked_opcode (char **str_p)
2389 char *str = *str_p;
2390 unsigned char *op_start;
2391 unsigned char *op_end;
2392 char name[20];
2393 int nlen = 0;
2395 /* Drop leading whitespace. */
2396 while (*str == ' ')
2397 str++;
2399 /* Find the op code end.
2400 The pre-processor will eliminate whitespace in front of
2401 any '@' after the first argument; we may be called from
2402 assemble_ppi, so the opcode might be terminated by an '@'. */
2403 for (op_start = op_end = (unsigned char *) (str);
2404 *op_end
2405 && nlen < 20
2406 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
2407 op_end++)
2409 unsigned char c = op_start[nlen];
2411 /* The machine independent code will convert CMP/EQ into cmp/EQ
2412 because it thinks the '/' is the end of the symbol. Moreover,
2413 all but the first sub-insn is a parallel processing insn won't
2414 be capitalized. Instead of hacking up the machine independent
2415 code, we just deal with it here. */
2416 c = TOLOWER (c);
2417 name[nlen] = c;
2418 nlen++;
2421 name[nlen] = 0;
2422 *str_p = op_end;
2424 if (nlen == 0)
2425 as_bad (_("can't find opcode "));
2427 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
2430 /* Assemble a parallel processing insn. */
2431 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2433 static unsigned int
2434 assemble_ppi (char *op_end, sh_opcode_info *opcode)
2436 int movx = 0;
2437 int movy = 0;
2438 int cond = 0;
2439 int field_b = 0;
2440 char *output;
2441 int move_code;
2442 unsigned int size;
2444 for (;;)
2446 sh_operand_info operand[3];
2448 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2449 Make sure we encode a defined insn pattern. */
2450 reg_x = 0;
2451 reg_y = 0;
2452 reg_n = 0;
2454 if (opcode->arg[0] != A_END)
2455 op_end = get_operands (opcode, op_end, operand);
2456 try_another_opcode:
2457 opcode = get_specific (opcode, operand);
2458 if (opcode == 0)
2460 /* Couldn't find an opcode which matched the operands. */
2461 char *where = frag_more (2);
2462 size = 2;
2464 where[0] = 0x0;
2465 where[1] = 0x0;
2466 as_bad (_("invalid operands for opcode"));
2467 return size;
2470 if (opcode->nibbles[0] != PPI)
2471 as_bad (_("insn can't be combined with parallel processing insn"));
2473 switch (opcode->nibbles[1])
2476 case NOPX:
2477 if (movx)
2478 as_bad (_("multiple movx specifications"));
2479 movx = DDT_BASE;
2480 break;
2481 case NOPY:
2482 if (movy)
2483 as_bad (_("multiple movy specifications"));
2484 movy = DDT_BASE;
2485 break;
2487 case MOVX_NOPY:
2488 if (movx)
2489 as_bad (_("multiple movx specifications"));
2490 if ((reg_n < 4 || reg_n > 5)
2491 && (reg_n < 0 || reg_n > 1))
2492 as_bad (_("invalid movx address register"));
2493 if (movy && movy != DDT_BASE)
2494 as_bad (_("insn cannot be combined with non-nopy"));
2495 movx = ((((reg_n & 1) != 0) << 9)
2496 + (((reg_n & 4) == 0) << 8)
2497 + (reg_x << 6)
2498 + (opcode->nibbles[2] << 4)
2499 + opcode->nibbles[3]
2500 + DDT_BASE);
2501 break;
2503 case MOVY_NOPX:
2504 if (movy)
2505 as_bad (_("multiple movy specifications"));
2506 if ((reg_n < 6 || reg_n > 7)
2507 && (reg_n < 2 || reg_n > 3))
2508 as_bad (_("invalid movy address register"));
2509 if (movx && movx != DDT_BASE)
2510 as_bad (_("insn cannot be combined with non-nopx"));
2511 movy = ((((reg_n & 1) != 0) << 8)
2512 + (((reg_n & 4) == 0) << 9)
2513 + (reg_y << 6)
2514 + (opcode->nibbles[2] << 4)
2515 + opcode->nibbles[3]
2516 + DDT_BASE);
2517 break;
2519 case MOVX:
2520 if (movx)
2521 as_bad (_("multiple movx specifications"));
2522 if (movy & 0x2ac)
2523 as_bad (_("previous movy requires nopx"));
2524 if (reg_n < 4 || reg_n > 5)
2525 as_bad (_("invalid movx address register"));
2526 if (opcode->nibbles[2] & 8)
2528 if (reg_m == A_A1_NUM)
2529 movx = 1 << 7;
2530 else if (reg_m != A_A0_NUM)
2531 as_bad (_("invalid movx dsp register"));
2533 else
2535 if (reg_x > 1)
2536 as_bad (_("invalid movx dsp register"));
2537 movx = reg_x << 7;
2539 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
2540 break;
2542 case MOVY:
2543 if (movy)
2544 as_bad (_("multiple movy specifications"));
2545 if (movx & 0x153)
2546 as_bad (_("previous movx requires nopy"));
2547 if (opcode->nibbles[2] & 8)
2549 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2550 so add 8 more. */
2551 movy = 8;
2552 if (reg_m == A_A1_NUM)
2553 movy += 1 << 6;
2554 else if (reg_m != A_A0_NUM)
2555 as_bad (_("invalid movy dsp register"));
2557 else
2559 if (reg_y > 1)
2560 as_bad (_("invalid movy dsp register"));
2561 movy = reg_y << 6;
2563 if (reg_n < 6 || reg_n > 7)
2564 as_bad (_("invalid movy address register"));
2565 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
2566 break;
2568 case PSH:
2569 if (operand[0].immediate.X_op != O_constant)
2570 as_bad (_("dsp immediate shift value not constant"));
2571 field_b = ((opcode->nibbles[2] << 12)
2572 | (operand[0].immediate.X_add_number & 127) << 4
2573 | reg_n);
2574 break;
2575 case PPI3NC:
2576 if (cond)
2578 opcode++;
2579 goto try_another_opcode;
2581 /* Fall through. */
2582 case PPI3:
2583 if (field_b)
2584 as_bad (_("multiple parallel processing specifications"));
2585 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2586 + (reg_x << 6) + (reg_y << 4) + reg_n);
2587 switch (opcode->nibbles[4])
2589 case HEX_0:
2590 case HEX_XX00:
2591 case HEX_00YY:
2592 break;
2593 case HEX_1:
2594 case HEX_4:
2595 field_b += opcode->nibbles[4] << 4;
2596 break;
2597 default:
2598 abort ();
2600 break;
2601 case PDC:
2602 if (cond)
2603 as_bad (_("multiple condition specifications"));
2604 cond = opcode->nibbles[2] << 8;
2605 if (*op_end)
2606 goto skip_cond_check;
2607 break;
2608 case PPIC:
2609 if (field_b)
2610 as_bad (_("multiple parallel processing specifications"));
2611 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2612 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
2613 cond = 0;
2614 switch (opcode->nibbles[4])
2616 case HEX_0:
2617 case HEX_XX00:
2618 case HEX_00YY:
2619 break;
2620 case HEX_1:
2621 case HEX_4:
2622 field_b += opcode->nibbles[4] << 4;
2623 break;
2624 default:
2625 abort ();
2627 break;
2628 case PMUL:
2629 if (field_b)
2631 if ((field_b & 0xef00) == 0xa100)
2632 field_b -= 0x8100;
2633 /* pclr Dz pmuls Se,Sf,Dg */
2634 else if ((field_b & 0xff00) == 0x8d00
2635 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up)))
2637 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up);
2638 field_b -= 0x8cf0;
2640 else
2641 as_bad (_("insn cannot be combined with pmuls"));
2642 switch (field_b & 0xf)
2644 case A_X0_NUM:
2645 field_b += 0 - A_X0_NUM;
2646 break;
2647 case A_Y0_NUM:
2648 field_b += 1 - A_Y0_NUM;
2649 break;
2650 case A_A0_NUM:
2651 field_b += 2 - A_A0_NUM;
2652 break;
2653 case A_A1_NUM:
2654 field_b += 3 - A_A1_NUM;
2655 break;
2656 default:
2657 as_bad (_("bad combined pmuls output operand"));
2659 /* Generate warning if the destination register for padd / psub
2660 and pmuls is the same ( only for A0 or A1 ).
2661 If the last nibble is 1010 then A0 is used in both
2662 padd / psub and pmuls. If it is 1111 then A1 is used
2663 as destination register in both padd / psub and pmuls. */
2665 if ((((field_b | reg_efg) & 0x000F) == 0x000A)
2666 || (((field_b | reg_efg) & 0x000F) == 0x000F))
2667 as_warn (_("destination register is same for parallel insns"));
2669 field_b += 0x4000 + reg_efg;
2670 break;
2671 default:
2672 abort ();
2674 if (cond)
2676 as_bad (_("condition not followed by conditionalizable insn"));
2677 cond = 0;
2679 if (! *op_end)
2680 break;
2681 skip_cond_check:
2682 opcode = find_cooked_opcode (&op_end);
2683 if (opcode == NULL)
2685 (as_bad
2686 (_("unrecognized characters at end of parallel processing insn")));
2687 break;
2691 move_code = movx | movy;
2692 if (field_b)
2694 /* Parallel processing insn. */
2695 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
2697 output = frag_more (4);
2698 size = 4;
2699 if (! target_big_endian)
2701 output[3] = ppi_code >> 8;
2702 output[2] = ppi_code;
2704 else
2706 output[2] = ppi_code >> 8;
2707 output[3] = ppi_code;
2709 move_code |= 0xf800;
2711 else
2713 /* Just a double data transfer. */
2714 output = frag_more (2);
2715 size = 2;
2717 if (! target_big_endian)
2719 output[1] = move_code >> 8;
2720 output[0] = move_code;
2722 else
2724 output[0] = move_code >> 8;
2725 output[1] = move_code;
2727 return size;
2730 /* This is the guts of the machine-dependent assembler. STR points to a
2731 machine dependent instruction. This function is supposed to emit
2732 the frags/bytes it assembles to. */
2734 void
2735 md_assemble (char *str)
2737 unsigned char *op_end;
2738 sh_operand_info operand[3];
2739 sh_opcode_info *opcode;
2740 unsigned int size = 0;
2741 char *initial_str = str;
2743 #ifdef HAVE_SH64
2744 if (sh64_isa_mode == sh64_isa_shmedia)
2746 shmedia_md_assemble (str);
2747 return;
2749 else
2751 /* If we've seen pseudo-directives, make sure any emitted data or
2752 frags are marked as data. */
2753 if (!seen_insn)
2755 sh64_update_contents_mark (TRUE);
2756 sh64_set_contents_type (CRT_SH5_ISA16);
2759 seen_insn = TRUE;
2761 #endif /* HAVE_SH64 */
2763 opcode = find_cooked_opcode (&str);
2764 op_end = str;
2766 if (opcode == NULL)
2768 /* The opcode is not in the hash table.
2769 This means we definately have an assembly failure,
2770 but the instruction may be valid in another CPU variant.
2771 In this case emit something better than 'unknown opcode'.
2772 Search the full table in sh-opc.h to check. */
2774 char *name = initial_str;
2775 int name_length = 0;
2776 const sh_opcode_info *op;
2777 int found = 0;
2779 /* identify opcode in string */
2780 while (ISSPACE (*name))
2782 name++;
2784 while (!ISSPACE (name[name_length]))
2786 name_length++;
2789 /* search for opcode in full list */
2790 for (op = sh_table; op->name; op++)
2792 if (strncasecmp (op->name, name, name_length) == 0
2793 && op->name[name_length] == '\0')
2795 found = 1;
2796 break;
2800 if ( found )
2802 as_bad (_("opcode not valid for this cpu variant"));
2804 else
2806 as_bad (_("unknown opcode"));
2808 return;
2811 if (sh_relax
2812 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
2814 /* Output a CODE reloc to tell the linker that the following
2815 bytes are instructions, not data. */
2816 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2817 BFD_RELOC_SH_CODE);
2818 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
2821 if (opcode->nibbles[0] == PPI)
2823 size = assemble_ppi (op_end, opcode);
2825 else
2827 if (opcode->arg[0] == A_BDISP12
2828 || opcode->arg[0] == A_BDISP8)
2830 /* Since we skip get_specific here, we have to check & update
2831 valid_arch now. */
2832 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch))
2833 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch);
2834 else
2835 as_bad (_("Delayed branches not available on SH1"));
2836 parse_exp (op_end + 1, &operand[0]);
2837 build_relax (opcode, &operand[0]);
2839 else
2841 if (opcode->arg[0] == A_END)
2843 /* Ignore trailing whitespace. If there is any, it has already
2844 been compressed to a single space. */
2845 if (*op_end == ' ')
2846 op_end++;
2848 else
2850 op_end = get_operands (opcode, op_end, operand);
2852 opcode = get_specific (opcode, operand);
2854 if (opcode == 0)
2856 /* Couldn't find an opcode which matched the operands. */
2857 char *where = frag_more (2);
2858 size = 2;
2860 where[0] = 0x0;
2861 where[1] = 0x0;
2862 as_bad (_("invalid operands for opcode"));
2864 else
2866 if (*op_end)
2867 as_bad (_("excess operands: '%s'"), op_end);
2869 size = build_Mytes (opcode, operand);
2874 #ifdef BFD_ASSEMBLER
2875 dwarf2_emit_insn (size);
2876 #endif
2879 /* This routine is called each time a label definition is seen. It
2880 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2882 void
2883 sh_frob_label (void)
2885 static fragS *last_label_frag;
2886 static int last_label_offset;
2888 if (sh_relax
2889 && seg_info (now_seg)->tc_segment_info_data.in_code)
2891 int offset;
2893 offset = frag_now_fix ();
2894 if (frag_now != last_label_frag
2895 || offset != last_label_offset)
2897 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
2898 last_label_frag = frag_now;
2899 last_label_offset = offset;
2904 /* This routine is called when the assembler is about to output some
2905 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2907 void
2908 sh_flush_pending_output (void)
2910 if (sh_relax
2911 && seg_info (now_seg)->tc_segment_info_data.in_code)
2913 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2914 BFD_RELOC_SH_DATA);
2915 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
2919 symbolS *
2920 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
2922 return 0;
2925 #ifdef OBJ_COFF
2926 #ifndef BFD_ASSEMBLER
2928 void
2929 tc_crawl_symbol_chain (object_headers *headers ATTRIBUTE_UNUSED)
2931 printf (_("call to tc_crawl_symbol_chain \n"));
2934 void
2935 tc_headers_hook (object_headers *headers ATTRIBUTE_UNUSED)
2937 printf (_("call to tc_headers_hook \n"));
2940 #endif
2941 #endif
2943 /* Various routines to kill one day. */
2944 /* Equal to MAX_PRECISION in atof-ieee.c. */
2945 #define MAX_LITTLENUMS 6
2947 /* Turn a string in input_line_pointer into a floating point constant
2948 of type TYPE, and store the appropriate bytes in *LITP. The number
2949 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2950 returned, or NULL on OK. */
2952 char *
2953 md_atof (int type, char *litP, int *sizeP)
2955 int prec;
2956 LITTLENUM_TYPE words[4];
2957 char *t;
2958 int i;
2960 switch (type)
2962 case 'f':
2963 prec = 2;
2964 break;
2966 case 'd':
2967 prec = 4;
2968 break;
2970 default:
2971 *sizeP = 0;
2972 return _("bad call to md_atof");
2975 t = atof_ieee (input_line_pointer, type, words);
2976 if (t)
2977 input_line_pointer = t;
2979 *sizeP = prec * 2;
2981 if (! target_big_endian)
2983 for (i = prec - 1; i >= 0; i--)
2985 md_number_to_chars (litP, (valueT) words[i], 2);
2986 litP += 2;
2989 else
2991 for (i = 0; i < prec; i++)
2993 md_number_to_chars (litP, (valueT) words[i], 2);
2994 litP += 2;
2998 return NULL;
3001 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3002 call instruction. It refers to a label of the instruction which
3003 loads the register which the call uses. We use it to generate a
3004 special reloc for the linker. */
3006 static void
3007 s_uses (int ignore ATTRIBUTE_UNUSED)
3009 expressionS ex;
3011 if (! sh_relax)
3012 as_warn (_(".uses pseudo-op seen when not relaxing"));
3014 expression (&ex);
3016 if (ex.X_op != O_symbol || ex.X_add_number != 0)
3018 as_bad (_("bad .uses format"));
3019 ignore_rest_of_line ();
3020 return;
3023 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
3025 demand_empty_rest_of_line ();
3028 const char *md_shortopts = "";
3029 struct option md_longopts[] =
3031 #define OPTION_RELAX (OPTION_MD_BASE)
3032 #define OPTION_BIG (OPTION_MD_BASE + 1)
3033 #define OPTION_LITTLE (OPTION_BIG + 1)
3034 #define OPTION_SMALL (OPTION_LITTLE + 1)
3035 #define OPTION_DSP (OPTION_SMALL + 1)
3036 #define OPTION_ISA (OPTION_DSP + 1)
3037 #define OPTION_RENESAS (OPTION_ISA + 1)
3039 {"relax", no_argument, NULL, OPTION_RELAX},
3040 {"big", no_argument, NULL, OPTION_BIG},
3041 {"little", no_argument, NULL, OPTION_LITTLE},
3042 {"small", no_argument, NULL, OPTION_SMALL},
3043 {"dsp", no_argument, NULL, OPTION_DSP},
3044 {"isa", required_argument, NULL, OPTION_ISA},
3045 {"renesas", no_argument, NULL, OPTION_RENESAS},
3047 #ifdef HAVE_SH64
3048 #define OPTION_ABI (OPTION_RENESAS + 1)
3049 #define OPTION_NO_MIX (OPTION_ABI + 1)
3050 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
3051 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
3052 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
3053 {"abi", required_argument, NULL, OPTION_ABI},
3054 {"no-mix", no_argument, NULL, OPTION_NO_MIX},
3055 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
3056 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND},
3057 {"expand-pt32", no_argument, NULL, OPTION_PT32},
3058 #endif /* HAVE_SH64 */
3060 {NULL, no_argument, NULL, 0}
3062 size_t md_longopts_size = sizeof (md_longopts);
3065 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
3067 switch (c)
3069 case OPTION_RELAX:
3070 sh_relax = 1;
3071 break;
3073 case OPTION_BIG:
3074 target_big_endian = 1;
3075 break;
3077 case OPTION_LITTLE:
3078 target_big_endian = 0;
3079 break;
3081 case OPTION_SMALL:
3082 sh_small = 1;
3083 break;
3085 case OPTION_DSP:
3086 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
3087 break;
3089 case OPTION_RENESAS:
3090 dont_adjust_reloc_32 = 1;
3091 break;
3093 case OPTION_ISA:
3094 if (strcasecmp (arg, "dsp") == 0)
3095 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
3096 else if (strcasecmp (arg, "fp") == 0)
3097 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp;
3098 else if (strcasecmp (arg, "any") == 0)
3099 preset_target_arch = arch_sh_up;
3100 #ifdef HAVE_SH64
3101 else if (strcasecmp (arg, "shmedia") == 0)
3103 if (sh64_isa_mode == sh64_isa_shcompact)
3104 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3105 sh64_isa_mode = sh64_isa_shmedia;
3107 else if (strcasecmp (arg, "shcompact") == 0)
3109 if (sh64_isa_mode == sh64_isa_shmedia)
3110 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3111 if (sh64_abi == sh64_abi_64)
3112 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3113 sh64_isa_mode = sh64_isa_shcompact;
3115 #endif /* HAVE_SH64 */
3116 else
3118 extern const bfd_arch_info_type bfd_sh_arch;
3119 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
3120 preset_target_arch = 0;
3121 for (; bfd_arch; bfd_arch=bfd_arch->next)
3123 int len = strlen(bfd_arch->printable_name);
3125 if (bfd_arch->mach == bfd_mach_sh5)
3126 continue;
3128 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0)
3129 continue;
3131 if (arg[len] == '\0')
3132 preset_target_arch =
3133 sh_get_arch_from_bfd_mach (bfd_arch->mach);
3134 else if (strcasecmp(&arg[len], "-up") == 0)
3135 preset_target_arch =
3136 sh_get_arch_up_from_bfd_mach (bfd_arch->mach);
3137 else
3138 continue;
3139 break;
3142 if (!preset_target_arch)
3143 as_bad ("Invalid argument to --isa option: %s", arg);
3145 break;
3147 #ifdef HAVE_SH64
3148 case OPTION_ABI:
3149 if (strcmp (arg, "32") == 0)
3151 if (sh64_abi == sh64_abi_64)
3152 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3153 sh64_abi = sh64_abi_32;
3155 else if (strcmp (arg, "64") == 0)
3157 if (sh64_abi == sh64_abi_32)
3158 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3159 if (sh64_isa_mode == sh64_isa_shcompact)
3160 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3161 sh64_abi = sh64_abi_64;
3163 else
3164 as_bad ("Invalid argument to --abi option: %s", arg);
3165 break;
3167 case OPTION_NO_MIX:
3168 sh64_mix = FALSE;
3169 break;
3171 case OPTION_SHCOMPACT_CONST_CRANGE:
3172 sh64_shcompact_const_crange = TRUE;
3173 break;
3175 case OPTION_NO_EXPAND:
3176 sh64_expand = FALSE;
3177 break;
3179 case OPTION_PT32:
3180 sh64_pt32 = TRUE;
3181 break;
3182 #endif /* HAVE_SH64 */
3184 default:
3185 return 0;
3188 return 1;
3191 void
3192 md_show_usage (FILE *stream)
3194 fprintf (stream, _("\
3195 SH options:\n\
3196 -little generate little endian code\n\
3197 -big generate big endian code\n\
3198 -relax alter jump instructions for long displacements\n\
3199 -renesas disable optimization with section symbol for\n\
3200 compatibility with Renesas assembler.\n\
3201 -small align sections to 4 byte boundaries, not 16\n\
3202 -dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3203 -isa=[any use most appropriate isa\n\
3204 | dsp same as '-dsp'\n\
3205 | fp"));
3207 extern const bfd_arch_info_type bfd_sh_arch;
3208 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
3209 for (; bfd_arch; bfd_arch=bfd_arch->next)
3210 if (bfd_arch->mach != bfd_mach_sh5)
3212 fprintf (stream, "\n | %s", bfd_arch->printable_name);
3213 fprintf (stream, "\n | %s-up", bfd_arch->printable_name);
3216 fprintf (stream, "]\n");
3217 #ifdef HAVE_SH64
3218 fprintf (stream, _("\
3219 -isa=[shmedia set as the default instruction set for SH64\n\
3220 | SHmedia\n\
3221 | shcompact\n\
3222 | SHcompact]\n"));
3223 fprintf (stream, _("\
3224 -abi=[32|64] set size of expanded SHmedia operands and object\n\
3225 file type\n\
3226 -shcompact-const-crange emit code-range descriptors for constants in\n\
3227 SHcompact code sections\n\
3228 -no-mix disallow SHmedia code in the same section as\n\
3229 constants and SHcompact code\n\
3230 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3231 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3232 to 32 bits only\n"));
3233 #endif /* HAVE_SH64 */
3236 /* This struct is used to pass arguments to sh_count_relocs through
3237 bfd_map_over_sections. */
3239 struct sh_count_relocs
3241 /* Symbol we are looking for. */
3242 symbolS *sym;
3243 /* Count of relocs found. */
3244 int count;
3247 /* Count the number of fixups in a section which refer to a particular
3248 symbol. When using BFD_ASSEMBLER, this is called via
3249 bfd_map_over_sections. */
3251 static void
3252 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data)
3254 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
3255 segment_info_type *seginfo;
3256 symbolS *sym;
3257 fixS *fix;
3259 seginfo = seg_info (sec);
3260 if (seginfo == NULL)
3261 return;
3263 sym = info->sym;
3264 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
3266 if (fix->fx_addsy == sym)
3268 ++info->count;
3269 fix->fx_tcbit = 1;
3274 /* Handle the count relocs for a particular section. When using
3275 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
3277 static void
3278 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec,
3279 void *ignore ATTRIBUTE_UNUSED)
3281 segment_info_type *seginfo;
3282 fixS *fix;
3284 seginfo = seg_info (sec);
3285 if (seginfo == NULL)
3286 return;
3288 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
3290 symbolS *sym;
3291 bfd_vma val;
3292 fixS *fscan;
3293 struct sh_count_relocs info;
3295 if (fix->fx_r_type != BFD_RELOC_SH_USES)
3296 continue;
3298 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3299 symbol in the same section. */
3300 sym = fix->fx_addsy;
3301 if (sym == NULL
3302 || fix->fx_subsy != NULL
3303 || fix->fx_addnumber != 0
3304 || S_GET_SEGMENT (sym) != sec
3305 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3306 || S_GET_STORAGE_CLASS (sym) == C_EXT
3307 #endif
3308 || S_IS_EXTERNAL (sym))
3310 as_warn_where (fix->fx_file, fix->fx_line,
3311 _(".uses does not refer to a local symbol in the same section"));
3312 continue;
3315 /* Look through the fixups again, this time looking for one
3316 at the same location as sym. */
3317 val = S_GET_VALUE (sym);
3318 for (fscan = seginfo->fix_root;
3319 fscan != NULL;
3320 fscan = fscan->fx_next)
3321 if (val == fscan->fx_frag->fr_address + fscan->fx_where
3322 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
3323 && fscan->fx_r_type != BFD_RELOC_SH_CODE
3324 && fscan->fx_r_type != BFD_RELOC_SH_DATA
3325 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
3326 break;
3327 if (fscan == NULL)
3329 as_warn_where (fix->fx_file, fix->fx_line,
3330 _("can't find fixup pointed to by .uses"));
3331 continue;
3334 if (fscan->fx_tcbit)
3336 /* We've already done this one. */
3337 continue;
3340 /* The variable fscan should also be a fixup to a local symbol
3341 in the same section. */
3342 sym = fscan->fx_addsy;
3343 if (sym == NULL
3344 || fscan->fx_subsy != NULL
3345 || fscan->fx_addnumber != 0
3346 || S_GET_SEGMENT (sym) != sec
3347 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3348 || S_GET_STORAGE_CLASS (sym) == C_EXT
3349 #endif
3350 || S_IS_EXTERNAL (sym))
3352 as_warn_where (fix->fx_file, fix->fx_line,
3353 _(".uses target does not refer to a local symbol in the same section"));
3354 continue;
3357 /* Now we look through all the fixups of all the sections,
3358 counting the number of times we find a reference to sym. */
3359 info.sym = sym;
3360 info.count = 0;
3361 #ifdef BFD_ASSEMBLER
3362 bfd_map_over_sections (stdoutput, sh_count_relocs, &info);
3363 #else
3365 int iscan;
3367 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
3368 sh_count_relocs ((bfd *) NULL, iscan, &info);
3370 #endif
3372 if (info.count < 1)
3373 abort ();
3375 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3376 We have already adjusted the value of sym to include the
3377 fragment address, so we undo that adjustment here. */
3378 subseg_change (sec, 0);
3379 fix_new (fscan->fx_frag,
3380 S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
3381 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
3385 /* This function is called after the symbol table has been completed,
3386 but before the relocs or section contents have been written out.
3387 If we have seen any .uses pseudo-ops, they point to an instruction
3388 which loads a register with the address of a function. We look
3389 through the fixups to find where the function address is being
3390 loaded from. We then generate a COUNT reloc giving the number of
3391 times that function address is referred to. The linker uses this
3392 information when doing relaxing, to decide when it can eliminate
3393 the stored function address entirely. */
3395 void
3396 sh_frob_file (void)
3398 #ifdef HAVE_SH64
3399 shmedia_frob_file_before_adjust ();
3400 #endif
3402 if (! sh_relax)
3403 return;
3405 #ifdef BFD_ASSEMBLER
3406 bfd_map_over_sections (stdoutput, sh_frob_section, NULL);
3407 #else
3409 int iseg;
3411 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
3412 sh_frob_section ((bfd *) NULL, iseg, NULL);
3414 #endif
3417 /* Called after relaxing. Set the correct sizes of the fragments, and
3418 create relocs so that md_apply_fix3 will fill in the correct values. */
3420 void
3421 #ifdef BFD_ASSEMBLER
3422 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP)
3423 #else
3424 md_convert_frag (object_headers *headers ATTRIBUTE_UNUSED, segT seg,
3425 fragS *fragP)
3426 #endif
3428 int donerelax = 0;
3430 switch (fragP->fr_subtype)
3432 case C (COND_JUMP, COND8):
3433 case C (COND_JUMP_DELAY, COND8):
3434 subseg_change (seg, 0);
3435 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
3436 1, BFD_RELOC_SH_PCDISP8BY2);
3437 fragP->fr_fix += 2;
3438 fragP->fr_var = 0;
3439 break;
3441 case C (UNCOND_JUMP, UNCOND12):
3442 subseg_change (seg, 0);
3443 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
3444 1, BFD_RELOC_SH_PCDISP12BY2);
3445 fragP->fr_fix += 2;
3446 fragP->fr_var = 0;
3447 break;
3449 case C (UNCOND_JUMP, UNCOND32):
3450 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3451 if (fragP->fr_symbol == NULL)
3452 as_bad_where (fragP->fr_file, fragP->fr_line,
3453 _("displacement overflows 12-bit field"));
3454 else if (S_IS_DEFINED (fragP->fr_symbol))
3455 as_bad_where (fragP->fr_file, fragP->fr_line,
3456 _("displacement to defined symbol %s overflows 12-bit field"),
3457 S_GET_NAME (fragP->fr_symbol));
3458 else
3459 as_bad_where (fragP->fr_file, fragP->fr_line,
3460 _("displacement to undefined symbol %s overflows 12-bit field"),
3461 S_GET_NAME (fragP->fr_symbol));
3462 /* Stabilize this frag, so we don't trip an assert. */
3463 fragP->fr_fix += fragP->fr_var;
3464 fragP->fr_var = 0;
3465 break;
3467 case C (COND_JUMP, COND12):
3468 case C (COND_JUMP_DELAY, COND12):
3469 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3470 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3471 was due to gas incorrectly relaxing an out-of-range conditional
3472 branch with delay slot. It turned:
3473 bf.s L6 (slot mov.l r12,@(44,r0))
3474 into:
3476 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3477 30: 00 09 nop
3478 32: 10 cb mov.l r12,@(44,r0)
3479 Therefore, branches with delay slots have to be handled
3480 differently from ones without delay slots. */
3482 unsigned char *buffer =
3483 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
3484 int highbyte = target_big_endian ? 0 : 1;
3485 int lowbyte = target_big_endian ? 1 : 0;
3486 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
3488 /* Toggle the true/false bit of the bcond. */
3489 buffer[highbyte] ^= 0x2;
3491 /* If this is a delayed branch, we may not put the bra in the
3492 slot. So we change it to a non-delayed branch, like that:
3493 b! cond slot_label; bra disp; slot_label: slot_insn
3494 ??? We should try if swapping the conditional branch and
3495 its delay-slot insn already makes the branch reach. */
3497 /* Build a relocation to six / four bytes farther on. */
3498 subseg_change (seg, 0);
3499 fix_new (fragP, fragP->fr_fix, 2,
3500 #ifdef BFD_ASSEMBLER
3501 section_symbol (seg),
3502 #else
3503 seg_info (seg)->dot,
3504 #endif
3505 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
3506 1, BFD_RELOC_SH_PCDISP8BY2);
3508 /* Set up a jump instruction. */
3509 buffer[highbyte + 2] = 0xa0;
3510 buffer[lowbyte + 2] = 0;
3511 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
3512 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
3514 if (delay)
3516 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
3517 fragP->fr_fix += 4;
3519 else
3521 /* Fill in a NOP instruction. */
3522 buffer[highbyte + 4] = 0x0;
3523 buffer[lowbyte + 4] = 0x9;
3525 fragP->fr_fix += 6;
3527 fragP->fr_var = 0;
3528 donerelax = 1;
3530 break;
3532 case C (COND_JUMP, COND32):
3533 case C (COND_JUMP_DELAY, COND32):
3534 case C (COND_JUMP, UNDEF_WORD_DISP):
3535 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3536 if (fragP->fr_symbol == NULL)
3537 as_bad_where (fragP->fr_file, fragP->fr_line,
3538 _("displacement overflows 8-bit field"));
3539 else if (S_IS_DEFINED (fragP->fr_symbol))
3540 as_bad_where (fragP->fr_file, fragP->fr_line,
3541 _("displacement to defined symbol %s overflows 8-bit field"),
3542 S_GET_NAME (fragP->fr_symbol));
3543 else
3544 as_bad_where (fragP->fr_file, fragP->fr_line,
3545 _("displacement to undefined symbol %s overflows 8-bit field "),
3546 S_GET_NAME (fragP->fr_symbol));
3547 /* Stabilize this frag, so we don't trip an assert. */
3548 fragP->fr_fix += fragP->fr_var;
3549 fragP->fr_var = 0;
3550 break;
3552 default:
3553 #ifdef HAVE_SH64
3554 shmedia_md_convert_frag (headers, seg, fragP, TRUE);
3555 #else
3556 abort ();
3557 #endif
3560 if (donerelax && !sh_relax)
3561 as_warn_where (fragP->fr_file, fragP->fr_line,
3562 _("overflow in branch to %s; converted into longer instruction sequence"),
3563 (fragP->fr_symbol != NULL
3564 ? S_GET_NAME (fragP->fr_symbol)
3565 : ""));
3568 valueT
3569 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size)
3571 #ifdef BFD_ASSEMBLER
3572 #ifdef OBJ_ELF
3573 return size;
3574 #else /* ! OBJ_ELF */
3575 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
3576 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
3577 #endif /* ! OBJ_ELF */
3578 #else /* ! BFD_ASSEMBLER */
3579 return ((size + (1 << section_alignment[(int) seg]) - 1)
3580 & (-1 << section_alignment[(int) seg]));
3581 #endif /* ! BFD_ASSEMBLER */
3584 /* This static variable is set by s_uacons to tell sh_cons_align that
3585 the expression does not need to be aligned. */
3587 static int sh_no_align_cons = 0;
3589 /* This handles the unaligned space allocation pseudo-ops, such as
3590 .uaword. .uaword is just like .word, but the value does not need
3591 to be aligned. */
3593 static void
3594 s_uacons (int bytes)
3596 /* Tell sh_cons_align not to align this value. */
3597 sh_no_align_cons = 1;
3598 cons (bytes);
3601 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3602 aligned correctly. Note that this can cause warnings to be issued
3603 when assembling initialized structured which were declared with the
3604 packed attribute. FIXME: Perhaps we should require an option to
3605 enable this warning? */
3607 void
3608 sh_cons_align (int nbytes)
3610 int nalign;
3611 char *p;
3613 if (sh_no_align_cons)
3615 /* This is an unaligned pseudo-op. */
3616 sh_no_align_cons = 0;
3617 return;
3620 nalign = 0;
3621 while ((nbytes & 1) == 0)
3623 ++nalign;
3624 nbytes >>= 1;
3627 if (nalign == 0)
3628 return;
3630 if (now_seg == absolute_section)
3632 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
3633 as_warn (_("misaligned data"));
3634 return;
3637 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
3638 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
3640 record_alignment (now_seg, nalign);
3643 /* When relaxing, we need to output a reloc for any .align directive
3644 that requests alignment to a four byte boundary or larger. This is
3645 also where we check for misaligned data. */
3647 void
3648 sh_handle_align (fragS *frag)
3650 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
3652 if (frag->fr_type == rs_align_code)
3654 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
3655 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
3657 char *p = frag->fr_literal + frag->fr_fix;
3659 if (bytes & 1)
3661 *p++ = 0;
3662 bytes--;
3663 frag->fr_fix += 1;
3666 if (target_big_endian)
3668 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
3669 frag->fr_var = sizeof big_nop_pattern;
3671 else
3673 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
3674 frag->fr_var = sizeof little_nop_pattern;
3677 else if (frag->fr_type == rs_align_test)
3679 if (bytes != 0)
3680 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
3683 if (sh_relax
3684 && (frag->fr_type == rs_align
3685 || frag->fr_type == rs_align_code)
3686 && frag->fr_address + frag->fr_fix > 0
3687 && frag->fr_offset > 1
3688 && now_seg != bss_section)
3689 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
3690 BFD_RELOC_SH_ALIGN);
3693 /* See whether the relocation should be resolved locally. */
3695 static bfd_boolean
3696 sh_local_pcrel (fixS *fix)
3698 return (! sh_relax
3699 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
3700 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
3701 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
3702 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
3703 || fix->fx_r_type == BFD_RELOC_8_PCREL
3704 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16
3705 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32));
3708 /* See whether we need to force a relocation into the output file.
3709 This is used to force out switch and PC relative relocations when
3710 relaxing. */
3713 sh_force_relocation (fixS *fix)
3715 /* These relocations can't make it into a DSO, so no use forcing
3716 them for global symbols. */
3717 if (sh_local_pcrel (fix))
3718 return 0;
3720 /* Make sure some relocations get emitted. */
3721 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START
3722 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END
3723 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32
3724 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32
3725 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32
3726 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32
3727 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32
3728 || generic_force_reloc (fix))
3729 return 1;
3731 if (! sh_relax)
3732 return 0;
3734 return (fix->fx_pcrel
3735 || SWITCH_TABLE (fix)
3736 || fix->fx_r_type == BFD_RELOC_SH_COUNT
3737 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
3738 || fix->fx_r_type == BFD_RELOC_SH_CODE
3739 || fix->fx_r_type == BFD_RELOC_SH_DATA
3740 #ifdef HAVE_SH64
3741 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE
3742 #endif
3743 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
3746 #ifdef OBJ_ELF
3747 bfd_boolean
3748 sh_fix_adjustable (fixS *fixP)
3750 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
3751 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
3752 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC
3753 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32)
3754 || fixP->fx_r_type == BFD_RELOC_RVA)
3755 return 0;
3757 /* We need the symbol name for the VTABLE entries */
3758 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3759 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3760 return 0;
3762 return 1;
3765 void
3766 sh_elf_final_processing (void)
3768 int val;
3770 /* Set file-specific flags to indicate if this code needs
3771 a processor with the sh-dsp / sh2e ISA to execute. */
3772 #ifdef HAVE_SH64
3773 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3774 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3775 if (sh64_isa_mode != sh64_isa_unspecified)
3776 val = EF_SH5;
3777 else
3778 #elif defined TARGET_SYMBIAN
3779 if (1)
3780 val = sh_symbian_find_elf_flags (valid_arch);
3781 else
3782 #endif /* HAVE_SH64 */
3783 val = sh_find_elf_flags (valid_arch);
3785 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
3786 elf_elfheader (stdoutput)->e_flags |= val;
3788 #endif
3790 /* Apply a fixup to the object file. */
3792 void
3793 md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3795 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3796 int lowbyte = target_big_endian ? 1 : 0;
3797 int highbyte = target_big_endian ? 0 : 1;
3798 long val = (long) *valP;
3799 long max, min;
3800 int shift;
3802 #ifdef BFD_ASSEMBLER
3803 /* A difference between two symbols, the second of which is in the
3804 current section, is transformed in a PC-relative relocation to
3805 the other symbol. We have to adjust the relocation type here. */
3806 if (fixP->fx_pcrel)
3808 switch (fixP->fx_r_type)
3810 default:
3811 break;
3813 case BFD_RELOC_32:
3814 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3815 break;
3817 /* Currently, we only support 32-bit PCREL relocations.
3818 We'd need a new reloc type to handle 16_PCREL, and
3819 8_PCREL is already taken for R_SH_SWITCH8, which
3820 apparently does something completely different than what
3821 we need. FIXME. */
3822 case BFD_RELOC_16:
3823 bfd_set_error (bfd_error_bad_value);
3824 return;
3826 case BFD_RELOC_8:
3827 bfd_set_error (bfd_error_bad_value);
3828 return;
3832 /* The function adjust_reloc_syms won't convert a reloc against a weak
3833 symbol into a reloc against a section, but bfd_install_relocation
3834 will screw up if the symbol is defined, so we have to adjust val here
3835 to avoid the screw up later.
3837 For ordinary relocs, this does not happen for ELF, since for ELF,
3838 bfd_install_relocation uses the "special function" field of the
3839 howto, and does not execute the code that needs to be undone, as long
3840 as the special function does not return bfd_reloc_continue.
3841 It can happen for GOT- and PLT-type relocs the way they are
3842 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3843 doesn't matter here since those relocs don't use VAL; see below. */
3844 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
3845 && fixP->fx_addsy != NULL
3846 && S_IS_WEAK (fixP->fx_addsy))
3847 val -= S_GET_VALUE (fixP->fx_addsy);
3848 #endif
3850 #ifdef BFD_ASSEMBLER
3851 if (SWITCH_TABLE (fixP))
3852 val -= S_GET_VALUE (fixP->fx_subsy);
3853 #else
3854 if (fixP->fx_r_type == 0)
3856 if (fixP->fx_size == 2)
3857 fixP->fx_r_type = BFD_RELOC_16;
3858 else if (fixP->fx_size == 4)
3859 fixP->fx_r_type = BFD_RELOC_32;
3860 else if (fixP->fx_size == 1)
3861 fixP->fx_r_type = BFD_RELOC_8;
3862 else
3863 abort ();
3865 #endif
3867 max = min = 0;
3868 shift = 0;
3869 switch (fixP->fx_r_type)
3871 case BFD_RELOC_SH_IMM3:
3872 max = 0x7;
3873 * buf = (* buf & 0xf8) | (val & 0x7);
3874 break;
3875 case BFD_RELOC_SH_IMM3U:
3876 max = 0x7;
3877 * buf = (* buf & 0x8f) | ((val & 0x7) << 4);
3878 break;
3879 case BFD_RELOC_SH_DISP12:
3880 max = 0xfff;
3881 buf[lowbyte] = val & 0xff;
3882 buf[highbyte] |= (val >> 8) & 0x0f;
3883 break;
3884 case BFD_RELOC_SH_DISP12BY2:
3885 max = 0xfff;
3886 shift = 1;
3887 buf[lowbyte] = (val >> 1) & 0xff;
3888 buf[highbyte] |= (val >> 9) & 0x0f;
3889 break;
3890 case BFD_RELOC_SH_DISP12BY4:
3891 max = 0xfff;
3892 shift = 2;
3893 buf[lowbyte] = (val >> 2) & 0xff;
3894 buf[highbyte] |= (val >> 10) & 0x0f;
3895 break;
3896 case BFD_RELOC_SH_DISP12BY8:
3897 max = 0xfff;
3898 shift = 3;
3899 buf[lowbyte] = (val >> 3) & 0xff;
3900 buf[highbyte] |= (val >> 11) & 0x0f;
3901 break;
3902 case BFD_RELOC_SH_DISP20:
3903 if (! target_big_endian)
3904 abort();
3905 max = 0x7ffff;
3906 min = -0x80000;
3907 buf[1] = (buf[1] & 0x0f) | (val >> 12) & 0xf0;
3908 buf[2] = (val >> 8) & 0xff;
3909 buf[3] = val & 0xff;
3910 break;
3911 case BFD_RELOC_SH_DISP20BY8:
3912 if (!target_big_endian)
3913 abort();
3914 max = 0x7ffff;
3915 min = -0x80000;
3916 shift = 8;
3917 buf[1] = (buf[1] & 0x0f) | (val >> 20) & 0xf0;
3918 buf[2] = (val >> 16) & 0xff;
3919 buf[3] = (val >> 8) & 0xff;
3920 break;
3922 case BFD_RELOC_SH_IMM4:
3923 max = 0xf;
3924 *buf = (*buf & 0xf0) | (val & 0xf);
3925 break;
3927 case BFD_RELOC_SH_IMM4BY2:
3928 max = 0xf;
3929 shift = 1;
3930 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
3931 break;
3933 case BFD_RELOC_SH_IMM4BY4:
3934 max = 0xf;
3935 shift = 2;
3936 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
3937 break;
3939 case BFD_RELOC_SH_IMM8BY2:
3940 max = 0xff;
3941 shift = 1;
3942 *buf = val >> 1;
3943 break;
3945 case BFD_RELOC_SH_IMM8BY4:
3946 max = 0xff;
3947 shift = 2;
3948 *buf = val >> 2;
3949 break;
3951 case BFD_RELOC_8:
3952 case BFD_RELOC_SH_IMM8:
3953 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3954 sometimes it is not (e.g., and). We permit any 8 bit value.
3955 Note that adding further restrictions may invalidate
3956 reasonable looking assembly code, such as ``and -0x1,r0''. */
3957 max = 0xff;
3958 min = -0xff;
3959 *buf++ = val;
3960 break;
3962 case BFD_RELOC_SH_PCRELIMM8BY4:
3963 /* The lower two bits of the PC are cleared before the
3964 displacement is added in. We can assume that the destination
3965 is on a 4 byte boundary. If this instruction is also on a 4
3966 byte boundary, then we want
3967 (target - here) / 4
3968 and target - here is a multiple of 4.
3969 Otherwise, we are on a 2 byte boundary, and we want
3970 (target - (here - 2)) / 4
3971 and target - here is not a multiple of 4. Computing
3972 (target - (here - 2)) / 4 == (target - here + 2) / 4
3973 works for both cases, since in the first case the addition of
3974 2 will be removed by the division. target - here is in the
3975 variable val. */
3976 val = (val + 2) / 4;
3977 if (val & ~0xff)
3978 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3979 buf[lowbyte] = val;
3980 break;
3982 case BFD_RELOC_SH_PCRELIMM8BY2:
3983 val /= 2;
3984 if (val & ~0xff)
3985 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3986 buf[lowbyte] = val;
3987 break;
3989 case BFD_RELOC_SH_PCDISP8BY2:
3990 val /= 2;
3991 if (val < -0x80 || val > 0x7f)
3992 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3993 buf[lowbyte] = val;
3994 break;
3996 case BFD_RELOC_SH_PCDISP12BY2:
3997 val /= 2;
3998 if (val < -0x800 || val > 0x7ff)
3999 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
4000 buf[lowbyte] = val & 0xff;
4001 buf[highbyte] |= (val >> 8) & 0xf;
4002 break;
4004 case BFD_RELOC_32:
4005 case BFD_RELOC_32_PCREL:
4006 md_number_to_chars (buf, val, 4);
4007 break;
4009 case BFD_RELOC_16:
4010 md_number_to_chars (buf, val, 2);
4011 break;
4013 case BFD_RELOC_SH_USES:
4014 /* Pass the value into sh_coff_reloc_mangle. */
4015 fixP->fx_addnumber = val;
4016 break;
4018 case BFD_RELOC_SH_COUNT:
4019 case BFD_RELOC_SH_ALIGN:
4020 case BFD_RELOC_SH_CODE:
4021 case BFD_RELOC_SH_DATA:
4022 case BFD_RELOC_SH_LABEL:
4023 /* Nothing to do here. */
4024 break;
4026 case BFD_RELOC_SH_LOOP_START:
4027 case BFD_RELOC_SH_LOOP_END:
4029 case BFD_RELOC_VTABLE_INHERIT:
4030 case BFD_RELOC_VTABLE_ENTRY:
4031 fixP->fx_done = 0;
4032 return;
4034 #ifdef OBJ_ELF
4035 case BFD_RELOC_32_PLT_PCREL:
4036 /* Make the jump instruction point to the address of the operand. At
4037 runtime we merely add the offset to the actual PLT entry. */
4038 * valP = 0xfffffffc;
4039 val = fixP->fx_offset;
4040 if (fixP->fx_subsy)
4041 val -= S_GET_VALUE (fixP->fx_subsy);
4042 fixP->fx_addnumber = val;
4043 md_number_to_chars (buf, val, 4);
4044 break;
4046 case BFD_RELOC_SH_GOTPC:
4047 /* This is tough to explain. We end up with this one if we have
4048 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4049 The goal here is to obtain the absolute address of the GOT,
4050 and it is strongly preferable from a performance point of
4051 view to avoid using a runtime relocation for this. There are
4052 cases where you have something like:
4054 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4056 and here no correction would be required. Internally in the
4057 assembler we treat operands of this form as not being pcrel
4058 since the '.' is explicitly mentioned, and I wonder whether
4059 it would simplify matters to do it this way. Who knows. In
4060 earlier versions of the PIC patches, the pcrel_adjust field
4061 was used to store the correction, but since the expression is
4062 not pcrel, I felt it would be confusing to do it this way. */
4063 * valP -= 1;
4064 md_number_to_chars (buf, val, 4);
4065 break;
4067 case BFD_RELOC_SH_TLS_GD_32:
4068 case BFD_RELOC_SH_TLS_LD_32:
4069 case BFD_RELOC_SH_TLS_IE_32:
4070 S_SET_THREAD_LOCAL (fixP->fx_addsy);
4071 /* Fallthrough */
4072 case BFD_RELOC_32_GOT_PCREL:
4073 case BFD_RELOC_SH_GOTPLT32:
4074 * valP = 0; /* Fully resolved at runtime. No addend. */
4075 md_number_to_chars (buf, 0, 4);
4076 break;
4078 case BFD_RELOC_SH_TLS_LDO_32:
4079 case BFD_RELOC_SH_TLS_LE_32:
4080 S_SET_THREAD_LOCAL (fixP->fx_addsy);
4081 /* Fallthrough */
4082 case BFD_RELOC_32_GOTOFF:
4083 md_number_to_chars (buf, val, 4);
4084 break;
4085 #endif
4087 default:
4088 #ifdef HAVE_SH64
4089 shmedia_md_apply_fix3 (fixP, valP);
4090 return;
4091 #else
4092 abort ();
4093 #endif
4096 if (shift != 0)
4098 if ((val & ((1 << shift) - 1)) != 0)
4099 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
4100 if (val >= 0)
4101 val >>= shift;
4102 else
4103 val = ((val >> shift)
4104 | ((long) -1 & ~ ((long) -1 >> shift)));
4106 if (max != 0 && (val < min || val > max))
4107 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
4109 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
4110 fixP->fx_done = 1;
4113 /* Called just before address relaxation. Return the length
4114 by which a fragment must grow to reach it's destination. */
4117 md_estimate_size_before_relax (fragS *fragP, segT segment_type)
4119 int what;
4121 switch (fragP->fr_subtype)
4123 default:
4124 #ifdef HAVE_SH64
4125 return shmedia_md_estimate_size_before_relax (fragP, segment_type);
4126 #else
4127 abort ();
4128 #endif
4131 case C (UNCOND_JUMP, UNDEF_DISP):
4132 /* Used to be a branch to somewhere which was unknown. */
4133 if (!fragP->fr_symbol)
4135 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
4137 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
4139 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
4141 else
4143 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
4145 break;
4147 case C (COND_JUMP, UNDEF_DISP):
4148 case C (COND_JUMP_DELAY, UNDEF_DISP):
4149 what = GET_WHAT (fragP->fr_subtype);
4150 /* Used to be a branch to somewhere which was unknown. */
4151 if (fragP->fr_symbol
4152 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
4154 /* Got a symbol and it's defined in this segment, become byte
4155 sized - maybe it will fix up. */
4156 fragP->fr_subtype = C (what, COND8);
4158 else if (fragP->fr_symbol)
4160 /* Its got a segment, but its not ours, so it will always be long. */
4161 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
4163 else
4165 /* We know the abs value. */
4166 fragP->fr_subtype = C (what, COND8);
4168 break;
4170 case C (UNCOND_JUMP, UNCOND12):
4171 case C (UNCOND_JUMP, UNCOND32):
4172 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
4173 case C (COND_JUMP, COND8):
4174 case C (COND_JUMP, COND12):
4175 case C (COND_JUMP, COND32):
4176 case C (COND_JUMP, UNDEF_WORD_DISP):
4177 case C (COND_JUMP_DELAY, COND8):
4178 case C (COND_JUMP_DELAY, COND12):
4179 case C (COND_JUMP_DELAY, COND32):
4180 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
4181 /* When relaxing a section for the second time, we don't need to
4182 do anything besides return the current size. */
4183 break;
4186 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
4187 return fragP->fr_var;
4190 /* Put number into target byte order. */
4192 void
4193 md_number_to_chars (char *ptr, valueT use, int nbytes)
4195 #ifdef HAVE_SH64
4196 /* We might need to set the contents type to data. */
4197 sh64_flag_output ();
4198 #endif
4200 if (! target_big_endian)
4201 number_to_chars_littleendian (ptr, use, nbytes);
4202 else
4203 number_to_chars_bigendian (ptr, use, nbytes);
4206 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
4207 eg for the sh-hms target. */
4209 long
4210 md_pcrel_from (fixS *fixP)
4212 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
4215 long
4216 md_pcrel_from_section (fixS *fixP, segT sec)
4218 if (! sh_local_pcrel (fixP)
4219 && fixP->fx_addsy != (symbolS *) NULL
4220 && (generic_force_reloc (fixP)
4221 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
4223 /* The symbol is undefined (or is defined but not in this section,
4224 or we're not sure about it being the final definition). Let the
4225 linker figure it out. We need to adjust the subtraction of a
4226 symbol to the position of the relocated data, though. */
4227 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
4230 return md_pcrel_from (fixP);
4233 #ifdef OBJ_COFF
4236 tc_coff_sizemachdep (fragS *frag)
4238 return md_relax_table[frag->fr_subtype].rlx_length;
4241 #endif /* OBJ_COFF */
4243 #ifndef BFD_ASSEMBLER
4244 #ifdef OBJ_COFF
4246 /* Map BFD relocs to SH COFF relocs. */
4248 struct reloc_map
4250 bfd_reloc_code_real_type bfd_reloc;
4251 int sh_reloc;
4254 static const struct reloc_map coff_reloc_map[] =
4256 { BFD_RELOC_32, R_SH_IMM32 },
4257 { BFD_RELOC_16, R_SH_IMM16 },
4258 { BFD_RELOC_8, R_SH_IMM8 },
4259 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
4260 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
4261 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
4262 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
4263 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
4264 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
4265 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
4266 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
4267 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
4268 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
4269 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
4270 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
4271 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
4272 { BFD_RELOC_SH_USES, R_SH_USES },
4273 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
4274 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
4275 { BFD_RELOC_SH_CODE, R_SH_CODE },
4276 { BFD_RELOC_SH_DATA, R_SH_DATA },
4277 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
4278 { BFD_RELOC_UNUSED, 0 }
4281 /* Adjust a reloc for the SH. This is similar to the generic code,
4282 but does some minor tweaking. */
4284 void
4285 sh_coff_reloc_mangle (segment_info_type *seg, fixS *fix,
4286 struct internal_reloc *intr, unsigned int paddr)
4288 symbolS *symbol_ptr = fix->fx_addsy;
4289 symbolS *dot;
4291 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
4293 if (! SWITCH_TABLE (fix))
4295 const struct reloc_map *rm;
4297 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
4298 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
4299 break;
4300 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
4301 as_bad_where (fix->fx_file, fix->fx_line,
4302 _("Can not represent %s relocation in this object file format"),
4303 bfd_get_reloc_code_name (fix->fx_r_type));
4304 intr->r_type = rm->sh_reloc;
4305 intr->r_offset = 0;
4307 else
4309 know (sh_relax);
4311 if (fix->fx_r_type == BFD_RELOC_16)
4312 intr->r_type = R_SH_SWITCH16;
4313 else if (fix->fx_r_type == BFD_RELOC_8)
4314 intr->r_type = R_SH_SWITCH8;
4315 else if (fix->fx_r_type == BFD_RELOC_32)
4316 intr->r_type = R_SH_SWITCH32;
4317 else
4318 abort ();
4320 /* For a switch reloc, we set r_offset to the difference between
4321 the reloc address and the subtrahend. When the linker is
4322 doing relaxing, it can use the determine the starting and
4323 ending points of the switch difference expression. */
4324 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
4327 /* PC relative relocs are always against the current section. */
4328 if (symbol_ptr == NULL)
4330 switch (fix->fx_r_type)
4332 case BFD_RELOC_SH_PCRELIMM8BY2:
4333 case BFD_RELOC_SH_PCRELIMM8BY4:
4334 case BFD_RELOC_SH_PCDISP8BY2:
4335 case BFD_RELOC_SH_PCDISP12BY2:
4336 case BFD_RELOC_SH_USES:
4337 symbol_ptr = seg->dot;
4338 break;
4339 default:
4340 break;
4344 if (fix->fx_r_type == BFD_RELOC_SH_USES)
4346 /* We can't store the offset in the object file, since this
4347 reloc does not take up any space, so we store it in r_offset.
4348 The fx_addnumber field was set in md_apply_fix3. */
4349 intr->r_offset = fix->fx_addnumber;
4351 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
4353 /* We can't store the count in the object file, since this reloc
4354 does not take up any space, so we store it in r_offset. The
4355 fx_offset field was set when the fixup was created in
4356 sh_coff_frob_file. */
4357 intr->r_offset = fix->fx_offset;
4358 /* This reloc is always absolute. */
4359 symbol_ptr = NULL;
4361 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
4363 /* Store the alignment in the r_offset field. */
4364 intr->r_offset = fix->fx_offset;
4365 /* This reloc is always absolute. */
4366 symbol_ptr = NULL;
4368 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
4369 || fix->fx_r_type == BFD_RELOC_SH_DATA
4370 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
4372 /* These relocs are always absolute. */
4373 symbol_ptr = NULL;
4376 /* Turn the segment of the symbol into an offset. */
4377 if (symbol_ptr != NULL)
4379 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
4380 if (dot != NULL)
4381 intr->r_symndx = dot->sy_number;
4382 else
4383 intr->r_symndx = symbol_ptr->sy_number;
4385 else
4386 intr->r_symndx = -1;
4389 #endif /* OBJ_COFF */
4390 #endif /* ! BFD_ASSEMBLER */
4392 #ifdef BFD_ASSEMBLER
4394 /* Create a reloc. */
4396 arelent *
4397 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
4399 arelent *rel;
4400 bfd_reloc_code_real_type r_type;
4402 rel = (arelent *) xmalloc (sizeof (arelent));
4403 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
4404 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
4405 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
4407 r_type = fixp->fx_r_type;
4409 if (SWITCH_TABLE (fixp))
4411 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
4412 rel->addend = 0;
4413 if (r_type == BFD_RELOC_16)
4414 r_type = BFD_RELOC_SH_SWITCH16;
4415 else if (r_type == BFD_RELOC_8)
4416 r_type = BFD_RELOC_8_PCREL;
4417 else if (r_type == BFD_RELOC_32)
4418 r_type = BFD_RELOC_SH_SWITCH32;
4419 else
4420 abort ();
4422 else if (r_type == BFD_RELOC_SH_USES)
4423 rel->addend = fixp->fx_addnumber;
4424 else if (r_type == BFD_RELOC_SH_COUNT)
4425 rel->addend = fixp->fx_offset;
4426 else if (r_type == BFD_RELOC_SH_ALIGN)
4427 rel->addend = fixp->fx_offset;
4428 else if (r_type == BFD_RELOC_VTABLE_INHERIT
4429 || r_type == BFD_RELOC_VTABLE_ENTRY)
4430 rel->addend = fixp->fx_offset;
4431 else if (r_type == BFD_RELOC_SH_LOOP_START
4432 || r_type == BFD_RELOC_SH_LOOP_END)
4433 rel->addend = fixp->fx_offset;
4434 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
4436 rel->addend = 0;
4437 rel->address = rel->addend = fixp->fx_offset;
4439 #ifdef HAVE_SH64
4440 else if (shmedia_init_reloc (rel, fixp))
4442 #endif
4443 else if (fixp->fx_pcrel)
4444 rel->addend = fixp->fx_addnumber;
4445 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF)
4446 rel->addend = fixp->fx_addnumber;
4447 else
4448 rel->addend = 0;
4450 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
4452 if (rel->howto == NULL)
4454 as_bad_where (fixp->fx_file, fixp->fx_line,
4455 _("Cannot represent relocation type %s"),
4456 bfd_get_reloc_code_name (r_type));
4457 /* Set howto to a garbage value so that we can keep going. */
4458 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
4459 assert (rel->howto != NULL);
4461 #ifdef OBJ_ELF
4462 else if (rel->howto->type == R_SH_IND12W)
4463 rel->addend += fixp->fx_offset - 4;
4464 #endif
4466 return rel;
4469 #ifdef OBJ_ELF
4470 inline static char *
4471 sh_end_of_match (char *cont, char *what)
4473 int len = strlen (what);
4475 if (strncasecmp (cont, what, strlen (what)) == 0
4476 && ! is_part_of_name (cont[len]))
4477 return cont + len;
4479 return NULL;
4483 sh_parse_name (char const *name, expressionS *exprP, char *nextcharP)
4485 char *next = input_line_pointer;
4486 char *next_end;
4487 int reloc_type;
4488 segT segment;
4490 exprP->X_op_symbol = NULL;
4492 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
4494 if (! GOT_symbol)
4495 GOT_symbol = symbol_find_or_make (name);
4497 exprP->X_add_symbol = GOT_symbol;
4498 no_suffix:
4499 /* If we have an absolute symbol or a reg, then we know its
4500 value now. */
4501 segment = S_GET_SEGMENT (exprP->X_add_symbol);
4502 if (segment == absolute_section)
4504 exprP->X_op = O_constant;
4505 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
4506 exprP->X_add_symbol = NULL;
4508 else if (segment == reg_section)
4510 exprP->X_op = O_register;
4511 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
4512 exprP->X_add_symbol = NULL;
4514 else
4516 exprP->X_op = O_symbol;
4517 exprP->X_add_number = 0;
4520 return 1;
4523 exprP->X_add_symbol = symbol_find_or_make (name);
4525 if (*nextcharP != '@')
4526 goto no_suffix;
4527 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
4528 reloc_type = BFD_RELOC_32_GOTOFF;
4529 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
4530 reloc_type = BFD_RELOC_SH_GOTPLT32;
4531 else if ((next_end = sh_end_of_match (next + 1, "GOT")))
4532 reloc_type = BFD_RELOC_32_GOT_PCREL;
4533 else if ((next_end = sh_end_of_match (next + 1, "PLT")))
4534 reloc_type = BFD_RELOC_32_PLT_PCREL;
4535 else if ((next_end = sh_end_of_match (next + 1, "TLSGD")))
4536 reloc_type = BFD_RELOC_SH_TLS_GD_32;
4537 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM")))
4538 reloc_type = BFD_RELOC_SH_TLS_LD_32;
4539 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF")))
4540 reloc_type = BFD_RELOC_SH_TLS_IE_32;
4541 else if ((next_end = sh_end_of_match (next + 1, "TPOFF")))
4542 reloc_type = BFD_RELOC_SH_TLS_LE_32;
4543 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF")))
4544 reloc_type = BFD_RELOC_SH_TLS_LDO_32;
4545 else
4546 goto no_suffix;
4548 *input_line_pointer = *nextcharP;
4549 input_line_pointer = next_end;
4550 *nextcharP = *input_line_pointer;
4551 *input_line_pointer = '\0';
4553 exprP->X_op = O_PIC_reloc;
4554 exprP->X_add_number = 0;
4555 exprP->X_md = reloc_type;
4557 return 1;
4559 #endif
4561 void
4562 sh_cfi_frame_initial_instructions (void)
4564 cfi_add_CFA_def_cfa (15, 0);
4568 sh_regname_to_dw2regnum (const char *regname)
4570 unsigned int regnum = -1;
4571 unsigned int i;
4572 const char *p;
4573 char *q;
4574 static struct { char *name; int dw2regnum; } regnames[] =
4576 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4577 { "macl", 21 }, { "fpul", 23 }
4580 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
4581 if (strcmp (regnames[i].name, regname) == 0)
4582 return regnames[i].dw2regnum;
4584 if (regname[0] == 'r')
4586 p = regname + 1;
4587 regnum = strtoul (p, &q, 10);
4588 if (p == q || *q || regnum >= 16)
4589 return -1;
4591 else if (regname[0] == 'f' && regname[1] == 'r')
4593 p = regname + 2;
4594 regnum = strtoul (p, &q, 10);
4595 if (p == q || *q || regnum >= 16)
4596 return -1;
4597 regnum += 25;
4599 else if (regname[0] == 'x' && regname[1] == 'd')
4601 p = regname + 2;
4602 regnum = strtoul (p, &q, 10);
4603 if (p == q || *q || regnum >= 8)
4604 return -1;
4605 regnum += 87;
4607 return regnum;
4609 #endif /* BFD_ASSEMBLER */