1 /* Disassemble D10V instructions.
2 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "opcode/d10v.h"
25 /* the PC wraps at 18 bits, except for the segment number */
26 /* so use this mask to keep the parts we want */
27 #define PC_MASK 0x0303FFFF
29 static void dis_2_short
PARAMS ((unsigned long insn
, bfd_vma memaddr
,
30 struct disassemble_info
*info
, int order
));
31 static void dis_long
PARAMS ((unsigned long insn
, bfd_vma memaddr
,
32 struct disassemble_info
*info
));
35 print_insn_d10v (memaddr
, info
)
37 struct disassemble_info
*info
;
43 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
46 (*info
->memory_error_func
) (status
, memaddr
, info
);
49 insn
= bfd_getb32 (buffer
);
54 dis_2_short (insn
, memaddr
, info
, 2);
57 dis_2_short (insn
, memaddr
, info
, 0);
60 dis_2_short (insn
, memaddr
, info
, 1);
63 dis_long (insn
, memaddr
, info
);
70 print_operand (oper
, insn
, op
, memaddr
, info
)
71 struct d10v_operand
*oper
;
73 struct d10v_opcode
*op
;
75 struct disassemble_info
*info
;
79 if (oper
->flags
== OPERAND_ATMINUS
)
81 (*info
->fprintf_func
) (info
->stream
, "@-");
84 if (oper
->flags
== OPERAND_MINUS
)
86 (*info
->fprintf_func
) (info
->stream
, "-");
89 if (oper
->flags
== OPERAND_PLUS
)
91 (*info
->fprintf_func
) (info
->stream
, "+");
94 if (oper
->flags
== OPERAND_ATSIGN
)
96 (*info
->fprintf_func
) (info
->stream
, "@");
99 if (oper
->flags
== OPERAND_ATPAR
)
101 (*info
->fprintf_func
) (info
->stream
, "@(");
107 /* the LONG_L format shifts registers over by 15 */
108 if (op
->format
== LONG_L
&& (oper
->flags
& OPERAND_REG
))
111 num
= (insn
>> shift
) & (0x7FFFFFFF >> (31 - oper
->bits
));
113 if (oper
->flags
& OPERAND_REG
)
118 & (OPERAND_GPR
|OPERAND_FFLAG
|OPERAND_CFLAG
|OPERAND_CONTROL
));
119 if (oper
->flags
& (OPERAND_ACC0
|OPERAND_ACC1
))
120 num
+= num
? OPERAND_ACC1
: OPERAND_ACC0
;
121 for (i
= 0; i
< d10v_reg_name_cnt(); i
++)
123 if (num
== d10v_predefined_registers
[i
].value
)
125 if (d10v_predefined_registers
[i
].pname
)
126 (*info
->fprintf_func
) (info
->stream
, "%s",d10v_predefined_registers
[i
].pname
);
128 (*info
->fprintf_func
) (info
->stream
, "%s",d10v_predefined_registers
[i
].name
);
135 /* this would only get executed if a register was not in the
137 if (oper
->flags
& (OPERAND_ACC0
|OPERAND_ACC1
))
138 (*info
->fprintf_func
) (info
->stream
, "a");
139 else if (oper
->flags
& OPERAND_CONTROL
)
140 (*info
->fprintf_func
) (info
->stream
, "cr");
141 else if(oper
->flags
& OPERAND_REG
)
142 (*info
->fprintf_func
) (info
->stream
, "r");
143 (*info
->fprintf_func
) (info
->stream
, "%d",num
);
148 /* addresses are right-shifted by 2 */
149 if (oper
->flags
& OPERAND_ADDR
)
153 max
= (1 << (oper
->bits
- 1));
156 num
= -num
& ((1 << oper
->bits
)-1);
160 if (info
->flags
& INSN_HAS_RELOC
)
161 (*info
->print_address_func
) (num
& PC_MASK
, info
);
165 (*info
->print_address_func
) ((memaddr
- num
) & PC_MASK
, info
);
167 (*info
->print_address_func
) ((memaddr
+ num
) & PC_MASK
, info
);
172 if (oper
->flags
& OPERAND_SIGNED
)
174 int max
= (1 << (oper
->bits
- 1));
177 num
= -num
& ((1 << oper
->bits
)-1);
178 (*info
->fprintf_func
) (info
->stream
, "-");
181 (*info
->fprintf_func
) (info
->stream
, "0x%x",num
);
188 dis_long (insn
, memaddr
, info
)
191 struct disassemble_info
*info
;
195 struct d10v_opcode
*op
= (struct d10v_opcode
*)d10v_opcodes
;
196 struct d10v_operand
*oper
;
202 if ((op
->format
& LONG_OPCODE
) && ((op
->mask
& insn
) == op
->opcode
))
205 (*info
->fprintf_func
) (info
->stream
, "%s\t", op
->name
);
206 for ( i
=0; op
->operands
[i
]; i
++)
208 oper
= (struct d10v_operand
*)&d10v_operands
[op
->operands
[i
]];
209 if (oper
->flags
== OPERAND_ATPAR
)
211 print_operand (oper
, insn
, op
, memaddr
, info
);
212 if (op
->operands
[i
+1] && oper
->bits
&&
213 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_PLUS
&&
214 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_MINUS
)
215 (*info
->fprintf_func
) (info
->stream
, ", ");
223 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%08x",insn
);
226 (*info
->fprintf_func
) (info
->stream
, ")");
230 dis_2_short (insn
, memaddr
, info
, order
)
233 struct disassemble_info
*info
;
239 struct d10v_opcode
*op
;
241 int match
, num_match
=0;
242 struct d10v_operand
*oper
;
245 ins
[0] = (insn
& 0x3FFFFFFF) >> 15;
246 ins
[1] = insn
& 0x00007FFF;
250 op
= (struct d10v_opcode
*)d10v_opcodes
;
254 if ((op
->format
& SHORT_OPCODE
) && ((op
->mask
& ins
[j
]) == op
->opcode
))
256 (*info
->fprintf_func
) (info
->stream
, "%s\t",op
->name
);
257 for (i
=0; op
->operands
[i
]; i
++)
259 oper
= (struct d10v_operand
*)&d10v_operands
[op
->operands
[i
]];
260 if (oper
->flags
== OPERAND_ATPAR
)
262 print_operand (oper
, ins
[j
], op
, memaddr
, info
);
263 if (op
->operands
[i
+1] && oper
->bits
&&
264 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_PLUS
&&
265 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_MINUS
)
266 (*info
->fprintf_func
) (info
->stream
, ", ");
275 (*info
->fprintf_func
) (info
->stream
, "unknown");
280 (*info
->fprintf_func
) (info
->stream
, "\t->\t");
284 (*info
->fprintf_func
) (info
->stream
, "\t<-\t");
288 (*info
->fprintf_func
) (info
->stream
, "\t||\t");
297 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%08x",insn
);
300 (*info
->fprintf_func
) (info
->stream
, ")");