1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef INFER_ADDR_PREFIX
44 #define INFER_ADDR_PREFIX 1
47 #ifndef SCALE1_WHEN_NO_INDEX
48 /* Specifying a scale factor besides 1 when there is no index is
49 futile. eg. `mov (%ebx,2),%al' does exactly the same as
50 `mov (%ebx),%al'. To slavishly follow what the programmer
51 specified, set SCALE1_WHEN_NO_INDEX to 0. */
52 #define SCALE1_WHEN_NO_INDEX 1
58 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
59 static int fits_in_signed_byte
PARAMS ((long));
60 static int fits_in_unsigned_byte
PARAMS ((long));
61 static int fits_in_unsigned_word
PARAMS ((long));
62 static int fits_in_signed_word
PARAMS ((long));
63 static int smallest_imm_type
PARAMS ((long));
64 static int add_prefix
PARAMS ((unsigned int));
65 static void set_16bit_code_flag
PARAMS ((int));
66 static void set_16bit_gcc_code_flag
PARAMS((int));
67 static void set_intel_syntax
PARAMS ((int));
70 static bfd_reloc_code_real_type reloc
71 PARAMS ((int, int, bfd_reloc_code_real_type
));
74 /* 'md_assemble ()' gathers together information and puts it into a
79 /* TM holds the template for the insn were currently assembling. */
82 /* SUFFIX holds the instruction mnemonic suffix if given.
83 (e.g. 'l' for 'movl') */
86 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
88 /* OPERANDS gives the number of given operands. */
89 unsigned int operands
;
91 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
92 of given register, displacement, memory operands and immediate
94 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
96 /* TYPES [i] is the type (see above #defines) which tells us how to
97 search through DISPS [i] & IMMS [i] & REGS [i] for the required
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacements (if given) for each operand. */
102 expressionS
*disps
[MAX_OPERANDS
];
104 /* Relocation type for operand */
106 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
108 int disp_reloc
[MAX_OPERANDS
];
111 /* Immediate operands (if given) for each operand. */
112 expressionS
*imms
[MAX_OPERANDS
];
114 /* Register operands (if given) for each operand. */
115 const reg_entry
*regs
[MAX_OPERANDS
];
117 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
118 the base index byte below. */
119 const reg_entry
*base_reg
;
120 const reg_entry
*index_reg
;
121 unsigned int log2_scale_factor
;
123 /* SEG gives the seg_entries of this insn. They are zero unless
124 explicit segment overrides are given. */
125 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
127 /* PREFIX holds all the given prefix opcodes (usually null).
128 PREFIXES is the number of prefix opcodes. */
129 unsigned int prefixes
;
130 unsigned char prefix
[MAX_PREFIXES
];
132 /* RM and SIB are the modrm byte and the sib byte where the
133 addressing modes of this insn are encoded. */
139 typedef struct _i386_insn i386_insn
;
141 /* List of chars besides those in app.c:symbol_chars that can start an
142 operand. Used to prevent the scrubber eating vital white-space. */
144 const char extra_symbol_chars
[] = "*%-(@";
146 const char extra_symbol_chars
[] = "*%-(";
149 /* This array holds the chars that always start a comment. If the
150 pre-processor is disabled, these aren't very useful */
151 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
152 /* Putting '/' here makes it impossible to use the divide operator.
153 However, we need it for compatibility with SVR4 systems. */
154 const char comment_chars
[] = "#/";
155 #define PREFIX_SEPARATOR '\\'
157 const char comment_chars
[] = "#";
158 #define PREFIX_SEPARATOR '/'
161 /* This array holds the chars that only start a comment at the beginning of
162 a line. If the line seems to have the form '# 123 filename'
163 .line and .file directives will appear in the pre-processed output */
164 /* Note that input_file.c hand checks for '#' at the beginning of the
165 first line of the input file. This is because the compiler outputs
166 #NO_APP at the beginning of its output. */
167 /* Also note that comments started like this one will always work if
168 '/' isn't otherwise defined. */
169 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
170 const char line_comment_chars
[] = "";
172 const char line_comment_chars
[] = "/";
175 const char line_separator_chars
[] = "";
177 /* Chars that can be used to separate mant from exp in floating point nums */
178 const char EXP_CHARS
[] = "eE";
180 /* Chars that mean this number is a floating point constant */
183 const char FLT_CHARS
[] = "fFdDxX";
185 /* tables for lexical analysis */
186 static char mnemonic_chars
[256];
187 static char register_chars
[256];
188 static char operand_chars
[256];
189 static char identifier_chars
[256];
190 static char digit_chars
[256];
193 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
194 #define is_operand_char(x) (operand_chars[(unsigned char) x])
195 #define is_register_char(x) (register_chars[(unsigned char) x])
196 #define is_space_char(x) ((x) == ' ')
197 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
198 #define is_digit_char(x) (digit_chars[(unsigned char) x])
200 /* put here all non-digit non-letter charcters that may occur in an operand */
201 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
203 /* md_assemble() always leaves the strings it's passed unaltered. To
204 effect this we maintain a stack of saved characters that we've smashed
205 with '\0's (indicating end of strings for various sub-fields of the
206 assembler instruction). */
207 static char save_stack
[32];
208 static char *save_stack_p
; /* stack pointer */
209 #define END_STRING_AND_SAVE(s) \
210 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
211 #define RESTORE_END_STRING(s) \
212 do { *(s) = *--save_stack_p; } while (0)
214 /* The instruction we're assembling. */
217 /* Possible templates for current insn. */
218 static const templates
*current_templates
;
220 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
221 static expressionS disp_expressions
[2], im_expressions
[2];
223 static int this_operand
; /* current operand we are working on */
225 static int flag_do_long_jump
; /* FIXME what does this do? */
227 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
229 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
231 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
233 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
234 suffix to call, ret, enter, leave, push,
235 and pop instructions so that gcc has the
236 same stack frame as in 32 bit mode. */
238 /* Interface to relax_segment.
239 There are 2 relax states for 386 jump insns: one for conditional &
240 one for unconditional jumps. This is because these two types of
241 jumps add different sizes to frags when we're figuring out what
242 sort of jump to choose to reach a given label. */
245 #define COND_JUMP 1 /* conditional jump */
246 #define UNCOND_JUMP 2 /* unconditional jump */
250 #define SMALL16 (SMALL|CODE16)
252 #define BIG16 (BIG|CODE16)
256 #define INLINE __inline__
262 #define ENCODE_RELAX_STATE(type,size) \
263 ((relax_substateT)((type<<2) | (size)))
264 #define SIZE_FROM_RELAX_STATE(s) \
265 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
267 /* This table is used by relax_frag to promote short jumps to long
268 ones where necessary. SMALL (short) jumps may be promoted to BIG
269 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
270 don't allow a short jump in a 32 bit code segment to be promoted to
271 a 16 bit offset jump because it's slower (requires data size
272 prefix), and doesn't work, unless the destination is in the bottom
273 64k of the code segment (The top 16 bits of eip are zeroed). */
275 const relax_typeS md_relax_table
[] =
278 1) most positive reach of this state,
279 2) most negative reach of this state,
280 3) how many bytes this mode will add to the size of the current frag
281 4) which index into the table to try if we can't fit into this one.
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
289 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
290 /* dword conditionals adds 4 bytes to frag:
291 1 extra opcode byte, 3 extra displacement bytes. */
293 /* word conditionals add 2 bytes to frag:
294 1 extra opcode byte, 1 extra displacement byte. */
297 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
298 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
299 /* dword jmp adds 3 bytes to frag:
300 0 extra opcode bytes, 3 extra displacement bytes. */
302 /* word jmp adds 1 byte to frag:
303 0 extra opcode bytes, 1 extra displacement byte. */
310 i386_align_code (fragP
, count
)
314 /* Various efficient no-op patterns for aligning code labels. */
315 /* Note: Don't try to assemble the instructions in the comments. */
316 /* 0L and 0w are not legal */
317 static const char f32_1
[] =
319 static const char f32_2
[] =
320 {0x89,0xf6}; /* movl %esi,%esi */
321 static const char f32_3
[] =
322 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
323 static const char f32_4
[] =
324 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
325 static const char f32_5
[] =
327 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
328 static const char f32_6
[] =
329 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
330 static const char f32_7
[] =
331 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
332 static const char f32_8
[] =
334 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
335 static const char f32_9
[] =
336 {0x89,0xf6, /* movl %esi,%esi */
337 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
338 static const char f32_10
[] =
339 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
340 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
341 static const char f32_11
[] =
342 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
343 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
344 static const char f32_12
[] =
345 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
346 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
347 static const char f32_13
[] =
348 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
349 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
350 static const char f32_14
[] =
351 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
352 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
353 static const char f32_15
[] =
354 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
355 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
356 static const char f16_3
[] =
357 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
358 static const char f16_4
[] =
359 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
360 static const char f16_5
[] =
362 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
363 static const char f16_6
[] =
364 {0x89,0xf6, /* mov %si,%si */
365 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
366 static const char f16_7
[] =
367 {0x8d,0x74,0x00, /* lea 0(%si),%si */
368 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
369 static const char f16_8
[] =
370 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
371 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
372 static const char *const f32_patt
[] = {
373 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
374 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
376 static const char *const f16_patt
[] = {
377 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
378 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
381 if (count
> 0 && count
<= 15)
385 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
386 f16_patt
[count
- 1], count
);
387 if (count
> 8) /* adjust jump offset */
388 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
391 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
392 f32_patt
[count
- 1], count
);
393 fragP
->fr_var
= count
;
397 static char *output_invalid
PARAMS ((int c
));
398 static int i386_operand
PARAMS ((char *operand_string
));
399 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
400 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
404 static void s_bss
PARAMS ((int));
407 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
409 static INLINE
unsigned int
410 mode_from_disp_size (t
)
413 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
417 fits_in_signed_byte (num
)
420 return (num
>= -128) && (num
<= 127);
421 } /* fits_in_signed_byte() */
424 fits_in_unsigned_byte (num
)
427 return (num
& 0xff) == num
;
428 } /* fits_in_unsigned_byte() */
431 fits_in_unsigned_word (num
)
434 return (num
& 0xffff) == num
;
435 } /* fits_in_unsigned_word() */
438 fits_in_signed_word (num
)
441 return (-32768 <= num
) && (num
<= 32767);
442 } /* fits_in_signed_word() */
445 smallest_imm_type (num
)
449 /* This code is disabled because all the Imm1 forms in the opcode table
450 are slower on the i486, and they're the versions with the implicitly
451 specified single-position displacement, which has another syntax if
452 you really want to use that form. If you really prefer to have the
453 one-byte-shorter Imm1 form despite these problems, re-enable this
456 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
458 return (fits_in_signed_byte (num
)
459 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
460 : fits_in_unsigned_byte (num
)
461 ? (Imm8
| Imm16
| Imm32
)
462 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
465 } /* smallest_imm_type() */
467 /* Returns 0 if attempting to add a prefix where one from the same
468 class already exists, 1 if non rep/repne added, 2 if rep/repne
482 case CS_PREFIX_OPCODE
:
483 case DS_PREFIX_OPCODE
:
484 case ES_PREFIX_OPCODE
:
485 case FS_PREFIX_OPCODE
:
486 case GS_PREFIX_OPCODE
:
487 case SS_PREFIX_OPCODE
:
491 case REPNE_PREFIX_OPCODE
:
492 case REPE_PREFIX_OPCODE
:
495 case LOCK_PREFIX_OPCODE
:
503 case ADDR_PREFIX_OPCODE
:
507 case DATA_PREFIX_OPCODE
:
514 as_bad (_("same type of prefix used twice"));
519 i
.prefix
[q
] = prefix
;
524 set_16bit_code_flag (new_16bit_code_flag
)
525 int new_16bit_code_flag
;
527 flag_16bit_code
= new_16bit_code_flag
;
532 set_16bit_gcc_code_flag (new_16bit_code_flag
)
533 int new_16bit_code_flag
;
535 flag_16bit_code
= new_16bit_code_flag
;
536 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
540 set_intel_syntax (syntax_flag
)
543 /* Find out if register prefixing is specified. */
544 int ask_naked_reg
= 0;
547 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
549 char *string
= input_line_pointer
;
550 int e
= get_symbol_end ();
552 if (strcmp(string
, "prefix") == 0)
554 else if (strcmp(string
, "noprefix") == 0)
557 as_bad (_("Bad argument to syntax directive."));
558 *input_line_pointer
= e
;
560 demand_empty_rest_of_line ();
562 intel_syntax
= syntax_flag
;
564 if (ask_naked_reg
== 0)
567 allow_naked_reg
= (intel_syntax
568 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
570 allow_naked_reg
= 0; /* conservative default */
574 allow_naked_reg
= (ask_naked_reg
< 0);
577 const pseudo_typeS md_pseudo_table
[] =
582 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
583 {"align", s_align_bytes
, 0},
585 {"align", s_align_ptwo
, 0},
587 {"ffloat", float_cons
, 'f'},
588 {"dfloat", float_cons
, 'd'},
589 {"tfloat", float_cons
, 'x'},
591 {"noopt", s_ignore
, 0},
592 {"optim", s_ignore
, 0},
593 {"code16gcc", set_16bit_gcc_code_flag
, 1},
594 {"code16", set_16bit_code_flag
, 1},
595 {"code32", set_16bit_code_flag
, 0},
596 {"intel_syntax", set_intel_syntax
, 1},
597 {"att_syntax", set_intel_syntax
, 0},
601 /* for interface with expression () */
602 extern char *input_line_pointer
;
604 /* hash table for instruction mnemonic lookup */
605 static struct hash_control
*op_hash
;
606 /* hash table for register lookup */
607 static struct hash_control
*reg_hash
;
613 const char *hash_err
;
615 /* initialize op_hash hash table */
616 op_hash
= hash_new ();
619 register const template *optab
;
620 register templates
*core_optab
;
622 optab
= i386_optab
; /* setup for loop */
623 core_optab
= (templates
*) xmalloc (sizeof (templates
));
624 core_optab
->start
= optab
;
629 if (optab
->name
== NULL
630 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
632 /* different name --> ship out current template list;
633 add to hash table; & begin anew */
634 core_optab
->end
= optab
;
635 hash_err
= hash_insert (op_hash
,
641 as_fatal (_("Internal Error: Can't hash %s: %s"),
645 if (optab
->name
== NULL
)
647 core_optab
= (templates
*) xmalloc (sizeof (templates
));
648 core_optab
->start
= optab
;
653 /* initialize reg_hash hash table */
654 reg_hash
= hash_new ();
656 register const reg_entry
*regtab
;
658 for (regtab
= i386_regtab
;
659 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
662 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
668 /* fill in lexical tables: mnemonic_chars, operand_chars. */
673 for (c
= 0; c
< 256; c
++)
678 mnemonic_chars
[c
] = c
;
679 register_chars
[c
] = c
;
680 operand_chars
[c
] = c
;
682 else if (islower (c
))
684 mnemonic_chars
[c
] = c
;
685 register_chars
[c
] = c
;
686 operand_chars
[c
] = c
;
688 else if (isupper (c
))
690 mnemonic_chars
[c
] = tolower (c
);
691 register_chars
[c
] = mnemonic_chars
[c
];
692 operand_chars
[c
] = c
;
695 if (isalpha (c
) || isdigit (c
))
696 identifier_chars
[c
] = c
;
699 identifier_chars
[c
] = c
;
700 operand_chars
[c
] = c
;
705 identifier_chars
['@'] = '@';
707 digit_chars
['-'] = '-';
708 identifier_chars
['_'] = '_';
709 identifier_chars
['.'] = '.';
711 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
712 operand_chars
[(unsigned char) *p
] = *p
;
715 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
716 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
718 record_alignment (text_section
, 2);
719 record_alignment (data_section
, 2);
720 record_alignment (bss_section
, 2);
726 i386_print_statistics (file
)
729 hash_print_statistics (file
, "i386 opcode", op_hash
);
730 hash_print_statistics (file
, "i386 register", reg_hash
);
736 /* debugging routines for md_assemble */
737 static void pi
PARAMS ((char *, i386_insn
*));
738 static void pte
PARAMS ((template *));
739 static void pt
PARAMS ((unsigned int));
740 static void pe
PARAMS ((expressionS
*));
741 static void ps
PARAMS ((symbolS
*));
748 register template *p
;
751 fprintf (stdout
, "%s: template ", line
);
753 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
754 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
755 fprintf (stdout
, " base %x index %x scale %x\n",
756 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
757 for (i
= 0; i
< x
->operands
; i
++)
759 fprintf (stdout
, " #%d: ", i
+ 1);
761 fprintf (stdout
, "\n");
763 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
764 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
765 if (x
->types
[i
] & Imm
)
767 if (x
->types
[i
] & Disp
)
777 fprintf (stdout
, " %d operands ", t
->operands
);
778 fprintf (stdout
, "opcode %x ",
780 if (t
->extension_opcode
!= None
)
781 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
782 if (t
->opcode_modifier
& D
)
783 fprintf (stdout
, "D");
784 if (t
->opcode_modifier
& W
)
785 fprintf (stdout
, "W");
786 fprintf (stdout
, "\n");
787 for (i
= 0; i
< t
->operands
; i
++)
789 fprintf (stdout
, " #%d type ", i
+ 1);
790 pt (t
->operand_types
[i
]);
791 fprintf (stdout
, "\n");
799 fprintf (stdout
, " operation %d\n", e
->X_op
);
800 fprintf (stdout
, " add_number %ld (%lx)\n",
801 (long) e
->X_add_number
, (long) e
->X_add_number
);
804 fprintf (stdout
, " add_symbol ");
805 ps (e
->X_add_symbol
);
806 fprintf (stdout
, "\n");
810 fprintf (stdout
, " op_symbol ");
812 fprintf (stdout
, "\n");
820 fprintf (stdout
, "%s type %s%s",
822 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
823 segment_name (S_GET_SEGMENT (s
)));
842 { BaseIndex
, "BaseIndex" },
846 { InOutPortReg
, "InOutPortReg" },
847 { ShiftCount
, "ShiftCount" },
848 { Control
, "control reg" },
849 { Test
, "test reg" },
850 { Debug
, "debug reg" },
851 { FloatReg
, "FReg" },
852 { FloatAcc
, "FAcc" },
856 { JumpAbsolute
, "Jump Absolute" },
867 register struct type_name
*ty
;
871 fprintf (stdout
, _("Unknown"));
875 for (ty
= type_names
; ty
->mask
; ty
++)
877 fprintf (stdout
, "%s, ", ty
->tname
);
882 #endif /* DEBUG386 */
885 tc_i386_force_relocation (fixp
)
889 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
890 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
895 return fixp
->fx_r_type
== 7;
900 static bfd_reloc_code_real_type reloc
901 PARAMS ((int, int, bfd_reloc_code_real_type
));
903 static bfd_reloc_code_real_type
904 reloc (size
, pcrel
, other
)
907 bfd_reloc_code_real_type other
;
909 if (other
!= NO_RELOC
) return other
;
915 case 1: return BFD_RELOC_8_PCREL
;
916 case 2: return BFD_RELOC_16_PCREL
;
917 case 4: return BFD_RELOC_32_PCREL
;
919 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
925 case 1: return BFD_RELOC_8
;
926 case 2: return BFD_RELOC_16
;
927 case 4: return BFD_RELOC_32
;
929 as_bad (_("Can not do %d byte relocation"), size
);
932 return BFD_RELOC_NONE
;
936 * Here we decide which fixups can be adjusted to make them relative to
937 * the beginning of the section instead of the symbol. Basically we need
938 * to make sure that the dynamic relocations are done correctly, so in
939 * some cases we force the original symbol to be used.
942 tc_i386_fix_adjustable (fixP
)
945 #if defined (OBJ_ELF) || defined (TE_PE)
946 /* Prevent all adjustments to global symbols, or else dynamic
947 linking will not work correctly. */
948 if (S_IS_EXTERN (fixP
->fx_addsy
))
950 if (S_IS_WEAK (fixP
->fx_addsy
))
953 /* adjust_reloc_syms doesn't know about the GOT */
954 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
955 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
956 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
957 || fixP
->fx_r_type
== BFD_RELOC_RVA
958 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
959 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
964 #define reloc(SIZE,PCREL,OTHER) 0
965 #define BFD_RELOC_16 0
966 #define BFD_RELOC_32 0
967 #define BFD_RELOC_16_PCREL 0
968 #define BFD_RELOC_32_PCREL 0
969 #define BFD_RELOC_386_PLT32 0
970 #define BFD_RELOC_386_GOT32 0
971 #define BFD_RELOC_386_GOTOFF 0
975 intel_float_operand
PARAMS ((char *mnemonic
));
978 intel_float_operand (mnemonic
)
981 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
984 if (mnemonic
[0] == 'f')
990 /* This is the guts of the machine-dependent assembler. LINE points to a
991 machine dependent instruction. This function is supposed to emit
992 the frags/bytes it assembles to. */
998 /* Points to template once we've found it. */
1001 /* Count the size of the instruction generated. */
1006 char mnemonic
[MAX_MNEM_SIZE
];
1008 /* Initialize globals. */
1009 memset (&i
, '\0', sizeof (i
));
1010 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1011 i
.disp_reloc
[j
] = NO_RELOC
;
1012 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1013 memset (im_expressions
, '\0', sizeof (im_expressions
));
1014 save_stack_p
= save_stack
; /* reset stack pointer */
1016 /* First parse an instruction mnemonic & call i386_operand for the operands.
1017 We assume that the scrubber has arranged it so that line[0] is the valid
1018 start of a (possibly prefixed) mnemonic. */
1021 char *token_start
= l
;
1024 /* Non-zero if we found a prefix only acceptable with string insns. */
1025 const char *expecting_string_instruction
= NULL
;
1030 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1033 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1035 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1040 if (!is_space_char (*l
)
1041 && *l
!= END_OF_INSN
1042 && *l
!= PREFIX_SEPARATOR
)
1044 as_bad (_("invalid character %s in mnemonic"),
1045 output_invalid (*l
));
1048 if (token_start
== l
)
1050 if (*l
== PREFIX_SEPARATOR
)
1051 as_bad (_("expecting prefix; got nothing"));
1053 as_bad (_("expecting mnemonic; got nothing"));
1057 /* Look up instruction (or prefix) via hash table. */
1058 current_templates
= hash_find (op_hash
, mnemonic
);
1060 if (*l
!= END_OF_INSN
1061 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1062 && current_templates
1063 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1065 /* If we are in 16-bit mode, do not allow addr16 or data16.
1066 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1067 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1068 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1071 as_bad (_("redundant %s prefix"),
1072 current_templates
->start
->name
);
1075 /* Add prefix, checking for repeated prefixes. */
1076 switch (add_prefix (current_templates
->start
->base_opcode
))
1081 expecting_string_instruction
=
1082 current_templates
->start
->name
;
1085 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1092 if (!current_templates
)
1094 /* See if we can get a match by trimming off a suffix. */
1097 case WORD_MNEM_SUFFIX
:
1098 case BYTE_MNEM_SUFFIX
:
1099 case SHORT_MNEM_SUFFIX
:
1100 case LONG_MNEM_SUFFIX
:
1101 i
.suffix
= mnem_p
[-1];
1103 current_templates
= hash_find (op_hash
, mnemonic
);
1107 case DWORD_MNEM_SUFFIX
:
1110 i
.suffix
= mnem_p
[-1];
1112 current_templates
= hash_find (op_hash
, mnemonic
);
1116 if (!current_templates
)
1118 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1123 /* check for rep/repne without a string instruction */
1124 if (expecting_string_instruction
1125 && !(current_templates
->start
->opcode_modifier
& IsString
))
1127 as_bad (_("expecting string instruction after `%s'"),
1128 expecting_string_instruction
);
1132 /* There may be operands to parse. */
1133 if (*l
!= END_OF_INSN
)
1135 /* parse operands */
1137 /* 1 if operand is pending after ','. */
1138 unsigned int expecting_operand
= 0;
1140 /* Non-zero if operand parens not balanced. */
1141 unsigned int paren_not_balanced
;
1145 /* skip optional white space before operand */
1146 if (is_space_char (*l
))
1148 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1150 as_bad (_("invalid character %s before operand %d"),
1151 output_invalid (*l
),
1155 token_start
= l
; /* after white space */
1156 paren_not_balanced
= 0;
1157 while (paren_not_balanced
|| *l
!= ',')
1159 if (*l
== END_OF_INSN
)
1161 if (paren_not_balanced
)
1164 as_bad (_("unbalanced parenthesis in operand %d."),
1167 as_bad (_("unbalanced brackets in operand %d."),
1172 break; /* we are done */
1174 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1176 as_bad (_("invalid character %s in operand %d"),
1177 output_invalid (*l
),
1184 ++paren_not_balanced
;
1186 --paren_not_balanced
;
1191 ++paren_not_balanced
;
1193 --paren_not_balanced
;
1197 if (l
!= token_start
)
1198 { /* yes, we've read in another operand */
1199 unsigned int operand_ok
;
1200 this_operand
= i
.operands
++;
1201 if (i
.operands
> MAX_OPERANDS
)
1203 as_bad (_("spurious operands; (%d operands/instruction max)"),
1207 /* now parse operand adding info to 'i' as we go along */
1208 END_STRING_AND_SAVE (l
);
1211 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1213 operand_ok
= i386_operand (token_start
);
1215 RESTORE_END_STRING (l
); /* restore old contents */
1221 if (expecting_operand
)
1223 expecting_operand_after_comma
:
1224 as_bad (_("expecting operand after ','; got nothing"));
1229 as_bad (_("expecting operand before ','; got nothing"));
1234 /* now *l must be either ',' or END_OF_INSN */
1237 if (*++l
== END_OF_INSN
)
1238 { /* just skip it, if it's \n complain */
1239 goto expecting_operand_after_comma
;
1241 expecting_operand
= 1;
1244 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1248 /* Now we've parsed the mnemonic into a set of templates, and have the
1251 Next, we find a template that matches the given insn,
1252 making sure the overlap of the given operands types is consistent
1253 with the template operand types. */
1255 #define MATCH(overlap, given, template) \
1256 ((overlap & ~JumpAbsolute) \
1257 && ((given) & (BaseIndex|JumpAbsolute)) == ((overlap) & (BaseIndex|JumpAbsolute)))
1259 /* If given types r0 and r1 are registers they must be of the same type
1260 unless the expected operand type register overlap is null.
1261 Note that Acc in a template matches every size of reg. */
1262 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1263 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1264 ((g0) & Reg) == ((g1) & Reg) || \
1265 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1268 register unsigned int overlap0
, overlap1
;
1269 unsigned int overlap2
;
1270 unsigned int found_reverse_match
;
1273 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1275 && (strcmp (mnemonic
, "enter") != 0)
1276 && (strcmp (mnemonic
, "bound") != 0)
1277 && (strncmp (mnemonic
, "fsub", 4) !=0)
1278 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1280 const reg_entry
*temp_reg
= NULL
;
1281 expressionS
*temp_disp
= NULL
;
1282 expressionS
*temp_imm
= NULL
;
1283 unsigned int temp_type
;
1287 if (i
.operands
== 2)
1292 else if (i
.operands
== 3)
1300 temp_type
= i
.types
[xchg2
];
1301 if (temp_type
& (Reg
| FloatReg
))
1302 temp_reg
= i
.regs
[xchg2
];
1303 else if (temp_type
& Imm
)
1304 temp_imm
= i
.imms
[xchg2
];
1305 else if (temp_type
& Disp
)
1306 temp_disp
= i
.disps
[xchg2
];
1308 i
.types
[xchg2
] = i
.types
[xchg1
];
1310 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1312 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1313 i
.regs
[xchg1
] = NULL
;
1315 else if (i
.types
[xchg2
] & Imm
)
1317 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1318 i
.imms
[xchg1
] = NULL
;
1320 else if (i
.types
[xchg2
] & Disp
)
1322 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1323 i
.disps
[xchg1
] = NULL
;
1326 if (temp_type
& (Reg
| FloatReg
))
1328 i
.regs
[xchg1
] = temp_reg
;
1329 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1330 i
.regs
[xchg2
] = NULL
;
1332 else if (temp_type
& Imm
)
1334 i
.imms
[xchg1
] = temp_imm
;
1335 if (! (i
.types
[xchg1
] & Imm
))
1336 i
.imms
[xchg2
] = NULL
;
1338 else if (temp_type
& Disp
)
1340 i
.disps
[xchg1
] = temp_disp
;
1341 if (! (i
.types
[xchg1
] & Disp
))
1342 i
.disps
[xchg2
] = NULL
;
1345 i
.types
[xchg1
] = temp_type
;
1351 found_reverse_match
= 0;
1352 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1354 : (i
.suffix
== WORD_MNEM_SUFFIX
1356 : (i
.suffix
== SHORT_MNEM_SUFFIX
1358 : (i
.suffix
== LONG_MNEM_SUFFIX
1360 : (i
.suffix
== DWORD_MNEM_SUFFIX
1362 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1364 for (t
= current_templates
->start
;
1365 t
< current_templates
->end
;
1368 /* Must have right number of operands. */
1369 if (i
.operands
!= t
->operands
)
1372 /* For some opcodes, don't check the suffix */
1375 if (strcmp (t
->name
, "fnstcw")
1376 && strcmp (t
->name
, "fldcw")
1377 && (t
->opcode_modifier
& suffix_check
))
1380 /* Must not have disallowed suffix. */
1381 else if ((t
->opcode_modifier
& suffix_check
))
1384 else if (!t
->operands
)
1385 break; /* 0 operands always matches */
1387 overlap0
= i
.types
[0] & t
->operand_types
[0];
1388 switch (t
->operands
)
1391 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1396 overlap1
= i
.types
[1] & t
->operand_types
[1];
1397 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1398 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1399 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1400 t
->operand_types
[0],
1401 overlap1
, i
.types
[1],
1402 t
->operand_types
[1]))
1405 /* check if other direction is valid ... */
1406 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1409 /* try reversing direction of operands */
1410 overlap0
= i
.types
[0] & t
->operand_types
[1];
1411 overlap1
= i
.types
[1] & t
->operand_types
[0];
1412 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1413 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1414 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1415 t
->operand_types
[1],
1416 overlap1
, i
.types
[1],
1417 t
->operand_types
[0]))
1419 /* does not match either direction */
1422 /* found_reverse_match holds which of D or FloatDR
1424 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1427 /* found a forward 2 operand match here */
1428 if (t
->operands
== 3)
1430 /* Here we make use of the fact that there are no
1431 reverse match 3 operand instructions, and all 3
1432 operand instructions only need to be checked for
1433 register consistency between operands 2 and 3. */
1434 overlap2
= i
.types
[2] & t
->operand_types
[2];
1435 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1436 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1437 t
->operand_types
[1],
1438 overlap2
, i
.types
[2],
1439 t
->operand_types
[2]))
1443 /* found either forward/reverse 2 or 3 operand match here:
1444 slip through to break */
1446 break; /* we've found a match; break out of loop */
1447 } /* for (t = ... */
1448 if (t
== current_templates
->end
)
1449 { /* we found no match */
1450 as_bad (_("suffix or operands invalid for `%s'"),
1451 current_templates
->start
->name
);
1456 && (i
.types
[0] & JumpAbsolute
) != (t
->operand_types
[0] & JumpAbsolute
))
1458 as_warn (_("Indirect %s without `*'"), t
->name
);
1461 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1463 /* Warn them that a data or address size prefix doesn't affect
1464 assembly of the next line of code. */
1465 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1468 /* Copy the template we found. */
1470 if (found_reverse_match
)
1472 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1473 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1477 if (i
.tm
.opcode_modifier
& FWait
)
1478 if (! add_prefix (FWAIT_OPCODE
))
1481 /* Check string instruction segment overrides */
1482 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1484 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1485 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1487 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1489 as_bad (_("`%s' operand %d must use `%%es' segment"),
1494 /* There's only ever one segment override allowed per instruction.
1495 This instruction possibly has a legal segment override on the
1496 second operand, so copy the segment to where non-string
1497 instructions store it, allowing common code. */
1498 i
.seg
[0] = i
.seg
[1];
1500 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1502 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1504 as_bad (_("`%s' operand %d must use `%%es' segment"),
1512 /* If matched instruction specifies an explicit instruction mnemonic
1514 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1516 if (i
.tm
.opcode_modifier
& Size16
)
1517 i
.suffix
= WORD_MNEM_SUFFIX
;
1519 i
.suffix
= LONG_MNEM_SUFFIX
;
1521 else if (i
.reg_operands
)
1523 /* If there's no instruction mnemonic suffix we try to invent one
1524 based on register operands. */
1527 /* We take i.suffix from the last register operand specified,
1528 Destination register type is more significant than source
1531 for (op
= i
.operands
; --op
>= 0; )
1532 if (i
.types
[op
] & Reg
)
1534 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1535 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1540 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1543 for (op
= i
.operands
; --op
>= 0; )
1545 /* If this is an eight bit register, it's OK. If it's
1546 the 16 or 32 bit version of an eight bit register,
1547 we will just use the low portion, and that's OK too. */
1548 if (i
.types
[op
] & Reg8
)
1551 /* movzx and movsx should not generate this warning. */
1553 && (i
.tm
.base_opcode
== 0xfb7
1554 || i
.tm
.base_opcode
== 0xfb6
1555 || i
.tm
.base_opcode
== 0xfbe
1556 || i
.tm
.base_opcode
== 0xfbf))
1559 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1561 /* Check that the template allows eight bit regs
1562 This kills insns such as `orb $1,%edx', which
1563 maybe should be allowed. */
1564 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1568 #if REGISTER_WARNINGS
1569 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1570 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1571 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1572 i
.regs
[op
]->reg_name
,
1577 /* Any other register is bad */
1578 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1580 | Control
| Debug
| Test
1581 | FloatReg
| FloatAcc
))
1583 as_bad (_("`%%%s' not allowed with `%s%c'"),
1584 i
.regs
[op
]->reg_name
,
1591 else if (i
.suffix
== LONG_MNEM_SUFFIX
)
1594 for (op
= i
.operands
; --op
>= 0; )
1595 /* Reject eight bit registers, except where the template
1596 requires them. (eg. movzb) */
1597 if ((i
.types
[op
] & Reg8
) != 0
1598 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1600 as_bad (_("`%%%s' not allowed with `%s%c'"),
1601 i
.regs
[op
]->reg_name
,
1606 #if REGISTER_WARNINGS
1607 /* Warn if the e prefix on a general reg is missing. */
1608 else if ((i
.types
[op
] & Reg16
) != 0
1609 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1611 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1612 (i
.regs
[op
] + 8)->reg_name
,
1613 i
.regs
[op
]->reg_name
,
1618 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1621 for (op
= i
.operands
; --op
>= 0; )
1622 /* Reject eight bit registers, except where the template
1623 requires them. (eg. movzb) */
1624 if ((i
.types
[op
] & Reg8
) != 0
1625 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1627 as_bad (_("`%%%s' not allowed with `%s%c'"),
1628 i
.regs
[op
]->reg_name
,
1633 #if REGISTER_WARNINGS
1634 /* Warn if the e prefix on a general reg is present. */
1635 else if ((i
.types
[op
] & Reg32
) != 0
1636 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1638 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1639 (i
.regs
[op
] - 8)->reg_name
,
1640 i
.regs
[op
]->reg_name
,
1648 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1650 i
.suffix
= stackop_size
;
1653 /* Make still unresolved immediate matches conform to size of immediate
1654 given in i.suffix. Note: overlap2 cannot be an immediate! */
1655 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1656 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1657 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1661 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1662 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1664 else if (overlap0
== (Imm16
| Imm32
))
1667 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1671 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1675 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1676 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1677 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1681 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1682 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1684 else if (overlap1
== (Imm16
| Imm32
))
1687 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1691 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1695 assert ((overlap2
& Imm
) == 0);
1697 i
.types
[0] = overlap0
;
1698 if (overlap0
& ImplicitRegister
)
1700 if (overlap0
& Imm1
)
1701 i
.imm_operands
= 0; /* kludge for shift insns */
1703 i
.types
[1] = overlap1
;
1704 if (overlap1
& ImplicitRegister
)
1707 i
.types
[2] = overlap2
;
1708 if (overlap2
& ImplicitRegister
)
1711 /* Finalize opcode. First, we change the opcode based on the operand
1712 size given by i.suffix: We need not change things for byte insns. */
1714 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1716 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1720 /* For movzx and movsx, need to check the register type */
1722 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1723 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1725 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1727 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1728 if (!add_prefix (prefix
))
1732 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1734 /* It's not a byte, select word/dword operation. */
1735 if (i
.tm
.opcode_modifier
& W
)
1737 if (i
.tm
.opcode_modifier
& ShortForm
)
1738 i
.tm
.base_opcode
|= 8;
1740 i
.tm
.base_opcode
|= 1;
1742 /* Now select between word & dword operations via the operand
1743 size prefix, except for instructions that will ignore this
1745 if (((intel_syntax
&& (i
.suffix
== DWORD_MNEM_SUFFIX
))
1746 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1747 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1749 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1750 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1751 prefix
= ADDR_PREFIX_OPCODE
;
1753 if (! add_prefix (prefix
))
1756 /* Size floating point instruction. */
1757 if (i
.suffix
== LONG_MNEM_SUFFIX
1758 || (intel_syntax
&& i
.suffix
== DWORD_MNEM_SUFFIX
))
1760 if (i
.tm
.opcode_modifier
& FloatMF
)
1761 i
.tm
.base_opcode
^= 4;
1765 if (i
.tm
.opcode_modifier
& ImmExt
)
1767 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1768 opcode suffix which is coded in the same place as an 8-bit
1769 immediate field would be. Here we fake an 8-bit immediate
1770 operand from the opcode suffix stored in tm.extension_opcode. */
1774 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1776 exp
= &im_expressions
[i
.imm_operands
++];
1777 i
.imms
[i
.operands
] = exp
;
1778 i
.types
[i
.operands
++] = Imm8
;
1779 exp
->X_op
= O_constant
;
1780 exp
->X_add_number
= i
.tm
.extension_opcode
;
1781 i
.tm
.extension_opcode
= None
;
1784 /* For insns with operands there are more diddles to do to the opcode. */
1787 /* Default segment register this instruction will use
1788 for memory accesses. 0 means unknown.
1789 This is only for optimizing out unnecessary segment overrides. */
1790 const seg_entry
*default_seg
= 0;
1792 /* If we found a reverse match we must alter the opcode
1793 direction bit. found_reverse_match holds bits to change
1794 (different for int & float insns). */
1796 i
.tm
.base_opcode
^= found_reverse_match
;
1798 /* The imul $imm, %reg instruction is converted into
1799 imul $imm, %reg, %reg, and the clr %reg instruction
1800 is converted into xor %reg, %reg. */
1801 if (i
.tm
.opcode_modifier
& regKludge
)
1803 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1804 /* Pretend we saw the extra register operand. */
1805 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1809 if (i
.tm
.opcode_modifier
& ShortForm
)
1811 /* The register or float register operand is in operand 0 or 1. */
1812 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1813 /* Register goes in low 3 bits of opcode. */
1814 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1815 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1817 /* Warn about some common errors, but press on regardless.
1818 The first case can be generated by gcc (<= 2.8.1). */
1819 if (i
.operands
== 2)
1821 /* reversed arguments on faddp, fsubp, etc. */
1822 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1823 i
.regs
[1]->reg_name
,
1824 i
.regs
[0]->reg_name
);
1828 /* extraneous `l' suffix on fp insn */
1829 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1830 i
.regs
[0]->reg_name
);
1834 else if (i
.tm
.opcode_modifier
& Modrm
)
1836 /* The opcode is completed (modulo i.tm.extension_opcode which
1837 must be put into the modrm byte).
1838 Now, we make the modrm & index base bytes based on all the
1839 info we've collected. */
1841 /* i.reg_operands MUST be the number of real register operands;
1842 implicit registers do not count. */
1843 if (i
.reg_operands
== 2)
1845 unsigned int source
, dest
;
1846 source
= ((i
.types
[0]
1847 & (Reg
| RegMMX
| RegXMM
1849 | Control
| Debug
| Test
))
1854 /* One of the register operands will be encoded in the
1855 i.tm.reg field, the other in the combined i.tm.mode
1856 and i.tm.regmem fields. If no form of this
1857 instruction supports a memory destination operand,
1858 then we assume the source operand may sometimes be
1859 a memory operand and so we need to store the
1860 destination in the i.rm.reg field. */
1861 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1863 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1864 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1868 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1869 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1873 { /* if it's not 2 reg operands... */
1876 unsigned int fake_zero_displacement
= 0;
1877 unsigned int op
= ((i
.types
[0] & AnyMem
)
1879 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1886 if (! i
.disp_operands
)
1887 fake_zero_displacement
= 1;
1890 /* Operand is just <disp> */
1891 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1893 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1894 i
.types
[op
] &= ~Disp
;
1895 i
.types
[op
] |= Disp16
;
1899 i
.rm
.regmem
= NO_BASE_REGISTER
;
1900 i
.types
[op
] &= ~Disp
;
1901 i
.types
[op
] |= Disp32
;
1904 else /* ! i.base_reg && i.index_reg */
1906 i
.sib
.index
= i
.index_reg
->reg_num
;
1907 i
.sib
.base
= NO_BASE_REGISTER
;
1908 i
.sib
.scale
= i
.log2_scale_factor
;
1909 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1910 i
.types
[op
] &= ~Disp
;
1911 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1914 else if (i
.base_reg
->reg_type
& Reg16
)
1916 switch (i
.base_reg
->reg_num
)
1921 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1922 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1929 if ((i
.types
[op
] & Disp
) == 0)
1931 /* fake (%bp) into 0(%bp) */
1932 i
.types
[op
] |= Disp8
;
1933 fake_zero_displacement
= 1;
1936 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1937 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1939 default: /* (%si) -> 4 or (%di) -> 5 */
1940 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1942 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1944 else /* i.base_reg and 32 bit mode */
1946 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1947 i
.sib
.base
= i
.base_reg
->reg_num
;
1948 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1951 if (i
.disp_operands
== 0)
1953 fake_zero_displacement
= 1;
1954 i
.types
[op
] |= Disp8
;
1957 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1961 i
.sib
.scale
= i
.log2_scale_factor
;
1964 /* <disp>(%esp) becomes two byte modrm
1965 with no index register. We've already
1966 stored the code for esp in i.rm.regmem
1967 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1968 base register besides %esp will not use
1969 the extra modrm byte. */
1970 i
.sib
.index
= NO_INDEX_REGISTER
;
1971 #if ! SCALE1_WHEN_NO_INDEX
1972 /* Another case where we force the second
1974 if (i
.log2_scale_factor
)
1975 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1980 i
.sib
.index
= i
.index_reg
->reg_num
;
1981 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1983 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1986 if (fake_zero_displacement
)
1988 /* Fakes a zero displacement assuming that i.types[op]
1989 holds the correct displacement size. */
1992 exp
= &disp_expressions
[i
.disp_operands
++];
1994 exp
->X_op
= O_constant
;
1995 exp
->X_add_number
= 0;
1996 exp
->X_add_symbol
= (symbolS
*) 0;
1997 exp
->X_op_symbol
= (symbolS
*) 0;
2001 /* Fill in i.rm.reg or i.rm.regmem field with register
2002 operand (if any) based on i.tm.extension_opcode.
2003 Again, we must be careful to make sure that
2004 segment/control/debug/test/MMX registers are coded
2005 into the i.rm.reg field. */
2010 & (Reg
| RegMMX
| RegXMM
2012 | Control
| Debug
| Test
))
2015 & (Reg
| RegMMX
| RegXMM
2017 | Control
| Debug
| Test
))
2020 /* If there is an extension opcode to put here, the
2021 register number must be put into the regmem field. */
2022 if (i
.tm
.extension_opcode
!= None
)
2023 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2025 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2027 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2028 we must set it to 3 to indicate this is a register
2029 operand in the regmem field. */
2030 if (!i
.mem_operands
)
2034 /* Fill in i.rm.reg field with extension opcode (if any). */
2035 if (i
.tm
.extension_opcode
!= None
)
2036 i
.rm
.reg
= i
.tm
.extension_opcode
;
2039 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2041 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2043 as_bad (_("you can't `pop %%cs'"));
2046 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2048 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2052 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2054 /* For the string instructions that allow a segment override
2055 on one of their operands, the default segment is ds. */
2059 /* If a segment was explicitly specified,
2060 and the specified segment is not the default,
2061 use an opcode prefix to select it.
2062 If we never figured out what the default segment is,
2063 then default_seg will be zero at this point,
2064 and the specified segment prefix will always be used. */
2065 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2067 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2071 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2073 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2074 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2078 /* Handle conversion of 'int $3' --> special int3 insn. */
2079 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2081 i
.tm
.base_opcode
= INT3_OPCODE
;
2085 if ((i
.tm
.opcode_modifier
& (Jump
| JumpByte
| JumpDword
))
2086 && i
.disps
[0]->X_op
== O_constant
)
2088 /* Convert "jmp constant" (and "call constant") to a jump (call) to
2089 the absolute address given by the constant. Since ix86 jumps and
2090 calls are pc relative, we need to generate a reloc. */
2091 i
.disps
[0]->X_add_symbol
= &abs_symbol
;
2092 i
.disps
[0]->X_op
= O_symbol
;
2095 /* We are ready to output the insn. */
2100 if (i
.tm
.opcode_modifier
& Jump
)
2107 if (flag_16bit_code
)
2111 if (i
.prefix
[DATA_PREFIX
])
2122 if (i
.prefixes
!= 0 && !intel_syntax
)
2123 as_warn (_("skipping prefixes on this instruction"));
2125 /* It's always a symbol; End frag & setup for relax.
2126 Make sure there is enough room in this frag for the largest
2127 instruction we may generate in md_convert_frag. This is 2
2128 bytes for the opcode and room for the prefix and largest
2130 frag_grow (prefix
+ 2 + size
);
2131 insn_size
+= prefix
+ 1;
2132 /* Prefix and 1 opcode byte go in fr_fix. */
2133 p
= frag_more (prefix
+ 1);
2135 *p
++ = DATA_PREFIX_OPCODE
;
2136 *p
= i
.tm
.base_opcode
;
2137 /* 1 possible extra opcode + displacement go in fr_var. */
2138 frag_var (rs_machine_dependent
,
2141 ((unsigned char) *p
== JUMP_PC_RELATIVE
2142 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2143 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2144 i
.disps
[0]->X_add_symbol
,
2145 i
.disps
[0]->X_add_number
,
2148 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2152 if (i
.tm
.opcode_modifier
& JumpByte
)
2154 /* This is a loop or jecxz type instruction. */
2156 if (i
.prefix
[ADDR_PREFIX
])
2159 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2168 if (flag_16bit_code
)
2171 if (i
.prefix
[DATA_PREFIX
])
2174 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2184 if (i
.prefixes
!= 0 && !intel_syntax
)
2185 as_warn (_("skipping prefixes on this instruction"));
2187 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2189 insn_size
+= 1 + size
;
2190 p
= frag_more (1 + size
);
2194 /* opcode can be at most two bytes */
2195 insn_size
+= 2 + size
;
2196 p
= frag_more (2 + size
);
2197 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2199 *p
++ = i
.tm
.base_opcode
& 0xff;
2201 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2202 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2204 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2211 if (flag_16bit_code
)
2215 if (i
.prefix
[DATA_PREFIX
])
2226 if (i
.prefixes
!= 0 && !intel_syntax
)
2227 as_warn (_("skipping prefixes on this instruction"));
2229 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2230 p
= frag_more (prefix
+ 1 + 2 + size
);
2232 *p
++ = DATA_PREFIX_OPCODE
;
2233 *p
++ = i
.tm
.base_opcode
;
2234 if (i
.imms
[1]->X_op
== O_constant
)
2236 long n
= (long) i
.imms
[1]->X_add_number
;
2238 if (size
== 2 && !fits_in_unsigned_word (n
))
2240 as_bad (_("16-bit jump out of range"));
2243 md_number_to_chars (p
, (valueT
) n
, size
);
2246 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2247 i
.imms
[1], 0, reloc (size
, 0, i
.disp_reloc
[0]));
2248 if (i
.imms
[0]->X_op
!= O_constant
)
2249 as_bad (_("can't handle non absolute segment in `%s'"),
2251 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2255 /* Output normal instructions here. */
2258 /* The prefix bytes. */
2260 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2267 md_number_to_chars (p
, (valueT
) *q
, 1);
2271 /* Now the opcode; be careful about word order here! */
2272 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2275 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2277 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2281 /* put out high byte first: can't use md_number_to_chars! */
2282 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2283 *p
= i
.tm
.base_opcode
& 0xff;
2286 { /* opcode is either 3 or 4 bytes */
2287 if (i
.tm
.base_opcode
& 0xff000000)
2291 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2298 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2299 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2300 *p
= (i
.tm
.base_opcode
) & 0xff;
2303 /* Now the modrm byte and sib byte (if present). */
2304 if (i
.tm
.opcode_modifier
& Modrm
)
2308 md_number_to_chars (p
,
2309 (valueT
) (i
.rm
.regmem
<< 0
2313 /* If i.rm.regmem == ESP (4)
2314 && i.rm.mode != (Register mode)
2316 ==> need second modrm byte. */
2317 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2319 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2323 md_number_to_chars (p
,
2324 (valueT
) (i
.sib
.base
<< 0
2326 | i
.sib
.scale
<< 6),
2331 if (i
.disp_operands
)
2333 register unsigned int n
;
2335 for (n
= 0; n
< i
.operands
; n
++)
2339 if (i
.disps
[n
]->X_op
== O_constant
)
2342 long val
= (long) i
.disps
[n
]->X_add_number
;
2344 if (i
.types
[n
] & (Disp8
| Disp16
))
2349 mask
= ~ (long) 0xffff;
2350 if (i
.types
[n
] & Disp8
)
2353 mask
= ~ (long) 0xff;
2356 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2357 as_warn (_("%ld shortened to %ld"),
2361 p
= frag_more (size
);
2362 md_number_to_chars (p
, (valueT
) val
, size
);
2364 else if (i
.types
[n
] & Disp32
)
2368 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2370 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2373 { /* must be Disp16 */
2376 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2378 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2382 } /* end displacement output */
2384 /* output immediate */
2387 register unsigned int n
;
2389 for (n
= 0; n
< i
.operands
; n
++)
2393 if (i
.imms
[n
]->X_op
== O_constant
)
2396 long val
= (long) i
.imms
[n
]->X_add_number
;
2398 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2403 mask
= ~ (long) 0xffff;
2404 if (i
.types
[n
] & (Imm8
| Imm8S
))
2407 mask
= ~ (long) 0xff;
2409 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2410 as_warn (_("%ld shortened to %ld"),
2414 p
= frag_more (size
);
2415 md_number_to_chars (p
, (valueT
) val
, size
);
2418 { /* not absolute_section */
2419 /* Need a 32-bit fixup (don't support 8bit
2420 non-absolute ims). Try to support other
2422 #ifdef BFD_ASSEMBLER
2423 enum bfd_reloc_code_real reloc_type
;
2430 if (i
.types
[n
] & (Imm8
| Imm8S
))
2432 else if (i
.types
[n
] & Imm16
)
2437 p
= frag_more (size
);
2438 reloc_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2439 #ifdef BFD_ASSEMBLER
2440 if (reloc_type
== BFD_RELOC_32
2442 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2443 && (i
.imms
[n
]->X_op
== O_symbol
2444 || (i
.imms
[n
]->X_op
== O_add
2445 && ((symbol_get_value_expression
2446 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2449 reloc_type
= BFD_RELOC_386_GOTPC
;
2450 i
.imms
[n
]->X_add_number
+= 3;
2453 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2454 i
.imms
[n
], pcrel
, reloc_type
);
2458 } /* end immediate output */
2466 #endif /* DEBUG386 */
2470 static int i386_immediate
PARAMS ((char *));
2473 i386_immediate (imm_start
)
2476 char *save_input_line_pointer
;
2480 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2482 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2486 exp
= &im_expressions
[i
.imm_operands
++];
2487 i
.imms
[this_operand
] = exp
;
2489 if (is_space_char (*imm_start
))
2492 save_input_line_pointer
= input_line_pointer
;
2493 input_line_pointer
= imm_start
;
2498 * We can have operands of the form
2499 * <symbol>@GOTOFF+<nnn>
2500 * Take the easy way out here and copy everything
2501 * into a temporary buffer...
2505 cp
= strchr (input_line_pointer
, '@');
2512 /* GOT relocations are not supported in 16 bit mode */
2513 if (flag_16bit_code
)
2514 as_bad (_("GOT relocations not supported in 16 bit mode"));
2516 if (GOT_symbol
== NULL
)
2517 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2519 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2521 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2524 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2526 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2529 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2531 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2535 as_bad (_("Bad reloc specifier in expression"));
2537 /* Replace the relocation token with ' ', so that errors like
2538 foo@GOTOFF1 will be detected. */
2539 first
= cp
- input_line_pointer
;
2540 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2541 memcpy (tmpbuf
, input_line_pointer
, first
);
2542 tmpbuf
[first
] = ' ';
2543 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2544 input_line_pointer
= tmpbuf
;
2549 exp_seg
= expression (exp
);
2552 if (*input_line_pointer
)
2553 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2555 input_line_pointer
= save_input_line_pointer
;
2557 if (exp
->X_op
== O_absent
|| exp
->X_op
== O_big
)
2559 /* missing or bad expr becomes absolute 0 */
2560 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2562 exp
->X_op
= O_constant
;
2563 exp
->X_add_number
= 0;
2564 exp
->X_add_symbol
= (symbolS
*) 0;
2565 exp
->X_op_symbol
= (symbolS
*) 0;
2568 if (exp
->X_op
== O_constant
)
2571 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2574 i
.types
[this_operand
] |=
2575 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2577 /* If a suffix is given, this operand may be shortened. */
2580 case WORD_MNEM_SUFFIX
:
2581 i
.types
[this_operand
] |= Imm16
;
2583 case BYTE_MNEM_SUFFIX
:
2584 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2588 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
2590 #ifdef BFD_ASSEMBLER
2591 OUTPUT_FLAVOR
== bfd_target_aout_flavour
&&
2593 exp_seg
!= text_section
2594 && exp_seg
!= data_section
2595 && exp_seg
!= bss_section
2596 && exp_seg
!= undefined_section
2597 #ifdef BFD_ASSEMBLER
2598 && !bfd_is_com_section (exp_seg
)
2602 #ifdef BFD_ASSEMBLER
2603 as_bad (_("Unimplemented segment %s in operand"), exp_seg
->name
);
2605 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2612 /* This is an address. The size of the address will be
2613 determined later, depending on destination register,
2614 suffix, or the default for the section. We exclude
2615 Imm8S here so that `push $foo' and other instructions
2616 with an Imm8S form will use Imm16 or Imm32. */
2617 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2623 static int i386_scale
PARAMS ((char *));
2629 if (!isdigit (*scale
))
2636 i
.log2_scale_factor
= 0;
2639 i
.log2_scale_factor
= 1;
2642 i
.log2_scale_factor
= 2;
2645 i
.log2_scale_factor
= 3;
2649 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2653 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2655 as_warn (_("scale factor of %d without an index register"),
2656 1 << i
.log2_scale_factor
);
2657 #if SCALE1_WHEN_NO_INDEX
2658 i
.log2_scale_factor
= 0;
2664 static int i386_displacement
PARAMS ((char *, char *));
2667 i386_displacement (disp_start
, disp_end
)
2671 register expressionS
*exp
;
2673 char *save_input_line_pointer
;
2674 int bigdisp
= Disp32
;
2676 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2678 i
.types
[this_operand
] |= bigdisp
;
2680 exp
= &disp_expressions
[i
.disp_operands
];
2681 i
.disps
[this_operand
] = exp
;
2682 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2684 save_input_line_pointer
= input_line_pointer
;
2685 input_line_pointer
= disp_start
;
2686 END_STRING_AND_SAVE (disp_end
);
2688 #ifndef GCC_ASM_O_HACK
2689 #define GCC_ASM_O_HACK 0
2692 END_STRING_AND_SAVE (disp_end
+ 1);
2693 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2694 && displacement_string_end
[-1] == '+')
2696 /* This hack is to avoid a warning when using the "o"
2697 constraint within gcc asm statements.
2700 #define _set_tssldt_desc(n,addr,limit,type) \
2701 __asm__ __volatile__ ( \
2703 "movw %w1,2+%0\n\t" \
2705 "movb %b1,4+%0\n\t" \
2706 "movb %4,5+%0\n\t" \
2707 "movb $0,6+%0\n\t" \
2708 "movb %h1,7+%0\n\t" \
2710 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2712 This works great except that the output assembler ends
2713 up looking a bit weird if it turns out that there is
2714 no offset. You end up producing code that looks like:
2727 So here we provide the missing zero.
2730 *displacement_string_end
= '0';
2736 * We can have operands of the form
2737 * <symbol>@GOTOFF+<nnn>
2738 * Take the easy way out here and copy everything
2739 * into a temporary buffer...
2743 cp
= strchr (input_line_pointer
, '@');
2750 /* GOT relocations are not supported in 16 bit mode */
2751 if (flag_16bit_code
)
2752 as_bad (_("GOT relocations not supported in 16 bit mode"));
2754 if (GOT_symbol
== NULL
)
2755 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2757 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2759 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2762 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2764 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2767 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2769 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2773 as_bad (_("Bad reloc specifier in expression"));
2775 /* Replace the relocation token with ' ', so that errors like
2776 foo@GOTOFF1 will be detected. */
2777 first
= cp
- input_line_pointer
;
2778 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2779 memcpy (tmpbuf
, input_line_pointer
, first
);
2780 tmpbuf
[first
] = ' ';
2781 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2782 input_line_pointer
= tmpbuf
;
2787 exp_seg
= expression (exp
);
2789 #ifdef BFD_ASSEMBLER
2790 /* We do this to make sure that the section symbol is in
2791 the symbol table. We will ultimately change the relocation
2792 to be relative to the beginning of the section */
2793 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2795 if (S_IS_LOCAL(exp
->X_add_symbol
)
2796 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2797 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2798 assert (exp
->X_op
== O_symbol
);
2799 exp
->X_op
= O_subtract
;
2800 exp
->X_op_symbol
= GOT_symbol
;
2801 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2806 if (*input_line_pointer
)
2807 as_bad (_("Ignoring junk `%s' after expression"),
2808 input_line_pointer
);
2810 RESTORE_END_STRING (disp_end
+ 1);
2812 RESTORE_END_STRING (disp_end
);
2813 input_line_pointer
= save_input_line_pointer
;
2815 if (exp
->X_op
== O_absent
|| exp
->X_op
== O_big
)
2817 /* missing or bad expr becomes absolute 0 */
2818 as_bad (_("Missing or invalid displacement expression `%s' taken as 0"),
2820 exp
->X_op
= O_constant
;
2821 exp
->X_add_number
= 0;
2822 exp
->X_add_symbol
= (symbolS
*) 0;
2823 exp
->X_op_symbol
= (symbolS
*) 0;
2826 if (exp
->X_op
== O_constant
)
2828 if (fits_in_signed_byte (exp
->X_add_number
))
2829 i
.types
[this_operand
] |= Disp8
;
2831 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
2833 #ifdef BFD_ASSEMBLER
2834 OUTPUT_FLAVOR
== bfd_target_aout_flavour
&&
2836 exp_seg
!= text_section
2837 && exp_seg
!= data_section
2838 && exp_seg
!= bss_section
2839 && exp_seg
!= undefined_section
)
2841 #ifdef BFD_ASSEMBLER
2842 as_bad (_("Unimplemented segment %s in operand"), exp_seg
->name
);
2844 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2852 static int i386_operand_modifier
PARAMS ((char **, int));
2855 i386_operand_modifier (op_string
, got_a_float
)
2859 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2861 i
.suffix
= BYTE_MNEM_SUFFIX
;
2866 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2868 i
.suffix
= WORD_MNEM_SUFFIX
;
2873 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2876 i
.suffix
= SHORT_MNEM_SUFFIX
;
2878 i
.suffix
= LONG_MNEM_SUFFIX
;
2883 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2885 i
.suffix
= DWORD_MNEM_SUFFIX
;
2890 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2892 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2897 else if (!strncasecmp (*op_string
, "SHORT", 5))
2903 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2909 else if (!strncasecmp (*op_string
, "FLAT", 4))
2915 else return NONE_FOUND
;
2918 static char * build_displacement_string
PARAMS ((int, char *));
2921 build_displacement_string (initial_disp
, op_string
)
2925 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2926 char *end_of_operand_string
;
2930 temp_string
[0] = '\0';
2931 tc
= end_of_operand_string
= strchr (op_string
, '[');
2932 if ( initial_disp
&& !end_of_operand_string
)
2934 strcpy (temp_string
, op_string
);
2935 return (temp_string
);
2938 /* Build the whole displacement string */
2941 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2942 temp_string
[end_of_operand_string
- op_string
] = '\0';
2946 temp_disp
= op_string
;
2948 while (*temp_disp
!= '\0')
2951 int add_minus
= (*temp_disp
== '-');
2953 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2956 if (is_space_char (*temp_disp
))
2959 /* Don't consider registers */
2960 if ( !((*temp_disp
== REGISTER_PREFIX
|| allow_naked_reg
)
2961 && parse_register (temp_disp
, &end_op
)) )
2963 char *string_start
= temp_disp
;
2965 while (*temp_disp
!= ']'
2966 && *temp_disp
!= '+'
2967 && *temp_disp
!= '-'
2968 && *temp_disp
!= '*')
2972 strcat (temp_string
, "-");
2974 strcat (temp_string
, "+");
2976 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2977 if (*temp_disp
== '+' || *temp_disp
== '-')
2981 while (*temp_disp
!= '\0'
2982 && *temp_disp
!= '+'
2983 && *temp_disp
!= '-')
2990 static int i386_parse_seg
PARAMS ((char *));
2993 i386_parse_seg (op_string
)
2996 if (is_space_char (*op_string
))
2999 /* Should be one of es, cs, ss, ds fs or gs */
3000 switch (*op_string
++)
3003 i
.seg
[i
.mem_operands
] = &es
;
3006 i
.seg
[i
.mem_operands
] = &cs
;
3009 i
.seg
[i
.mem_operands
] = &ss
;
3012 i
.seg
[i
.mem_operands
] = &ds
;
3015 i
.seg
[i
.mem_operands
] = &fs
;
3018 i
.seg
[i
.mem_operands
] = &gs
;
3021 as_bad (_("bad segment name `%s'"), op_string
);
3025 if (*op_string
++ != 's')
3027 as_bad (_("bad segment name `%s'"), op_string
);
3031 if (is_space_char (*op_string
))
3034 if (*op_string
!= ':')
3036 as_bad (_("bad segment name `%s'"), op_string
);
3044 static int i386_index_check
PARAMS((const char *));
3046 /* Make sure the memory operand we've been dealt is valid.
3047 Returns 1 on success, 0 on a failure.
3050 i386_index_check (operand_string
)
3051 const char *operand_string
;
3053 #if INFER_ADDR_PREFIX
3058 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3059 /* 16 bit mode checks */
3061 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3062 != (Reg16
|BaseIndex
)))
3064 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3065 != (Reg16
|BaseIndex
))
3067 && i
.base_reg
->reg_num
< 6
3068 && i
.index_reg
->reg_num
>= 6
3069 && i
.log2_scale_factor
== 0)))) :
3070 /* 32 bit mode checks */
3072 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3074 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3075 != (Reg32
|BaseIndex
)))))
3077 #if INFER_ADDR_PREFIX
3078 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3080 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3082 /* Change the size of any displacement too. At most one of
3083 Disp16 or Disp32 is set.
3084 FIXME. There doesn't seem to be any real need for separate
3085 Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
3086 Removing them would probably clean up the code quite a lot.
3088 if (i
.types
[this_operand
] & (Disp16
|Disp32
))
3089 i
.types
[this_operand
] ^= (Disp16
|Disp32
);
3094 as_bad (_("`%s' is not a valid base/index expression"),
3098 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3100 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3106 static int i386_intel_memory_operand
PARAMS ((char *));
3109 i386_intel_memory_operand (operand_string
)
3110 char *operand_string
;
3112 char *op_string
= operand_string
;
3113 char *end_of_operand_string
;
3115 if ((i
.mem_operands
== 1
3116 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3117 || i
.mem_operands
== 2)
3119 as_bad (_("too many memory references for `%s'"),
3120 current_templates
->start
->name
);
3124 /* Look for displacement preceding open bracket */
3125 if (*op_string
!= '[')
3130 end_seg
= strchr (op_string
, ':');
3133 if (!i386_parse_seg (op_string
))
3135 op_string
= end_seg
+ 1;
3138 temp_string
= build_displacement_string (true, op_string
);
3140 if (i
.disp_operands
== 0 &&
3141 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3144 end_of_operand_string
= strchr (op_string
, '[');
3145 if (!end_of_operand_string
)
3146 end_of_operand_string
= op_string
+ strlen (op_string
);
3148 if (is_space_char (*end_of_operand_string
))
3149 --end_of_operand_string
;
3151 op_string
= end_of_operand_string
;
3154 if (*op_string
== '[')
3158 /* Pick off each component and figure out where it belongs */
3160 end_of_operand_string
= op_string
;
3162 while (*op_string
!= ']')
3164 const reg_entry
*temp_reg
;
3168 while (*end_of_operand_string
!= '+'
3169 && *end_of_operand_string
!= '-'
3170 && *end_of_operand_string
!= '*'
3171 && *end_of_operand_string
!= ']')
3172 end_of_operand_string
++;
3174 temp_string
= op_string
;
3175 if (*temp_string
== '+')
3178 if (is_space_char (*temp_string
))
3182 if ((*temp_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3183 && (temp_reg
= parse_register (temp_string
, &end_op
)) != NULL
)
3185 if (i
.base_reg
== NULL
)
3186 i
.base_reg
= temp_reg
;
3188 i
.index_reg
= temp_reg
;
3190 i
.types
[this_operand
] |= BaseIndex
;
3192 else if (*temp_string
== REGISTER_PREFIX
)
3194 as_bad (_("bad register name `%s'"), temp_string
);
3197 else if (is_digit_char (*op_string
)
3198 || *op_string
== '+' || *op_string
== '-')
3200 temp_string
= build_displacement_string (false, op_string
);
3202 if (*temp_string
== '+')
3205 if (i
.disp_operands
== 0 &&
3206 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3210 end_of_operand_string
= op_string
;
3211 while (*end_of_operand_string
!= ']'
3212 && *end_of_operand_string
!= '+'
3213 && *end_of_operand_string
!= '-'
3214 && *end_of_operand_string
!= '*')
3215 ++end_of_operand_string
;
3217 else if (*op_string
== '*')
3221 if (i
.base_reg
&& !i
.index_reg
)
3223 i
.index_reg
= i
.base_reg
;
3227 if (!i386_scale (op_string
))
3230 op_string
= end_of_operand_string
;
3231 ++end_of_operand_string
;
3235 if (i386_index_check (operand_string
) == 0)
3243 i386_intel_operand (operand_string
, got_a_float
)
3244 char *operand_string
;
3247 const reg_entry
* r
;
3249 char *op_string
= operand_string
;
3251 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3252 if (is_space_char (*op_string
))
3255 switch (operand_modifier
)
3262 if (!i386_intel_memory_operand (op_string
))
3268 if (!i386_immediate (op_string
))
3274 /* Should be register or immediate */
3275 if (is_digit_char (*op_string
)
3276 && strchr (op_string
, '[') == 0)
3278 if (!i386_immediate (op_string
))
3281 else if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3282 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3284 /* Check for a segment override by searching for ':' after a
3285 segment register. */
3287 if (is_space_char (*op_string
))
3289 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3294 i
.seg
[i
.mem_operands
] = &es
;
3297 i
.seg
[i
.mem_operands
] = &cs
;
3300 i
.seg
[i
.mem_operands
] = &ss
;
3303 i
.seg
[i
.mem_operands
] = &ds
;
3306 i
.seg
[i
.mem_operands
] = &fs
;
3309 i
.seg
[i
.mem_operands
] = &gs
;
3314 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3315 i
.regs
[this_operand
] = r
;
3318 else if (*op_string
== REGISTER_PREFIX
)
3320 as_bad (_("bad register name `%s'"), op_string
);
3323 else if (!i386_intel_memory_operand (op_string
))
3332 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3336 i386_operand (operand_string
)
3337 char *operand_string
;
3341 char *op_string
= operand_string
;
3343 if (is_space_char (*op_string
))
3346 /* We check for an absolute prefix (differentiating,
3347 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3348 if (*op_string
== ABSOLUTE_PREFIX
)
3351 if (is_space_char (*op_string
))
3353 i
.types
[this_operand
] |= JumpAbsolute
;
3356 /* Check if operand is a register. */
3357 if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3358 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3360 /* Check for a segment override by searching for ':' after a
3361 segment register. */
3363 if (is_space_char (*op_string
))
3365 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3370 i
.seg
[i
.mem_operands
] = &es
;
3373 i
.seg
[i
.mem_operands
] = &cs
;
3376 i
.seg
[i
.mem_operands
] = &ss
;
3379 i
.seg
[i
.mem_operands
] = &ds
;
3382 i
.seg
[i
.mem_operands
] = &fs
;
3385 i
.seg
[i
.mem_operands
] = &gs
;
3389 /* Skip the ':' and whitespace. */
3391 if (is_space_char (*op_string
))
3394 if (!is_digit_char (*op_string
)
3395 && !is_identifier_char (*op_string
)
3396 && *op_string
!= '('
3397 && *op_string
!= ABSOLUTE_PREFIX
)
3399 as_bad (_("bad memory operand `%s'"), op_string
);
3402 /* Handle case of %es:*foo. */
3403 if (*op_string
== ABSOLUTE_PREFIX
)
3406 if (is_space_char (*op_string
))
3408 i
.types
[this_operand
] |= JumpAbsolute
;
3410 goto do_memory_reference
;
3414 as_bad (_("Junk `%s' after register"), op_string
);
3417 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3418 i
.regs
[this_operand
] = r
;
3421 else if (*op_string
== REGISTER_PREFIX
)
3423 as_bad (_("bad register name `%s'"), op_string
);
3426 else if (*op_string
== IMMEDIATE_PREFIX
)
3427 { /* ... or an immediate */
3429 if (i
.types
[this_operand
] & JumpAbsolute
)
3431 as_bad (_("Immediate operand illegal with absolute jump"));
3434 if (!i386_immediate (op_string
))
3437 else if (is_digit_char (*op_string
)
3438 || is_identifier_char (*op_string
)
3439 || *op_string
== '(' )
3441 /* This is a memory reference of some sort. */
3444 /* Start and end of displacement string expression (if found). */
3445 char *displacement_string_start
;
3446 char *displacement_string_end
;
3448 do_memory_reference
:
3449 if ((i
.mem_operands
== 1
3450 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3451 || i
.mem_operands
== 2)
3453 as_bad (_("too many memory references for `%s'"),
3454 current_templates
->start
->name
);
3458 /* Check for base index form. We detect the base index form by
3459 looking for an ')' at the end of the operand, searching
3460 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3462 base_string
= op_string
+ strlen (op_string
);
3465 if (is_space_char (*base_string
))
3468 /* If we only have a displacement, set-up for it to be parsed later. */
3469 displacement_string_start
= op_string
;
3470 displacement_string_end
= base_string
+ 1;
3472 if (*base_string
== ')')
3475 unsigned int parens_balanced
= 1;
3476 /* We've already checked that the number of left & right ()'s are
3477 equal, so this loop will not be infinite. */
3481 if (*base_string
== ')')
3483 if (*base_string
== '(')
3486 while (parens_balanced
);
3488 temp_string
= base_string
;
3490 /* Skip past '(' and whitespace. */
3492 if (is_space_char (*base_string
))
3495 if (*base_string
== ','
3496 || ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3497 && (i
.base_reg
= parse_register (base_string
, &end_op
)) != NULL
))
3499 displacement_string_end
= temp_string
;
3501 i
.types
[this_operand
] |= BaseIndex
;
3505 base_string
= end_op
;
3506 if (is_space_char (*base_string
))
3510 /* There may be an index reg or scale factor here. */
3511 if (*base_string
== ',')
3514 if (is_space_char (*base_string
))
3517 if ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3518 && (i
.index_reg
= parse_register (base_string
, &end_op
)) != NULL
)
3520 base_string
= end_op
;
3521 if (is_space_char (*base_string
))
3523 if (*base_string
== ',')
3526 if (is_space_char (*base_string
))
3529 else if (*base_string
!= ')' )
3531 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3536 else if (*base_string
== REGISTER_PREFIX
)
3538 as_bad (_("bad register name `%s'"), base_string
);
3542 /* Check for scale factor. */
3543 if (isdigit ((unsigned char) *base_string
))
3545 if (!i386_scale (base_string
))
3549 if (is_space_char (*base_string
))
3551 if (*base_string
!= ')')
3553 as_bad (_("expecting `)' after scale factor in `%s'"),
3558 else if (!i
.index_reg
)
3560 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3565 else if (*base_string
!= ')')
3567 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3572 else if (*base_string
== REGISTER_PREFIX
)
3574 as_bad (_("bad register name `%s'"), base_string
);
3579 /* If there's an expression beginning the operand, parse it,
3580 assuming displacement_string_start and
3581 displacement_string_end are meaningful. */
3582 if (displacement_string_start
!= displacement_string_end
)
3584 if (!i386_displacement (displacement_string_start
,
3585 displacement_string_end
))
3589 /* Special case for (%dx) while doing input/output op. */
3591 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3593 && i
.log2_scale_factor
== 0
3594 && i
.seg
[i
.mem_operands
] == 0
3595 && (i
.types
[this_operand
] & Disp
) == 0)
3597 i
.types
[this_operand
] = InOutPortReg
;
3601 if (i386_index_check (operand_string
) == 0)
3606 { /* it's not a memory operand; argh! */
3607 as_bad (_("invalid char %s beginning operand %d `%s'"),
3608 output_invalid (*op_string
),
3613 return 1; /* normal return */
3617 * md_estimate_size_before_relax()
3619 * Called just before relax().
3620 * Any symbol that is now undefined will not become defined.
3621 * Return the correct fr_subtype in the frag.
3622 * Return the initial "guess for fr_var" to caller.
3623 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3624 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3625 * Although it may not be explicit in the frag, pretend fr_var starts with a
3629 md_estimate_size_before_relax (fragP
, segment
)
3630 register fragS
*fragP
;
3631 register segT segment
;
3633 register unsigned char *opcode
;
3634 register int old_fr_fix
;
3636 old_fr_fix
= fragP
->fr_fix
;
3637 opcode
= (unsigned char *) fragP
->fr_opcode
;
3638 /* We've already got fragP->fr_subtype right; all we have to do is
3639 check for un-relaxable symbols. */
3640 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3642 /* symbol is undefined in this segment */
3643 int code16
= fragP
->fr_subtype
& CODE16
;
3644 int size
= code16
? 2 : 4;
3645 #ifdef BFD_ASSEMBLER
3646 enum bfd_reloc_code_real reloc_type
;
3651 if (GOT_symbol
/* Not quite right - we should switch on presence of
3652 @PLT, but I cannot see how to get to that from
3653 here. We should have done this in md_assemble to
3654 really get it right all of the time, but I think it
3655 does not matter that much, as this will be right
3656 most of the time. ERY */
3657 && S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3658 reloc_type
= BFD_RELOC_386_PLT32
;
3660 reloc_type
= BFD_RELOC_16_PCREL
;
3662 reloc_type
= BFD_RELOC_32_PCREL
;
3666 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3667 opcode
[0] = 0xe9; /* dword disp jmp */
3668 fragP
->fr_fix
+= size
;
3669 fix_new (fragP
, old_fr_fix
, size
,
3671 fragP
->fr_offset
, 1,
3676 /* This changes the byte-displacement jump 0x7N
3677 to the dword-displacement jump 0x0f,0x8N. */
3678 opcode
[1] = opcode
[0] + 0x10;
3679 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3680 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3681 fix_new (fragP
, old_fr_fix
+ 1, size
,
3683 fragP
->fr_offset
, 1,
3689 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3690 } /* md_estimate_size_before_relax() */
3693 * md_convert_frag();
3695 * Called after relax() is finished.
3696 * In: Address of frag.
3697 * fr_type == rs_machine_dependent.
3698 * fr_subtype is what the address relaxed to.
3700 * Out: Any fixSs and constants are set up.
3701 * Caller will turn frag into a ".space 0".
3703 #ifndef BFD_ASSEMBLER
3705 md_convert_frag (headers
, sec
, fragP
)
3706 object_headers
*headers ATTRIBUTE_UNUSED
;
3707 segT sec ATTRIBUTE_UNUSED
;
3708 register fragS
*fragP
;
3711 md_convert_frag (abfd
, sec
, fragP
)
3712 bfd
*abfd ATTRIBUTE_UNUSED
;
3713 segT sec ATTRIBUTE_UNUSED
;
3714 register fragS
*fragP
;
3717 register unsigned char *opcode
;
3718 unsigned char *where_to_put_displacement
= NULL
;
3719 unsigned int target_address
;
3720 unsigned int opcode_address
;
3721 unsigned int extension
= 0;
3722 int displacement_from_opcode_start
;
3724 opcode
= (unsigned char *) fragP
->fr_opcode
;
3726 /* Address we want to reach in file space. */
3727 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3728 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3729 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3732 /* Address opcode resides at in file space. */
3733 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3735 /* Displacement from opcode start to fill into instruction. */
3736 displacement_from_opcode_start
= target_address
- opcode_address
;
3738 switch (fragP
->fr_subtype
)
3740 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3741 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3742 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3743 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3744 /* don't have to change opcode */
3745 extension
= 1; /* 1 opcode + 1 displacement */
3746 where_to_put_displacement
= &opcode
[1];
3749 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3750 extension
= 5; /* 2 opcode + 4 displacement */
3751 opcode
[1] = opcode
[0] + 0x10;
3752 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3753 where_to_put_displacement
= &opcode
[2];
3756 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3757 extension
= 4; /* 1 opcode + 4 displacement */
3759 where_to_put_displacement
= &opcode
[1];
3762 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3763 extension
= 3; /* 2 opcode + 2 displacement */
3764 opcode
[1] = opcode
[0] + 0x10;
3765 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3766 where_to_put_displacement
= &opcode
[2];
3769 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3770 extension
= 2; /* 1 opcode + 2 displacement */
3772 where_to_put_displacement
= &opcode
[1];
3776 BAD_CASE (fragP
->fr_subtype
);
3779 /* now put displacement after opcode */
3780 md_number_to_chars ((char *) where_to_put_displacement
,
3781 (valueT
) (displacement_from_opcode_start
- extension
),
3782 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3783 fragP
->fr_fix
+= extension
;
3787 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3788 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3789 const int md_reloc_size
= 8; /* Size of relocation record */
3792 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3794 addressT from_addr
, to_addr
;
3795 fragS
*frag ATTRIBUTE_UNUSED
;
3796 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3800 offset
= to_addr
- (from_addr
+ 2);
3801 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3802 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3806 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3808 addressT from_addr
, to_addr
;
3814 if (flag_do_long_jump
)
3816 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3817 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3818 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3819 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3820 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3824 offset
= to_addr
- (from_addr
+ 5);
3825 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3826 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3830 /* Apply a fixup (fixS) to segment data, once it has been determined
3831 by our caller that we have all the info we need to fix it up.
3833 On the 386, immediates, displacements, and data pointers are all in
3834 the same (little-endian) format, so we don't need to care about which
3838 md_apply_fix3 (fixP
, valp
, seg
)
3839 fixS
*fixP
; /* The fix we're to put in. */
3840 valueT
*valp
; /* Pointer to the value of the bits. */
3841 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3843 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3844 valueT value
= *valp
;
3846 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3849 switch (fixP
->fx_r_type
)
3855 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3858 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3861 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3866 /* This is a hack. There should be a better way to handle this.
3867 This covers for the fact that bfd_install_relocation will
3868 subtract the current location (for partial_inplace, PC relative
3869 relocations); see more below. */
3870 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3871 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3872 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3876 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3878 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3881 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3883 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3884 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
3886 segT fseg
= S_GET_SEGMENT (fixP
->fx_addsy
);
3889 || (symbol_section_p (fixP
->fx_addsy
)
3890 && fseg
!= absolute_section
))
3891 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3892 && ! S_IS_WEAK (fixP
->fx_addsy
)
3893 && S_IS_DEFINED (fixP
->fx_addsy
)
3894 && ! S_IS_COMMON (fixP
->fx_addsy
))
3896 /* Yes, we add the values in twice. This is because
3897 bfd_perform_relocation subtracts them out again. I think
3898 bfd_perform_relocation is broken, but I don't dare change
3900 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3904 #if defined (OBJ_COFF) && defined (TE_PE)
3905 /* For some reason, the PE format does not store a section
3906 address offset for a PC relative symbol. */
3907 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3908 value
+= md_pcrel_from (fixP
);
3909 else if (S_IS_EXTERNAL (fixP
->fx_addsy
)
3910 || S_IS_WEAK (fixP
->fx_addsy
))
3912 /* We are generating an external relocation for this defined
3913 symbol. We add the address, because
3914 bfd_install_relocation will subtract it. VALUE already
3915 holds the symbol value, because fixup_segment added it
3916 in. We subtract it out, and then we subtract it out
3917 again because bfd_install_relocation will add it in
3919 value
+= md_pcrel_from (fixP
);
3920 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3925 else if (fixP
->fx_addsy
!= NULL
3926 && S_IS_DEFINED (fixP
->fx_addsy
)
3927 && (S_IS_EXTERNAL (fixP
->fx_addsy
)
3928 || S_IS_WEAK (fixP
->fx_addsy
)))
3930 /* We are generating an external relocation for this defined
3931 symbol. VALUE already holds the symbol value, and
3932 bfd_install_relocation will add it in again. We don't want
3934 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3938 /* Fix a few things - the dynamic linker expects certain values here,
3939 and we must not dissappoint it. */
3940 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3941 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3943 switch (fixP
->fx_r_type
) {
3944 case BFD_RELOC_386_PLT32
:
3945 /* Make the jump instruction point to the address of the operand. At
3946 runtime we merely add the offset to the actual PLT entry. */
3949 case BFD_RELOC_386_GOTPC
:
3951 * This is tough to explain. We end up with this one if we have
3952 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3953 * here is to obtain the absolute address of the GOT, and it is strongly
3954 * preferable from a performance point of view to avoid using a runtime
3955 * relocation for this. The actual sequence of instructions often look
3961 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3963 * The call and pop essentially return the absolute address of
3964 * the label .L66 and store it in %ebx. The linker itself will
3965 * ultimately change the first operand of the addl so that %ebx points to
3966 * the GOT, but to keep things simple, the .o file must have this operand
3967 * set so that it generates not the absolute address of .L66, but the
3968 * absolute address of itself. This allows the linker itself simply
3969 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3970 * added in, and the addend of the relocation is stored in the operand
3971 * field for the instruction itself.
3973 * Our job here is to fix the operand so that it would add the correct
3974 * offset so that %ebx would point to itself. The thing that is tricky is
3975 * that .-.L66 will point to the beginning of the instruction, so we need
3976 * to further modify the operand so that it will point to itself.
3977 * There are other cases where you have something like:
3979 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3981 * and here no correction would be required. Internally in the assembler
3982 * we treat operands of this form as not being pcrel since the '.' is
3983 * explicitly mentioned, and I wonder whether it would simplify matters
3984 * to do it this way. Who knows. In earlier versions of the PIC patches,
3985 * the pcrel_adjust field was used to store the correction, but since the
3986 * expression is not pcrel, I felt it would be confusing to do it this way.
3990 case BFD_RELOC_386_GOT32
:
3991 value
= 0; /* Fully resolved at runtime. No addend. */
3993 case BFD_RELOC_386_GOTOFF
:
3996 case BFD_RELOC_VTABLE_INHERIT
:
3997 case BFD_RELOC_VTABLE_ENTRY
:
4004 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4006 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4007 md_number_to_chars (p
, value
, fixP
->fx_size
);
4013 /* This is never used. */
4014 long /* Knows about the byte order in a word. */
4015 md_chars_to_number (con
, nbytes
)
4016 unsigned char con
[]; /* Low order byte 1st. */
4017 int nbytes
; /* Number of bytes in the input. */
4020 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4022 retval
<<= BITS_PER_CHAR
;
4030 #define MAX_LITTLENUMS 6
4032 /* Turn the string pointed to by litP into a floating point constant of type
4033 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4034 is stored in *sizeP . An error message is returned, or NULL on OK. */
4036 md_atof (type
, litP
, sizeP
)
4042 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4043 LITTLENUM_TYPE
*wordP
;
4065 return _("Bad call to md_atof ()");
4067 t
= atof_ieee (input_line_pointer
, type
, words
);
4069 input_line_pointer
= t
;
4071 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4072 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4073 the bigendian 386. */
4074 for (wordP
= words
+ prec
- 1; prec
--;)
4076 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4077 litP
+= sizeof (LITTLENUM_TYPE
);
4082 char output_invalid_buf
[8];
4084 static char * output_invalid
PARAMS ((int));
4091 sprintf (output_invalid_buf
, "'%c'", c
);
4093 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4094 return output_invalid_buf
;
4098 /* REG_STRING starts *before* REGISTER_PREFIX. */
4100 static const reg_entry
*
4101 parse_register (reg_string
, end_op
)
4105 char *s
= reg_string
;
4107 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4110 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4111 if (*s
== REGISTER_PREFIX
)
4114 if (is_space_char (*s
))
4118 while ((*p
++ = register_chars
[(unsigned char) *s
]) != '\0')
4120 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4121 return (const reg_entry
*) NULL
;
4127 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4129 /* Handle floating point regs, allowing spaces in the (i) part. */
4130 if (r
== i386_regtab
/* %st is first entry of table */)
4132 if (is_space_char (*s
))
4137 if (is_space_char (*s
))
4139 if (*s
>= '0' && *s
<= '7')
4141 r
= &i386_float_regtab
[*s
- '0'];
4143 if (is_space_char (*s
))
4151 /* We have "%st(" then garbage */
4152 return (const reg_entry
*) NULL
;
4159 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4160 CONST
char *md_shortopts
= "kmVQ:sq";
4162 CONST
char *md_shortopts
= "m";
4164 struct option md_longopts
[] = {
4165 {NULL
, no_argument
, NULL
, 0}
4167 size_t md_longopts_size
= sizeof (md_longopts
);
4170 md_parse_option (c
, arg
)
4172 char *arg ATTRIBUTE_UNUSED
;
4177 flag_do_long_jump
= 1;
4180 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4181 /* -k: Ignore for FreeBSD compatibility. */
4185 /* -V: SVR4 argument to print version ID. */
4187 print_version_id ();
4190 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4191 should be emitted or not. FIXME: Not implemented. */
4196 /* -s: On i386 Solaris, this tells the native assembler to use
4197 .stab instead of .stab.excl. We always use .stab anyhow. */
4201 /* -q: On i386 Solaris, this tells the native assembler does
4213 md_show_usage (stream
)
4216 fprintf (stream
, _("\
4217 -m do long jump\n"));
4218 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4219 fprintf (stream
, _("\
4220 -V print assembler version number\n\
4228 #ifdef BFD_ASSEMBLER
4229 #if ((defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_COFF)) \
4230 || (defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_AOUT)) \
4231 || (defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)))
4233 /* Pick the target format to use. */
4236 i386_target_format ()
4238 switch (OUTPUT_FLAVOR
)
4240 #ifdef OBJ_MAYBE_AOUT
4241 case bfd_target_aout_flavour
:
4242 return AOUT_TARGET_FORMAT
;
4244 #ifdef OBJ_MAYBE_COFF
4245 case bfd_target_coff_flavour
:
4248 #ifdef OBJ_MAYBE_ELF
4249 case bfd_target_elf_flavour
:
4250 return "elf32-i386";
4258 #endif /* OBJ_MAYBE_ more than one */
4259 #endif /* BFD_ASSEMBLER */
4262 md_undefined_symbol (name
)
4265 if (name
[0] == GLOBAL_OFFSET_TABLE_NAME
[0]
4266 && name
[1] == GLOBAL_OFFSET_TABLE_NAME
[1]
4267 && name
[2] == GLOBAL_OFFSET_TABLE_NAME
[2]
4268 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4272 if (symbol_find (name
))
4273 as_bad (_("GOT already in symbol table"));
4274 GOT_symbol
= symbol_new (name
, undefined_section
,
4275 (valueT
) 0, &zero_address_frag
);
4282 /* Round up a section size to the appropriate boundary. */
4284 md_section_align (segment
, size
)
4285 segT segment ATTRIBUTE_UNUSED
;
4288 #ifdef BFD_ASSEMBLER
4289 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
4290 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
4292 /* For a.out, force the section size to be aligned. If we don't do
4293 this, BFD will align it for us, but it will not write out the
4294 final bytes of the section. This may be a bug in BFD, but it is
4295 easier to fix it here since that is how the other a.out targets
4299 align
= bfd_get_section_alignment (stdoutput
, segment
);
4300 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4308 /* On the i386, PC-relative offsets are relative to the start of the
4309 next instruction. That is, the address of the offset, plus its
4310 size, since the offset is always the last part of the insn. */
4313 md_pcrel_from (fixP
)
4316 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4323 int ignore ATTRIBUTE_UNUSED
;
4327 temp
= get_absolute_expression ();
4328 subseg_set (bss_section
, (subsegT
) temp
);
4329 demand_empty_rest_of_line ();
4335 #ifdef BFD_ASSEMBLER
4338 i386_validate_fix (fixp
)
4341 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4343 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4349 tc_gen_reloc (section
, fixp
)
4350 asection
*section ATTRIBUTE_UNUSED
;
4354 bfd_reloc_code_real_type code
;
4356 switch (fixp
->fx_r_type
)
4358 case BFD_RELOC_386_PLT32
:
4359 case BFD_RELOC_386_GOT32
:
4360 case BFD_RELOC_386_GOTOFF
:
4361 case BFD_RELOC_386_GOTPC
:
4363 case BFD_RELOC_VTABLE_ENTRY
:
4364 case BFD_RELOC_VTABLE_INHERIT
:
4365 code
= fixp
->fx_r_type
;
4370 switch (fixp
->fx_size
)
4373 as_bad (_("Can not do %d byte pc-relative relocation"),
4375 code
= BFD_RELOC_32_PCREL
;
4377 case 1: code
= BFD_RELOC_8_PCREL
; break;
4378 case 2: code
= BFD_RELOC_16_PCREL
; break;
4379 case 4: code
= BFD_RELOC_32_PCREL
; break;
4384 switch (fixp
->fx_size
)
4387 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4388 code
= BFD_RELOC_32
;
4390 case 1: code
= BFD_RELOC_8
; break;
4391 case 2: code
= BFD_RELOC_16
; break;
4392 case 4: code
= BFD_RELOC_32
; break;
4398 if (code
== BFD_RELOC_32
4400 && fixp
->fx_addsy
== GOT_symbol
)
4401 code
= BFD_RELOC_386_GOTPC
;
4403 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4404 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4405 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4407 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4408 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4409 vtable entry to be used in the relocation's section offset. */
4410 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4411 rel
->address
= fixp
->fx_offset
;
4414 rel
->addend
= fixp
->fx_addnumber
;
4418 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4419 if (rel
->howto
== NULL
)
4421 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4422 _("Cannot represent relocation type %s"),
4423 bfd_get_reloc_code_name (code
));
4424 /* Set howto to a garbage value so that we can keep going. */
4425 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4426 assert (rel
->howto
!= NULL
);
4432 #else /* ! BFD_ASSEMBLER */
4434 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4436 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4439 relax_addressT segment_address_in_file
;
4442 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4443 * Out: GNU LD relocation length code: 0, 1, or 2.
4446 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4449 know (fixP
->fx_addsy
!= NULL
);
4451 md_number_to_chars (where
,
4452 (valueT
) (fixP
->fx_frag
->fr_address
4453 + fixP
->fx_where
- segment_address_in_file
),
4456 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4457 ? S_GET_TYPE (fixP
->fx_addsy
)
4458 : fixP
->fx_addsy
->sy_number
);
4460 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4461 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4462 where
[4] = r_symbolnum
& 0x0ff;
4463 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4464 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4465 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4468 #endif /* OBJ_AOUT or OBJ_BOUT */
4470 #if defined (I386COFF)
4473 tc_coff_fix2rtype (fixP
)
4476 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4479 return (fixP
->fx_pcrel
?
4480 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4481 fixP
->fx_size
== 2 ? R_PCRWORD
:
4483 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4484 fixP
->fx_size
== 2 ? R_RELWORD
:
4489 tc_coff_sizemachdep (frag
)
4493 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4498 #endif /* I386COFF */
4500 #endif /* ! BFD_ASSEMBLER */
4502 /* end of tc-i386.c */