| blob | 3ce46162b82f3f8825fda6e9541bb978793b8643 |
1 2006-07-04 Thiemo Seufer <ths@mips.com>
2 David Ung <davidu@mips.com>
4 * config/tc-mips.c (s_is_linkonce): New function.
5 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
6 weak, external, and linkonce symbols.
7 (pic_need_relax): Use s_is_linkonce.
9 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
11 * doc/as.texinfo (Org): Remove space.
12 (P2align): Add "@var{abs-expr},".
14 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
16 * config/tc-i386.c (cpu_arch_tune_set): New.
17 (cpu_arch_isa): Likewise.
18 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
19 nops with short or long nop sequences based on -march=/.arch
20 and -mtune=.
21 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
22 set cpu_arch_tune and cpu_arch_tune_flags.
23 (md_parse_option): For -march=, set cpu_arch_isa and set
24 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
25 0. Set cpu_arch_tune_set to 1 for -mtune=.
26 (i386_target_format): Don't set cpu_arch_tune.
28 2006-06-23 Nigel Stephens <nigel@mips.com>
30 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
31 generated .sbss.* and .gnu.linkonce.sb.*.
33 2006-06-23 Thiemo Seufer <ths@mips.com>
34 David Ung <davidu@mips.com>
36 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
37 label_list.
38 * config/tc-mips.c (label_list): Define per-segment label_list.
39 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
40 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
41 mips_from_file_after_relocs, mips_define_label): Use per-segment
42 label_list.
44 2006-06-22 Thiemo Seufer <ths@mips.com>
46 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
47 (append_insn): Use it.
48 (md_apply_fix): Whitespace formatting.
49 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
50 mips16_extended_frag): Remove register specifier.
51 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
52 constants.
54 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
56 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
57 a directive saving VFP registers for ARMv6 or later.
58 (s_arm_unwind_save): Add parameter arch_v6 and call
59 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
60 appropriate.
61 (md_pseudo_table): Add entry for new "vsave" directive.
62 * doc/c-arm.texi: Correct error in example for "save"
63 directive (fstmdf -> fstmdx). Also document "vsave" directive.
65 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
66 Anatoly Sokolov <aesok@post.ru>
68 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
69 and atmega644p devices. Rename atmega164/atmega324 devices to
70 atmega164p/atmega324p.
71 * doc/c-avr.texi: Document new mcu and arch options.
73 2006-06-17 Nick Clifton <nickc@redhat.com>
75 * config/tc-arm.c (enum parse_operand_result): Move outside of
76 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
78 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
80 * config/tc-i386.h (processor_type): New.
81 (arch_entry): Add type.
83 * config/tc-i386.c (cpu_arch_tune): New.
84 (cpu_arch_tune_flags): Likewise.
85 (cpu_arch_isa_flags): Likewise.
86 (cpu_arch): Updated.
87 (set_cpu_arch): Also update cpu_arch_isa_flags.
88 (md_assemble): Update cpu_arch_isa_flags.
89 (OPTION_MARCH): New.
90 (OPTION_MTUNE): Likewise.
91 (md_longopts): Add -march= and -mtune=.
92 (md_parse_option): Support -march= and -mtune=.
93 (md_show_usage): Add -march=CPU/-mtune=CPU.
94 (i386_target_format): Also update cpu_arch_isa_flags,
95 cpu_arch_tune and cpu_arch_tune_flags.
97 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
99 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
101 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
103 * config/tc-arm.c (enum parse_operand_result): New.
104 (struct group_reloc_table_entry): New.
105 (enum group_reloc_type): New.
106 (group_reloc_table): New array.
107 (find_group_reloc_table_entry): New function.
108 (parse_shifter_operand_group_reloc): New function.
109 (parse_address_main): New function, incorporating code
110 from the old parse_address function. To be used via...
111 (parse_address): wrapper for parse_address_main; and
112 (parse_address_group_reloc): new function, likewise.
113 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
114 OP_ADDRGLDRS, OP_ADDRGLDC.
115 (parse_operands): Support for these new operand codes.
116 New macro po_misc_or_fail_no_backtrack.
117 (encode_arm_cp_address): Preserve group relocations.
118 (insns): Modify to use the above operand codes where group
119 relocations are permitted.
120 (md_apply_fix): Handle the group relocations
121 ALU_PC_G0_NC through LDC_SB_G2.
122 (tc_gen_reloc): Likewise.
123 (arm_force_relocation): Leave group relocations for the linker.
124 (arm_fix_adjustable): Likewise.
126 2006-06-15 Julian Brown <julian@codesourcery.com>
128 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
129 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
130 relocs properly.
132 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
134 * config/tc-i386.c (process_suffix): Don't add rex64 for
135 "xchg %rax,%rax".
137 2006-06-09 Thiemo Seufer <ths@mips.com>
139 * config/tc-mips.c (mips_ip): Maintain argument count.
141 2006-06-09 Alan Modra <amodra@bigpond.net.au>
143 * config/tc-iq2000.c: Include sb.h.
145 2006-06-08 Nigel Stephens <nigel@mips.com>
147 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
148 aliases for better compatibility with SGI tools.
150 2006-06-08 Alan Modra <amodra@bigpond.net.au>
152 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
153 * Makefile.am (GASLIBS): Expand @BFDLIB@.
154 (BFDVER_H): Delete.
155 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
156 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
157 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
158 Run "make dep-am".
159 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
160 * Makefile.in: Regenerate.
161 * doc/Makefile.in: Regenerate.
162 * configure: Regenerate.
164 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
166 * po/Make-in (pdf, ps): New dummy targets.
168 2006-06-07 Julian Brown <julian@codesourcery.com>
170 * config/tc-arm.c (stdarg.h): include.
171 (arm_it): Add uncond_value field. Add isvec and issingle to operand
172 array.
173 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
174 REG_TYPE_NSDQ (single, double or quad vector reg).
175 (reg_expected_msgs): Update.
176 (BAD_FPU): Add macro for unsupported FPU instruction error.
177 (parse_neon_type): Support 'd' as an alias for .f64.
178 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
179 sets of registers.
180 (parse_vfp_reg_list): Don't update first arg on error.
181 (parse_neon_mov): Support extra syntax for VFP moves.
182 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
183 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
184 (parse_operands): Support isvec, issingle operands fields, new parse
185 codes above.
186 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
187 msr variants.
188 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
189 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
190 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
191 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
192 shapes.
193 (neon_shape): Redefine in terms of above.
194 (neon_shape_class): New enumeration, table of shape classes.
195 (neon_shape_el): New enumeration. One element of a shape.
196 (neon_shape_el_size): Register widths of above, where appropriate.
197 (neon_shape_info): New struct. Info for shape table.
198 (neon_shape_tab): New array.
199 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
200 (neon_check_shape): Rewrite as...
201 (neon_select_shape): New function to classify instruction shapes,
202 driven by new table neon_shape_tab array.
203 (neon_quad): New function. Return 1 if shape should set Q flag in
204 instructions (or equivalent), 0 otherwise.
205 (type_chk_of_el_type): Support F64.
206 (el_type_of_type_chk): Likewise.
207 (neon_check_type): Add support for VFP type checking (VFP data
208 elements fill their containing registers).
209 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
210 in thumb mode for VFP instructions.
211 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
212 and encode the current instruction as if it were that opcode.
213 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
214 arguments, call function in PFN.
215 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
216 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
217 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
218 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
219 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
220 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
221 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
222 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
223 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
224 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
225 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
226 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
227 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
228 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
229 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
230 neon_quad.
231 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
232 between VFP and Neon turns out to belong to Neon. Perform
233 architecture check and fill in condition field if appropriate.
234 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
235 (do_neon_cvt): Add support for VFP variants of instructions.
236 (neon_cvt_flavour): Extend to cover VFP conversions.
237 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
238 vmov variants.
239 (do_neon_ldr_str): Handle single-precision VFP load/store.
240 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
241 NS_NULL not NS_IGNORE.
242 (opcode_tag): Add OT_csuffixF for operands which either take a
243 conditional suffix, or have 0xF in the condition field.
244 (md_assemble): Add support for OT_csuffixF.
245 (NCE): Replace macro with...
246 (NCE_tag, NCE, NCEF): New macros.
247 (nCE): Replace macro with...
248 (nCE_tag, nCE, nCEF): New macros.
249 (insns): Add support for VFP insns or VFP versions of insns msr,
250 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
251 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
252 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
253 VFP/Neon insns together.
255 2006-06-07 Alan Modra <amodra@bigpond.net.au>
256 Ladislav Michl <ladis@linux-mips.org>
258 * app.c: Don't include headers already included by as.h.
259 * as.c: Likewise.
260 * atof-generic.c: Likewise.
261 * cgen.c: Likewise.
262 * dwarf2dbg.c: Likewise.
263 * expr.c: Likewise.
264 * input-file.c: Likewise.
265 * input-scrub.c: Likewise.
266 * macro.c: Likewise.
267 * output-file.c: Likewise.
268 * read.c: Likewise.
269 * sb.c: Likewise.
270 * config/bfin-lex.l: Likewise.
271 * config/obj-coff.h: Likewise.
272 * config/obj-elf.h: Likewise.
273 * config/obj-som.h: Likewise.
274 * config/tc-arc.c: Likewise.
275 * config/tc-arm.c: Likewise.
276 * config/tc-avr.c: Likewise.
277 * config/tc-bfin.c: Likewise.
278 * config/tc-cris.c: Likewise.
279 * config/tc-d10v.c: Likewise.
280 * config/tc-d30v.c: Likewise.
281 * config/tc-dlx.h: Likewise.
282 * config/tc-fr30.c: Likewise.
283 * config/tc-frv.c: Likewise.
284 * config/tc-h8300.c: Likewise.
285 * config/tc-hppa.c: Likewise.
286 * config/tc-i370.c: Likewise.
287 * config/tc-i860.c: Likewise.
288 * config/tc-i960.c: Likewise.
289 * config/tc-ip2k.c: Likewise.
290 * config/tc-iq2000.c: Likewise.
291 * config/tc-m32c.c: Likewise.
292 * config/tc-m32r.c: Likewise.
293 * config/tc-maxq.c: Likewise.
294 * config/tc-mcore.c: Likewise.
295 * config/tc-mips.c: Likewise.
296 * config/tc-mmix.c: Likewise.
297 * config/tc-mn10200.c: Likewise.
298 * config/tc-mn10300.c: Likewise.
299 * config/tc-msp430.c: Likewise.
300 * config/tc-mt.c: Likewise.
301 * config/tc-ns32k.c: Likewise.
302 * config/tc-openrisc.c: Likewise.
303 * config/tc-ppc.c: Likewise.
304 * config/tc-s390.c: Likewise.
305 * config/tc-sh.c: Likewise.
306 * config/tc-sh64.c: Likewise.
307 * config/tc-sparc.c: Likewise.
308 * config/tc-tic30.c: Likewise.
309 * config/tc-tic4x.c: Likewise.
310 * config/tc-tic54x.c: Likewise.
311 * config/tc-v850.c: Likewise.
312 * config/tc-vax.c: Likewise.
313 * config/tc-xc16x.c: Likewise.
314 * config/tc-xstormy16.c: Likewise.
315 * config/tc-xtensa.c: Likewise.
316 * config/tc-z80.c: Likewise.
317 * config/tc-z8k.c: Likewise.
318 * macro.h: Don't include sb.h or ansidecl.h.
319 * sb.h: Don't include stdio.h or ansidecl.h.
320 * cond.c: Include sb.h.
321 * itbl-lex.l: Include as.h instead of other system headers.
322 * itbl-parse.y: Likewise.
323 * itbl-ops.c: Similarly.
324 * itbl-ops.h: Don't include as.h or ansidecl.h.
325 * config/bfin-defs.h: Don't include bfd.h or as.h.
326 * config/bfin-parse.y: Include as.h instead of other system headers.
328 2006-06-06 Ben Elliston <bje@au.ibm.com>
329 Anton Blanchard <anton@samba.org>
331 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
332 (md_show_usage): Document it.
333 (ppc_setup_opcodes): Test power6 opcode flag bits.
334 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
336 2006-06-06 Thiemo Seufer <ths@mips.com>
337 Chao-ying Fu <fu@mips.com>
339 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
340 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
341 (macro_build): Update comment.
342 (mips_ip): Allow DSP64 instructions for MIPS64R2.
343 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
344 CPU_HAS_MDMX.
345 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
346 MIPS_CPU_ASE_MDMX flags for sb1.
348 2006-06-05 Thiemo Seufer <ths@mips.com>
350 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
351 appropriate.
352 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
353 (mips_ip): Make overflowed/underflowed constant arguments in DSP
354 and MT instructions a fatal error. Use INSERT_OPERAND where
355 appropriate. Improve warnings for break and wait code overflows.
356 Use symbolic constant of OP_MASK_COPZ.
357 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
359 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
361 * po/Make-in (top_builddir): Define.
363 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
365 * doc/Makefile.am (TEXI2DVI): Define.
366 * doc/Makefile.in: Regenerate.
367 * doc/c-arc.texi: Fix typo.
369 2006-06-01 Alan Modra <amodra@bigpond.net.au>
371 * config/obj-ieee.c: Delete.
372 * config/obj-ieee.h: Delete.
373 * Makefile.am (OBJ_FORMATS): Remove ieee.
374 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
375 (obj-ieee.o): Remove rule.
376 * Makefile.in: Regenerate.
377 * configure.in (atof): Remove tahoe.
378 (OBJ_MAYBE_IEEE): Don't define.
379 * configure: Regenerate.
380 * config.in: Regenerate.
381 * doc/Makefile.in: Regenerate.
382 * po/POTFILES.in: Regenerate.
384 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
386 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
387 and LIBINTL_DEP everywhere.
388 (INTLLIBS): Remove.
389 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
390 * acinclude.m4: Include new gettext macros.
391 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
392 Remove local code for po/Makefile.
393 * Makefile.in, configure, doc/Makefile.in: Regenerated.
395 2006-05-30 Nick Clifton <nickc@redhat.com>
397 * po/es.po: Updated Spanish translation.
399 2006-05-06 Denis Chertykov <denisc@overta.ru>
401 * doc/c-avr.texi: New file.
402 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
403 * doc/all.texi: Set AVR
404 * doc/as.texinfo: Include c-avr.texi
406 2006-05-28 Jie Zhang <jie.zhang@analog.com>
408 * config/bfin-parse.y (check_macfunc): Loose the condition of
409 calling check_multiply_halfregs ().
411 2006-05-25 Jie Zhang <jie.zhang@analog.com>
413 * config/bfin-parse.y (asm_1): Better check and deal with
414 vector and scalar Multiply 16-Bit Operands instructions.
416 2006-05-24 Nick Clifton <nickc@redhat.com>
418 * config/tc-hppa.c: Convert to ISO C90 format.
419 * config/tc-hppa.h: Likewise.
421 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
422 Randolph Chung <randolph@tausq.org>
424 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
425 is_tls_ieoff, is_tls_leoff): Define.
426 (fix_new_hppa): Handle TLS.
427 (cons_fix_new_hppa): Likewise.
428 (pa_ip): Likewise.
429 (md_apply_fix): Handle TLS relocs.
430 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
432 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
434 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
436 2006-05-23 Thiemo Seufer <ths@mips.com>
437 David Ung <davidu@mips.com>
438 Nigel Stephens <nigel@mips.com>
440 [ gas/ChangeLog ]
441 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
442 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
443 ISA_HAS_MXHC1): New macros.
444 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
445 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
446 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
447 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
448 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
449 (mips_after_parse_args): Change default handling of float register
450 size to account for 32bit code with 64bit FP. Better sanity checking
451 of ISA/ASE/ABI option combinations.
452 (s_mipsset): Support switching of GPR and FPR sizes via
453 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
454 options.
455 (mips_elf_final_processing): We should record the use of 64bit FP
456 registers in 32bit code but we don't, because ELF header flags are
457 a scarce ressource.
458 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
459 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
460 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
461 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
462 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
463 missing -march options. Document .set arch=CPU. Move .set smartmips
464 to ASE page. Use @code for .set FOO examples.
466 2006-05-23 Jie Zhang <jie.zhang@analog.com>
468 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
469 if needed.
471 2006-05-23 Jie Zhang <jie.zhang@analog.com>
473 * config/bfin-defs.h (bfin_equals): Remove declaration.
474 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
475 * config/tc-bfin.c (bfin_name_is_register): Remove.
476 (bfin_equals): Remove.
477 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
478 (bfin_name_is_register): Remove declaration.
480 2006-05-19 Thiemo Seufer <ths@mips.com>
481 Nigel Stephens <nigel@mips.com>
483 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
484 (mips_oddfpreg_ok): New function.
485 (mips_ip): Use it.
487 2006-05-19 Thiemo Seufer <ths@mips.com>
488 David Ung <davidu@mips.com>
490 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
491 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
492 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
493 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
494 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
495 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
496 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
497 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
498 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
499 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
500 reg_names_o32, reg_names_n32n64): Define register classes.
501 (reg_lookup): New function, use register classes.
502 (md_begin): Reserve register names in the symbol table. Simplify
503 OBJ_ELF defines.
504 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
505 Use reg_lookup.
506 (mips16_ip): Use reg_lookup.
507 (tc_get_register): Likewise.
508 (tc_mips_regname_to_dw2regnum): New function.
510 2006-05-19 Thiemo Seufer <ths@mips.com>
512 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
513 Un-constify string argument.
514 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
515 Likewise.
516 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
517 Likewise.
518 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
519 Likewise.
520 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
521 Likewise.
522 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
523 Likewise.
524 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
525 Likewise.
527 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
529 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
530 cfloat/m68881 to correct architecture before using it.
532 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
534 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
535 constant values.
537 2006-05-15 Paul Brook <paul@codesourcery.com>
539 * config/tc-arm.c (arm_adjust_symtab): Use
540 bfd_is_arm_special_symbol_name.
542 2006-05-15 Bob Wilson <bob.wilson@acm.org>
544 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
545 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
546 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
547 Handle errors from calls to xtensa_opcode_is_* functions.
549 2006-05-14 Thiemo Seufer <ths@mips.com>
551 * config/tc-mips.c (macro_build): Test for currently active
552 mips16 option.
553 (mips16_ip): Reject invalid opcodes.
555 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
557 * doc/as.texinfo: Rename "Index" to "AS Index",
558 and "ABORT" to "ABORT (COFF)".
560 2006-05-11 Paul Brook <paul@codesourcery.com>
562 * config/tc-arm.c (parse_half): New function.
563 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
564 (parse_operands): Ditto.
565 (do_mov16): Reject invalid relocations.
566 (do_t_mov16): Ditto. Use Thumb reloc numbers.
567 (insns): Replace Iffff with HALF.
568 (md_apply_fix): Add MOVW and MOVT relocs.
569 (tc_gen_reloc): Ditto.
570 * doc/c-arm.texi: Document relocation operators
572 2006-05-11 Paul Brook <paul@codesourcery.com>
574 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
576 2006-05-11 Thiemo Seufer <ths@mips.com>
578 * config/tc-mips.c (append_insn): Don't check the range of j or
579 jal addresses.
581 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
583 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
584 relocs against external symbols for WinCE targets.
585 (md_apply_fix): Likewise.
587 2006-05-09 David Ung <davidu@mips.com>
589 * config/tc-mips.c (append_insn): Only warn about an out-of-range
590 j or jal address.
592 2006-05-09 Nick Clifton <nickc@redhat.com>
594 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
595 against symbols which are not going to be placed into the symbol
596 table.
598 2006-05-09 Ben Elliston <bje@au.ibm.com>
600 * expr.c (operand): Remove `if (0 && ..)' statement and
601 subsequently unused target_op label. Collapse `if (1 || ..)'
602 statement.
603 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
604 separately above the switch.
606 2006-05-08 Nick Clifton <nickc@redhat.com>
608 PR gas/2623
609 * config/tc-msp430.c (line_separator_character): Define as |.
611 2006-05-08 Thiemo Seufer <ths@mips.com>
612 Nigel Stephens <nigel@mips.com>
613 David Ung <davidu@mips.com>
615 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
616 (mips_opts): Likewise.
617 (file_ase_smartmips): New variable.
618 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
619 (macro_build): Handle SmartMIPS instructions.
620 (mips_ip): Likewise.
621 (md_longopts): Add argument handling for smartmips.
622 (md_parse_options, mips_after_parse_args): Likewise.
623 (s_mipsset): Add .set smartmips support.
624 (md_show_usage): Document -msmartmips/-mno-smartmips.
625 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
626 .set smartmips.
627 * doc/c-mips.texi: Likewise.
629 2006-05-08 Alan Modra <amodra@bigpond.net.au>
631 * write.c (relax_segment): Add pass count arg. Don't error on
632 negative org/space on first two passes.
633 (relax_seg_info): New struct.
634 (relax_seg, write_object_file): Adjust.
635 * write.h (relax_segment): Update prototype.
637 2006-05-05 Julian Brown <julian@codesourcery.com>
639 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
640 checking.
641 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
642 architecture version checks.
643 (insns): Allow overlapping instructions to be used in VFP mode.
645 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
647 PR gas/2598
648 * config/obj-elf.c (obj_elf_change_section): Allow user
649 specified SHF_ALPHA_GPREL.
651 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
653 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
654 for PMEM related expressions.
656 2006-05-05 Nick Clifton <nickc@redhat.com>
658 PR gas/2582
659 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
660 insertion of a directory separator character into a string at a
661 given offset. Uses heuristics to decide when to use a backslash
662 character rather than a forward-slash character.
663 (dwarf2_directive_loc): Use the macro.
664 (out_debug_info): Likewise.
666 2006-05-05 Thiemo Seufer <ths@mips.com>
667 David Ung <davidu@mips.com>
669 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
670 instruction.
671 (macro): Add new case M_CACHE_AB.
673 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
675 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
676 (opcode_lookup): Issue a warning for opcode with
677 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
678 identical to OT_cinfix3.
679 (TxC3w, TC3w, tC3w): New.
680 (insns): Use tC3w and TC3w for comparison instructions with
681 's' suffix.
683 2006-05-04 Alan Modra <amodra@bigpond.net.au>
685 * subsegs.h (struct frchain): Delete frch_seg.
686 (frchain_root): Delete.
687 (seg_info): Define as macro.
688 * subsegs.c (frchain_root): Delete.
689 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
690 (subsegs_begin, subseg_change): Adjust for above.
691 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
692 rather than to one big list.
693 (subseg_get): Don't special case abs, und sections.
694 (subseg_new, subseg_force_new): Don't set frchainP here.
695 (seg_info): Delete.
696 (subsegs_print_statistics): Adjust frag chain control list traversal.
697 * debug.c (dmp_frags): Likewise.
698 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
699 at frchain_root. Make use of known frchain ordering.
700 (last_frag_for_seg): Likewise.
701 (get_frag_fix): Likewise. Add seg param.
702 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
703 * write.c (chain_frchains_together_1): Adjust for struct frchain.
704 (SUB_SEGMENT_ALIGN): Likewise.
705 (subsegs_finish): Adjust frchain list traversal.
706 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
707 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
708 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
709 (xtensa_fix_b_j_loop_end_frags): Likewise.
710 (xtensa_fix_close_loop_end_frags): Likewise.
711 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
712 (retrieve_segment_info): Delete frch_seg initialisation.
714 2006-05-03 Alan Modra <amodra@bigpond.net.au>
716 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
717 * config/obj-elf.h (obj_sec_set_private_data): Delete.
718 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
719 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
721 2006-05-02 Joseph Myers <joseph@codesourcery.com>
723 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
724 here.
725 (md_apply_fix3): Multiply offset by 4 here for
726 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
728 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
729 Jan Beulich <jbeulich@novell.com>
731 * config/tc-i386.c (output_invalid_buf): Change size for
732 unsigned char.
733 * config/tc-tic30.c (output_invalid_buf): Likewise.
735 * config/tc-i386.c (output_invalid): Cast none-ascii char to
736 unsigned char.
737 * config/tc-tic30.c (output_invalid): Likewise.
739 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
741 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
742 (TEXI2POD): Use AM_MAKEINFOFLAGS.
743 (asconfig.texi): Don't set top_srcdir.
744 * doc/as.texinfo: Don't use top_srcdir.
745 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
747 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
749 * config/tc-i386.c (output_invalid_buf): Change size to 16.
750 * config/tc-tic30.c (output_invalid_buf): Likewise.
752 * config/tc-i386.c (output_invalid): Use snprintf instead of
753 sprintf.
754 * config/tc-ia64.c (declare_register_set): Likewise.
755 (emit_one_bundle): Likewise.
756 (check_dependencies): Likewise.
757 * config/tc-tic30.c (output_invalid): Likewise.
759 2006-05-02 Paul Brook <paul@codesourcery.com>
761 * config/tc-arm.c (arm_optimize_expr): New function.
762 * config/tc-arm.h (md_optimize_expr): Define
763 (arm_optimize_expr): Add prototype.
764 (TC_FORCE_RELOCATION_SUB_SAME): Define.
766 2006-05-02 Ben Elliston <bje@au.ibm.com>
768 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
769 field unsigned.
771 * sb.h (sb_list_vector): Move to sb.c.
772 * sb.c (free_list): Use type of sb_list_vector directly.
773 (sb_build): Fix off-by-one error in assertion about `size'.
775 2006-05-01 Ben Elliston <bje@au.ibm.com>
777 * listing.c (listing_listing): Remove useless loop.
778 * macro.c (macro_expand): Remove is_positional local variable.
779 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
780 and simplify surrounding expressions, where possible.
781 (assign_symbol): Likewise.
782 (s_weakref): Likewise.
783 * symbols.c (colon): Likewise.
785 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
787 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
789 2006-04-30 Thiemo Seufer <ths@mips.com>
790 David Ung <davidu@mips.com>
792 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
793 (mips_immed): New table that records various handling of udi
794 instruction patterns.
795 (mips_ip): Adds udi handling.
797 2006-04-28 Alan Modra <amodra@bigpond.net.au>
799 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
800 of list rather than beginning.
802 2006-04-26 Julian Brown <julian@codesourcery.com>
804 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
805 (is_quarter_float): Rename from above. Simplify slightly.
806 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
807 number.
808 (parse_neon_mov): Parse floating-point constants.
809 (neon_qfloat_bits): Fix encoding.
810 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
811 preference to integer encoding when using the F32 type.
813 2006-04-26 Julian Brown <julian@codesourcery.com>
815 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
816 zero-initialising structures containing it will lead to invalid types).
817 (arm_it): Add vectype to each operand.
818 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
819 defined field.
820 (neon_typed_alias): New structure. Extra information for typed
821 register aliases.
822 (reg_entry): Add neon type info field.
823 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
824 Break out alternative syntax for coprocessor registers, etc. into...
825 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
826 out from arm_reg_parse.
827 (parse_neon_type): Move. Return SUCCESS/FAIL.
828 (first_error): New function. Call to ensure first error which occurs is
829 reported.
830 (parse_neon_operand_type): Parse exactly one type.
831 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
832 (parse_typed_reg_or_scalar): New function. Handle core of both
833 arm_typed_reg_parse and parse_scalar.
834 (arm_typed_reg_parse): Parse a register with an optional type.
835 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
836 result.
837 (parse_scalar): Parse a Neon scalar with optional type.
838 (parse_reg_list): Use first_error.
839 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
840 (neon_alias_types_same): New function. Return true if two (alias) types
841 are the same.
842 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
843 of elements.
844 (insert_reg_alias): Return new reg_entry not void.
845 (insert_neon_reg_alias): New function. Insert type/index information as
846 well as register for alias.
847 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
848 make typed register aliases accordingly.
849 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
850 of line.
851 (s_unreq): Delete type information if present.
852 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
853 (s_arm_unwind_save_mmxwcg): Likewise.
854 (s_arm_unwind_movsp): Likewise.
855 (s_arm_unwind_setfp): Likewise.
856 (parse_shift): Likewise.
857 (parse_shifter_operand): Likewise.
858 (parse_address): Likewise.
859 (parse_tb): Likewise.
860 (tc_arm_regname_to_dw2regnum): Likewise.
861 (md_pseudo_table): Add dn, qn.
862 (parse_neon_mov): Handle typed operands.
863 (parse_operands): Likewise.
864 (neon_type_mask): Add N_SIZ.
865 (N_ALLMODS): New macro.
866 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
867 (el_type_of_type_chk): Add some safeguards.
868 (modify_types_allowed): Fix logic bug.
869 (neon_check_type): Handle operands with types.
870 (neon_three_same): Remove redundant optional arg handling.
871 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
872 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
873 (do_neon_step): Adjust accordingly.
874 (neon_cmode_for_logic_imm): Use first_error.
875 (do_neon_bitfield): Call neon_check_type.
876 (neon_dyadic): Rename to...
877 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
878 to allow modification of type of the destination.
879 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
880 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
881 (do_neon_compare): Make destination be an untyped bitfield.
882 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
883 (neon_mul_mac): Return early in case of errors.
884 (neon_move_immediate): Use first_error.
885 (neon_mac_reg_scalar_long): Fix type to include scalar.
886 (do_neon_dup): Likewise.
887 (do_neon_mov): Likewise (in several places).
888 (do_neon_tbl_tbx): Fix type.
889 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
890 (do_neon_ld_dup): Exit early in case of errors and/or use
891 first_error.
892 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
893 Handle .dn/.qn directives.
894 (REGDEF): Add zero for reg_entry neon field.
896 2006-04-26 Julian Brown <julian@codesourcery.com>
898 * config/tc-arm.c (limits.h): Include.
899 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
900 (fpu_vfp_v3_or_neon_ext): Declare constants.
901 (neon_el_type): New enumeration of types for Neon vector elements.
902 (neon_type_el): New struct. Define type and size of a vector element.
903 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
904 instruction.
905 (neon_type): Define struct. The type of an instruction.
906 (arm_it): Add 'vectype' for the current instruction.
907 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
908 (vfp_sp_reg_pos): Rename to...
909 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
910 tags.
911 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
912 (Neon D or Q register).
913 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
914 register.
915 (GE_OPT_PREFIX_BIG): Define constant, for use in...
916 (my_get_expression): Allow above constant as argument to accept
917 64-bit constants with optional prefix.
918 (arm_reg_parse): Add extra argument to return the specific type of
919 register in when either a D or Q register (REG_TYPE_NDQ) is
920 requested. Can be NULL.
921 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
922 (parse_reg_list): Update for new arm_reg_parse args.
923 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
924 (parse_neon_el_struct_list): New function. Parse element/structure
925 register lists for VLD<n>/VST<n> instructions.
926 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
927 (s_arm_unwind_save_mmxwr): Likewise.
928 (s_arm_unwind_save_mmxwcg): Likewise.
929 (s_arm_unwind_movsp): Likewise.
930 (s_arm_unwind_setfp): Likewise.
931 (parse_big_immediate): New function. Parse an immediate, which may be
932 64 bits wide. Put results in inst.operands[i].
933 (parse_shift): Update for new arm_reg_parse args.
934 (parse_address): Likewise. Add parsing of alignment specifiers.
935 (parse_neon_mov): Parse the operands of a VMOV instruction.
936 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
937 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
938 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
939 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
940 (parse_operands): Handle new codes above.
941 (encode_arm_vfp_sp_reg): Rename to...
942 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
943 selected VFP version only supports D0-D15.
944 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
945 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
946 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
947 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
948 encode_arm_vfp_reg name, and allow 32 D regs.
949 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
950 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
951 regs.
952 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
953 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
954 constant-load and conversion insns introduced with VFPv3.
955 (neon_tab_entry): New struct.
956 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
957 those which are the targets of pseudo-instructions.
958 (neon_opc): Enumerate opcodes, use as indices into...
959 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
960 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
961 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
962 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
963 neon_enc_tab.
964 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
965 Neon instructions.
966 (neon_type_mask): New. Compact type representation for type checking.
967 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
968 permitted type combinations.
969 (N_IGNORE_TYPE): New macro.
970 (neon_check_shape): New function. Check an instruction shape for
971 multiple alternatives. Return the specific shape for the current
972 instruction.
973 (neon_modify_type_size): New function. Modify a vector type and size,
974 depending on the bit mask in argument 1.
975 (neon_type_promote): New function. Convert a given "key" type (of an
976 operand) into the correct type for a different operand, based on a bit
977 mask.
978 (type_chk_of_el_type): New function. Convert a type and size into the
979 compact representation used for type checking.
980 (el_type_of_type_ckh): New function. Reverse of above (only when a
981 single bit is set in the bit mask).
982 (modify_types_allowed): New function. Alter a mask of allowed types
983 based on a bit mask of modifications.
984 (neon_check_type): New function. Check the type of the current
985 instruction against the variable argument list. The "key" type of the
986 instruction is returned.
987 (neon_dp_fixup): New function. Fill in and modify instruction bits for
988 a Neon data-processing instruction depending on whether we're in ARM
989 mode or Thumb-2 mode.
990 (neon_logbits): New function.
991 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
992 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
993 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
994 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
995 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
996 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
997 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
998 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
999 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1000 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1001 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1002 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1003 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1004 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1005 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1006 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1007 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1008 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1009 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1010 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1011 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1012 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1013 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1014 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1015 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1016 helpers.
1017 (parse_neon_type): New function. Parse Neon type specifier.
1018 (opcode_lookup): Allow parsing of Neon type specifiers.
1019 (REGNUM2, REGSETH, REGSET2): New macros.
1020 (reg_names): Add new VFPv3 and Neon registers.
1021 (NUF, nUF, NCE, nCE): New macros for opcode table.
1022 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1023 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1024 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1025 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1026 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1027 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1028 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1029 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1030 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1031 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1032 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1033 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1034 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1035 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1036 fto[us][lh][sd].
1037 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1038 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1039 (arm_option_cpu_value): Add vfp3 and neon.
1040 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1041 VFPv1 attribute.
1043 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1045 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1046 syntax instead of hardcoded opcodes with ".w18" suffixes.
1047 (wide_branch_opcode): New.
1048 (build_transition): Use it to check for wide branch opcodes with
1049 either ".w18" or ".w15" suffixes.
1051 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1053 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1054 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1055 frag's is_literal flag.
1057 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1059 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1061 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1063 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1064 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1065 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1066 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1067 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1069 2005-04-20 Paul Brook <paul@codesourcery.com>
1071 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1072 all targets.
1073 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1075 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1077 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1078 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1079 Make some cpus unsupported on ELF. Run "make dep-am".
1080 * Makefile.in: Regenerate.
1082 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1084 * configure.in (--enable-targets): Indent help message.
1085 * configure: Regenerate.
1087 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1089 PR gas/2533
1090 * config/tc-i386.c (i386_immediate): Check illegal immediate
1091 register operand.
1093 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1095 * config/tc-i386.c: Formatting.
1096 (output_disp, output_imm): ISO C90 params.
1098 * frags.c (frag_offset_fixed_p): Constify args.
1099 * frags.h (frag_offset_fixed_p): Ditto.
1101 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1102 (COFF_MAGIC): Delete.
1104 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1106 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1108 * po/POTFILES.in: Regenerated.
1110 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1112 * doc/as.texinfo: Mention that some .type syntaxes are not
1113 supported on all architectures.
1115 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1117 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1118 instructions when such transformations have been disabled.
1120 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1122 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1123 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1124 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1125 decoding the loop instructions. Remove current_offset variable.
1126 (xtensa_fix_short_loop_frags): Likewise.
1127 (min_bytes_to_other_loop_end): Remove current_offset argument.
1129 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1131 * config/tc-z80.c (z80_optimize_expr): Removed.
1132 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1134 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1136 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1137 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1138 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1139 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1140 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1141 at90can64, at90usb646, at90usb647, at90usb1286 and
1142 at90usb1287.
1143 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1145 2006-04-07 Paul Brook <paul@codesourcery.com>
1147 * config/tc-arm.c (parse_operands): Set default error message.
1149 2006-04-07 Paul Brook <paul@codesourcery.com>
1151 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1153 2006-04-07 Paul Brook <paul@codesourcery.com>
1155 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1157 2006-04-07 Paul Brook <paul@codesourcery.com>
1159 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1160 (move_or_literal_pool): Handle Thumb-2 instructions.
1161 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1163 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1165 PR 2512.
1166 * config/tc-i386.c (match_template): Move 64-bit operand tests
1167 inside loop.
1169 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1171 * po/Make-in: Add install-html target.
1172 * Makefile.am: Add install-html and install-html-recursive targets.
1173 * Makefile.in: Regenerate.
1174 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1175 * configure: Regenerate.
1176 * doc/Makefile.am: Add install-html and install-html-am targets.
1177 * doc/Makefile.in: Regenerate.
1179 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1181 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1182 second scan.
1184 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1185 Daniel Jacobowitz <dan@codesourcery.com>
1187 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1188 (GOTT_BASE, GOTT_INDEX): New.
1189 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1190 GOTT_INDEX when generating VxWorks PIC.
1191 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1192 use the generic *-*-vxworks* stanza instead.
1194 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1196 PR 997
1197 * frags.c (frag_offset_fixed_p): New function.
1198 * frags.h (frag_offset_fixed_p): Declare.
1199 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1200 (resolve_expression): Likewise.
1202 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1204 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1205 of the same length but different numbers of slots.
1207 2006-03-30 Andreas Schwab <schwab@suse.de>
1209 * configure.in: Fix help string for --enable-targets option.
1210 * configure: Regenerate.
1212 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1214 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1215 (m68k_ip): ... here. Use for all chips. Protect against buffer
1216 overrun and avoid excessive copying.
1218 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1219 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1220 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1221 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1222 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1223 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1224 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1225 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1226 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1227 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1228 (struct m68k_cpu): Change chip field to control_regs.
1229 (current_chip): Remove.
1230 (control_regs): New.
1231 (m68k_archs, m68k_extensions): Adjust.
1232 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1233 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1234 (find_cf_chip): Reimplement for new organization of cpu table.
1235 (select_control_regs): Remove.
1236 (mri_chip): Adjust.
1237 (struct save_opts): Save control regs, not chip.
1238 (s_save, s_restore): Adjust.
1239 (m68k_lookup_cpu): Give deprecated warning when necessary.
1240 (m68k_init_arch): Adjust.
1241 (md_show_usage): Adjust for new cpu table organization.
1243 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1245 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1246 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1247 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1248 "elf/bfin.h".
1249 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1250 (any_gotrel): New rule.
1251 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1252 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1253 "elf/bfin.h".
1254 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1255 (bfin_pic_ptr): New function.
1256 (md_pseudo_table): Add it for ".picptr".
1257 (OPTION_FDPIC): New macro.
1258 (md_longopts): Add -mfdpic.
1259 (md_parse_option): Handle it.
1260 (md_begin): Set BFD flags.
1261 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1262 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1263 us for GOT relocs.
1264 * Makefile.am (bfin-parse.o): Update dependencies.
1265 (DEPTC_bfin_elf): Likewise.
1266 * Makefile.in: Regenerate.
1268 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1270 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1271 mcfemac instead of mcfmac.
1273 2006-03-23 Michael Matz <matz@suse.de>
1275 * config/tc-i386.c (type_names): Correct placement of 'static'.
1276 (reloc): Map some more relocs to their 64 bit counterpart when
1277 size is 8.
1278 (output_insn): Work around breakage if DEBUG386 is defined.
1279 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1280 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1281 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1282 different from i386.
1283 (output_imm): Ditto.
1284 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1285 Imm64.
1286 (md_convert_frag): Jumps can now be larger than 2GB away, error
1287 out in that case.
1288 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1289 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1291 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1292 Daniel Jacobowitz <dan@codesourcery.com>
1293 Phil Edwards <phil@codesourcery.com>
1294 Zack Weinberg <zack@codesourcery.com>
1295 Mark Mitchell <mark@codesourcery.com>
1296 Nathan Sidwell <nathan@codesourcery.com>
1298 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1299 (md_begin): Complain about -G being used for PIC. Don't change
1300 the text, data and bss alignments on VxWorks.
1301 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1302 generating VxWorks PIC.
1303 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1304 (macro): Likewise, but do not treat la $25 specially for
1305 VxWorks PIC, and do not handle jal.
1306 (OPTION_MVXWORKS_PIC): New macro.
1307 (md_longopts): Add -mvxworks-pic.
1308 (md_parse_option): Don't complain about using PIC and -G together here.
1309 Handle OPTION_MVXWORKS_PIC.
1310 (md_estimate_size_before_relax): Always use the first relaxation
1311 sequence on VxWorks.
1312 * config/tc-mips.h (VXWORKS_PIC): New.
1314 2006-03-21 Paul Brook <paul@codesourcery.com>
1316 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1318 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1320 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1321 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1322 (get_loop_align_size): New.
1323 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1324 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1325 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1326 (get_noop_aligned_address): Use get_loop_align_size.
1327 (get_aligned_diff): Likewise.
1329 2006-03-21 Paul Brook <paul@codesourcery.com>
1331 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1333 2006-03-20 Paul Brook <paul@codesourcery.com>
1335 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1336 (do_t_branch): Encode branches inside IT blocks as unconditional.
1337 (do_t_cps): New function.
1338 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1339 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1340 (opcode_lookup): Allow conditional suffixes on all instructions in
1341 Thumb mode.
1342 (md_assemble): Advance condexec state before checking for errors.
1343 (insns): Use do_t_cps.
1345 2006-03-20 Paul Brook <paul@codesourcery.com>
1347 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1348 outputting the insn.
1350 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1352 * config/tc-vax.c: Update copyright year.
1353 * config/tc-vax.h: Likewise.
1355 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1357 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1358 make it static.
1359 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1361 2006-03-17 Paul Brook <paul@codesourcery.com>
1363 * config/tc-arm.c (insns): Add ldm and stm.
1365 2006-03-17 Ben Elliston <bje@au.ibm.com>
1367 PR gas/2446
1368 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1370 2006-03-16 Paul Brook <paul@codesourcery.com>
1372 * config/tc-arm.c (insns): Add "svc".
1374 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1376 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1377 flag and avoid double underscore prefixes.
1379 2006-03-10 Paul Brook <paul@codesourcery.com>
1381 * config/tc-arm.c (md_begin): Handle EABIv5.
1382 (arm_eabis): Add EF_ARM_EABI_VER5.
1383 * doc/c-arm.texi: Document -meabi=5.
1385 2006-03-10 Ben Elliston <bje@au.ibm.com>
1387 * app.c (do_scrub_chars): Simplify string handling.
1389 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1390 Daniel Jacobowitz <dan@codesourcery.com>
1391 Zack Weinberg <zack@codesourcery.com>
1392 Nathan Sidwell <nathan@codesourcery.com>
1393 Paul Brook <paul@codesourcery.com>
1394 Ricardo Anguiano <anguiano@codesourcery.com>
1395 Phil Edwards <phil@codesourcery.com>
1397 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1398 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1399 R_ARM_ABS12 reloc.
1400 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1401 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1402 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1404 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1406 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1407 even when using the text-section-literals option.
1409 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1411 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1412 and cf.
1413 (m68k_ip): <case 'J'> Check we have some control regs.
1414 (md_parse_option): Allow raw arch switch.
1415 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1416 whether 68881 or cfloat was meant by -mfloat.
1417 (md_show_usage): Adjust extension display.
1418 (m68k_elf_final_processing): Adjust.
1420 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1422 * config/tc-avr.c (avr_mod_hash_value): New function.
1423 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1424 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1425 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1426 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1427 of (int).
1428 (tc_gen_reloc): Handle substractions of symbols, if possible do
1429 fixups, abort otherwise.
1430 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1431 tc_fix_adjustable): Define.
1433 2006-03-02 James E Wilson <wilson@specifix.com>
1435 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1436 change the template, then clear md.slot[curr].end_of_insn_group.
1438 2006-02-28 Jan Beulich <jbeulich@novell.com>
1440 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1442 2006-02-28 Jan Beulich <jbeulich@novell.com>
1444 PR/1070
1445 * macro.c (getstring): Don't treat parentheses special anymore.
1446 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1447 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1448 characters.
1450 2006-02-28 Mat <mat@csail.mit.edu>
1452 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1454 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1456 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1457 field.
1458 (CFI_signal_frame): Define.
1459 (cfi_pseudo_table): Add .cfi_signal_frame.
1460 (dot_cfi): Handle CFI_signal_frame.
1461 (output_cie): Handle cie->signal_frame.
1462 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1463 different. Copy signal_frame from FDE to newly created CIE.
1464 * doc/as.texinfo: Document .cfi_signal_frame.
1466 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1468 * doc/Makefile.am: Add html target.
1469 * doc/Makefile.in: Regenerate.
1470 * po/Make-in: Add html target.
1472 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1474 * config/tc-i386.c (output_insn): Support Intel Merom New
1475 Instructions.
1477 * config/tc-i386.h (CpuMNI): New.
1478 (CpuUnknownFlags): Add CpuMNI.
1480 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1482 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1483 (hpriv_reg_table): New table for hyperprivileged registers.
1484 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1485 register encoding.
1487 2006-02-24 DJ Delorie <dj@redhat.com>
1489 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1490 (tc_gen_reloc): Don't define.
1491 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1492 (OPTION_LINKRELAX): New.
1493 (md_longopts): Add it.
1494 (m32c_relax): New.
1495 (md_parse_options): Set it.
1496 (md_assemble): Emit relaxation relocs as needed.
1497 (md_convert_frag): Emit relaxation relocs as needed.
1498 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1499 (m32c_apply_fix): New.
1500 (tc_gen_reloc): New.
1501 (m32c_force_relocation): Force out jump relocs when relaxing.
1502 (m32c_fix_adjustable): Return false if relaxing.
1504 2006-02-24 Paul Brook <paul@codesourcery.com>
1506 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1507 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1508 (struct asm_barrier_opt): Define.
1509 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1510 (parse_psr): Accept V7M psr names.
1511 (parse_barrier): New function.
1512 (enum operand_parse_code): Add OP_oBARRIER.
1513 (parse_operands): Implement OP_oBARRIER.
1514 (do_barrier): New function.
1515 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1516 (do_t_cpsi): Add V7M restrictions.
1517 (do_t_mrs, do_t_msr): Validate V7M variants.
1518 (md_assemble): Check for NULL variants.
1519 (v7m_psrs, barrier_opt_names): New tables.
1520 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1521 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1522 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1523 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1524 (struct cpu_arch_ver_table): Define.
1525 (cpu_arch_ver): New.
1526 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1527 Tag_CPU_arch_profile.
1528 * doc/c-arm.texi: Document new cpu and arch options.
1530 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1532 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1534 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1536 * config/tc-ia64.c: Update copyright years.
1538 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1540 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1541 SDM 2.2.
1543 2005-02-22 Paul Brook <paul@codesourcery.com>
1545 * config/tc-arm.c (do_pld): Remove incorrect write to
1546 inst.instruction.
1547 (encode_thumb32_addr_mode): Use correct operand.
1549 2006-02-21 Paul Brook <paul@codesourcery.com>
1551 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1553 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1554 Anil Paranjape <anilp1@kpitcummins.com>
1555 Shilin Shakti <shilins@kpitcummins.com>
1557 * Makefile.am: Add xc16x related entry.
1558 * Makefile.in: Regenerate.
1559 * configure.in: Added xc16x related entry.
1560 * configure: Regenerate.
1561 * config/tc-xc16x.h: New file
1562 * config/tc-xc16x.c: New file
1563 * doc/c-xc16x.texi: New file for xc16x
1564 * doc/all.texi: Entry for xc16x
1565 * doc/Makefile.texi: Added c-xc16x.texi
1566 * NEWS: Announce the support for the new target.
1568 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1570 * configure.tgt: set emulation for mips-*-netbsd*
1572 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1574 * config.in: Rebuilt.
1576 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1578 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1579 from 1, not 0, in error messages.
1580 (md_assemble): Simplify special-case check for ENTRY instructions.
1581 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1582 operand in error message.
1584 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1586 * configure.tgt (arm-*-linux-gnueabi*): Change to
1587 arm-*-linux-*eabi*.
1589 2006-02-10 Nick Clifton <nickc@redhat.com>
1591 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1592 32-bit value is propagated into the upper bits of a 64-bit long.
1594 * config/tc-arc.c (init_opcode_tables): Fix cast.
1595 (arc_extoper, md_operand): Likewise.
1597 2006-02-09 David Heine <dlheine@tensilica.com>
1599 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1600 each relaxation step.
1602 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1604 * configure.in (CHECK_DECLS): Add vsnprintf.
1605 * configure: Regenerate.
1606 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1607 include/declare here, but...
1608 * as.h: Move code detecting VARARGS idiom to the top.
1609 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1610 (vsnprintf): Declare if not already declared.
1612 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1614 * as.c (close_output_file): New.
1615 (main): Register close_output_file with xatexit before
1616 dump_statistics. Don't call output_file_close.
1618 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1620 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1621 mcf5329_control_regs): New.
1622 (not_current_architecture, selected_arch, selected_cpu): New.
1623 (m68k_archs, m68k_extensions): New.
1624 (archs): Renamed to ...
1625 (m68k_cpus): ... here. Adjust.
1626 (n_arches): Remove.
1627 (md_pseudo_table): Add arch and cpu directives.
1628 (find_cf_chip, m68k_ip): Adjust table scanning.
1629 (no_68851, no_68881): Remove.
1630 (md_assemble): Lazily initialize.
1631 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1632 (md_init_after_args): Move functionality to m68k_init_arch.
1633 (mri_chip): Adjust table scanning.
1634 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1635 options with saner parsing.
1636 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1637 m68k_init_arch): New.
1638 (s_m68k_cpu, s_m68k_arch): New.
1639 (md_show_usage): Adjust.
1640 (m68k_elf_final_processing): Set CF EF flags.
1641 * config/tc-m68k.h (m68k_init_after_args): Remove.
1642 (tc_init_after_args): Remove.
1643 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1644 (M68k-Directives): Document .arch and .cpu directives.
1646 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1648 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1649 synonyms for equ and defl.
1650 (z80_cons_fix_new): New function.
1651 (emit_byte): Disallow relative jumps to absolute locations.
1652 (emit_data): Only handle defb, prototype changed, because defb is
1653 now handled as pseudo-op rather than an instruction.
1654 (instab): Entries for defb,defw,db,dw moved from here...
1655 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1656 Add entries for def24,def32,d24,d32.
1657 (md_assemble): Improved error handling.
1658 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1659 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1660 (z80_cons_fix_new): Declare.
1661 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1662 (def24,d24,def32,d32): New pseudo-ops.
1664 2006-02-02 Paul Brook <paul@codesourcery.com>
1666 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1668 2005-02-02 Paul Brook <paul@codesourcery.com>
1670 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1671 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1672 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1673 T2_OPCODE_RSB): Define.
1674 (thumb32_negate_data_op): New function.
1675 (md_apply_fix): Use it.
1677 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1679 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1680 fields.
1681 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1682 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1683 subtracted symbols.
1684 (relaxation_requirements): Add pfinish_frag argument and use it to
1685 replace setting tinsn->record_fix fields.
1686 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1687 and vinsn_to_insnbuf. Remove references to record_fix and
1688 slot_sub_symbols fields.
1689 (xtensa_mark_narrow_branches): Delete unused code.
1690 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1691 a symbol.
1692 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1693 record_fix fields.
1694 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1695 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1696 of the record_fix field. Simplify error messages for unexpected
1697 symbolic operands.
1698 (set_expr_symbol_offset_diff): Delete.
1700 2006-01-31 Paul Brook <paul@codesourcery.com>
1702 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1704 2006-01-31 Paul Brook <paul@codesourcery.com>
1705 Richard Earnshaw <rearnsha@arm.com>
1707 * config/tc-arm.c: Use arm_feature_set.
1708 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1709 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1710 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1711 New variables.
1712 (insns): Use them.
1713 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1714 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1715 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1716 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1717 feature flags.
1718 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1719 (arm_opts): Move old cpu/arch options from here...
1720 (arm_legacy_opts): ... to here.
1721 (md_parse_option): Search arm_legacy_opts.
1722 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1723 (arm_float_abis, arm_eabis): Make const.
1725 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1727 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1729 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1731 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1732 in load immediate intruction.
1734 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1736 * config/bfin-parse.y (value_match): Use correct conversion
1737 specifications in template string for __FILE__ and __LINE__.
1738 (binary): Ditto.
1739 (unary): Ditto.
1741 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1743 Introduce TLS descriptors for i386 and x86_64.
1744 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1745 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1746 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1747 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1748 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1749 displacement bits.
1750 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1751 (lex_got): Handle @tlsdesc and @tlscall.
1752 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1754 2006-01-11 Nick Clifton <nickc@redhat.com>
1756 Fixes for building on 64-bit hosts:
1757 * config/tc-avr.c (mod_index): New union to allow conversion
1758 between pointers and integers.
1759 (md_begin, avr_ldi_expression): Use it.
1760 * config/tc-i370.c (md_assemble): Add cast for argument to print
1761 statement.
1762 * config/tc-tic54x.c (subsym_substitute): Likewise.
1763 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1764 opindex field of fr_cgen structure into a pointer so that it can
1765 be stored in a frag.
1766 * config/tc-mn10300.c (md_assemble): Likewise.
1767 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1768 types.
1769 * config/tc-v850.c: Replace uses of (int) casts with correct
1770 types.
1772 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1774 PR gas/2117
1775 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1777 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1779 PR gas/2101
1780 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1781 a local-label reference.
1783 For older changes see ChangeLog-2005
1784 \f
1785 Local Variables:
1786 mode: change-log
1787 left-margin: 8
1788 fill-column: 74
1789 version-control: never
1790 End: