1 2006-07-18 Paul Brook <paul@codesourcery.com>
3 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
4 (md_convert_frag): Use correct reloc for add_pc. Use
5 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
6 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
7 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
9 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
11 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
12 when file and line unknown.
14 2006-07-17 Thiemo Seufer <ths@mips.com>
16 * read.c (s_struct): Use IS_ELF.
17 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
18 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
19 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
20 s_mips_mask): Likewise.
22 2006-07-16 Thiemo Seufer <ths@mips.com>
23 David Ung <davidu@mips.com>
25 * read.c (s_struct): Handle ELF section changing.
26 * config/tc-mips.c (s_align): Leave enabling auto-align to the
28 (s_change_sec): Try section changing only if we output ELF.
30 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
32 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
34 (smallest_imm_type): Remove Cpu086.
35 (i386_target_format): Likewise.
37 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
40 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
41 Michael Meissner <michael.meissner@amd.com>
43 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
44 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
45 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
47 (i386_align_code): Ditto.
48 (md_assemble_code): Add support for insertq/extrq instructions,
49 swapping as needed for intel syntax.
50 (swap_imm_operands): New function to swap immediate operands.
51 (swap_operands): Deal with 4 operand instructions.
52 (build_modrm_byte): Add support for insertq instruction.
54 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
56 * config/tc-i386.h (Size64): Fix a typo in comment.
58 2006-07-12 Nick Clifton <nickc@redhat.com>
60 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
61 fixup_segment() to repeat a range check on a value that has
62 already been checked here.
64 2006-07-07 James E Wilson <wilson@specifix.com>
66 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
68 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
69 Nick Clifton <nickc@redhat.com>
72 * doc/as.texi: Fix spelling typo: branchs => branches.
73 * doc/c-m68hc11.texi: Likewise.
74 * config/tc-m68hc11.c: Likewise.
75 Support old spelling of command line switch for backwards
78 2006-07-04 Thiemo Seufer <ths@mips.com>
79 David Ung <davidu@mips.com>
81 * config/tc-mips.c (s_is_linkonce): New function.
82 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
83 weak, external, and linkonce symbols.
84 (pic_need_relax): Use s_is_linkonce.
86 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
88 * doc/as.texinfo (Org): Remove space.
89 (P2align): Add "@var{abs-expr},".
91 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
93 * config/tc-i386.c (cpu_arch_tune_set): New.
94 (cpu_arch_isa): Likewise.
95 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
96 nops with short or long nop sequences based on -march=/.arch
98 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
99 set cpu_arch_tune and cpu_arch_tune_flags.
100 (md_parse_option): For -march=, set cpu_arch_isa and set
101 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
102 0. Set cpu_arch_tune_set to 1 for -mtune=.
103 (i386_target_format): Don't set cpu_arch_tune.
105 2006-06-23 Nigel Stephens <nigel@mips.com>
107 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
108 generated .sbss.* and .gnu.linkonce.sb.*.
110 2006-06-23 Thiemo Seufer <ths@mips.com>
111 David Ung <davidu@mips.com>
113 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
115 * config/tc-mips.c (label_list): Define per-segment label_list.
116 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
117 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
118 mips_from_file_after_relocs, mips_define_label): Use per-segment
121 2006-06-22 Thiemo Seufer <ths@mips.com>
123 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
124 (append_insn): Use it.
125 (md_apply_fix): Whitespace formatting.
126 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
127 mips16_extended_frag): Remove register specifier.
128 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
131 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
133 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
134 a directive saving VFP registers for ARMv6 or later.
135 (s_arm_unwind_save): Add parameter arch_v6 and call
136 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
138 (md_pseudo_table): Add entry for new "vsave" directive.
139 * doc/c-arm.texi: Correct error in example for "save"
140 directive (fstmdf -> fstmdx). Also document "vsave" directive.
142 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
143 Anatoly Sokolov <aesok@post.ru>
145 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
146 and atmega644p devices. Rename atmega164/atmega324 devices to
147 atmega164p/atmega324p.
148 * doc/c-avr.texi: Document new mcu and arch options.
150 2006-06-17 Nick Clifton <nickc@redhat.com>
152 * config/tc-arm.c (enum parse_operand_result): Move outside of
153 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
155 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
157 * config/tc-i386.h (processor_type): New.
158 (arch_entry): Add type.
160 * config/tc-i386.c (cpu_arch_tune): New.
161 (cpu_arch_tune_flags): Likewise.
162 (cpu_arch_isa_flags): Likewise.
164 (set_cpu_arch): Also update cpu_arch_isa_flags.
165 (md_assemble): Update cpu_arch_isa_flags.
167 (OPTION_MTUNE): Likewise.
168 (md_longopts): Add -march= and -mtune=.
169 (md_parse_option): Support -march= and -mtune=.
170 (md_show_usage): Add -march=CPU/-mtune=CPU.
171 (i386_target_format): Also update cpu_arch_isa_flags,
172 cpu_arch_tune and cpu_arch_tune_flags.
174 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
176 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
178 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
180 * config/tc-arm.c (enum parse_operand_result): New.
181 (struct group_reloc_table_entry): New.
182 (enum group_reloc_type): New.
183 (group_reloc_table): New array.
184 (find_group_reloc_table_entry): New function.
185 (parse_shifter_operand_group_reloc): New function.
186 (parse_address_main): New function, incorporating code
187 from the old parse_address function. To be used via...
188 (parse_address): wrapper for parse_address_main; and
189 (parse_address_group_reloc): new function, likewise.
190 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
191 OP_ADDRGLDRS, OP_ADDRGLDC.
192 (parse_operands): Support for these new operand codes.
193 New macro po_misc_or_fail_no_backtrack.
194 (encode_arm_cp_address): Preserve group relocations.
195 (insns): Modify to use the above operand codes where group
196 relocations are permitted.
197 (md_apply_fix): Handle the group relocations
198 ALU_PC_G0_NC through LDC_SB_G2.
199 (tc_gen_reloc): Likewise.
200 (arm_force_relocation): Leave group relocations for the linker.
201 (arm_fix_adjustable): Likewise.
203 2006-06-15 Julian Brown <julian@codesourcery.com>
205 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
206 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
209 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
211 * config/tc-i386.c (process_suffix): Don't add rex64 for
214 2006-06-09 Thiemo Seufer <ths@mips.com>
216 * config/tc-mips.c (mips_ip): Maintain argument count.
218 2006-06-09 Alan Modra <amodra@bigpond.net.au>
220 * config/tc-iq2000.c: Include sb.h.
222 2006-06-08 Nigel Stephens <nigel@mips.com>
224 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
225 aliases for better compatibility with SGI tools.
227 2006-06-08 Alan Modra <amodra@bigpond.net.au>
229 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
230 * Makefile.am (GASLIBS): Expand @BFDLIB@.
232 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
233 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
234 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
236 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
237 * Makefile.in: Regenerate.
238 * doc/Makefile.in: Regenerate.
239 * configure: Regenerate.
241 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
243 * po/Make-in (pdf, ps): New dummy targets.
245 2006-06-07 Julian Brown <julian@codesourcery.com>
247 * config/tc-arm.c (stdarg.h): include.
248 (arm_it): Add uncond_value field. Add isvec and issingle to operand
250 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
251 REG_TYPE_NSDQ (single, double or quad vector reg).
252 (reg_expected_msgs): Update.
253 (BAD_FPU): Add macro for unsupported FPU instruction error.
254 (parse_neon_type): Support 'd' as an alias for .f64.
255 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
257 (parse_vfp_reg_list): Don't update first arg on error.
258 (parse_neon_mov): Support extra syntax for VFP moves.
259 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
260 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
261 (parse_operands): Support isvec, issingle operands fields, new parse
263 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
265 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
266 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
267 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
268 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
270 (neon_shape): Redefine in terms of above.
271 (neon_shape_class): New enumeration, table of shape classes.
272 (neon_shape_el): New enumeration. One element of a shape.
273 (neon_shape_el_size): Register widths of above, where appropriate.
274 (neon_shape_info): New struct. Info for shape table.
275 (neon_shape_tab): New array.
276 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
277 (neon_check_shape): Rewrite as...
278 (neon_select_shape): New function to classify instruction shapes,
279 driven by new table neon_shape_tab array.
280 (neon_quad): New function. Return 1 if shape should set Q flag in
281 instructions (or equivalent), 0 otherwise.
282 (type_chk_of_el_type): Support F64.
283 (el_type_of_type_chk): Likewise.
284 (neon_check_type): Add support for VFP type checking (VFP data
285 elements fill their containing registers).
286 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
287 in thumb mode for VFP instructions.
288 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
289 and encode the current instruction as if it were that opcode.
290 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
291 arguments, call function in PFN.
292 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
293 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
294 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
295 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
296 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
297 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
298 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
299 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
300 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
301 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
302 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
303 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
304 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
305 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
306 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
308 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
309 between VFP and Neon turns out to belong to Neon. Perform
310 architecture check and fill in condition field if appropriate.
311 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
312 (do_neon_cvt): Add support for VFP variants of instructions.
313 (neon_cvt_flavour): Extend to cover VFP conversions.
314 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
316 (do_neon_ldr_str): Handle single-precision VFP load/store.
317 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
318 NS_NULL not NS_IGNORE.
319 (opcode_tag): Add OT_csuffixF for operands which either take a
320 conditional suffix, or have 0xF in the condition field.
321 (md_assemble): Add support for OT_csuffixF.
322 (NCE): Replace macro with...
323 (NCE_tag, NCE, NCEF): New macros.
324 (nCE): Replace macro with...
325 (nCE_tag, nCE, nCEF): New macros.
326 (insns): Add support for VFP insns or VFP versions of insns msr,
327 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
328 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
329 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
330 VFP/Neon insns together.
332 2006-06-07 Alan Modra <amodra@bigpond.net.au>
333 Ladislav Michl <ladis@linux-mips.org>
335 * app.c: Don't include headers already included by as.h.
337 * atof-generic.c: Likewise.
339 * dwarf2dbg.c: Likewise.
341 * input-file.c: Likewise.
342 * input-scrub.c: Likewise.
344 * output-file.c: Likewise.
347 * config/bfin-lex.l: Likewise.
348 * config/obj-coff.h: Likewise.
349 * config/obj-elf.h: Likewise.
350 * config/obj-som.h: Likewise.
351 * config/tc-arc.c: Likewise.
352 * config/tc-arm.c: Likewise.
353 * config/tc-avr.c: Likewise.
354 * config/tc-bfin.c: Likewise.
355 * config/tc-cris.c: Likewise.
356 * config/tc-d10v.c: Likewise.
357 * config/tc-d30v.c: Likewise.
358 * config/tc-dlx.h: Likewise.
359 * config/tc-fr30.c: Likewise.
360 * config/tc-frv.c: Likewise.
361 * config/tc-h8300.c: Likewise.
362 * config/tc-hppa.c: Likewise.
363 * config/tc-i370.c: Likewise.
364 * config/tc-i860.c: Likewise.
365 * config/tc-i960.c: Likewise.
366 * config/tc-ip2k.c: Likewise.
367 * config/tc-iq2000.c: Likewise.
368 * config/tc-m32c.c: Likewise.
369 * config/tc-m32r.c: Likewise.
370 * config/tc-maxq.c: Likewise.
371 * config/tc-mcore.c: Likewise.
372 * config/tc-mips.c: Likewise.
373 * config/tc-mmix.c: Likewise.
374 * config/tc-mn10200.c: Likewise.
375 * config/tc-mn10300.c: Likewise.
376 * config/tc-msp430.c: Likewise.
377 * config/tc-mt.c: Likewise.
378 * config/tc-ns32k.c: Likewise.
379 * config/tc-openrisc.c: Likewise.
380 * config/tc-ppc.c: Likewise.
381 * config/tc-s390.c: Likewise.
382 * config/tc-sh.c: Likewise.
383 * config/tc-sh64.c: Likewise.
384 * config/tc-sparc.c: Likewise.
385 * config/tc-tic30.c: Likewise.
386 * config/tc-tic4x.c: Likewise.
387 * config/tc-tic54x.c: Likewise.
388 * config/tc-v850.c: Likewise.
389 * config/tc-vax.c: Likewise.
390 * config/tc-xc16x.c: Likewise.
391 * config/tc-xstormy16.c: Likewise.
392 * config/tc-xtensa.c: Likewise.
393 * config/tc-z80.c: Likewise.
394 * config/tc-z8k.c: Likewise.
395 * macro.h: Don't include sb.h or ansidecl.h.
396 * sb.h: Don't include stdio.h or ansidecl.h.
397 * cond.c: Include sb.h.
398 * itbl-lex.l: Include as.h instead of other system headers.
399 * itbl-parse.y: Likewise.
400 * itbl-ops.c: Similarly.
401 * itbl-ops.h: Don't include as.h or ansidecl.h.
402 * config/bfin-defs.h: Don't include bfd.h or as.h.
403 * config/bfin-parse.y: Include as.h instead of other system headers.
405 2006-06-06 Ben Elliston <bje@au.ibm.com>
406 Anton Blanchard <anton@samba.org>
408 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
409 (md_show_usage): Document it.
410 (ppc_setup_opcodes): Test power6 opcode flag bits.
411 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
413 2006-06-06 Thiemo Seufer <ths@mips.com>
414 Chao-ying Fu <fu@mips.com>
416 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
417 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
418 (macro_build): Update comment.
419 (mips_ip): Allow DSP64 instructions for MIPS64R2.
420 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
422 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
423 MIPS_CPU_ASE_MDMX flags for sb1.
425 2006-06-05 Thiemo Seufer <ths@mips.com>
427 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
429 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
430 (mips_ip): Make overflowed/underflowed constant arguments in DSP
431 and MT instructions a fatal error. Use INSERT_OPERAND where
432 appropriate. Improve warnings for break and wait code overflows.
433 Use symbolic constant of OP_MASK_COPZ.
434 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
436 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
438 * po/Make-in (top_builddir): Define.
440 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
442 * doc/Makefile.am (TEXI2DVI): Define.
443 * doc/Makefile.in: Regenerate.
444 * doc/c-arc.texi: Fix typo.
446 2006-06-01 Alan Modra <amodra@bigpond.net.au>
448 * config/obj-ieee.c: Delete.
449 * config/obj-ieee.h: Delete.
450 * Makefile.am (OBJ_FORMATS): Remove ieee.
451 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
452 (obj-ieee.o): Remove rule.
453 * Makefile.in: Regenerate.
454 * configure.in (atof): Remove tahoe.
455 (OBJ_MAYBE_IEEE): Don't define.
456 * configure: Regenerate.
457 * config.in: Regenerate.
458 * doc/Makefile.in: Regenerate.
459 * po/POTFILES.in: Regenerate.
461 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
463 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
464 and LIBINTL_DEP everywhere.
466 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
467 * acinclude.m4: Include new gettext macros.
468 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
469 Remove local code for po/Makefile.
470 * Makefile.in, configure, doc/Makefile.in: Regenerated.
472 2006-05-30 Nick Clifton <nickc@redhat.com>
474 * po/es.po: Updated Spanish translation.
476 2006-05-06 Denis Chertykov <denisc@overta.ru>
478 * doc/c-avr.texi: New file.
479 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
480 * doc/all.texi: Set AVR
481 * doc/as.texinfo: Include c-avr.texi
483 2006-05-28 Jie Zhang <jie.zhang@analog.com>
485 * config/bfin-parse.y (check_macfunc): Loose the condition of
486 calling check_multiply_halfregs ().
488 2006-05-25 Jie Zhang <jie.zhang@analog.com>
490 * config/bfin-parse.y (asm_1): Better check and deal with
491 vector and scalar Multiply 16-Bit Operands instructions.
493 2006-05-24 Nick Clifton <nickc@redhat.com>
495 * config/tc-hppa.c: Convert to ISO C90 format.
496 * config/tc-hppa.h: Likewise.
498 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
499 Randolph Chung <randolph@tausq.org>
501 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
502 is_tls_ieoff, is_tls_leoff): Define.
503 (fix_new_hppa): Handle TLS.
504 (cons_fix_new_hppa): Likewise.
506 (md_apply_fix): Handle TLS relocs.
507 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
509 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
511 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
513 2006-05-23 Thiemo Seufer <ths@mips.com>
514 David Ung <davidu@mips.com>
515 Nigel Stephens <nigel@mips.com>
518 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
519 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
520 ISA_HAS_MXHC1): New macros.
521 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
522 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
523 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
524 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
525 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
526 (mips_after_parse_args): Change default handling of float register
527 size to account for 32bit code with 64bit FP. Better sanity checking
528 of ISA/ASE/ABI option combinations.
529 (s_mipsset): Support switching of GPR and FPR sizes via
530 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
532 (mips_elf_final_processing): We should record the use of 64bit FP
533 registers in 32bit code but we don't, because ELF header flags are
535 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
536 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
537 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
538 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
539 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
540 missing -march options. Document .set arch=CPU. Move .set smartmips
541 to ASE page. Use @code for .set FOO examples.
543 2006-05-23 Jie Zhang <jie.zhang@analog.com>
545 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
548 2006-05-23 Jie Zhang <jie.zhang@analog.com>
550 * config/bfin-defs.h (bfin_equals): Remove declaration.
551 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
552 * config/tc-bfin.c (bfin_name_is_register): Remove.
553 (bfin_equals): Remove.
554 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
555 (bfin_name_is_register): Remove declaration.
557 2006-05-19 Thiemo Seufer <ths@mips.com>
558 Nigel Stephens <nigel@mips.com>
560 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
561 (mips_oddfpreg_ok): New function.
564 2006-05-19 Thiemo Seufer <ths@mips.com>
565 David Ung <davidu@mips.com>
567 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
568 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
569 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
570 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
571 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
572 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
573 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
574 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
575 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
576 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
577 reg_names_o32, reg_names_n32n64): Define register classes.
578 (reg_lookup): New function, use register classes.
579 (md_begin): Reserve register names in the symbol table. Simplify
581 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
583 (mips16_ip): Use reg_lookup.
584 (tc_get_register): Likewise.
585 (tc_mips_regname_to_dw2regnum): New function.
587 2006-05-19 Thiemo Seufer <ths@mips.com>
589 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
590 Un-constify string argument.
591 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
593 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
595 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
597 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
599 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
601 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
604 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
606 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
607 cfloat/m68881 to correct architecture before using it.
609 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
611 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
614 2006-05-15 Paul Brook <paul@codesourcery.com>
616 * config/tc-arm.c (arm_adjust_symtab): Use
617 bfd_is_arm_special_symbol_name.
619 2006-05-15 Bob Wilson <bob.wilson@acm.org>
621 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
622 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
623 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
624 Handle errors from calls to xtensa_opcode_is_* functions.
626 2006-05-14 Thiemo Seufer <ths@mips.com>
628 * config/tc-mips.c (macro_build): Test for currently active
630 (mips16_ip): Reject invalid opcodes.
632 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
634 * doc/as.texinfo: Rename "Index" to "AS Index",
635 and "ABORT" to "ABORT (COFF)".
637 2006-05-11 Paul Brook <paul@codesourcery.com>
639 * config/tc-arm.c (parse_half): New function.
640 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
641 (parse_operands): Ditto.
642 (do_mov16): Reject invalid relocations.
643 (do_t_mov16): Ditto. Use Thumb reloc numbers.
644 (insns): Replace Iffff with HALF.
645 (md_apply_fix): Add MOVW and MOVT relocs.
646 (tc_gen_reloc): Ditto.
647 * doc/c-arm.texi: Document relocation operators
649 2006-05-11 Paul Brook <paul@codesourcery.com>
651 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
653 2006-05-11 Thiemo Seufer <ths@mips.com>
655 * config/tc-mips.c (append_insn): Don't check the range of j or
658 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
660 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
661 relocs against external symbols for WinCE targets.
662 (md_apply_fix): Likewise.
664 2006-05-09 David Ung <davidu@mips.com>
666 * config/tc-mips.c (append_insn): Only warn about an out-of-range
669 2006-05-09 Nick Clifton <nickc@redhat.com>
671 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
672 against symbols which are not going to be placed into the symbol
675 2006-05-09 Ben Elliston <bje@au.ibm.com>
677 * expr.c (operand): Remove `if (0 && ..)' statement and
678 subsequently unused target_op label. Collapse `if (1 || ..)'
680 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
681 separately above the switch.
683 2006-05-08 Nick Clifton <nickc@redhat.com>
686 * config/tc-msp430.c (line_separator_character): Define as |.
688 2006-05-08 Thiemo Seufer <ths@mips.com>
689 Nigel Stephens <nigel@mips.com>
690 David Ung <davidu@mips.com>
692 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
693 (mips_opts): Likewise.
694 (file_ase_smartmips): New variable.
695 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
696 (macro_build): Handle SmartMIPS instructions.
698 (md_longopts): Add argument handling for smartmips.
699 (md_parse_options, mips_after_parse_args): Likewise.
700 (s_mipsset): Add .set smartmips support.
701 (md_show_usage): Document -msmartmips/-mno-smartmips.
702 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
704 * doc/c-mips.texi: Likewise.
706 2006-05-08 Alan Modra <amodra@bigpond.net.au>
708 * write.c (relax_segment): Add pass count arg. Don't error on
709 negative org/space on first two passes.
710 (relax_seg_info): New struct.
711 (relax_seg, write_object_file): Adjust.
712 * write.h (relax_segment): Update prototype.
714 2006-05-05 Julian Brown <julian@codesourcery.com>
716 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
718 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
719 architecture version checks.
720 (insns): Allow overlapping instructions to be used in VFP mode.
722 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
725 * config/obj-elf.c (obj_elf_change_section): Allow user
726 specified SHF_ALPHA_GPREL.
728 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
730 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
731 for PMEM related expressions.
733 2006-05-05 Nick Clifton <nickc@redhat.com>
736 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
737 insertion of a directory separator character into a string at a
738 given offset. Uses heuristics to decide when to use a backslash
739 character rather than a forward-slash character.
740 (dwarf2_directive_loc): Use the macro.
741 (out_debug_info): Likewise.
743 2006-05-05 Thiemo Seufer <ths@mips.com>
744 David Ung <davidu@mips.com>
746 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
748 (macro): Add new case M_CACHE_AB.
750 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
752 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
753 (opcode_lookup): Issue a warning for opcode with
754 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
755 identical to OT_cinfix3.
756 (TxC3w, TC3w, tC3w): New.
757 (insns): Use tC3w and TC3w for comparison instructions with
760 2006-05-04 Alan Modra <amodra@bigpond.net.au>
762 * subsegs.h (struct frchain): Delete frch_seg.
763 (frchain_root): Delete.
764 (seg_info): Define as macro.
765 * subsegs.c (frchain_root): Delete.
766 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
767 (subsegs_begin, subseg_change): Adjust for above.
768 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
769 rather than to one big list.
770 (subseg_get): Don't special case abs, und sections.
771 (subseg_new, subseg_force_new): Don't set frchainP here.
773 (subsegs_print_statistics): Adjust frag chain control list traversal.
774 * debug.c (dmp_frags): Likewise.
775 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
776 at frchain_root. Make use of known frchain ordering.
777 (last_frag_for_seg): Likewise.
778 (get_frag_fix): Likewise. Add seg param.
779 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
780 * write.c (chain_frchains_together_1): Adjust for struct frchain.
781 (SUB_SEGMENT_ALIGN): Likewise.
782 (subsegs_finish): Adjust frchain list traversal.
783 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
784 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
785 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
786 (xtensa_fix_b_j_loop_end_frags): Likewise.
787 (xtensa_fix_close_loop_end_frags): Likewise.
788 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
789 (retrieve_segment_info): Delete frch_seg initialisation.
791 2006-05-03 Alan Modra <amodra@bigpond.net.au>
793 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
794 * config/obj-elf.h (obj_sec_set_private_data): Delete.
795 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
796 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
798 2006-05-02 Joseph Myers <joseph@codesourcery.com>
800 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
802 (md_apply_fix3): Multiply offset by 4 here for
803 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
805 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
806 Jan Beulich <jbeulich@novell.com>
808 * config/tc-i386.c (output_invalid_buf): Change size for
810 * config/tc-tic30.c (output_invalid_buf): Likewise.
812 * config/tc-i386.c (output_invalid): Cast none-ascii char to
814 * config/tc-tic30.c (output_invalid): Likewise.
816 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
818 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
819 (TEXI2POD): Use AM_MAKEINFOFLAGS.
820 (asconfig.texi): Don't set top_srcdir.
821 * doc/as.texinfo: Don't use top_srcdir.
822 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
824 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
826 * config/tc-i386.c (output_invalid_buf): Change size to 16.
827 * config/tc-tic30.c (output_invalid_buf): Likewise.
829 * config/tc-i386.c (output_invalid): Use snprintf instead of
831 * config/tc-ia64.c (declare_register_set): Likewise.
832 (emit_one_bundle): Likewise.
833 (check_dependencies): Likewise.
834 * config/tc-tic30.c (output_invalid): Likewise.
836 2006-05-02 Paul Brook <paul@codesourcery.com>
838 * config/tc-arm.c (arm_optimize_expr): New function.
839 * config/tc-arm.h (md_optimize_expr): Define
840 (arm_optimize_expr): Add prototype.
841 (TC_FORCE_RELOCATION_SUB_SAME): Define.
843 2006-05-02 Ben Elliston <bje@au.ibm.com>
845 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
848 * sb.h (sb_list_vector): Move to sb.c.
849 * sb.c (free_list): Use type of sb_list_vector directly.
850 (sb_build): Fix off-by-one error in assertion about `size'.
852 2006-05-01 Ben Elliston <bje@au.ibm.com>
854 * listing.c (listing_listing): Remove useless loop.
855 * macro.c (macro_expand): Remove is_positional local variable.
856 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
857 and simplify surrounding expressions, where possible.
858 (assign_symbol): Likewise.
859 (s_weakref): Likewise.
860 * symbols.c (colon): Likewise.
862 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
864 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
866 2006-04-30 Thiemo Seufer <ths@mips.com>
867 David Ung <davidu@mips.com>
869 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
870 (mips_immed): New table that records various handling of udi
871 instruction patterns.
872 (mips_ip): Adds udi handling.
874 2006-04-28 Alan Modra <amodra@bigpond.net.au>
876 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
877 of list rather than beginning.
879 2006-04-26 Julian Brown <julian@codesourcery.com>
881 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
882 (is_quarter_float): Rename from above. Simplify slightly.
883 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
885 (parse_neon_mov): Parse floating-point constants.
886 (neon_qfloat_bits): Fix encoding.
887 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
888 preference to integer encoding when using the F32 type.
890 2006-04-26 Julian Brown <julian@codesourcery.com>
892 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
893 zero-initialising structures containing it will lead to invalid types).
894 (arm_it): Add vectype to each operand.
895 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
897 (neon_typed_alias): New structure. Extra information for typed
899 (reg_entry): Add neon type info field.
900 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
901 Break out alternative syntax for coprocessor registers, etc. into...
902 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
903 out from arm_reg_parse.
904 (parse_neon_type): Move. Return SUCCESS/FAIL.
905 (first_error): New function. Call to ensure first error which occurs is
907 (parse_neon_operand_type): Parse exactly one type.
908 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
909 (parse_typed_reg_or_scalar): New function. Handle core of both
910 arm_typed_reg_parse and parse_scalar.
911 (arm_typed_reg_parse): Parse a register with an optional type.
912 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
914 (parse_scalar): Parse a Neon scalar with optional type.
915 (parse_reg_list): Use first_error.
916 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
917 (neon_alias_types_same): New function. Return true if two (alias) types
919 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
921 (insert_reg_alias): Return new reg_entry not void.
922 (insert_neon_reg_alias): New function. Insert type/index information as
923 well as register for alias.
924 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
925 make typed register aliases accordingly.
926 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
928 (s_unreq): Delete type information if present.
929 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
930 (s_arm_unwind_save_mmxwcg): Likewise.
931 (s_arm_unwind_movsp): Likewise.
932 (s_arm_unwind_setfp): Likewise.
933 (parse_shift): Likewise.
934 (parse_shifter_operand): Likewise.
935 (parse_address): Likewise.
936 (parse_tb): Likewise.
937 (tc_arm_regname_to_dw2regnum): Likewise.
938 (md_pseudo_table): Add dn, qn.
939 (parse_neon_mov): Handle typed operands.
940 (parse_operands): Likewise.
941 (neon_type_mask): Add N_SIZ.
942 (N_ALLMODS): New macro.
943 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
944 (el_type_of_type_chk): Add some safeguards.
945 (modify_types_allowed): Fix logic bug.
946 (neon_check_type): Handle operands with types.
947 (neon_three_same): Remove redundant optional arg handling.
948 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
949 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
950 (do_neon_step): Adjust accordingly.
951 (neon_cmode_for_logic_imm): Use first_error.
952 (do_neon_bitfield): Call neon_check_type.
953 (neon_dyadic): Rename to...
954 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
955 to allow modification of type of the destination.
956 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
957 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
958 (do_neon_compare): Make destination be an untyped bitfield.
959 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
960 (neon_mul_mac): Return early in case of errors.
961 (neon_move_immediate): Use first_error.
962 (neon_mac_reg_scalar_long): Fix type to include scalar.
963 (do_neon_dup): Likewise.
964 (do_neon_mov): Likewise (in several places).
965 (do_neon_tbl_tbx): Fix type.
966 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
967 (do_neon_ld_dup): Exit early in case of errors and/or use
969 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
970 Handle .dn/.qn directives.
971 (REGDEF): Add zero for reg_entry neon field.
973 2006-04-26 Julian Brown <julian@codesourcery.com>
975 * config/tc-arm.c (limits.h): Include.
976 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
977 (fpu_vfp_v3_or_neon_ext): Declare constants.
978 (neon_el_type): New enumeration of types for Neon vector elements.
979 (neon_type_el): New struct. Define type and size of a vector element.
980 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
982 (neon_type): Define struct. The type of an instruction.
983 (arm_it): Add 'vectype' for the current instruction.
984 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
985 (vfp_sp_reg_pos): Rename to...
986 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
988 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
989 (Neon D or Q register).
990 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
992 (GE_OPT_PREFIX_BIG): Define constant, for use in...
993 (my_get_expression): Allow above constant as argument to accept
994 64-bit constants with optional prefix.
995 (arm_reg_parse): Add extra argument to return the specific type of
996 register in when either a D or Q register (REG_TYPE_NDQ) is
997 requested. Can be NULL.
998 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
999 (parse_reg_list): Update for new arm_reg_parse args.
1000 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1001 (parse_neon_el_struct_list): New function. Parse element/structure
1002 register lists for VLD<n>/VST<n> instructions.
1003 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1004 (s_arm_unwind_save_mmxwr): Likewise.
1005 (s_arm_unwind_save_mmxwcg): Likewise.
1006 (s_arm_unwind_movsp): Likewise.
1007 (s_arm_unwind_setfp): Likewise.
1008 (parse_big_immediate): New function. Parse an immediate, which may be
1009 64 bits wide. Put results in inst.operands[i].
1010 (parse_shift): Update for new arm_reg_parse args.
1011 (parse_address): Likewise. Add parsing of alignment specifiers.
1012 (parse_neon_mov): Parse the operands of a VMOV instruction.
1013 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1014 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1015 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1016 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1017 (parse_operands): Handle new codes above.
1018 (encode_arm_vfp_sp_reg): Rename to...
1019 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1020 selected VFP version only supports D0-D15.
1021 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1022 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1023 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1024 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1025 encode_arm_vfp_reg name, and allow 32 D regs.
1026 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1027 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1029 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1030 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1031 constant-load and conversion insns introduced with VFPv3.
1032 (neon_tab_entry): New struct.
1033 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1034 those which are the targets of pseudo-instructions.
1035 (neon_opc): Enumerate opcodes, use as indices into...
1036 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1037 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1038 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1039 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1041 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1043 (neon_type_mask): New. Compact type representation for type checking.
1044 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1045 permitted type combinations.
1046 (N_IGNORE_TYPE): New macro.
1047 (neon_check_shape): New function. Check an instruction shape for
1048 multiple alternatives. Return the specific shape for the current
1050 (neon_modify_type_size): New function. Modify a vector type and size,
1051 depending on the bit mask in argument 1.
1052 (neon_type_promote): New function. Convert a given "key" type (of an
1053 operand) into the correct type for a different operand, based on a bit
1055 (type_chk_of_el_type): New function. Convert a type and size into the
1056 compact representation used for type checking.
1057 (el_type_of_type_ckh): New function. Reverse of above (only when a
1058 single bit is set in the bit mask).
1059 (modify_types_allowed): New function. Alter a mask of allowed types
1060 based on a bit mask of modifications.
1061 (neon_check_type): New function. Check the type of the current
1062 instruction against the variable argument list. The "key" type of the
1063 instruction is returned.
1064 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1065 a Neon data-processing instruction depending on whether we're in ARM
1066 mode or Thumb-2 mode.
1067 (neon_logbits): New function.
1068 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1069 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1070 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1071 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1072 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1073 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1074 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1075 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1076 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1077 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1078 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1079 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1080 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1081 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1082 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1083 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1084 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1085 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1086 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1087 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1088 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1089 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1090 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1091 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1092 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1094 (parse_neon_type): New function. Parse Neon type specifier.
1095 (opcode_lookup): Allow parsing of Neon type specifiers.
1096 (REGNUM2, REGSETH, REGSET2): New macros.
1097 (reg_names): Add new VFPv3 and Neon registers.
1098 (NUF, nUF, NCE, nCE): New macros for opcode table.
1099 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1100 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1101 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1102 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1103 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1104 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1105 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1106 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1107 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1108 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1109 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1110 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1111 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1112 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1114 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1115 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1116 (arm_option_cpu_value): Add vfp3 and neon.
1117 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1120 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1122 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1123 syntax instead of hardcoded opcodes with ".w18" suffixes.
1124 (wide_branch_opcode): New.
1125 (build_transition): Use it to check for wide branch opcodes with
1126 either ".w18" or ".w15" suffixes.
1128 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1130 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1131 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1132 frag's is_literal flag.
1134 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1136 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1138 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1140 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1141 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1142 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1143 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1144 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1146 2005-04-20 Paul Brook <paul@codesourcery.com>
1148 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1150 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1152 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1154 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1155 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1156 Make some cpus unsupported on ELF. Run "make dep-am".
1157 * Makefile.in: Regenerate.
1159 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1161 * configure.in (--enable-targets): Indent help message.
1162 * configure: Regenerate.
1164 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1167 * config/tc-i386.c (i386_immediate): Check illegal immediate
1170 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1172 * config/tc-i386.c: Formatting.
1173 (output_disp, output_imm): ISO C90 params.
1175 * frags.c (frag_offset_fixed_p): Constify args.
1176 * frags.h (frag_offset_fixed_p): Ditto.
1178 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1179 (COFF_MAGIC): Delete.
1181 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1183 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1185 * po/POTFILES.in: Regenerated.
1187 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1189 * doc/as.texinfo: Mention that some .type syntaxes are not
1190 supported on all architectures.
1192 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1194 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1195 instructions when such transformations have been disabled.
1197 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1199 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1200 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1201 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1202 decoding the loop instructions. Remove current_offset variable.
1203 (xtensa_fix_short_loop_frags): Likewise.
1204 (min_bytes_to_other_loop_end): Remove current_offset argument.
1206 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1208 * config/tc-z80.c (z80_optimize_expr): Removed.
1209 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1211 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1213 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1214 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1215 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1216 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1217 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1218 at90can64, at90usb646, at90usb647, at90usb1286 and
1220 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1222 2006-04-07 Paul Brook <paul@codesourcery.com>
1224 * config/tc-arm.c (parse_operands): Set default error message.
1226 2006-04-07 Paul Brook <paul@codesourcery.com>
1228 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1230 2006-04-07 Paul Brook <paul@codesourcery.com>
1232 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1234 2006-04-07 Paul Brook <paul@codesourcery.com>
1236 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1237 (move_or_literal_pool): Handle Thumb-2 instructions.
1238 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1240 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1243 * config/tc-i386.c (match_template): Move 64-bit operand tests
1246 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1248 * po/Make-in: Add install-html target.
1249 * Makefile.am: Add install-html and install-html-recursive targets.
1250 * Makefile.in: Regenerate.
1251 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1252 * configure: Regenerate.
1253 * doc/Makefile.am: Add install-html and install-html-am targets.
1254 * doc/Makefile.in: Regenerate.
1256 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1258 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1261 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1262 Daniel Jacobowitz <dan@codesourcery.com>
1264 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1265 (GOTT_BASE, GOTT_INDEX): New.
1266 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1267 GOTT_INDEX when generating VxWorks PIC.
1268 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1269 use the generic *-*-vxworks* stanza instead.
1271 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1274 * frags.c (frag_offset_fixed_p): New function.
1275 * frags.h (frag_offset_fixed_p): Declare.
1276 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1277 (resolve_expression): Likewise.
1279 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1281 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1282 of the same length but different numbers of slots.
1284 2006-03-30 Andreas Schwab <schwab@suse.de>
1286 * configure.in: Fix help string for --enable-targets option.
1287 * configure: Regenerate.
1289 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1291 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1292 (m68k_ip): ... here. Use for all chips. Protect against buffer
1293 overrun and avoid excessive copying.
1295 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1296 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1297 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1298 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1299 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1300 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1301 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1302 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1303 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1304 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1305 (struct m68k_cpu): Change chip field to control_regs.
1306 (current_chip): Remove.
1307 (control_regs): New.
1308 (m68k_archs, m68k_extensions): Adjust.
1309 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1310 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1311 (find_cf_chip): Reimplement for new organization of cpu table.
1312 (select_control_regs): Remove.
1314 (struct save_opts): Save control regs, not chip.
1315 (s_save, s_restore): Adjust.
1316 (m68k_lookup_cpu): Give deprecated warning when necessary.
1317 (m68k_init_arch): Adjust.
1318 (md_show_usage): Adjust for new cpu table organization.
1320 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1322 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1323 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1324 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1326 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1327 (any_gotrel): New rule.
1328 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1329 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1331 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1332 (bfin_pic_ptr): New function.
1333 (md_pseudo_table): Add it for ".picptr".
1334 (OPTION_FDPIC): New macro.
1335 (md_longopts): Add -mfdpic.
1336 (md_parse_option): Handle it.
1337 (md_begin): Set BFD flags.
1338 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1339 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1341 * Makefile.am (bfin-parse.o): Update dependencies.
1342 (DEPTC_bfin_elf): Likewise.
1343 * Makefile.in: Regenerate.
1345 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1347 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1348 mcfemac instead of mcfmac.
1350 2006-03-23 Michael Matz <matz@suse.de>
1352 * config/tc-i386.c (type_names): Correct placement of 'static'.
1353 (reloc): Map some more relocs to their 64 bit counterpart when
1355 (output_insn): Work around breakage if DEBUG386 is defined.
1356 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1357 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1358 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1359 different from i386.
1360 (output_imm): Ditto.
1361 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1363 (md_convert_frag): Jumps can now be larger than 2GB away, error
1365 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1366 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1368 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1369 Daniel Jacobowitz <dan@codesourcery.com>
1370 Phil Edwards <phil@codesourcery.com>
1371 Zack Weinberg <zack@codesourcery.com>
1372 Mark Mitchell <mark@codesourcery.com>
1373 Nathan Sidwell <nathan@codesourcery.com>
1375 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1376 (md_begin): Complain about -G being used for PIC. Don't change
1377 the text, data and bss alignments on VxWorks.
1378 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1379 generating VxWorks PIC.
1380 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1381 (macro): Likewise, but do not treat la $25 specially for
1382 VxWorks PIC, and do not handle jal.
1383 (OPTION_MVXWORKS_PIC): New macro.
1384 (md_longopts): Add -mvxworks-pic.
1385 (md_parse_option): Don't complain about using PIC and -G together here.
1386 Handle OPTION_MVXWORKS_PIC.
1387 (md_estimate_size_before_relax): Always use the first relaxation
1388 sequence on VxWorks.
1389 * config/tc-mips.h (VXWORKS_PIC): New.
1391 2006-03-21 Paul Brook <paul@codesourcery.com>
1393 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1395 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1397 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1398 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1399 (get_loop_align_size): New.
1400 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1401 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1402 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1403 (get_noop_aligned_address): Use get_loop_align_size.
1404 (get_aligned_diff): Likewise.
1406 2006-03-21 Paul Brook <paul@codesourcery.com>
1408 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1410 2006-03-20 Paul Brook <paul@codesourcery.com>
1412 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1413 (do_t_branch): Encode branches inside IT blocks as unconditional.
1414 (do_t_cps): New function.
1415 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1416 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1417 (opcode_lookup): Allow conditional suffixes on all instructions in
1419 (md_assemble): Advance condexec state before checking for errors.
1420 (insns): Use do_t_cps.
1422 2006-03-20 Paul Brook <paul@codesourcery.com>
1424 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1425 outputting the insn.
1427 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1429 * config/tc-vax.c: Update copyright year.
1430 * config/tc-vax.h: Likewise.
1432 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1434 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1436 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1438 2006-03-17 Paul Brook <paul@codesourcery.com>
1440 * config/tc-arm.c (insns): Add ldm and stm.
1442 2006-03-17 Ben Elliston <bje@au.ibm.com>
1445 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1447 2006-03-16 Paul Brook <paul@codesourcery.com>
1449 * config/tc-arm.c (insns): Add "svc".
1451 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1453 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1454 flag and avoid double underscore prefixes.
1456 2006-03-10 Paul Brook <paul@codesourcery.com>
1458 * config/tc-arm.c (md_begin): Handle EABIv5.
1459 (arm_eabis): Add EF_ARM_EABI_VER5.
1460 * doc/c-arm.texi: Document -meabi=5.
1462 2006-03-10 Ben Elliston <bje@au.ibm.com>
1464 * app.c (do_scrub_chars): Simplify string handling.
1466 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1467 Daniel Jacobowitz <dan@codesourcery.com>
1468 Zack Weinberg <zack@codesourcery.com>
1469 Nathan Sidwell <nathan@codesourcery.com>
1470 Paul Brook <paul@codesourcery.com>
1471 Ricardo Anguiano <anguiano@codesourcery.com>
1472 Phil Edwards <phil@codesourcery.com>
1474 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1475 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1477 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1478 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1479 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1481 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1483 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1484 even when using the text-section-literals option.
1486 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1488 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1490 (m68k_ip): <case 'J'> Check we have some control regs.
1491 (md_parse_option): Allow raw arch switch.
1492 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1493 whether 68881 or cfloat was meant by -mfloat.
1494 (md_show_usage): Adjust extension display.
1495 (m68k_elf_final_processing): Adjust.
1497 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1499 * config/tc-avr.c (avr_mod_hash_value): New function.
1500 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1501 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1502 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1503 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1505 (tc_gen_reloc): Handle substractions of symbols, if possible do
1506 fixups, abort otherwise.
1507 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1508 tc_fix_adjustable): Define.
1510 2006-03-02 James E Wilson <wilson@specifix.com>
1512 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1513 change the template, then clear md.slot[curr].end_of_insn_group.
1515 2006-02-28 Jan Beulich <jbeulich@novell.com>
1517 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1519 2006-02-28 Jan Beulich <jbeulich@novell.com>
1522 * macro.c (getstring): Don't treat parentheses special anymore.
1523 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1524 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1527 2006-02-28 Mat <mat@csail.mit.edu>
1529 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1531 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1533 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1535 (CFI_signal_frame): Define.
1536 (cfi_pseudo_table): Add .cfi_signal_frame.
1537 (dot_cfi): Handle CFI_signal_frame.
1538 (output_cie): Handle cie->signal_frame.
1539 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1540 different. Copy signal_frame from FDE to newly created CIE.
1541 * doc/as.texinfo: Document .cfi_signal_frame.
1543 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1545 * doc/Makefile.am: Add html target.
1546 * doc/Makefile.in: Regenerate.
1547 * po/Make-in: Add html target.
1549 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1551 * config/tc-i386.c (output_insn): Support Intel Merom New
1554 * config/tc-i386.h (CpuMNI): New.
1555 (CpuUnknownFlags): Add CpuMNI.
1557 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1559 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1560 (hpriv_reg_table): New table for hyperprivileged registers.
1561 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1564 2006-02-24 DJ Delorie <dj@redhat.com>
1566 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1567 (tc_gen_reloc): Don't define.
1568 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1569 (OPTION_LINKRELAX): New.
1570 (md_longopts): Add it.
1572 (md_parse_options): Set it.
1573 (md_assemble): Emit relaxation relocs as needed.
1574 (md_convert_frag): Emit relaxation relocs as needed.
1575 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1576 (m32c_apply_fix): New.
1577 (tc_gen_reloc): New.
1578 (m32c_force_relocation): Force out jump relocs when relaxing.
1579 (m32c_fix_adjustable): Return false if relaxing.
1581 2006-02-24 Paul Brook <paul@codesourcery.com>
1583 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1584 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1585 (struct asm_barrier_opt): Define.
1586 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1587 (parse_psr): Accept V7M psr names.
1588 (parse_barrier): New function.
1589 (enum operand_parse_code): Add OP_oBARRIER.
1590 (parse_operands): Implement OP_oBARRIER.
1591 (do_barrier): New function.
1592 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1593 (do_t_cpsi): Add V7M restrictions.
1594 (do_t_mrs, do_t_msr): Validate V7M variants.
1595 (md_assemble): Check for NULL variants.
1596 (v7m_psrs, barrier_opt_names): New tables.
1597 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1598 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1599 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1600 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1601 (struct cpu_arch_ver_table): Define.
1602 (cpu_arch_ver): New.
1603 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1604 Tag_CPU_arch_profile.
1605 * doc/c-arm.texi: Document new cpu and arch options.
1607 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1609 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1611 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1613 * config/tc-ia64.c: Update copyright years.
1615 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1617 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1620 2005-02-22 Paul Brook <paul@codesourcery.com>
1622 * config/tc-arm.c (do_pld): Remove incorrect write to
1624 (encode_thumb32_addr_mode): Use correct operand.
1626 2006-02-21 Paul Brook <paul@codesourcery.com>
1628 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1630 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1631 Anil Paranjape <anilp1@kpitcummins.com>
1632 Shilin Shakti <shilins@kpitcummins.com>
1634 * Makefile.am: Add xc16x related entry.
1635 * Makefile.in: Regenerate.
1636 * configure.in: Added xc16x related entry.
1637 * configure: Regenerate.
1638 * config/tc-xc16x.h: New file
1639 * config/tc-xc16x.c: New file
1640 * doc/c-xc16x.texi: New file for xc16x
1641 * doc/all.texi: Entry for xc16x
1642 * doc/Makefile.texi: Added c-xc16x.texi
1643 * NEWS: Announce the support for the new target.
1645 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1647 * configure.tgt: set emulation for mips-*-netbsd*
1649 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1651 * config.in: Rebuilt.
1653 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1655 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1656 from 1, not 0, in error messages.
1657 (md_assemble): Simplify special-case check for ENTRY instructions.
1658 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1659 operand in error message.
1661 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1663 * configure.tgt (arm-*-linux-gnueabi*): Change to
1666 2006-02-10 Nick Clifton <nickc@redhat.com>
1668 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1669 32-bit value is propagated into the upper bits of a 64-bit long.
1671 * config/tc-arc.c (init_opcode_tables): Fix cast.
1672 (arc_extoper, md_operand): Likewise.
1674 2006-02-09 David Heine <dlheine@tensilica.com>
1676 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1677 each relaxation step.
1679 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1681 * configure.in (CHECK_DECLS): Add vsnprintf.
1682 * configure: Regenerate.
1683 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1684 include/declare here, but...
1685 * as.h: Move code detecting VARARGS idiom to the top.
1686 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1687 (vsnprintf): Declare if not already declared.
1689 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1691 * as.c (close_output_file): New.
1692 (main): Register close_output_file with xatexit before
1693 dump_statistics. Don't call output_file_close.
1695 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1697 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1698 mcf5329_control_regs): New.
1699 (not_current_architecture, selected_arch, selected_cpu): New.
1700 (m68k_archs, m68k_extensions): New.
1701 (archs): Renamed to ...
1702 (m68k_cpus): ... here. Adjust.
1704 (md_pseudo_table): Add arch and cpu directives.
1705 (find_cf_chip, m68k_ip): Adjust table scanning.
1706 (no_68851, no_68881): Remove.
1707 (md_assemble): Lazily initialize.
1708 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1709 (md_init_after_args): Move functionality to m68k_init_arch.
1710 (mri_chip): Adjust table scanning.
1711 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1712 options with saner parsing.
1713 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1714 m68k_init_arch): New.
1715 (s_m68k_cpu, s_m68k_arch): New.
1716 (md_show_usage): Adjust.
1717 (m68k_elf_final_processing): Set CF EF flags.
1718 * config/tc-m68k.h (m68k_init_after_args): Remove.
1719 (tc_init_after_args): Remove.
1720 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1721 (M68k-Directives): Document .arch and .cpu directives.
1723 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1725 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1726 synonyms for equ and defl.
1727 (z80_cons_fix_new): New function.
1728 (emit_byte): Disallow relative jumps to absolute locations.
1729 (emit_data): Only handle defb, prototype changed, because defb is
1730 now handled as pseudo-op rather than an instruction.
1731 (instab): Entries for defb,defw,db,dw moved from here...
1732 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1733 Add entries for def24,def32,d24,d32.
1734 (md_assemble): Improved error handling.
1735 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1736 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1737 (z80_cons_fix_new): Declare.
1738 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1739 (def24,d24,def32,d32): New pseudo-ops.
1741 2006-02-02 Paul Brook <paul@codesourcery.com>
1743 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1745 2005-02-02 Paul Brook <paul@codesourcery.com>
1747 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1748 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1749 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1750 T2_OPCODE_RSB): Define.
1751 (thumb32_negate_data_op): New function.
1752 (md_apply_fix): Use it.
1754 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1756 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1758 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1759 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1761 (relaxation_requirements): Add pfinish_frag argument and use it to
1762 replace setting tinsn->record_fix fields.
1763 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1764 and vinsn_to_insnbuf. Remove references to record_fix and
1765 slot_sub_symbols fields.
1766 (xtensa_mark_narrow_branches): Delete unused code.
1767 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1769 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1771 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1772 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1773 of the record_fix field. Simplify error messages for unexpected
1775 (set_expr_symbol_offset_diff): Delete.
1777 2006-01-31 Paul Brook <paul@codesourcery.com>
1779 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1781 2006-01-31 Paul Brook <paul@codesourcery.com>
1782 Richard Earnshaw <rearnsha@arm.com>
1784 * config/tc-arm.c: Use arm_feature_set.
1785 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1786 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1787 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1790 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1791 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1792 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1793 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1795 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1796 (arm_opts): Move old cpu/arch options from here...
1797 (arm_legacy_opts): ... to here.
1798 (md_parse_option): Search arm_legacy_opts.
1799 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1800 (arm_float_abis, arm_eabis): Make const.
1802 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1804 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1806 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1808 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1809 in load immediate intruction.
1811 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1813 * config/bfin-parse.y (value_match): Use correct conversion
1814 specifications in template string for __FILE__ and __LINE__.
1818 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1820 Introduce TLS descriptors for i386 and x86_64.
1821 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1822 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1823 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1824 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1825 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1827 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1828 (lex_got): Handle @tlsdesc and @tlscall.
1829 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1831 2006-01-11 Nick Clifton <nickc@redhat.com>
1833 Fixes for building on 64-bit hosts:
1834 * config/tc-avr.c (mod_index): New union to allow conversion
1835 between pointers and integers.
1836 (md_begin, avr_ldi_expression): Use it.
1837 * config/tc-i370.c (md_assemble): Add cast for argument to print
1839 * config/tc-tic54x.c (subsym_substitute): Likewise.
1840 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1841 opindex field of fr_cgen structure into a pointer so that it can
1842 be stored in a frag.
1843 * config/tc-mn10300.c (md_assemble): Likewise.
1844 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1846 * config/tc-v850.c: Replace uses of (int) casts with correct
1849 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1852 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1854 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1857 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1858 a local-label reference.
1860 For older changes see ChangeLog-2005
1866 version-control: never