1 /* tc-m32c.c -- Assembler for the Renesas M32C.
2 Copyright (C) 2005 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "opcodes/m32c-desc.h"
27 #include "opcodes/m32c-opc.h"
29 #include "elf/common.h"
32 #include "libiberty.h"
33 #include "safe-ctype.h"
35 /* Structure to hold all of the different components
36 describing an individual instruction. */
39 const CGEN_INSN
* insn
;
40 const CGEN_INSN
* orig_insn
;
43 CGEN_INSN_INT buffer
[1];
44 #define INSN_VALUE(buf) (*(buf))
46 unsigned char buffer
[CGEN_MAX_INSN_SIZE
];
47 #define INSN_VALUE(buf) (buf)
52 fixS
* fixups
[GAS_CGEN_MAX_FIXUPS
];
53 int indices
[MAX_OPERAND_INSTANCES
];
57 const char comment_chars
[] = ";";
58 const char line_comment_chars
[] = "#";
59 const char line_separator_chars
[] = "|";
60 const char EXP_CHARS
[] = "eE";
61 const char FLT_CHARS
[] = "dD";
63 #define M32C_SHORTOPTS ""
64 const char * md_shortopts
= M32C_SHORTOPTS
;
66 /* assembler options */
67 #define OPTION_CPU_M16C (OPTION_MD_BASE)
68 #define OPTION_CPU_M32C (OPTION_MD_BASE + 1)
70 struct option md_longopts
[] =
72 { "m16c", no_argument
, NULL
, OPTION_CPU_M16C
},
73 { "m32c", no_argument
, NULL
, OPTION_CPU_M32C
},
74 {NULL
, no_argument
, NULL
, 0}
76 size_t md_longopts_size
= sizeof (md_longopts
);
80 #define DEFAULT_MACHINE bfd_mach_m16c
81 #define DEFAULT_FLAGS EF_M32C_CPU_M16C
83 static unsigned long m32c_mach
= bfd_mach_m16c
;
84 static int cpu_mach
= (1 << MACH_M16C
);
87 /* Flags to set in the elf header */
88 static flagword m32c_flags
= DEFAULT_FLAGS
;
90 static char default_isa
= 1 << (7 - ISA_M16C
);
91 static CGEN_BITSET m32c_isa
= {1, & default_isa
};
94 set_isa (enum isa_attr isa_num
)
96 cgen_bitset_set (& m32c_isa
, isa_num
);
99 static void s_bss (int);
102 md_parse_option (int c
, char * arg ATTRIBUTE_UNUSED
)
106 case OPTION_CPU_M16C
:
107 m32c_flags
= (m32c_flags
& ~EF_M32C_CPU_MASK
) | EF_M32C_CPU_M16C
;
108 m32c_mach
= bfd_mach_m16c
;
109 cpu_mach
= (1 << MACH_M16C
);
113 case OPTION_CPU_M32C
:
114 m32c_flags
= (m32c_flags
& ~EF_M32C_CPU_MASK
) | EF_M32C_CPU_M32C
;
115 m32c_mach
= bfd_mach_m32c
;
116 cpu_mach
= (1 << MACH_M32C
);
127 md_show_usage (FILE * stream
)
129 fprintf (stream
, _(" M32C specific command line options:\n"));
133 s_bss (int ignore ATTRIBUTE_UNUSED
)
137 temp
= get_absolute_expression ();
138 subseg_set (bss_section
, (subsegT
) temp
);
139 demand_empty_rest_of_line ();
142 /* The target specific pseudo-ops which we support. */
143 const pseudo_typeS md_pseudo_table
[] =
154 /* Initialize the `cgen' interface. */
156 /* Set the machine number and endian. */
157 gas_cgen_cpu_desc
= m32c_cgen_cpu_open (CGEN_CPU_OPEN_MACHS
, cpu_mach
,
158 CGEN_CPU_OPEN_ENDIAN
,
160 CGEN_CPU_OPEN_ISAS
, & m32c_isa
,
163 m32c_cgen_init_asm (gas_cgen_cpu_desc
);
165 /* This is a callback from cgen to gas to parse operands. */
166 cgen_set_parse_operand_fn (gas_cgen_cpu_desc
, gas_cgen_parse_operand
);
168 /* Set the ELF flags if desired. */
170 bfd_set_private_flags (stdoutput
, m32c_flags
);
172 /* Set the machine type */
173 bfd_default_set_arch_mach (stdoutput
, bfd_arch_m32c
, m32c_mach
);
183 /* Pad with nops for objdump. */
184 n_nops
= (32 - ((insn_size
) % 32)) / 8;
185 for (i
= 1; i
<= n_nops
; i
++)
190 m32c_start_line_hook (void)
192 #if 0 /* not necessary....handled in the .cpu file */
193 char *s
= input_line_pointer
;
196 for (s
= input_line_pointer
; s
&& s
[0] != '\n'; s
++)
200 /* Remove :g suffix. Squeeze out blanks. */
203 for (sg
= s
- 1; sg
&& sg
>= input_line_pointer
; sg
--)
209 input_line_pointer
+= 2;
216 /* Process [[indirect-operands]] in instruction str. */
219 m32c_indirect_operand (char *str
)
226 enum indirect_type
{none
, relative
, absolute
} ;
227 enum indirect_type indirection
[3] = { none
, none
, none
};
228 int brace_n
[3] = { 0, 0, 0 };
233 for (s
= str
; *s
; s
++)
237 /* [abs] where abs is not a0 or a1 */
238 if (s
[1] == '[' && ! (s
[2] == 'a' && (s
[3] == '0' || s
[3] == '1'))
239 && (ISBLANK (s
[0]) || s
[0] == ','))
240 indirection
[operand
] = absolute
;
241 if (s
[0] == ']' && s
[1] == ']')
242 indirection
[operand
] = relative
;
243 if (s
[0] == '[' && s
[1] == '[')
244 indirection
[operand
] = relative
;
247 if (indirection
[1] == none
&& indirection
[2] == none
)
251 ns_len
= strlen (str
);
252 new_str
= (char*) xmalloc (ns_len
);
254 ns_end
= ns
+ ns_len
;
256 for (s
= str
; *s
; s
++)
261 if (s
[0] == '[' && ! brace_n
[operand
])
263 brace_n
[operand
] += 1;
264 /* Squeeze [[ to [ if this is an indirect operand. */
265 if (indirection
[operand
] != none
)
269 else if (s
[0] == '[' && brace_n
[operand
])
271 brace_n
[operand
] += 1;
273 else if (s
[0] == ']' && s
[1] == ']' && indirection
[operand
] == relative
)
275 s
+= 1; /* skip one ]. */
276 brace_n
[operand
] -= 2; /* allow for 2 [. */
278 else if (s
[0] == ']' && indirection
[operand
] == absolute
)
280 brace_n
[operand
] -= 1;
281 continue; /* skip closing ]. */
283 else if (s
[0] == ']')
285 brace_n
[operand
] -= 1;
295 for (operand
= 1; operand
<= 2; operand
++)
296 if (brace_n
[operand
])
298 fprintf (stderr
, "Unmatched [[operand-%d]] %d\n", operand
, brace_n
[operand
]);
301 if (indirection
[1] != none
&& indirection
[2] != none
)
302 md_assemble ("src-dest-indirect");
303 else if (indirection
[1] != none
)
304 md_assemble ("src-indirect");
305 else if (indirection
[2] != none
)
306 md_assemble ("dest-indirect");
308 md_assemble (new_str
);
314 md_assemble (char * str
)
316 static int last_insn_had_delay_slot
= 0;
320 if (m32c_mach
== bfd_mach_m32c
&& m32c_indirect_operand (str
))
323 /* Initialize GAS's cgen interface for a new instruction. */
324 gas_cgen_init_parse ();
326 insn
.insn
= m32c_cgen_assemble_insn
327 (gas_cgen_cpu_desc
, str
, & insn
.fields
, insn
.buffer
, & errmsg
);
331 as_bad ("%s", errmsg
);
335 /* Doesn't really matter what we pass for RELAX_P here. */
336 gas_cgen_finish_insn (insn
.insn
, insn
.buffer
,
337 CGEN_FIELDS_BITSIZE (& insn
.fields
), 1, NULL
);
339 last_insn_had_delay_slot
340 = CGEN_INSN_ATTR_VALUE (insn
.insn
, CGEN_INSN_DELAY_SLOT
);
341 insn_size
= CGEN_INSN_BITSIZE(insn
.insn
);
344 /* The syntax in the manual says constants begin with '#'.
345 We just ignore it. */
348 md_operand (expressionS
* exp
)
350 /* In case of a syntax error, escape back to try next syntax combo. */
351 if (exp
->X_op
== O_absent
)
352 gas_cgen_md_operand (exp
);
356 md_section_align (segT segment
, valueT size
)
358 int align
= bfd_get_section_alignment (stdoutput
, segment
);
359 return ((size
+ (1 << align
) - 1) & (-1 << align
));
363 md_undefined_symbol (char * name ATTRIBUTE_UNUSED
)
368 const relax_typeS md_relax_table
[] =
371 1) most positive reach of this state,
372 2) most negative reach of this state,
373 3) how many bytes this mode will have in the variable part of the frag
374 4) which index into the table to try if we can't fit into this one. */
376 /* 0 */ { 0, 0, 0, 0 }, /* unused */
377 /* 1 */ { 0, 0, 0, 0 }, /* marker for "don't know yet" */
379 /* 2 */ { 127, -128, 2, 3 }, /* jcnd16_5.b */
380 /* 3 */ { 32767, -32768, 5, 4 }, /* jcnd16_5.w */
381 /* 4 */ { 0, 0, 6, 0 }, /* jcnd16_5.a */
383 /* 5 */ { 127, -128, 2, 6 }, /* jcnd16.b */
384 /* 6 */ { 32767, -32768, 5, 7 }, /* jcnd16.w */
385 /* 7 */ { 0, 0, 6, 0 }, /* jcnd16.a */
387 /* 8 */ { 8, 1, 1, 9 }, /* jmp16.s */
388 /* 9 */ { 127, -128, 2, 10 }, /* jmp16.b */
389 /* 10 */ { 32767, -32768, 3, 11 }, /* jmp16.w */
390 /* 11 */ { 0, 0, 4, 0 }, /* jmp16.a */
392 /* 12 */ { 127, -128, 2, 13 }, /* jcnd32.b */
393 /* 13 */ { 32767, -32768, 5, 14 }, /* jcnd32.w */
394 /* 14 */ { 0, 0, 6, 0 }, /* jcnd32.a */
396 /* 15 */ { 8, 1, 1, 16 }, /* jmp32.s */
397 /* 16 */ { 127, -128, 2, 17 }, /* jmp32.b */
398 /* 17 */ { 32767, -32768, 3, 18 }, /* jmp32.w */
399 /* 18 */ { 0, 0, 4, 0 }, /* jmp32.a */
401 /* 19 */ { 32767, -32768, 3, 20 }, /* jsr16.w */
402 /* 20 */ { 0, 0, 4, 0 }, /* jsr16.a */
403 /* 21 */ { 32767, -32768, 3, 11 }, /* jsr32.w */
404 /* 22 */ { 0, 0, 4, 0 } /* jsr32.a */
408 M32C_MACRO_JCND16_5_W
,
409 M32C_MACRO_JCND16_5_A
,
420 int pcrel_aim_offset
;
421 } subtype_mappings
[] = {
422 /* 0 */ { 0, 0, 0, 0 },
423 /* 1 */ { 0, 0, 0, 0 },
425 /* 2 */ { M32C_INSN_JCND16_5
, 2, -M32C_MACRO_JCND16_5_A
, 1 },
426 /* 3 */ { -M32C_MACRO_JCND16_5_W
, 5, -M32C_MACRO_JCND16_5_A
, 4 },
427 /* 4 */ { -M32C_MACRO_JCND16_5_A
, 6, -M32C_MACRO_JCND16_5_A
, 0 },
429 /* 5 */ { M32C_INSN_JCND16
, 3, -M32C_MACRO_JCND16_A
, 1 },
430 /* 6 */ { -M32C_MACRO_JCND16_W
, 6, -M32C_MACRO_JCND16_A
, 4 },
431 /* 7 */ { -M32C_MACRO_JCND16_A
, 7, -M32C_MACRO_JCND16_A
, 0 },
433 /* 8 */ { M32C_INSN_JMP16_S
, 1, M32C_INSN_JMP16_A
, 0 },
434 /* 9 */ { M32C_INSN_JMP16_B
, 2, M32C_INSN_JMP16_A
, 1 },
435 /* 10 */ { M32C_INSN_JMP16_W
, 3, M32C_INSN_JMP16_A
, 2 },
436 /* 11 */ { M32C_INSN_JMP16_A
, 4, M32C_INSN_JMP16_A
, 0 },
438 /* 12 */ { M32C_INSN_JCND32
, 2, -M32C_MACRO_JCND32_A
, 1 },
439 /* 13 */ { -M32C_MACRO_JCND32_W
, 5, -M32C_MACRO_JCND32_A
, 4 },
440 /* 14 */ { -M32C_MACRO_JCND32_A
, 6, -M32C_MACRO_JCND32_A
, 0 },
442 /* 15 */ { M32C_INSN_JMP32_S
, 1, M32C_INSN_JMP32_A
, 0 },
443 /* 16 */ { M32C_INSN_JMP32_B
, 2, M32C_INSN_JMP32_A
, 1 },
444 /* 17 */ { M32C_INSN_JMP32_W
, 3, M32C_INSN_JMP32_A
, 2 },
445 /* 18 */ { M32C_INSN_JMP32_A
, 4, M32C_INSN_JMP32_A
, 0 },
447 /* 19 */ { M32C_INSN_JSR16_W
, 3, M32C_INSN_JSR16_A
, 2 },
448 /* 20 */ { M32C_INSN_JSR16_A
, 4, M32C_INSN_JSR16_A
, 0 },
449 /* 21 */ { M32C_INSN_JSR32_W
, 3, M32C_INSN_JSR32_A
, 2 },
450 /* 22 */ { M32C_INSN_JSR32_A
, 4, M32C_INSN_JSR32_A
, 0 }
452 #define NUM_MAPPINGS (sizeof (subtype_mappings) / sizeof (subtype_mappings[0]))
455 m32c_prepare_relax_scan (fragS
*fragP
, offsetT
*aim
, relax_substateT this_state
)
457 symbolS
*symbolP
= fragP
->fr_symbol
;
458 if (symbolP
&& !S_IS_DEFINED (symbolP
))
460 /* Adjust for m32c pcrel not being relative to the next opcode. */
461 *aim
+= subtype_mappings
[this_state
].pcrel_aim_offset
;
465 insn_to_subtype (int insn
)
468 for (i
=0; i
<NUM_MAPPINGS
; i
++)
469 if (insn
== subtype_mappings
[i
].insn
)
471 /*printf("mapping %d used\n", i);*/
477 /* Return an initial guess of the length by which a fragment must grow to
478 hold a branch to reach its destination.
479 Also updates fr_type/fr_subtype as necessary.
481 Called just before doing relaxation.
482 Any symbol that is now undefined will not become defined.
483 The guess for fr_var is ACTUALLY the growth beyond fr_fix.
484 Whatever we do to grow fr_fix or fr_var contributes to our returned value.
485 Although it may not be explicit in the frag, pretend fr_var starts with a
489 md_estimate_size_before_relax (fragS
* fragP
, segT segment ATTRIBUTE_UNUSED
)
491 int where
= fragP
->fr_opcode
- fragP
->fr_literal
;
493 if (fragP
->fr_subtype
== 1)
494 fragP
->fr_subtype
= insn_to_subtype (fragP
->fr_cgen
.insn
->base
->num
);
496 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
500 new_insn
= subtype_mappings
[fragP
->fr_subtype
].insn_for_extern
;
501 fragP
->fr_subtype
= insn_to_subtype (new_insn
);
504 if (fragP
->fr_cgen
.insn
->base
505 && fragP
->fr_cgen
.insn
->base
->num
506 != subtype_mappings
[fragP
->fr_subtype
].insn
507 && subtype_mappings
[fragP
->fr_subtype
].insn
> 0)
509 int new_insn
= subtype_mappings
[fragP
->fr_subtype
].insn
;
512 fragP
->fr_cgen
.insn
= (fragP
->fr_cgen
.insn
513 - fragP
->fr_cgen
.insn
->base
->num
518 return subtype_mappings
[fragP
->fr_subtype
].bytes
- (fragP
->fr_fix
- where
);
521 /* *fragP has been relaxed to its final size, and now needs to have
522 the bytes inside it modified to conform to the new size.
524 Called after relaxation is finished.
525 fragP->fr_type == rs_machine_dependent.
526 fragP->fr_subtype is the subtype of what the address relaxed to. */
529 target_address_for (fragS
*frag
)
531 int rv
= frag
->fr_offset
;
532 symbolS
*sym
= frag
->fr_symbol
;
535 rv
+= S_GET_VALUE (sym
);
537 /*printf("target_address_for returns %d\n", rv);*/
542 md_convert_frag (bfd
* abfd ATTRIBUTE_UNUSED
,
543 segT sec ATTRIBUTE_UNUSED
,
544 fragS
* fragP ATTRIBUTE_UNUSED
)
549 int where
= fragP
->fr_opcode
- fragP
->fr_literal
;
550 unsigned char *op
= (unsigned char *)fragP
->fr_opcode
;
552 addend
= target_address_for (fragP
) - (fragP
->fr_address
+ where
);
553 new_insn
= subtype_mappings
[fragP
->fr_subtype
].insn
;
555 fragP
->fr_fix
= where
+ subtype_mappings
[fragP
->fr_subtype
].bytes
;
557 switch (subtype_mappings
[fragP
->fr_subtype
].insn
)
559 case M32C_INSN_JCND16_5
:
561 operand
= M32C_OPERAND_LAB_8_8
;
564 case -M32C_MACRO_JCND16_5_W
:
569 op
[4] = (addend
- 3) >> 8;
570 operand
= M32C_OPERAND_LAB_8_16
;
572 new_insn
= M32C_INSN_JMP16_W
;
575 case -M32C_MACRO_JCND16_5_A
:
579 operand
= M32C_OPERAND_LAB_8_24
;
581 new_insn
= M32C_INSN_JMP16_A
;
585 case M32C_INSN_JCND16
:
587 operand
= M32C_OPERAND_LAB_16_8
;
590 case -M32C_MACRO_JCND16_W
:
595 op
[5] = (addend
- 4) >> 8;
596 operand
= M32C_OPERAND_LAB_8_16
;
598 new_insn
= M32C_INSN_JMP16_W
;
601 case -M32C_MACRO_JCND16_A
:
605 operand
= M32C_OPERAND_LAB_8_24
;
607 new_insn
= M32C_INSN_JMP16_A
;
610 case M32C_INSN_JMP16_S
:
611 op
[0] = 0x60 | ((addend
-2) & 0x07);
612 operand
= M32C_OPERAND_LAB_5_3
;
615 case M32C_INSN_JMP16_B
:
618 operand
= M32C_OPERAND_LAB_8_8
;
621 case M32C_INSN_JMP16_W
:
624 op
[2] = (addend
- 1) >> 8;
625 operand
= M32C_OPERAND_LAB_8_16
;
628 case M32C_INSN_JMP16_A
:
633 operand
= M32C_OPERAND_LAB_8_24
;
636 case M32C_INSN_JCND32
:
638 operand
= M32C_OPERAND_LAB_8_8
;
641 case -M32C_MACRO_JCND32_W
:
646 op
[4] = (addend
- 3) >> 8;
647 operand
= M32C_OPERAND_LAB_8_16
;
649 new_insn
= M32C_INSN_JMP32_W
;
652 case -M32C_MACRO_JCND32_A
:
656 operand
= M32C_OPERAND_LAB_8_24
;
658 new_insn
= M32C_INSN_JMP32_A
;
663 case M32C_INSN_JMP32_S
:
664 addend
= ((addend
-2) & 0x07);
665 op
[0] = 0x4a | (addend
& 0x01) | ((addend
<< 3) & 0x30);
666 operand
= M32C_OPERAND_LAB32_JMP_S
;
669 case M32C_INSN_JMP32_B
:
672 operand
= M32C_OPERAND_LAB_8_8
;
675 case M32C_INSN_JMP32_W
:
678 op
[2] = (addend
- 1) >> 8;
679 operand
= M32C_OPERAND_LAB_8_16
;
682 case M32C_INSN_JMP32_A
:
687 operand
= M32C_OPERAND_LAB_8_24
;
691 case M32C_INSN_JSR16_W
:
694 op
[2] = (addend
- 1) >> 8;
695 operand
= M32C_OPERAND_LAB_8_16
;
698 case M32C_INSN_JSR16_A
:
703 operand
= M32C_OPERAND_LAB_8_24
;
706 case M32C_INSN_JSR32_W
:
709 op
[2] = (addend
- 1) >> 8;
710 operand
= M32C_OPERAND_LAB_8_16
;
713 case M32C_INSN_JSR32_A
:
718 operand
= M32C_OPERAND_LAB_8_24
;
724 printf("\nHey! Need more opcode converters! missing: %d %s\n\n",
726 fragP
->fr_cgen
.insn
->base
->name
);
730 if (S_GET_SEGMENT (fragP
->fr_symbol
) != sec
731 || operand
== M32C_OPERAND_LAB_8_24
)
733 assert (fragP
->fr_cgen
.insn
!= 0);
734 gas_cgen_record_fixup (fragP
,
737 (fragP
->fr_fix
- where
) * 8,
738 cgen_operand_lookup_by_num (gas_cgen_cpu_desc
,
740 fragP
->fr_cgen
.opinfo
,
741 fragP
->fr_symbol
, fragP
->fr_offset
);
745 /* Functions concerning relocs. */
747 /* The location from which a PC relative jump should be calculated,
748 given a PC relative reloc. */
751 md_pcrel_from_section (fixS
* fixP
, segT sec
)
753 if (fixP
->fx_addsy
!= (symbolS
*) NULL
754 && (! S_IS_DEFINED (fixP
->fx_addsy
)
755 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
756 /* The symbol is undefined (or is defined but not in this section).
757 Let the linker figure it out. */
760 return (fixP
->fx_frag
->fr_address
+ fixP
->fx_where
);
763 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
764 Returns BFD_RELOC_NONE if no reloc type can be found.
765 *FIXP may be modified if desired. */
767 bfd_reloc_code_real_type
768 md_cgen_lookup_reloc (const CGEN_INSN
* insn ATTRIBUTE_UNUSED
,
769 const CGEN_OPERAND
* operand
,
770 fixS
* fixP ATTRIBUTE_UNUSED
)
772 static const struct op_reloc
{
773 /* A CGEN operand type that can be a relocatable expression. */
774 CGEN_OPERAND_TYPE operand
;
776 /* The appropriate BFD reloc type to use for that. */
777 bfd_reloc_code_real_type reloc
;
779 /* The offset from the start of the instruction to the field to be
780 relocated, in bytes. */
782 } op_reloc_table
[] = {
784 /* PC-REL relocs for 8-bit fields. */
785 { M32C_OPERAND_LAB_16_8
, BFD_RELOC_8_PCREL
, 2 },
786 { M32C_OPERAND_LAB_24_8
, BFD_RELOC_8_PCREL
, 3 },
787 { M32C_OPERAND_LAB_32_8
, BFD_RELOC_8_PCREL
, 4 },
788 { M32C_OPERAND_LAB_40_8
, BFD_RELOC_8_PCREL
, 5 },
790 /* Absolute relocs for 8-bit fields. */
791 { M32C_OPERAND_IMM_8_QI
, BFD_RELOC_8
, 1 },
792 { M32C_OPERAND_IMM_16_QI
, BFD_RELOC_8
, 2 },
793 { M32C_OPERAND_IMM_24_QI
, BFD_RELOC_8
, 3 },
794 { M32C_OPERAND_IMM_32_QI
, BFD_RELOC_8
, 4 },
795 { M32C_OPERAND_IMM_40_QI
, BFD_RELOC_8
, 5 },
796 { M32C_OPERAND_IMM_48_QI
, BFD_RELOC_8
, 6 },
797 { M32C_OPERAND_IMM_56_QI
, BFD_RELOC_8
, 7 },
798 { M32C_OPERAND_DSP_8_S8
, BFD_RELOC_8
, 1 },
799 { M32C_OPERAND_DSP_16_S8
, BFD_RELOC_8
, 2 },
800 { M32C_OPERAND_DSP_24_S8
, BFD_RELOC_8
, 3 },
801 { M32C_OPERAND_DSP_32_S8
, BFD_RELOC_8
, 4 },
802 { M32C_OPERAND_DSP_40_S8
, BFD_RELOC_8
, 5 },
803 { M32C_OPERAND_DSP_48_S8
, BFD_RELOC_8
, 6 },
804 { M32C_OPERAND_DSP_8_U8
, BFD_RELOC_8
, 1 },
805 { M32C_OPERAND_DSP_16_U8
, BFD_RELOC_8
, 2 },
806 { M32C_OPERAND_DSP_24_U8
, BFD_RELOC_8
, 3 },
807 { M32C_OPERAND_DSP_32_U8
, BFD_RELOC_8
, 4 },
808 { M32C_OPERAND_DSP_40_U8
, BFD_RELOC_8
, 5 },
809 { M32C_OPERAND_DSP_48_U8
, BFD_RELOC_8
, 6 },
810 { M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED
, BFD_RELOC_8
, 2 },
811 { M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED
, BFD_RELOC_8
, 2 },
812 { M32C_OPERAND_BITBASE32_24_S11_PREFIXED
, BFD_RELOC_8
, 3 },
813 { M32C_OPERAND_BITBASE32_24_U11_PREFIXED
, BFD_RELOC_8
, 3 },
815 /* Absolute relocs for 16-bit fields. */
816 { M32C_OPERAND_IMM_8_HI
, BFD_RELOC_16
, 1 },
817 { M32C_OPERAND_IMM_16_HI
, BFD_RELOC_16
, 2 },
818 { M32C_OPERAND_IMM_24_HI
, BFD_RELOC_16
, 3 },
819 { M32C_OPERAND_IMM_32_HI
, BFD_RELOC_16
, 4 },
820 { M32C_OPERAND_IMM_40_HI
, BFD_RELOC_16
, 5 },
821 { M32C_OPERAND_IMM_48_HI
, BFD_RELOC_16
, 6 },
822 { M32C_OPERAND_IMM_56_HI
, BFD_RELOC_16
, 7 },
823 { M32C_OPERAND_IMM_64_HI
, BFD_RELOC_16
, 8 },
824 { M32C_OPERAND_DSP_16_S16
, BFD_RELOC_16
, 2 },
825 { M32C_OPERAND_DSP_24_S16
, BFD_RELOC_16
, 3 },
826 { M32C_OPERAND_DSP_32_S16
, BFD_RELOC_16
, 4 },
827 { M32C_OPERAND_DSP_40_S16
, BFD_RELOC_16
, 5 },
828 { M32C_OPERAND_DSP_8_U16
, BFD_RELOC_16
, 1 },
829 { M32C_OPERAND_DSP_16_U16
, BFD_RELOC_16
, 2 },
830 { M32C_OPERAND_DSP_24_U16
, BFD_RELOC_16
, 3 },
831 { M32C_OPERAND_DSP_32_U16
, BFD_RELOC_16
, 4 },
832 { M32C_OPERAND_DSP_40_U16
, BFD_RELOC_16
, 5 },
833 { M32C_OPERAND_DSP_48_U16
, BFD_RELOC_16
, 6 },
834 { M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED
, BFD_RELOC_16
, 2 },
835 { M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED
, BFD_RELOC_16
, 2 },
836 { M32C_OPERAND_BITBASE32_24_S19_PREFIXED
, BFD_RELOC_16
, 3 },
837 { M32C_OPERAND_BITBASE32_24_U19_PREFIXED
, BFD_RELOC_16
, 3 },
839 /* Absolute relocs for 24-bit fields. */
840 { M32C_OPERAND_LAB_8_24
, BFD_RELOC_24
, 1 },
841 { M32C_OPERAND_DSP_8_S24
, BFD_RELOC_24
, 1 },
842 { M32C_OPERAND_DSP_8_U24
, BFD_RELOC_24
, 1 },
843 { M32C_OPERAND_DSP_16_U24
, BFD_RELOC_24
, 2 },
844 { M32C_OPERAND_DSP_24_U24
, BFD_RELOC_24
, 3 },
845 { M32C_OPERAND_DSP_32_U24
, BFD_RELOC_24
, 4 },
846 { M32C_OPERAND_DSP_40_U24
, BFD_RELOC_24
, 5 },
847 { M32C_OPERAND_DSP_48_U24
, BFD_RELOC_24
, 6 },
848 { M32C_OPERAND_DSP_16_U20
, BFD_RELOC_24
, 2 },
849 { M32C_OPERAND_DSP_24_U20
, BFD_RELOC_24
, 3 },
850 { M32C_OPERAND_DSP_32_U20
, BFD_RELOC_24
, 4 },
851 { M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED
, BFD_RELOC_24
, 2 },
852 { M32C_OPERAND_BITBASE32_24_U27_PREFIXED
, BFD_RELOC_24
, 3 },
854 /* Absolute relocs for 32-bit fields. */
855 { M32C_OPERAND_IMM_16_SI
, BFD_RELOC_32
, 2 },
856 { M32C_OPERAND_IMM_24_SI
, BFD_RELOC_32
, 3 },
857 { M32C_OPERAND_IMM_32_SI
, BFD_RELOC_32
, 4 },
858 { M32C_OPERAND_IMM_40_SI
, BFD_RELOC_32
, 5 },
864 for (i
= ARRAY_SIZE (op_reloc_table
); --i
>= 0; )
866 const struct op_reloc
*or = &op_reloc_table
[i
];
868 if (or->operand
== operand
->type
)
870 fixP
->fx_where
+= or->offset
;
871 fixP
->fx_size
-= or->offset
;
873 if (fixP
->fx_cgen
.opinfo
874 && fixP
->fx_cgen
.opinfo
!= BFD_RELOC_NONE
)
875 return fixP
->fx_cgen
.opinfo
;
883 "Error: tc-m32c.c:md_cgen_lookup_reloc Unimplemented relocation for operand %s\n",
886 return BFD_RELOC_NONE
;
889 /* See whether we need to force a relocation into the output file.
890 This is used to force out switch and PC relative relocations when
894 m32c_force_relocation (fixS
* fixp
)
896 int reloc
= fixp
->fx_r_type
;
898 if (reloc
> (int)BFD_RELOC_UNUSED
)
900 reloc
-= (int)BFD_RELOC_UNUSED
;
903 case M32C_OPERAND_DSP_32_S16
:
904 case M32C_OPERAND_DSP_32_U16
:
905 case M32C_OPERAND_IMM_32_HI
:
906 case M32C_OPERAND_DSP_16_S16
:
907 case M32C_OPERAND_DSP_16_U16
:
908 case M32C_OPERAND_IMM_16_HI
:
909 case M32C_OPERAND_DSP_24_S16
:
910 case M32C_OPERAND_DSP_24_U16
:
911 case M32C_OPERAND_IMM_24_HI
:
917 if (fixp
->fx_r_type
== BFD_RELOC_16
)
921 return generic_force_reloc (fixp
);
924 /* Write a value out to the object file, using the appropriate endianness. */
927 md_number_to_chars (char * buf
, valueT val
, int n
)
929 number_to_chars_littleendian (buf
, val
, n
);
932 /* Turn a string in input_line_pointer into a floating point constant of type
933 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
934 emitted is stored in *sizeP . An error message is returned, or NULL on OK. */
936 /* Equal to MAX_PRECISION in atof-ieee.c. */
937 #define MAX_LITTLENUMS 6
940 md_atof (int type
, char * litP
, int * sizeP
)
944 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
963 /* FIXME: Some targets allow other format chars for bigger sizes here. */
967 return _("Bad call to md_atof()");
970 t
= atof_ieee (input_line_pointer
, type
, words
);
972 input_line_pointer
= t
;
973 * sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
975 for (i
= 0; i
< prec
; i
++)
977 md_number_to_chars (litP
, (valueT
) words
[i
],
978 sizeof (LITTLENUM_TYPE
));
979 litP
+= sizeof (LITTLENUM_TYPE
);
986 m32c_fix_adjustable (fixS
* fixP
)
989 if (fixP
->fx_addsy
== NULL
)
992 /* We need the symbol name for the VTABLE entries. */
993 reloc
= fixP
->fx_r_type
;
994 if (reloc
> (int)BFD_RELOC_UNUSED
)
996 reloc
-= (int)BFD_RELOC_UNUSED
;
999 case M32C_OPERAND_DSP_32_S16
:
1000 case M32C_OPERAND_DSP_32_U16
:
1001 case M32C_OPERAND_IMM_32_HI
:
1002 case M32C_OPERAND_DSP_16_S16
:
1003 case M32C_OPERAND_DSP_16_U16
:
1004 case M32C_OPERAND_IMM_16_HI
:
1005 case M32C_OPERAND_DSP_24_S16
:
1006 case M32C_OPERAND_DSP_24_U16
:
1007 case M32C_OPERAND_IMM_24_HI
:
1013 if (fixP
->fx_r_type
== BFD_RELOC_16
)
1017 /* Do not adjust relocations involving symbols in merged sections.
1019 A reloc patching in the value of some symbol S plus some addend A
1020 can be produced in different ways:
1022 1) It might simply be a reference to the data at S + A. Clearly,
1023 if linker merging shift that data around, the value patched in
1024 by the reloc needs to be adjusted accordingly.
1026 2) Or, it might be a reference to S, with A added in as a constant
1027 bias. For example, given code like this:
1033 it would be reasonable for the compiler to rearrange the array
1034 reference to something like:
1038 and emit assembly code that refers to S - (8 * sizeof (int)),
1039 so the subtraction is done entirely at compile-time. In this
1040 case, the reloc's addend A would be -(8 * sizeof (int)), and
1041 shifting around code or data at S + A should not affect the
1042 reloc: the reloc isn't referring to that code or data at all.
1044 The linker has no way of knowing which case it has in hand. So,
1045 to disambiguate, we have the linker always treat reloc addends as
1046 in case 2): they're constants that should be simply added to the
1047 symbol value, just like the reloc says. And we express case 1)
1048 in different way: we have the compiler place a label at the real
1049 target, and reference that label with an addend of zero. (The
1050 compiler is unlikely to reference code using a label plus an
1051 offset anyway, since it doesn't know the sizes of the
1054 The simplification being done by gas/write.c:adjust_reloc_syms,
1055 however, turns the explicit-label usage into the label-plus-
1056 offset usage, re-introducing the ambiguity the compiler avoided.
1057 So we need to disable that simplification for symbols referring
1060 This only affects object size a little bit. */
1061 if (S_GET_SEGMENT (fixP
->fx_addsy
)->flags
& SEC_MERGE
)
1067 /* Worker function for m32c_is_colon_insn(). */
1068 static char restore_colon
PARAMS ((int));
1071 restore_colon (int advance_i_l_p_by
)
1075 /* Restore the colon, and advance input_line_pointer to
1076 the end of the new symbol. */
1077 * input_line_pointer
= ':';
1078 input_line_pointer
+= advance_i_l_p_by
;
1079 c
= * input_line_pointer
;
1080 * input_line_pointer
= 0;
1085 /* Determines if the symbol starting at START and ending in
1086 a colon that was at the location pointed to by INPUT_LINE_POINTER
1087 (but which has now been replaced bu a NUL) is in fact an
1088 :Z, :S, :Q, or :G suffix.
1089 If it is, then it restores the colon, advances INPUT_LINE_POINTER
1090 to the real end of the instruction/symbol, and returns the character
1091 that really terminated the symbol. Otherwise it returns 0. */
1093 m32c_is_colon_insn (char *start ATTRIBUTE_UNUSED
)
1095 char * i_l_p
= input_line_pointer
;
1097 /* Check to see if the text following the colon is 'G' */
1098 if (TOLOWER (i_l_p
[1]) == 'g' && (i_l_p
[2] == ' ' || i_l_p
[2] == '\t'))
1099 return restore_colon (2);
1101 /* Check to see if the text following the colon is 'Q' */
1102 if (TOLOWER (i_l_p
[1]) == 'q' && (i_l_p
[2] == ' ' || i_l_p
[2] == '\t'))
1103 return restore_colon (2);
1105 /* Check to see if the text following the colon is 'S' */
1106 if (TOLOWER (i_l_p
[1]) == 's' && (i_l_p
[2] == ' ' || i_l_p
[2] == '\t'))
1107 return restore_colon (2);
1109 /* Check to see if the text following the colon is 'Z' */
1110 if (TOLOWER (i_l_p
[1]) == 'z' && (i_l_p
[2] == ' ' || i_l_p
[2] == '\t'))
1111 return restore_colon (2);