1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
37 #include "opcode/i386.h"
41 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
42 static void ckprefix (void);
43 static const char *prefix_name (int, int);
44 static int print_insn (bfd_vma
, disassemble_info
*);
45 static void dofloat (int);
46 static void OP_ST (int, int);
47 static void OP_STi (int, int);
48 static int putop (const char *, int);
49 static void oappend (const char *);
50 static void append_seg (void);
51 static void OP_indirE (int, int);
52 static void print_operand_value (char *, int, bfd_vma
);
53 static void print_displacement (char *, bfd_vma
);
54 static void OP_E (int, int);
55 static void OP_G (int, int);
56 static bfd_vma
get64 (void);
57 static bfd_signed_vma
get32 (void);
58 static bfd_signed_vma
get32s (void);
59 static int get16 (void);
60 static void set_op (bfd_vma
, int);
61 static void OP_REG (int, int);
62 static void OP_IMREG (int, int);
63 static void OP_I (int, int);
64 static void OP_I64 (int, int);
65 static void OP_sI (int, int);
66 static void OP_J (int, int);
67 static void OP_SEG (int, int);
68 static void OP_DIR (int, int);
69 static void OP_OFF (int, int);
70 static void OP_OFF64 (int, int);
71 static void ptr_reg (int, int);
72 static void OP_ESreg (int, int);
73 static void OP_DSreg (int, int);
74 static void OP_C (int, int);
75 static void OP_D (int, int);
76 static void OP_T (int, int);
77 static void OP_R (int, int);
78 static void OP_MMX (int, int);
79 static void OP_XMM (int, int);
80 static void OP_EM (int, int);
81 static void OP_EX (int, int);
82 static void OP_EMC (int,int);
83 static void OP_MXC (int,int);
84 static void OP_MS (int, int);
85 static void OP_XS (int, int);
86 static void OP_M (int, int);
87 static void OP_VMX (int, int);
88 static void OP_0fae (int, int);
89 static void OP_0f07 (int, int);
90 static void NOP_Fixup1 (int, int);
91 static void NOP_Fixup2 (int, int);
92 static void OP_3DNowSuffix (int, int);
93 static void OP_SIMD_Suffix (int, int);
94 static void SIMD_Fixup (int, int);
95 static void PNI_Fixup (int, int);
96 static void SVME_Fixup (int, int);
97 static void INVLPG_Fixup (int, int);
98 static void BadOp (void);
99 static void VMX_Fixup (int, int);
100 static void REP_Fixup (int, int);
101 static void CMPXCHG8B_Fixup (int, int);
102 static void XMM_Fixup (int, int);
103 static void CRC32_Fixup (int, int);
106 /* Points to first byte not fetched. */
107 bfd_byte
*max_fetched
;
108 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
121 enum address_mode address_mode
;
123 /* Flags for the prefixes for the current instruction. See below. */
126 /* REX prefix the current instruction. See below. */
128 /* Bits of REX we've already used. */
130 /* Mark parts used in the REX prefix. When we are testing for
131 empty prefix (for 8bit register REX extension), just mask it
132 out. Otherwise test for REX bit is excuse for existence of REX
133 only in case value is nonzero. */
134 #define USED_REX(value) \
139 rex_used |= (value) | REX_OPCODE; \
142 rex_used |= REX_OPCODE; \
145 /* Flags for prefixes which we somehow handled when printing the
146 current instruction. */
147 static int used_prefixes
;
149 /* Flags stored in PREFIXES. */
150 #define PREFIX_REPZ 1
151 #define PREFIX_REPNZ 2
152 #define PREFIX_LOCK 4
154 #define PREFIX_SS 0x10
155 #define PREFIX_DS 0x20
156 #define PREFIX_ES 0x40
157 #define PREFIX_FS 0x80
158 #define PREFIX_GS 0x100
159 #define PREFIX_DATA 0x200
160 #define PREFIX_ADDR 0x400
161 #define PREFIX_FWAIT 0x800
163 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
164 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
166 #define FETCH_DATA(info, addr) \
167 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
168 ? 1 : fetch_data ((info), (addr)))
171 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
174 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
175 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
177 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
178 status
= (*info
->read_memory_func
) (start
,
180 addr
- priv
->max_fetched
,
186 /* If we did manage to read at least one byte, then
187 print_insn_i386 will do something sensible. Otherwise, print
188 an error. We do that here because this is where we know
190 if (priv
->max_fetched
== priv
->the_buffer
)
191 (*info
->memory_error_func
) (status
, start
, info
);
192 longjmp (priv
->bailout
, 1);
195 priv
->max_fetched
= addr
;
199 #define XX { NULL, 0 }
201 #define Eb { OP_E, b_mode }
202 #define Ev { OP_E, v_mode }
203 #define Ed { OP_E, d_mode }
204 #define Edq { OP_E, dq_mode }
205 #define Edqw { OP_E, dqw_mode }
206 #define Edqb { OP_E, dqb_mode }
207 #define Edqd { OP_E, dqd_mode }
208 #define indirEv { OP_indirE, stack_v_mode }
209 #define indirEp { OP_indirE, f_mode }
210 #define stackEv { OP_E, stack_v_mode }
211 #define Em { OP_E, m_mode }
212 #define Ew { OP_E, w_mode }
213 #define M { OP_M, 0 } /* lea, lgdt, etc. */
214 #define Ma { OP_M, v_mode }
215 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
216 #define Mq { OP_M, q_mode }
217 #define Gb { OP_G, b_mode }
218 #define Gv { OP_G, v_mode }
219 #define Gd { OP_G, d_mode }
220 #define Gdq { OP_G, dq_mode }
221 #define Gm { OP_G, m_mode }
222 #define Gw { OP_G, w_mode }
223 #define Rd { OP_R, d_mode }
224 #define Rm { OP_R, m_mode }
225 #define Ib { OP_I, b_mode }
226 #define sIb { OP_sI, b_mode } /* sign extened byte */
227 #define Iv { OP_I, v_mode }
228 #define Iq { OP_I, q_mode }
229 #define Iv64 { OP_I64, v_mode }
230 #define Iw { OP_I, w_mode }
231 #define I1 { OP_I, const_1_mode }
232 #define Jb { OP_J, b_mode }
233 #define Jv { OP_J, v_mode }
234 #define Cm { OP_C, m_mode }
235 #define Dm { OP_D, m_mode }
236 #define Td { OP_T, d_mode }
238 #define RMeAX { OP_REG, eAX_reg }
239 #define RMeBX { OP_REG, eBX_reg }
240 #define RMeCX { OP_REG, eCX_reg }
241 #define RMeDX { OP_REG, eDX_reg }
242 #define RMeSP { OP_REG, eSP_reg }
243 #define RMeBP { OP_REG, eBP_reg }
244 #define RMeSI { OP_REG, eSI_reg }
245 #define RMeDI { OP_REG, eDI_reg }
246 #define RMrAX { OP_REG, rAX_reg }
247 #define RMrBX { OP_REG, rBX_reg }
248 #define RMrCX { OP_REG, rCX_reg }
249 #define RMrDX { OP_REG, rDX_reg }
250 #define RMrSP { OP_REG, rSP_reg }
251 #define RMrBP { OP_REG, rBP_reg }
252 #define RMrSI { OP_REG, rSI_reg }
253 #define RMrDI { OP_REG, rDI_reg }
254 #define RMAL { OP_REG, al_reg }
255 #define RMAL { OP_REG, al_reg }
256 #define RMCL { OP_REG, cl_reg }
257 #define RMDL { OP_REG, dl_reg }
258 #define RMBL { OP_REG, bl_reg }
259 #define RMAH { OP_REG, ah_reg }
260 #define RMCH { OP_REG, ch_reg }
261 #define RMDH { OP_REG, dh_reg }
262 #define RMBH { OP_REG, bh_reg }
263 #define RMAX { OP_REG, ax_reg }
264 #define RMDX { OP_REG, dx_reg }
266 #define eAX { OP_IMREG, eAX_reg }
267 #define eBX { OP_IMREG, eBX_reg }
268 #define eCX { OP_IMREG, eCX_reg }
269 #define eDX { OP_IMREG, eDX_reg }
270 #define eSP { OP_IMREG, eSP_reg }
271 #define eBP { OP_IMREG, eBP_reg }
272 #define eSI { OP_IMREG, eSI_reg }
273 #define eDI { OP_IMREG, eDI_reg }
274 #define AL { OP_IMREG, al_reg }
275 #define CL { OP_IMREG, cl_reg }
276 #define DL { OP_IMREG, dl_reg }
277 #define BL { OP_IMREG, bl_reg }
278 #define AH { OP_IMREG, ah_reg }
279 #define CH { OP_IMREG, ch_reg }
280 #define DH { OP_IMREG, dh_reg }
281 #define BH { OP_IMREG, bh_reg }
282 #define AX { OP_IMREG, ax_reg }
283 #define DX { OP_IMREG, dx_reg }
284 #define zAX { OP_IMREG, z_mode_ax_reg }
285 #define indirDX { OP_IMREG, indir_dx_reg }
287 #define Sw { OP_SEG, w_mode }
288 #define Sv { OP_SEG, v_mode }
289 #define Ap { OP_DIR, 0 }
290 #define Ob { OP_OFF64, b_mode }
291 #define Ov { OP_OFF64, v_mode }
292 #define Xb { OP_DSreg, eSI_reg }
293 #define Xv { OP_DSreg, eSI_reg }
294 #define Xz { OP_DSreg, eSI_reg }
295 #define Yb { OP_ESreg, eDI_reg }
296 #define Yv { OP_ESreg, eDI_reg }
297 #define DSBX { OP_DSreg, eBX_reg }
299 #define es { OP_REG, es_reg }
300 #define ss { OP_REG, ss_reg }
301 #define cs { OP_REG, cs_reg }
302 #define ds { OP_REG, ds_reg }
303 #define fs { OP_REG, fs_reg }
304 #define gs { OP_REG, gs_reg }
306 #define MX { OP_MMX, 0 }
307 #define XM { OP_XMM, 0 }
308 #define EM { OP_EM, v_mode }
309 #define EX { OP_EX, v_mode }
310 #define MS { OP_MS, v_mode }
311 #define XS { OP_XS, v_mode }
312 #define EMC { OP_EMC, v_mode }
313 #define MXC { OP_MXC, 0 }
314 #define VM { OP_VMX, q_mode }
315 #define OPSUF { OP_3DNowSuffix, 0 }
316 #define OPSIMD { OP_SIMD_Suffix, 0 }
317 #define XMM0 { XMM_Fixup, 0 }
319 /* Used handle "rep" prefix for string instructions. */
320 #define Xbr { REP_Fixup, eSI_reg }
321 #define Xvr { REP_Fixup, eSI_reg }
322 #define Ybr { REP_Fixup, eDI_reg }
323 #define Yvr { REP_Fixup, eDI_reg }
324 #define Yzr { REP_Fixup, eDI_reg }
325 #define indirDXr { REP_Fixup, indir_dx_reg }
326 #define ALr { REP_Fixup, al_reg }
327 #define eAXr { REP_Fixup, eAX_reg }
329 #define cond_jump_flag { NULL, cond_jump_mode }
330 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
332 /* bits in sizeflag */
333 #define SUFFIX_ALWAYS 4
337 #define b_mode 1 /* byte operand */
338 #define v_mode 2 /* operand size depends on prefixes */
339 #define w_mode 3 /* word operand */
340 #define d_mode 4 /* double word operand */
341 #define q_mode 5 /* quad word operand */
342 #define t_mode 6 /* ten-byte operand */
343 #define x_mode 7 /* 16-byte XMM operand */
344 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
345 #define cond_jump_mode 9
346 #define loop_jcxz_mode 10
347 #define dq_mode 11 /* operand size depends on REX prefixes. */
348 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
349 #define f_mode 13 /* 4- or 6-byte pointer operand */
350 #define const_1_mode 14
351 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
352 #define z_mode 16 /* non-quad operand size depends on prefixes */
353 #define o_mode 17 /* 16-byte operand */
354 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
355 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
400 #define z_mode_ax_reg 149
401 #define indir_dx_reg 150
405 #define USE_PREFIX_USER_TABLE 3
406 #define X86_64_SPECIAL 4
407 #define IS_3BYTE_OPCODE 5
409 #define FLOAT NULL, { { NULL, FLOATCODE } }
411 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
412 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
413 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
414 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
415 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
416 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
417 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
418 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
419 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
420 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
421 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
422 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
423 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
424 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
425 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
426 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
427 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
428 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
429 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
430 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
431 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
432 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
433 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
434 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
435 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
436 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
437 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
438 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
440 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
441 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
442 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
443 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
444 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
445 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
446 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
447 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
448 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
449 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
450 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
451 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
452 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
453 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
454 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
455 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
456 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
457 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
458 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
459 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
460 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
461 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
462 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
463 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
464 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
465 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
466 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
467 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
468 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
469 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
470 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
471 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
472 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
473 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
474 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
475 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
476 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
477 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
478 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
479 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
480 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
481 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
482 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
483 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
484 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
485 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
486 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
487 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
488 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
489 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
490 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
491 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
492 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
493 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
494 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
495 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
496 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
497 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
498 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
499 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
500 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
501 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
502 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
503 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
504 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
505 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
506 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
507 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
508 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
509 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
510 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
511 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
512 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
513 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
514 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
515 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
516 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
517 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
518 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
519 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
520 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
521 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
522 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
523 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
524 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
525 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
526 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
527 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
528 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
529 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
530 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
531 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
532 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
535 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
536 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
537 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
538 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
540 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
541 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
543 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
554 /* Upper case letters in the instruction names here are macros.
555 'A' => print 'b' if no register operands or suffix_always is true
556 'B' => print 'b' if suffix_always is true
557 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
559 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
560 . suffix_always is true
561 'E' => print 'e' if 32-bit form of jcxz
562 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
563 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
564 'H' => print ",pt" or ",pn" branch hint
565 'I' => honor following macro letter even in Intel mode (implemented only
566 . for some of the macro letters)
568 'K' => print 'd' or 'q' if rex prefix is present.
569 'L' => print 'l' if suffix_always is true
570 'N' => print 'n' if instruction has no wait "prefix"
571 'O' => print 'd' or 'o' (or 'q' in Intel mode)
572 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
573 . or suffix_always is true. print 'q' if rex prefix is present.
574 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
576 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
577 'S' => print 'w', 'l' or 'q' if suffix_always is true
578 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
579 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
580 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
581 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
582 'X' => print 's', 'd' depending on data16 prefix (for XMM)
583 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
584 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
586 Many of the above letters print nothing in Intel mode. See "putop"
589 Braces '{' and '}', and vertical bars '|', indicate alternative
590 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
591 modes. In cases where there are only two alternatives, the X86_64
592 instruction is reserved, and "(bad)" is printed.
595 static const struct dis386 dis386
[] = {
597 { "addB", { Eb
, Gb
} },
598 { "addS", { Ev
, Gv
} },
599 { "addB", { Gb
, Eb
} },
600 { "addS", { Gv
, Ev
} },
601 { "addB", { AL
, Ib
} },
602 { "addS", { eAX
, Iv
} },
603 { "push{T|}", { es
} },
604 { "pop{T|}", { es
} },
606 { "orB", { Eb
, Gb
} },
607 { "orS", { Ev
, Gv
} },
608 { "orB", { Gb
, Eb
} },
609 { "orS", { Gv
, Ev
} },
610 { "orB", { AL
, Ib
} },
611 { "orS", { eAX
, Iv
} },
612 { "push{T|}", { cs
} },
613 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
615 { "adcB", { Eb
, Gb
} },
616 { "adcS", { Ev
, Gv
} },
617 { "adcB", { Gb
, Eb
} },
618 { "adcS", { Gv
, Ev
} },
619 { "adcB", { AL
, Ib
} },
620 { "adcS", { eAX
, Iv
} },
621 { "push{T|}", { ss
} },
622 { "pop{T|}", { ss
} },
624 { "sbbB", { Eb
, Gb
} },
625 { "sbbS", { Ev
, Gv
} },
626 { "sbbB", { Gb
, Eb
} },
627 { "sbbS", { Gv
, Ev
} },
628 { "sbbB", { AL
, Ib
} },
629 { "sbbS", { eAX
, Iv
} },
630 { "push{T|}", { ds
} },
631 { "pop{T|}", { ds
} },
633 { "andB", { Eb
, Gb
} },
634 { "andS", { Ev
, Gv
} },
635 { "andB", { Gb
, Eb
} },
636 { "andS", { Gv
, Ev
} },
637 { "andB", { AL
, Ib
} },
638 { "andS", { eAX
, Iv
} },
639 { "(bad)", { XX
} }, /* SEG ES prefix */
640 { "daa{|}", { XX
} },
642 { "subB", { Eb
, Gb
} },
643 { "subS", { Ev
, Gv
} },
644 { "subB", { Gb
, Eb
} },
645 { "subS", { Gv
, Ev
} },
646 { "subB", { AL
, Ib
} },
647 { "subS", { eAX
, Iv
} },
648 { "(bad)", { XX
} }, /* SEG CS prefix */
649 { "das{|}", { XX
} },
651 { "xorB", { Eb
, Gb
} },
652 { "xorS", { Ev
, Gv
} },
653 { "xorB", { Gb
, Eb
} },
654 { "xorS", { Gv
, Ev
} },
655 { "xorB", { AL
, Ib
} },
656 { "xorS", { eAX
, Iv
} },
657 { "(bad)", { XX
} }, /* SEG SS prefix */
658 { "aaa{|}", { XX
} },
660 { "cmpB", { Eb
, Gb
} },
661 { "cmpS", { Ev
, Gv
} },
662 { "cmpB", { Gb
, Eb
} },
663 { "cmpS", { Gv
, Ev
} },
664 { "cmpB", { AL
, Ib
} },
665 { "cmpS", { eAX
, Iv
} },
666 { "(bad)", { XX
} }, /* SEG DS prefix */
667 { "aas{|}", { XX
} },
669 { "inc{S|}", { RMeAX
} },
670 { "inc{S|}", { RMeCX
} },
671 { "inc{S|}", { RMeDX
} },
672 { "inc{S|}", { RMeBX
} },
673 { "inc{S|}", { RMeSP
} },
674 { "inc{S|}", { RMeBP
} },
675 { "inc{S|}", { RMeSI
} },
676 { "inc{S|}", { RMeDI
} },
678 { "dec{S|}", { RMeAX
} },
679 { "dec{S|}", { RMeCX
} },
680 { "dec{S|}", { RMeDX
} },
681 { "dec{S|}", { RMeBX
} },
682 { "dec{S|}", { RMeSP
} },
683 { "dec{S|}", { RMeBP
} },
684 { "dec{S|}", { RMeSI
} },
685 { "dec{S|}", { RMeDI
} },
687 { "pushV", { RMrAX
} },
688 { "pushV", { RMrCX
} },
689 { "pushV", { RMrDX
} },
690 { "pushV", { RMrBX
} },
691 { "pushV", { RMrSP
} },
692 { "pushV", { RMrBP
} },
693 { "pushV", { RMrSI
} },
694 { "pushV", { RMrDI
} },
696 { "popV", { RMrAX
} },
697 { "popV", { RMrCX
} },
698 { "popV", { RMrDX
} },
699 { "popV", { RMrBX
} },
700 { "popV", { RMrSP
} },
701 { "popV", { RMrBP
} },
702 { "popV", { RMrSI
} },
703 { "popV", { RMrDI
} },
709 { "(bad)", { XX
} }, /* seg fs */
710 { "(bad)", { XX
} }, /* seg gs */
711 { "(bad)", { XX
} }, /* op size prefix */
712 { "(bad)", { XX
} }, /* adr size prefix */
715 { "imulS", { Gv
, Ev
, Iv
} },
716 { "pushT", { sIb
} },
717 { "imulS", { Gv
, Ev
, sIb
} },
718 { "ins{b||b|}", { Ybr
, indirDX
} },
719 { "ins{R||G|}", { Yzr
, indirDX
} },
720 { "outs{b||b|}", { indirDXr
, Xb
} },
721 { "outs{R||G|}", { indirDXr
, Xz
} },
723 { "joH", { Jb
, XX
, cond_jump_flag
} },
724 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
725 { "jbH", { Jb
, XX
, cond_jump_flag
} },
726 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
727 { "jeH", { Jb
, XX
, cond_jump_flag
} },
728 { "jneH", { Jb
, XX
, cond_jump_flag
} },
729 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
730 { "jaH", { Jb
, XX
, cond_jump_flag
} },
732 { "jsH", { Jb
, XX
, cond_jump_flag
} },
733 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
734 { "jpH", { Jb
, XX
, cond_jump_flag
} },
735 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
736 { "jlH", { Jb
, XX
, cond_jump_flag
} },
737 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
738 { "jleH", { Jb
, XX
, cond_jump_flag
} },
739 { "jgH", { Jb
, XX
, cond_jump_flag
} },
745 { "testB", { Eb
, Gb
} },
746 { "testS", { Ev
, Gv
} },
747 { "xchgB", { Eb
, Gb
} },
748 { "xchgS", { Ev
, Gv
} },
750 { "movB", { Eb
, Gb
} },
751 { "movS", { Ev
, Gv
} },
752 { "movB", { Gb
, Eb
} },
753 { "movS", { Gv
, Ev
} },
754 { "movD", { Sv
, Sw
} },
755 { "leaS", { Gv
, M
} },
756 { "movD", { Sw
, Sv
} },
760 { "xchgS", { RMeCX
, eAX
} },
761 { "xchgS", { RMeDX
, eAX
} },
762 { "xchgS", { RMeBX
, eAX
} },
763 { "xchgS", { RMeSP
, eAX
} },
764 { "xchgS", { RMeBP
, eAX
} },
765 { "xchgS", { RMeSI
, eAX
} },
766 { "xchgS", { RMeDI
, eAX
} },
768 { "cW{t||t|}R", { XX
} },
769 { "cR{t||t|}O", { XX
} },
770 { "Jcall{T|}", { Ap
} },
771 { "(bad)", { XX
} }, /* fwait */
772 { "pushfT", { XX
} },
774 { "sahf{|}", { XX
} },
775 { "lahf{|}", { XX
} },
777 { "movB", { AL
, Ob
} },
778 { "movS", { eAX
, Ov
} },
779 { "movB", { Ob
, AL
} },
780 { "movS", { Ov
, eAX
} },
781 { "movs{b||b|}", { Ybr
, Xb
} },
782 { "movs{R||R|}", { Yvr
, Xv
} },
783 { "cmps{b||b|}", { Xb
, Yb
} },
784 { "cmps{R||R|}", { Xv
, Yv
} },
786 { "testB", { AL
, Ib
} },
787 { "testS", { eAX
, Iv
} },
788 { "stosB", { Ybr
, AL
} },
789 { "stosS", { Yvr
, eAX
} },
790 { "lodsB", { ALr
, Xb
} },
791 { "lodsS", { eAXr
, Xv
} },
792 { "scasB", { AL
, Yb
} },
793 { "scasS", { eAX
, Yv
} },
795 { "movB", { RMAL
, Ib
} },
796 { "movB", { RMCL
, Ib
} },
797 { "movB", { RMDL
, Ib
} },
798 { "movB", { RMBL
, Ib
} },
799 { "movB", { RMAH
, Ib
} },
800 { "movB", { RMCH
, Ib
} },
801 { "movB", { RMDH
, Ib
} },
802 { "movB", { RMBH
, Ib
} },
804 { "movS", { RMeAX
, Iv64
} },
805 { "movS", { RMeCX
, Iv64
} },
806 { "movS", { RMeDX
, Iv64
} },
807 { "movS", { RMeBX
, Iv64
} },
808 { "movS", { RMeSP
, Iv64
} },
809 { "movS", { RMeBP
, Iv64
} },
810 { "movS", { RMeSI
, Iv64
} },
811 { "movS", { RMeDI
, Iv64
} },
817 { "les{S|}", { Gv
, Mp
} },
818 { "ldsS", { Gv
, Mp
} },
822 { "enterT", { Iw
, Ib
} },
823 { "leaveT", { XX
} },
828 { "into{|}", { XX
} },
835 { "aam{|}", { sIb
} },
836 { "aad{|}", { sIb
} },
838 { "xlat", { DSBX
} },
849 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
850 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
851 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
852 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
853 { "inB", { AL
, Ib
} },
854 { "inG", { zAX
, Ib
} },
855 { "outB", { Ib
, AL
} },
856 { "outG", { Ib
, zAX
} },
860 { "Jjmp{T|}", { Ap
} },
862 { "inB", { AL
, indirDX
} },
863 { "inG", { zAX
, indirDX
} },
864 { "outB", { indirDX
, AL
} },
865 { "outG", { indirDX
, zAX
} },
867 { "(bad)", { XX
} }, /* lock prefix */
869 { "(bad)", { XX
} }, /* repne */
870 { "(bad)", { XX
} }, /* repz */
886 static const struct dis386 dis386_twobyte
[] = {
890 { "larS", { Gv
, Ew
} },
891 { "lslS", { Gv
, Ew
} },
893 { "syscall", { XX
} },
895 { "sysretP", { XX
} },
898 { "wbinvd", { XX
} },
904 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
909 { "movlpX", { EX
, XM
, { SIMD_Fixup
, 'h' } } },
910 { "unpcklpX", { XM
, EX
} },
911 { "unpckhpX", { XM
, EX
} },
913 { "movhpX", { EX
, XM
, { SIMD_Fixup
, 'l' } } },
924 { "movZ", { Rm
, Cm
} },
925 { "movZ", { Rm
, Dm
} },
926 { "movZ", { Cm
, Rm
} },
927 { "movZ", { Dm
, Rm
} },
928 { "movL", { Rd
, Td
} },
930 { "movL", { Td
, Rd
} },
933 { "movapX", { XM
, EX
} },
934 { "movapX", { EX
, XM
} },
939 { "ucomisX", { XM
,EX
} },
940 { "comisX", { XM
,EX
} },
946 { "sysenter", { XX
} },
947 { "sysexit", { XX
} },
960 { "cmovo", { Gv
, Ev
} },
961 { "cmovno", { Gv
, Ev
} },
962 { "cmovb", { Gv
, Ev
} },
963 { "cmovae", { Gv
, Ev
} },
964 { "cmove", { Gv
, Ev
} },
965 { "cmovne", { Gv
, Ev
} },
966 { "cmovbe", { Gv
, Ev
} },
967 { "cmova", { Gv
, Ev
} },
969 { "cmovs", { Gv
, Ev
} },
970 { "cmovns", { Gv
, Ev
} },
971 { "cmovp", { Gv
, Ev
} },
972 { "cmovnp", { Gv
, Ev
} },
973 { "cmovl", { Gv
, Ev
} },
974 { "cmovge", { Gv
, Ev
} },
975 { "cmovle", { Gv
, Ev
} },
976 { "cmovg", { Gv
, Ev
} },
978 { "movmskpX", { Gdq
, XS
} },
982 { "andpX", { XM
, EX
} },
983 { "andnpX", { XM
, EX
} },
984 { "orpX", { XM
, EX
} },
985 { "xorpX", { XM
, EX
} },
996 { "punpcklbw", { MX
, EM
} },
997 { "punpcklwd", { MX
, EM
} },
998 { "punpckldq", { MX
, EM
} },
999 { "packsswb", { MX
, EM
} },
1000 { "pcmpgtb", { MX
, EM
} },
1001 { "pcmpgtw", { MX
, EM
} },
1002 { "pcmpgtd", { MX
, EM
} },
1003 { "packuswb", { MX
, EM
} },
1005 { "punpckhbw", { MX
, EM
} },
1006 { "punpckhwd", { MX
, EM
} },
1007 { "punpckhdq", { MX
, EM
} },
1008 { "packssdw", { MX
, EM
} },
1011 { "movd", { MX
, Edq
} },
1018 { "pcmpeqb", { MX
, EM
} },
1019 { "pcmpeqw", { MX
, EM
} },
1020 { "pcmpeqd", { MX
, EM
} },
1025 { "(bad)", { XX
} },
1026 { "(bad)", { XX
} },
1032 { "joH", { Jv
, XX
, cond_jump_flag
} },
1033 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1034 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1035 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1036 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1037 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1038 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1039 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1041 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1042 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1043 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1044 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1045 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1046 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1047 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1048 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1051 { "setno", { Eb
} },
1053 { "setae", { Eb
} },
1055 { "setne", { Eb
} },
1056 { "setbe", { Eb
} },
1060 { "setns", { Eb
} },
1062 { "setnp", { Eb
} },
1064 { "setge", { Eb
} },
1065 { "setle", { Eb
} },
1068 { "pushT", { fs
} },
1070 { "cpuid", { XX
} },
1071 { "btS", { Ev
, Gv
} },
1072 { "shldS", { Ev
, Gv
, Ib
} },
1073 { "shldS", { Ev
, Gv
, CL
} },
1077 { "pushT", { gs
} },
1080 { "btsS", { Ev
, Gv
} },
1081 { "shrdS", { Ev
, Gv
, Ib
} },
1082 { "shrdS", { Ev
, Gv
, CL
} },
1084 { "imulS", { Gv
, Ev
} },
1086 { "cmpxchgB", { Eb
, Gb
} },
1087 { "cmpxchgS", { Ev
, Gv
} },
1088 { "lssS", { Gv
, Mp
} },
1089 { "btrS", { Ev
, Gv
} },
1090 { "lfsS", { Gv
, Mp
} },
1091 { "lgsS", { Gv
, Mp
} },
1092 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1093 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1098 { "btcS", { Ev
, Gv
} },
1099 { "bsfS", { Gv
, Ev
} },
1101 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1102 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1104 { "xaddB", { Eb
, Gb
} },
1105 { "xaddS", { Ev
, Gv
} },
1107 { "movntiS", { Ev
, Gv
} },
1108 { "pinsrw", { MX
, Edqw
, Ib
} },
1109 { "pextrw", { Gdq
, MS
, Ib
} },
1110 { "shufpX", { XM
, EX
, Ib
} },
1113 { "bswap", { RMeAX
} },
1114 { "bswap", { RMeCX
} },
1115 { "bswap", { RMeDX
} },
1116 { "bswap", { RMeBX
} },
1117 { "bswap", { RMeSP
} },
1118 { "bswap", { RMeBP
} },
1119 { "bswap", { RMeSI
} },
1120 { "bswap", { RMeDI
} },
1123 { "psrlw", { MX
, EM
} },
1124 { "psrld", { MX
, EM
} },
1125 { "psrlq", { MX
, EM
} },
1126 { "paddq", { MX
, EM
} },
1127 { "pmullw", { MX
, EM
} },
1129 { "pmovmskb", { Gdq
, MS
} },
1131 { "psubusb", { MX
, EM
} },
1132 { "psubusw", { MX
, EM
} },
1133 { "pminub", { MX
, EM
} },
1134 { "pand", { MX
, EM
} },
1135 { "paddusb", { MX
, EM
} },
1136 { "paddusw", { MX
, EM
} },
1137 { "pmaxub", { MX
, EM
} },
1138 { "pandn", { MX
, EM
} },
1140 { "pavgb", { MX
, EM
} },
1141 { "psraw", { MX
, EM
} },
1142 { "psrad", { MX
, EM
} },
1143 { "pavgw", { MX
, EM
} },
1144 { "pmulhuw", { MX
, EM
} },
1145 { "pmulhw", { MX
, EM
} },
1149 { "psubsb", { MX
, EM
} },
1150 { "psubsw", { MX
, EM
} },
1151 { "pminsw", { MX
, EM
} },
1152 { "por", { MX
, EM
} },
1153 { "paddsb", { MX
, EM
} },
1154 { "paddsw", { MX
, EM
} },
1155 { "pmaxsw", { MX
, EM
} },
1156 { "pxor", { MX
, EM
} },
1159 { "psllw", { MX
, EM
} },
1160 { "pslld", { MX
, EM
} },
1161 { "psllq", { MX
, EM
} },
1162 { "pmuludq", { MX
, EM
} },
1163 { "pmaddwd", { MX
, EM
} },
1164 { "psadbw", { MX
, EM
} },
1167 { "psubb", { MX
, EM
} },
1168 { "psubw", { MX
, EM
} },
1169 { "psubd", { MX
, EM
} },
1170 { "psubq", { MX
, EM
} },
1171 { "paddb", { MX
, EM
} },
1172 { "paddw", { MX
, EM
} },
1173 { "paddd", { MX
, EM
} },
1174 { "(bad)", { XX
} },
1177 static const unsigned char onebyte_has_modrm
[256] = {
1178 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1179 /* ------------------------------- */
1180 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1181 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1182 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1183 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1184 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1185 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1186 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1187 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1188 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1189 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1190 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1191 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1192 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1193 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1194 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1195 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1196 /* ------------------------------- */
1197 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1200 static const unsigned char twobyte_has_modrm
[256] = {
1201 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1202 /* ------------------------------- */
1203 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1204 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1205 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1206 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1207 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1208 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1209 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1210 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1211 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1212 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1213 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1214 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1215 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1216 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1217 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1218 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1219 /* ------------------------------- */
1220 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1223 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1224 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1225 /* ------------------------------- */
1226 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1227 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1228 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1229 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1230 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1231 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1232 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1233 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1234 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1235 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1236 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1237 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1238 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1239 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1240 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1241 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1242 /* ------------------------------- */
1243 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1246 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1247 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1248 /* ------------------------------- */
1249 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1250 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1251 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1252 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1253 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1254 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1255 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1256 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1257 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1258 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1259 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1260 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1261 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1262 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1263 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1264 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1265 /* ------------------------------- */
1266 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1269 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1270 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1271 /* ------------------------------- */
1272 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1273 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1274 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1275 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1276 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1277 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1278 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1279 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1280 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1281 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1282 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1283 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1284 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1285 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1286 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1287 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1288 /* ------------------------------- */
1289 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1292 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1293 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1294 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1295 /* ------------------------------- */
1296 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1297 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1298 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1299 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1300 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1301 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1302 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1303 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1304 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1305 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1306 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1307 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1308 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1309 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1310 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1311 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1312 /* ------------------------------- */
1313 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1316 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1317 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1318 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1319 /* ------------------------------- */
1320 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1321 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1322 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1323 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1324 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1325 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1326 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1327 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1328 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1329 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1330 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1331 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1332 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1333 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1334 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1335 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1336 /* ------------------------------- */
1337 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1340 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1341 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1342 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1343 /* ------------------------------- */
1344 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1345 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1346 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1347 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1348 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1349 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1350 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1351 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1352 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1353 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1354 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1355 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1356 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1357 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1358 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1359 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1360 /* ------------------------------- */
1361 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1364 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1365 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1366 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1367 /* ------------------------------- */
1368 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1369 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1370 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1371 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1372 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1373 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1374 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1375 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1376 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1377 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1378 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1379 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1380 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1381 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1382 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1383 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1384 /* ------------------------------- */
1385 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1388 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1389 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1390 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1391 /* ------------------------------- */
1392 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1393 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1394 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1395 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1396 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1397 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1398 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1399 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1400 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1401 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1402 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1403 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1404 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1405 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1406 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1407 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1408 /* ------------------------------- */
1409 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1412 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1413 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1414 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1415 /* ------------------------------- */
1416 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1417 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1418 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1419 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1420 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1421 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1422 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1423 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1424 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1425 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1426 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1427 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1428 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1429 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1430 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1431 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1432 /* ------------------------------- */
1433 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1436 static char obuf
[100];
1438 static char scratchbuf
[100];
1439 static unsigned char *start_codep
;
1440 static unsigned char *insn_codep
;
1441 static unsigned char *codep
;
1442 static disassemble_info
*the_info
;
1450 static unsigned char need_modrm
;
1452 /* If we are accessing mod/rm/reg without need_modrm set, then the
1453 values are stale. Hitting this abort likely indicates that you
1454 need to update onebyte_has_modrm or twobyte_has_modrm. */
1455 #define MODRM_CHECK if (!need_modrm) abort ()
1457 static const char **names64
;
1458 static const char **names32
;
1459 static const char **names16
;
1460 static const char **names8
;
1461 static const char **names8rex
;
1462 static const char **names_seg
;
1463 static const char **index16
;
1465 static const char *intel_names64
[] = {
1466 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1467 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1469 static const char *intel_names32
[] = {
1470 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1471 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1473 static const char *intel_names16
[] = {
1474 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1475 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1477 static const char *intel_names8
[] = {
1478 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1480 static const char *intel_names8rex
[] = {
1481 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1482 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1484 static const char *intel_names_seg
[] = {
1485 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1487 static const char *intel_index16
[] = {
1488 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1491 static const char *att_names64
[] = {
1492 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1493 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1495 static const char *att_names32
[] = {
1496 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1497 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1499 static const char *att_names16
[] = {
1500 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1501 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1503 static const char *att_names8
[] = {
1504 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1506 static const char *att_names8rex
[] = {
1507 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1508 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1510 static const char *att_names_seg
[] = {
1511 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1513 static const char *att_index16
[] = {
1514 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1517 static const struct dis386 grps
[][8] = {
1520 { "popU", { stackEv
} },
1521 { "(bad)", { XX
} },
1522 { "(bad)", { XX
} },
1523 { "(bad)", { XX
} },
1524 { "(bad)", { XX
} },
1525 { "(bad)", { XX
} },
1526 { "(bad)", { XX
} },
1527 { "(bad)", { XX
} },
1531 { "addA", { Eb
, Ib
} },
1532 { "orA", { Eb
, Ib
} },
1533 { "adcA", { Eb
, Ib
} },
1534 { "sbbA", { Eb
, Ib
} },
1535 { "andA", { Eb
, Ib
} },
1536 { "subA", { Eb
, Ib
} },
1537 { "xorA", { Eb
, Ib
} },
1538 { "cmpA", { Eb
, Ib
} },
1542 { "addQ", { Ev
, Iv
} },
1543 { "orQ", { Ev
, Iv
} },
1544 { "adcQ", { Ev
, Iv
} },
1545 { "sbbQ", { Ev
, Iv
} },
1546 { "andQ", { Ev
, Iv
} },
1547 { "subQ", { Ev
, Iv
} },
1548 { "xorQ", { Ev
, Iv
} },
1549 { "cmpQ", { Ev
, Iv
} },
1553 { "addQ", { Ev
, sIb
} },
1554 { "orQ", { Ev
, sIb
} },
1555 { "adcQ", { Ev
, sIb
} },
1556 { "sbbQ", { Ev
, sIb
} },
1557 { "andQ", { Ev
, sIb
} },
1558 { "subQ", { Ev
, sIb
} },
1559 { "xorQ", { Ev
, sIb
} },
1560 { "cmpQ", { Ev
, sIb
} },
1564 { "rolA", { Eb
, Ib
} },
1565 { "rorA", { Eb
, Ib
} },
1566 { "rclA", { Eb
, Ib
} },
1567 { "rcrA", { Eb
, Ib
} },
1568 { "shlA", { Eb
, Ib
} },
1569 { "shrA", { Eb
, Ib
} },
1570 { "(bad)", { XX
} },
1571 { "sarA", { Eb
, Ib
} },
1575 { "rolQ", { Ev
, Ib
} },
1576 { "rorQ", { Ev
, Ib
} },
1577 { "rclQ", { Ev
, Ib
} },
1578 { "rcrQ", { Ev
, Ib
} },
1579 { "shlQ", { Ev
, Ib
} },
1580 { "shrQ", { Ev
, Ib
} },
1581 { "(bad)", { XX
} },
1582 { "sarQ", { Ev
, Ib
} },
1586 { "rolA", { Eb
, I1
} },
1587 { "rorA", { Eb
, I1
} },
1588 { "rclA", { Eb
, I1
} },
1589 { "rcrA", { Eb
, I1
} },
1590 { "shlA", { Eb
, I1
} },
1591 { "shrA", { Eb
, I1
} },
1592 { "(bad)", { XX
} },
1593 { "sarA", { Eb
, I1
} },
1597 { "rolQ", { Ev
, I1
} },
1598 { "rorQ", { Ev
, I1
} },
1599 { "rclQ", { Ev
, I1
} },
1600 { "rcrQ", { Ev
, I1
} },
1601 { "shlQ", { Ev
, I1
} },
1602 { "shrQ", { Ev
, I1
} },
1603 { "(bad)", { XX
} },
1604 { "sarQ", { Ev
, I1
} },
1608 { "rolA", { Eb
, CL
} },
1609 { "rorA", { Eb
, CL
} },
1610 { "rclA", { Eb
, CL
} },
1611 { "rcrA", { Eb
, CL
} },
1612 { "shlA", { Eb
, CL
} },
1613 { "shrA", { Eb
, CL
} },
1614 { "(bad)", { XX
} },
1615 { "sarA", { Eb
, CL
} },
1619 { "rolQ", { Ev
, CL
} },
1620 { "rorQ", { Ev
, CL
} },
1621 { "rclQ", { Ev
, CL
} },
1622 { "rcrQ", { Ev
, CL
} },
1623 { "shlQ", { Ev
, CL
} },
1624 { "shrQ", { Ev
, CL
} },
1625 { "(bad)", { XX
} },
1626 { "sarQ", { Ev
, CL
} },
1630 { "testA", { Eb
, Ib
} },
1631 { "(bad)", { Eb
} },
1634 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1635 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1636 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1637 { "idivA", { Eb
} }, /* and idiv for consistency. */
1641 { "testQ", { Ev
, Iv
} },
1642 { "(bad)", { XX
} },
1645 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1646 { "imulQ", { Ev
} },
1648 { "idivQ", { Ev
} },
1654 { "(bad)", { XX
} },
1655 { "(bad)", { XX
} },
1656 { "(bad)", { XX
} },
1657 { "(bad)", { XX
} },
1658 { "(bad)", { XX
} },
1659 { "(bad)", { XX
} },
1665 { "callT", { indirEv
} },
1666 { "JcallT", { indirEp
} },
1667 { "jmpT", { indirEv
} },
1668 { "JjmpT", { indirEp
} },
1669 { "pushU", { stackEv
} },
1670 { "(bad)", { XX
} },
1674 { "sldtD", { Sv
} },
1680 { "(bad)", { XX
} },
1681 { "(bad)", { XX
} },
1685 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1686 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1687 { "lgdt{Q|Q||}", { M
} },
1688 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1689 { "smswD", { Sv
} },
1690 { "(bad)", { XX
} },
1692 { "invlpg", { { INVLPG_Fixup
, w_mode
} } },
1696 { "(bad)", { XX
} },
1697 { "(bad)", { XX
} },
1698 { "(bad)", { XX
} },
1699 { "(bad)", { XX
} },
1700 { "btQ", { Ev
, Ib
} },
1701 { "btsQ", { Ev
, Ib
} },
1702 { "btrQ", { Ev
, Ib
} },
1703 { "btcQ", { Ev
, Ib
} },
1707 { "(bad)", { XX
} },
1708 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1709 { "(bad)", { XX
} },
1710 { "(bad)", { XX
} },
1711 { "(bad)", { XX
} },
1712 { "(bad)", { XX
} },
1713 { "", { VM
} }, /* See OP_VMX. */
1714 { "vmptrst", { Mq
} },
1718 { "movA", { Eb
, Ib
} },
1719 { "(bad)", { XX
} },
1720 { "(bad)", { XX
} },
1721 { "(bad)", { XX
} },
1722 { "(bad)", { XX
} },
1723 { "(bad)", { XX
} },
1724 { "(bad)", { XX
} },
1725 { "(bad)", { XX
} },
1729 { "movQ", { Ev
, Iv
} },
1730 { "(bad)", { XX
} },
1731 { "(bad)", { XX
} },
1732 { "(bad)", { XX
} },
1733 { "(bad)", { XX
} },
1734 { "(bad)", { XX
} },
1735 { "(bad)", { XX
} },
1736 { "(bad)", { XX
} },
1740 { "(bad)", { XX
} },
1741 { "(bad)", { XX
} },
1742 { "psrlw", { MS
, Ib
} },
1743 { "(bad)", { XX
} },
1744 { "psraw", { MS
, Ib
} },
1745 { "(bad)", { XX
} },
1746 { "psllw", { MS
, Ib
} },
1747 { "(bad)", { XX
} },
1751 { "(bad)", { XX
} },
1752 { "(bad)", { XX
} },
1753 { "psrld", { MS
, Ib
} },
1754 { "(bad)", { XX
} },
1755 { "psrad", { MS
, Ib
} },
1756 { "(bad)", { XX
} },
1757 { "pslld", { MS
, Ib
} },
1758 { "(bad)", { XX
} },
1762 { "(bad)", { XX
} },
1763 { "(bad)", { XX
} },
1764 { "psrlq", { MS
, Ib
} },
1765 { "psrldq", { MS
, Ib
} },
1766 { "(bad)", { XX
} },
1767 { "(bad)", { XX
} },
1768 { "psllq", { MS
, Ib
} },
1769 { "pslldq", { MS
, Ib
} },
1773 { "fxsave", { Ev
} },
1774 { "fxrstor", { Ev
} },
1775 { "ldmxcsr", { Ev
} },
1776 { "stmxcsr", { Ev
} },
1777 { "(bad)", { XX
} },
1778 { "lfence", { { OP_0fae
, 0 } } },
1779 { "mfence", { { OP_0fae
, 0 } } },
1780 { "clflush", { { OP_0fae
, 0 } } },
1784 { "prefetchnta", { Ev
} },
1785 { "prefetcht0", { Ev
} },
1786 { "prefetcht1", { Ev
} },
1787 { "prefetcht2", { Ev
} },
1788 { "(bad)", { XX
} },
1789 { "(bad)", { XX
} },
1790 { "(bad)", { XX
} },
1791 { "(bad)", { XX
} },
1795 { "prefetch", { Eb
} },
1796 { "prefetchw", { Eb
} },
1797 { "(bad)", { XX
} },
1798 { "(bad)", { XX
} },
1799 { "(bad)", { XX
} },
1800 { "(bad)", { XX
} },
1801 { "(bad)", { XX
} },
1802 { "(bad)", { XX
} },
1806 { "xstore-rng", { { OP_0f07
, 0 } } },
1807 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1808 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1809 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1810 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1811 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1812 { "(bad)", { { OP_0f07
, 0 } } },
1813 { "(bad)", { { OP_0f07
, 0 } } },
1817 { "montmul", { { OP_0f07
, 0 } } },
1818 { "xsha1", { { OP_0f07
, 0 } } },
1819 { "xsha256", { { OP_0f07
, 0 } } },
1820 { "(bad)", { { OP_0f07
, 0 } } },
1821 { "(bad)", { { OP_0f07
, 0 } } },
1822 { "(bad)", { { OP_0f07
, 0 } } },
1823 { "(bad)", { { OP_0f07
, 0 } } },
1824 { "(bad)", { { OP_0f07
, 0 } } },
1828 static const struct dis386 prefix_user_table
[][4] = {
1831 { "addps", { XM
, EX
} },
1832 { "addss", { XM
, EX
} },
1833 { "addpd", { XM
, EX
} },
1834 { "addsd", { XM
, EX
} },
1838 { "", { XM
, EX
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1839 { "", { XM
, EX
, OPSIMD
} },
1840 { "", { XM
, EX
, OPSIMD
} },
1841 { "", { XM
, EX
, OPSIMD
} },
1845 { "cvtpi2ps", { XM
, EMC
} },
1846 { "cvtsi2ssY", { XM
, Ev
} },
1847 { "cvtpi2pd", { XM
, EMC
} },
1848 { "cvtsi2sdY", { XM
, Ev
} },
1852 { "cvtps2pi", { MXC
, EX
} },
1853 { "cvtss2siY", { Gv
, EX
} },
1854 { "cvtpd2pi", { MXC
, EX
} },
1855 { "cvtsd2siY", { Gv
, EX
} },
1859 { "cvttps2pi", { MXC
, EX
} },
1860 { "cvttss2siY", { Gv
, EX
} },
1861 { "cvttpd2pi", { MXC
, EX
} },
1862 { "cvttsd2siY", { Gv
, EX
} },
1866 { "divps", { XM
, EX
} },
1867 { "divss", { XM
, EX
} },
1868 { "divpd", { XM
, EX
} },
1869 { "divsd", { XM
, EX
} },
1873 { "maxps", { XM
, EX
} },
1874 { "maxss", { XM
, EX
} },
1875 { "maxpd", { XM
, EX
} },
1876 { "maxsd", { XM
, EX
} },
1880 { "minps", { XM
, EX
} },
1881 { "minss", { XM
, EX
} },
1882 { "minpd", { XM
, EX
} },
1883 { "minsd", { XM
, EX
} },
1887 { "movups", { XM
, EX
} },
1888 { "movss", { XM
, EX
} },
1889 { "movupd", { XM
, EX
} },
1890 { "movsd", { XM
, EX
} },
1894 { "movups", { EX
, XM
} },
1895 { "movss", { EX
, XM
} },
1896 { "movupd", { EX
, XM
} },
1897 { "movsd", { EX
, XM
} },
1901 { "mulps", { XM
, EX
} },
1902 { "mulss", { XM
, EX
} },
1903 { "mulpd", { XM
, EX
} },
1904 { "mulsd", { XM
, EX
} },
1908 { "rcpps", { XM
, EX
} },
1909 { "rcpss", { XM
, EX
} },
1910 { "(bad)", { XM
, EX
} },
1911 { "(bad)", { XM
, EX
} },
1915 { "rsqrtps",{ XM
, EX
} },
1916 { "rsqrtss",{ XM
, EX
} },
1917 { "(bad)", { XM
, EX
} },
1918 { "(bad)", { XM
, EX
} },
1922 { "sqrtps", { XM
, EX
} },
1923 { "sqrtss", { XM
, EX
} },
1924 { "sqrtpd", { XM
, EX
} },
1925 { "sqrtsd", { XM
, EX
} },
1929 { "subps", { XM
, EX
} },
1930 { "subss", { XM
, EX
} },
1931 { "subpd", { XM
, EX
} },
1932 { "subsd", { XM
, EX
} },
1936 { "(bad)", { XM
, EX
} },
1937 { "cvtdq2pd", { XM
, EX
} },
1938 { "cvttpd2dq", { XM
, EX
} },
1939 { "cvtpd2dq", { XM
, EX
} },
1943 { "cvtdq2ps", { XM
, EX
} },
1944 { "cvttps2dq", { XM
, EX
} },
1945 { "cvtps2dq", { XM
, EX
} },
1946 { "(bad)", { XM
, EX
} },
1950 { "cvtps2pd", { XM
, EX
} },
1951 { "cvtss2sd", { XM
, EX
} },
1952 { "cvtpd2ps", { XM
, EX
} },
1953 { "cvtsd2ss", { XM
, EX
} },
1957 { "maskmovq", { MX
, MS
} },
1958 { "(bad)", { XM
, EX
} },
1959 { "maskmovdqu", { XM
, XS
} },
1960 { "(bad)", { XM
, EX
} },
1964 { "movq", { MX
, EM
} },
1965 { "movdqu", { XM
, EX
} },
1966 { "movdqa", { XM
, EX
} },
1967 { "(bad)", { XM
, EX
} },
1971 { "movq", { EM
, MX
} },
1972 { "movdqu", { EX
, XM
} },
1973 { "movdqa", { EX
, XM
} },
1974 { "(bad)", { EX
, XM
} },
1978 { "(bad)", { EX
, XM
} },
1979 { "movq2dq",{ XM
, MS
} },
1980 { "movq", { EX
, XM
} },
1981 { "movdq2q",{ MX
, XS
} },
1985 { "pshufw", { MX
, EM
, Ib
} },
1986 { "pshufhw",{ XM
, EX
, Ib
} },
1987 { "pshufd", { XM
, EX
, Ib
} },
1988 { "pshuflw",{ XM
, EX
, Ib
} },
1992 { "movd", { Edq
, MX
} },
1993 { "movq", { XM
, EX
} },
1994 { "movd", { Edq
, XM
} },
1995 { "(bad)", { Ed
, XM
} },
1999 { "(bad)", { MX
, EX
} },
2000 { "(bad)", { XM
, EX
} },
2001 { "punpckhqdq", { XM
, EX
} },
2002 { "(bad)", { XM
, EX
} },
2006 { "movntq", { EM
, MX
} },
2007 { "(bad)", { EM
, XM
} },
2008 { "movntdq",{ EM
, XM
} },
2009 { "(bad)", { EM
, XM
} },
2013 { "(bad)", { MX
, EX
} },
2014 { "(bad)", { XM
, EX
} },
2015 { "punpcklqdq", { XM
, EX
} },
2016 { "(bad)", { XM
, EX
} },
2020 { "(bad)", { MX
, EX
} },
2021 { "(bad)", { XM
, EX
} },
2022 { "addsubpd", { XM
, EX
} },
2023 { "addsubps", { XM
, EX
} },
2027 { "(bad)", { MX
, EX
} },
2028 { "(bad)", { XM
, EX
} },
2029 { "haddpd", { XM
, EX
} },
2030 { "haddps", { XM
, EX
} },
2034 { "(bad)", { MX
, EX
} },
2035 { "(bad)", { XM
, EX
} },
2036 { "hsubpd", { XM
, EX
} },
2037 { "hsubps", { XM
, EX
} },
2041 { "movlpX", { XM
, EX
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2042 { "movsldup", { XM
, EX
} },
2043 { "movlpd", { XM
, EX
} },
2044 { "movddup", { XM
, EX
} },
2048 { "movhpX", { XM
, EX
, { SIMD_Fixup
, 'l' } } },
2049 { "movshdup", { XM
, EX
} },
2050 { "movhpd", { XM
, EX
} },
2051 { "(bad)", { XM
, EX
} },
2055 { "(bad)", { XM
, EX
} },
2056 { "(bad)", { XM
, EX
} },
2057 { "(bad)", { XM
, EX
} },
2058 { "lddqu", { XM
, M
} },
2062 {"movntps", { Ev
, XM
} },
2063 {"movntss", { Ev
, XM
} },
2064 {"movntpd", { Ev
, XM
} },
2065 {"movntsd", { Ev
, XM
} },
2070 {"vmread", { Em
, Gm
} },
2072 {"extrq", { XS
, Ib
, Ib
} },
2073 {"insertq", { XM
, XS
, Ib
, Ib
} },
2078 {"vmwrite", { Gm
, Em
} },
2080 {"extrq", { XM
, XS
} },
2081 {"insertq", { XM
, XS
} },
2086 { "bsrS", { Gv
, Ev
} },
2087 { "lzcntS", { Gv
, Ev
} },
2088 { "bsrS", { Gv
, Ev
} },
2089 { "(bad)", { XX
} },
2094 { "(bad)", { XX
} },
2095 { "popcntS", { Gv
, Ev
} },
2096 { "(bad)", { XX
} },
2097 { "(bad)", { XX
} },
2102 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2103 { "pause", { XX
} },
2104 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2105 { "(bad)", { XX
} },
2110 { "(bad)", { XX
} },
2111 { "(bad)", { XX
} },
2112 { "pblendvb", {XM
, EX
, XMM0
} },
2113 { "(bad)", { XX
} },
2118 { "(bad)", { XX
} },
2119 { "(bad)", { XX
} },
2120 { "blendvps", {XM
, EX
, XMM0
} },
2121 { "(bad)", { XX
} },
2126 { "(bad)", { XX
} },
2127 { "(bad)", { XX
} },
2128 { "blendvpd", { XM
, EX
, XMM0
} },
2129 { "(bad)", { XX
} },
2134 { "(bad)", { XX
} },
2135 { "(bad)", { XX
} },
2136 { "ptest", { XM
, EX
} },
2137 { "(bad)", { XX
} },
2142 { "(bad)", { XX
} },
2143 { "(bad)", { XX
} },
2144 { "pmovsxbw", { XM
, EX
} },
2145 { "(bad)", { XX
} },
2150 { "(bad)", { XX
} },
2151 { "(bad)", { XX
} },
2152 { "pmovsxbd", { XM
, EX
} },
2153 { "(bad)", { XX
} },
2158 { "(bad)", { XX
} },
2159 { "(bad)", { XX
} },
2160 { "pmovsxbq", { XM
, EX
} },
2161 { "(bad)", { XX
} },
2166 { "(bad)", { XX
} },
2167 { "(bad)", { XX
} },
2168 { "pmovsxwd", { XM
, EX
} },
2169 { "(bad)", { XX
} },
2174 { "(bad)", { XX
} },
2175 { "(bad)", { XX
} },
2176 { "pmovsxwq", { XM
, EX
} },
2177 { "(bad)", { XX
} },
2182 { "(bad)", { XX
} },
2183 { "(bad)", { XX
} },
2184 { "pmovsxdq", { XM
, EX
} },
2185 { "(bad)", { XX
} },
2190 { "(bad)", { XX
} },
2191 { "(bad)", { XX
} },
2192 { "pmuldq", { XM
, EX
} },
2193 { "(bad)", { XX
} },
2198 { "(bad)", { XX
} },
2199 { "(bad)", { XX
} },
2200 { "pcmpeqq", { XM
, EX
} },
2201 { "(bad)", { XX
} },
2206 { "(bad)", { XX
} },
2207 { "(bad)", { XX
} },
2208 { "movntdqa", { XM
, EM
} },
2209 { "(bad)", { XX
} },
2214 { "(bad)", { XX
} },
2215 { "(bad)", { XX
} },
2216 { "packusdw", { XM
, EX
} },
2217 { "(bad)", { XX
} },
2222 { "(bad)", { XX
} },
2223 { "(bad)", { XX
} },
2224 { "pmovzxbw", { XM
, EX
} },
2225 { "(bad)", { XX
} },
2230 { "(bad)", { XX
} },
2231 { "(bad)", { XX
} },
2232 { "pmovzxbd", { XM
, EX
} },
2233 { "(bad)", { XX
} },
2238 { "(bad)", { XX
} },
2239 { "(bad)", { XX
} },
2240 { "pmovzxbq", { XM
, EX
} },
2241 { "(bad)", { XX
} },
2246 { "(bad)", { XX
} },
2247 { "(bad)", { XX
} },
2248 { "pmovzxwd", { XM
, EX
} },
2249 { "(bad)", { XX
} },
2254 { "(bad)", { XX
} },
2255 { "(bad)", { XX
} },
2256 { "pmovzxwq", { XM
, EX
} },
2257 { "(bad)", { XX
} },
2262 { "(bad)", { XX
} },
2263 { "(bad)", { XX
} },
2264 { "pmovzxdq", { XM
, EX
} },
2265 { "(bad)", { XX
} },
2270 { "(bad)", { XX
} },
2271 { "(bad)", { XX
} },
2272 { "pminsb", { XM
, EX
} },
2273 { "(bad)", { XX
} },
2278 { "(bad)", { XX
} },
2279 { "(bad)", { XX
} },
2280 { "pminsd", { XM
, EX
} },
2281 { "(bad)", { XX
} },
2286 { "(bad)", { XX
} },
2287 { "(bad)", { XX
} },
2288 { "pminuw", { XM
, EX
} },
2289 { "(bad)", { XX
} },
2294 { "(bad)", { XX
} },
2295 { "(bad)", { XX
} },
2296 { "pminud", { XM
, EX
} },
2297 { "(bad)", { XX
} },
2302 { "(bad)", { XX
} },
2303 { "(bad)", { XX
} },
2304 { "pmaxsb", { XM
, EX
} },
2305 { "(bad)", { XX
} },
2310 { "(bad)", { XX
} },
2311 { "(bad)", { XX
} },
2312 { "pmaxsd", { XM
, EX
} },
2313 { "(bad)", { XX
} },
2318 { "(bad)", { XX
} },
2319 { "(bad)", { XX
} },
2320 { "pmaxuw", { XM
, EX
} },
2321 { "(bad)", { XX
} },
2326 { "(bad)", { XX
} },
2327 { "(bad)", { XX
} },
2328 { "pmaxud", { XM
, EX
} },
2329 { "(bad)", { XX
} },
2334 { "(bad)", { XX
} },
2335 { "(bad)", { XX
} },
2336 { "pmulld", { XM
, EX
} },
2337 { "(bad)", { XX
} },
2342 { "(bad)", { XX
} },
2343 { "(bad)", { XX
} },
2344 { "phminposuw", { XM
, EX
} },
2345 { "(bad)", { XX
} },
2350 { "(bad)", { XX
} },
2351 { "(bad)", { XX
} },
2352 { "roundps", { XM
, EX
, Ib
} },
2353 { "(bad)", { XX
} },
2358 { "(bad)", { XX
} },
2359 { "(bad)", { XX
} },
2360 { "roundpd", { XM
, EX
, Ib
} },
2361 { "(bad)", { XX
} },
2366 { "(bad)", { XX
} },
2367 { "(bad)", { XX
} },
2368 { "roundss", { XM
, EX
, Ib
} },
2369 { "(bad)", { XX
} },
2374 { "(bad)", { XX
} },
2375 { "(bad)", { XX
} },
2376 { "roundsd", { XM
, EX
, Ib
} },
2377 { "(bad)", { XX
} },
2382 { "(bad)", { XX
} },
2383 { "(bad)", { XX
} },
2384 { "blendps", { XM
, EX
, Ib
} },
2385 { "(bad)", { XX
} },
2390 { "(bad)", { XX
} },
2391 { "(bad)", { XX
} },
2392 { "blendpd", { XM
, EX
, Ib
} },
2393 { "(bad)", { XX
} },
2398 { "(bad)", { XX
} },
2399 { "(bad)", { XX
} },
2400 { "pblendw", { XM
, EX
, Ib
} },
2401 { "(bad)", { XX
} },
2406 { "(bad)", { XX
} },
2407 { "(bad)", { XX
} },
2408 { "pextrb", { Edqb
, XM
, Ib
} },
2409 { "(bad)", { XX
} },
2414 { "(bad)", { XX
} },
2415 { "(bad)", { XX
} },
2416 { "pextrw", { Edqw
, XM
, Ib
} },
2417 { "(bad)", { XX
} },
2422 { "(bad)", { XX
} },
2423 { "(bad)", { XX
} },
2424 { "pextrK", { Edq
, XM
, Ib
} },
2425 { "(bad)", { XX
} },
2430 { "(bad)", { XX
} },
2431 { "(bad)", { XX
} },
2432 { "extractps", { Edqd
, XM
, Ib
} },
2433 { "(bad)", { XX
} },
2438 { "(bad)", { XX
} },
2439 { "(bad)", { XX
} },
2440 { "pinsrb", { XM
, Edqb
, Ib
} },
2441 { "(bad)", { XX
} },
2446 { "(bad)", { XX
} },
2447 { "(bad)", { XX
} },
2448 { "insertps", { XM
, EX
, Ib
} },
2449 { "(bad)", { XX
} },
2454 { "(bad)", { XX
} },
2455 { "(bad)", { XX
} },
2456 { "pinsrK", { XM
, Edq
, Ib
} },
2457 { "(bad)", { XX
} },
2462 { "(bad)", { XX
} },
2463 { "(bad)", { XX
} },
2464 { "dpps", { XM
, EX
, Ib
} },
2465 { "(bad)", { XX
} },
2470 { "(bad)", { XX
} },
2471 { "(bad)", { XX
} },
2472 { "dppd", { XM
, EX
, Ib
} },
2473 { "(bad)", { XX
} },
2478 { "(bad)", { XX
} },
2479 { "(bad)", { XX
} },
2480 { "mpsadbw", { XM
, EX
, Ib
} },
2481 { "(bad)", { XX
} },
2486 { "(bad)", { XX
} },
2487 { "(bad)", { XX
} },
2488 { "pcmpgtq", { XM
, EX
} },
2489 { "(bad)", { XX
} },
2494 { "(bad)", { XX
} },
2495 { "(bad)", { XX
} },
2496 { "(bad)", { XX
} },
2497 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2502 { "(bad)", { XX
} },
2503 { "(bad)", { XX
} },
2504 { "(bad)", { XX
} },
2505 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2510 { "(bad)", { XX
} },
2511 { "(bad)", { XX
} },
2512 { "pcmpestrm", { XM
, EX
, Ib
} },
2513 { "(bad)", { XX
} },
2518 { "(bad)", { XX
} },
2519 { "(bad)", { XX
} },
2520 { "pcmpestri", { XM
, EX
, Ib
} },
2521 { "(bad)", { XX
} },
2526 { "(bad)", { XX
} },
2527 { "(bad)", { XX
} },
2528 { "pcmpistrm", { XM
, EX
, Ib
} },
2529 { "(bad)", { XX
} },
2534 { "(bad)", { XX
} },
2535 { "(bad)", { XX
} },
2536 { "pcmpistri", { XM
, EX
, Ib
} },
2537 { "(bad)", { XX
} },
2541 static const struct dis386 x86_64_table
[][2] = {
2543 { "pusha{P|}", { XX
} },
2544 { "(bad)", { XX
} },
2547 { "popa{P|}", { XX
} },
2548 { "(bad)", { XX
} },
2551 { "bound{S|}", { Gv
, Ma
} },
2552 { "(bad)", { XX
} },
2555 { "arpl", { Ew
, Gw
} },
2556 { "movs{||lq|xd}", { Gv
, Ed
} },
2560 static const struct dis386 three_byte_table
[][256] = {
2564 { "pshufb", { MX
, EM
} },
2565 { "phaddw", { MX
, EM
} },
2566 { "phaddd", { MX
, EM
} },
2567 { "phaddsw", { MX
, EM
} },
2568 { "pmaddubsw", { MX
, EM
} },
2569 { "phsubw", { MX
, EM
} },
2570 { "phsubd", { MX
, EM
} },
2571 { "phsubsw", { MX
, EM
} },
2573 { "psignb", { MX
, EM
} },
2574 { "psignw", { MX
, EM
} },
2575 { "psignd", { MX
, EM
} },
2576 { "pmulhrsw", { MX
, EM
} },
2577 { "(bad)", { XX
} },
2578 { "(bad)", { XX
} },
2579 { "(bad)", { XX
} },
2580 { "(bad)", { XX
} },
2583 { "(bad)", { XX
} },
2584 { "(bad)", { XX
} },
2585 { "(bad)", { XX
} },
2588 { "(bad)", { XX
} },
2591 { "(bad)", { XX
} },
2592 { "(bad)", { XX
} },
2593 { "(bad)", { XX
} },
2594 { "(bad)", { XX
} },
2595 { "pabsb", { MX
, EM
} },
2596 { "pabsw", { MX
, EM
} },
2597 { "pabsd", { MX
, EM
} },
2598 { "(bad)", { XX
} },
2606 { "(bad)", { XX
} },
2607 { "(bad)", { XX
} },
2613 { "(bad)", { XX
} },
2614 { "(bad)", { XX
} },
2615 { "(bad)", { XX
} },
2616 { "(bad)", { XX
} },
2624 { "(bad)", { XX
} },
2638 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2640 { "(bad)", { XX
} },
2641 { "(bad)", { XX
} },
2642 { "(bad)", { XX
} },
2643 { "(bad)", { XX
} },
2645 { "(bad)", { XX
} },
2646 { "(bad)", { XX
} },
2647 { "(bad)", { XX
} },
2648 { "(bad)", { XX
} },
2649 { "(bad)", { XX
} },
2650 { "(bad)", { XX
} },
2651 { "(bad)", { XX
} },
2652 { "(bad)", { XX
} },
2654 { "(bad)", { XX
} },
2655 { "(bad)", { XX
} },
2656 { "(bad)", { XX
} },
2657 { "(bad)", { XX
} },
2658 { "(bad)", { XX
} },
2659 { "(bad)", { XX
} },
2660 { "(bad)", { XX
} },
2661 { "(bad)", { XX
} },
2663 { "(bad)", { XX
} },
2664 { "(bad)", { XX
} },
2665 { "(bad)", { XX
} },
2666 { "(bad)", { XX
} },
2667 { "(bad)", { XX
} },
2668 { "(bad)", { XX
} },
2669 { "(bad)", { XX
} },
2670 { "(bad)", { XX
} },
2672 { "(bad)", { XX
} },
2673 { "(bad)", { XX
} },
2674 { "(bad)", { XX
} },
2675 { "(bad)", { XX
} },
2676 { "(bad)", { XX
} },
2677 { "(bad)", { XX
} },
2678 { "(bad)", { XX
} },
2679 { "(bad)", { XX
} },
2681 { "(bad)", { XX
} },
2682 { "(bad)", { XX
} },
2683 { "(bad)", { XX
} },
2684 { "(bad)", { XX
} },
2685 { "(bad)", { XX
} },
2686 { "(bad)", { XX
} },
2687 { "(bad)", { XX
} },
2688 { "(bad)", { XX
} },
2690 { "(bad)", { XX
} },
2691 { "(bad)", { XX
} },
2692 { "(bad)", { XX
} },
2693 { "(bad)", { XX
} },
2694 { "(bad)", { XX
} },
2695 { "(bad)", { XX
} },
2696 { "(bad)", { XX
} },
2697 { "(bad)", { XX
} },
2699 { "(bad)", { XX
} },
2700 { "(bad)", { XX
} },
2701 { "(bad)", { XX
} },
2702 { "(bad)", { XX
} },
2703 { "(bad)", { XX
} },
2704 { "(bad)", { XX
} },
2705 { "(bad)", { XX
} },
2706 { "(bad)", { XX
} },
2708 { "(bad)", { XX
} },
2709 { "(bad)", { XX
} },
2710 { "(bad)", { XX
} },
2711 { "(bad)", { XX
} },
2712 { "(bad)", { XX
} },
2713 { "(bad)", { XX
} },
2714 { "(bad)", { XX
} },
2715 { "(bad)", { XX
} },
2717 { "(bad)", { XX
} },
2718 { "(bad)", { XX
} },
2719 { "(bad)", { XX
} },
2720 { "(bad)", { XX
} },
2721 { "(bad)", { XX
} },
2722 { "(bad)", { XX
} },
2723 { "(bad)", { XX
} },
2724 { "(bad)", { XX
} },
2726 { "(bad)", { XX
} },
2727 { "(bad)", { XX
} },
2728 { "(bad)", { XX
} },
2729 { "(bad)", { XX
} },
2730 { "(bad)", { XX
} },
2731 { "(bad)", { XX
} },
2732 { "(bad)", { XX
} },
2733 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2736 { "(bad)", { XX
} },
2737 { "(bad)", { XX
} },
2738 { "(bad)", { XX
} },
2739 { "(bad)", { XX
} },
2740 { "(bad)", { XX
} },
2741 { "(bad)", { XX
} },
2742 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2745 { "(bad)", { XX
} },
2746 { "(bad)", { XX
} },
2747 { "(bad)", { XX
} },
2748 { "(bad)", { XX
} },
2749 { "(bad)", { XX
} },
2750 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2753 { "(bad)", { XX
} },
2754 { "(bad)", { XX
} },
2755 { "(bad)", { XX
} },
2756 { "(bad)", { XX
} },
2757 { "(bad)", { XX
} },
2758 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2760 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2763 { "(bad)", { XX
} },
2764 { "(bad)", { XX
} },
2765 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "(bad)", { XX
} },
2771 { "(bad)", { XX
} },
2772 { "(bad)", { XX
} },
2773 { "(bad)", { XX
} },
2774 { "(bad)", { XX
} },
2775 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "(bad)", { XX
} },
2778 { "(bad)", { XX
} },
2780 { "(bad)", { XX
} },
2781 { "(bad)", { XX
} },
2782 { "(bad)", { XX
} },
2783 { "(bad)", { XX
} },
2784 { "(bad)", { XX
} },
2785 { "(bad)", { XX
} },
2786 { "(bad)", { XX
} },
2787 { "(bad)", { XX
} },
2789 { "(bad)", { XX
} },
2790 { "(bad)", { XX
} },
2791 { "(bad)", { XX
} },
2792 { "(bad)", { XX
} },
2793 { "(bad)", { XX
} },
2794 { "(bad)", { XX
} },
2795 { "(bad)", { XX
} },
2796 { "(bad)", { XX
} },
2798 { "(bad)", { XX
} },
2799 { "(bad)", { XX
} },
2800 { "(bad)", { XX
} },
2801 { "(bad)", { XX
} },
2802 { "(bad)", { XX
} },
2803 { "(bad)", { XX
} },
2804 { "(bad)", { XX
} },
2805 { "(bad)", { XX
} },
2807 { "(bad)", { XX
} },
2808 { "(bad)", { XX
} },
2809 { "(bad)", { XX
} },
2810 { "(bad)", { XX
} },
2811 { "(bad)", { XX
} },
2812 { "(bad)", { XX
} },
2813 { "(bad)", { XX
} },
2814 { "(bad)", { XX
} },
2816 { "(bad)", { XX
} },
2817 { "(bad)", { XX
} },
2818 { "(bad)", { XX
} },
2819 { "(bad)", { XX
} },
2820 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2827 { "(bad)", { XX
} },
2828 { "(bad)", { XX
} },
2829 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2836 { "(bad)", { XX
} },
2837 { "(bad)", { XX
} },
2838 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2845 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2847 { "(bad)", { XX
} },
2848 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2855 { "(bad)", { XX
} },
2856 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2860 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2871 { "palignr", { MX
, EM
, Ib
} },
2873 { "(bad)", { XX
} },
2874 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2883 { "(bad)", { XX
} },
2884 { "(bad)", { XX
} },
2885 { "(bad)", { XX
} },
2886 { "(bad)", { XX
} },
2887 { "(bad)", { XX
} },
2888 { "(bad)", { XX
} },
2889 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2896 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2900 { "(bad)", { XX
} },
2901 { "(bad)", { XX
} },
2902 { "(bad)", { XX
} },
2903 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2905 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2910 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2914 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2918 { "(bad)", { XX
} },
2919 { "(bad)", { XX
} },
2920 { "(bad)", { XX
} },
2921 { "(bad)", { XX
} },
2922 { "(bad)", { XX
} },
2923 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2932 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2937 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2941 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2946 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2955 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2973 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2977 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2982 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2991 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3000 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3009 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3013 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3017 { "(bad)", { XX
} },
3018 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3020 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3027 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3036 { "(bad)", { XX
} },
3037 { "(bad)", { XX
} },
3038 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3040 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3045 { "(bad)", { XX
} },
3046 { "(bad)", { XX
} },
3047 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3049 { "(bad)", { XX
} },
3050 { "(bad)", { XX
} },
3051 { "(bad)", { XX
} },
3053 { "(bad)", { XX
} },
3054 { "(bad)", { XX
} },
3055 { "(bad)", { XX
} },
3056 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3060 { "(bad)", { XX
} },
3062 { "(bad)", { XX
} },
3063 { "(bad)", { XX
} },
3064 { "(bad)", { XX
} },
3065 { "(bad)", { XX
} },
3066 { "(bad)", { XX
} },
3067 { "(bad)", { XX
} },
3068 { "(bad)", { XX
} },
3069 { "(bad)", { XX
} },
3071 { "(bad)", { XX
} },
3072 { "(bad)", { XX
} },
3073 { "(bad)", { XX
} },
3074 { "(bad)", { XX
} },
3075 { "(bad)", { XX
} },
3076 { "(bad)", { XX
} },
3077 { "(bad)", { XX
} },
3078 { "(bad)", { XX
} },
3080 { "(bad)", { XX
} },
3081 { "(bad)", { XX
} },
3082 { "(bad)", { XX
} },
3083 { "(bad)", { XX
} },
3084 { "(bad)", { XX
} },
3085 { "(bad)", { XX
} },
3086 { "(bad)", { XX
} },
3087 { "(bad)", { XX
} },
3089 { "(bad)", { XX
} },
3090 { "(bad)", { XX
} },
3091 { "(bad)", { XX
} },
3092 { "(bad)", { XX
} },
3093 { "(bad)", { XX
} },
3094 { "(bad)", { XX
} },
3095 { "(bad)", { XX
} },
3096 { "(bad)", { XX
} },
3098 { "(bad)", { XX
} },
3099 { "(bad)", { XX
} },
3100 { "(bad)", { XX
} },
3101 { "(bad)", { XX
} },
3102 { "(bad)", { XX
} },
3103 { "(bad)", { XX
} },
3104 { "(bad)", { XX
} },
3105 { "(bad)", { XX
} },
3107 { "(bad)", { XX
} },
3108 { "(bad)", { XX
} },
3109 { "(bad)", { XX
} },
3110 { "(bad)", { XX
} },
3111 { "(bad)", { XX
} },
3112 { "(bad)", { XX
} },
3113 { "(bad)", { XX
} },
3114 { "(bad)", { XX
} },
3116 { "(bad)", { XX
} },
3117 { "(bad)", { XX
} },
3118 { "(bad)", { XX
} },
3119 { "(bad)", { XX
} },
3120 { "(bad)", { XX
} },
3121 { "(bad)", { XX
} },
3122 { "(bad)", { XX
} },
3123 { "(bad)", { XX
} },
3125 { "(bad)", { XX
} },
3126 { "(bad)", { XX
} },
3127 { "(bad)", { XX
} },
3128 { "(bad)", { XX
} },
3129 { "(bad)", { XX
} },
3130 { "(bad)", { XX
} },
3131 { "(bad)", { XX
} },
3132 { "(bad)", { XX
} },
3134 { "(bad)", { XX
} },
3135 { "(bad)", { XX
} },
3136 { "(bad)", { XX
} },
3137 { "(bad)", { XX
} },
3138 { "(bad)", { XX
} },
3139 { "(bad)", { XX
} },
3140 { "(bad)", { XX
} },
3141 { "(bad)", { XX
} },
3145 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3157 FETCH_DATA (the_info
, codep
+ 1);
3161 /* REX prefixes family. */
3178 if (address_mode
== mode_64bit
)
3184 prefixes
|= PREFIX_REPZ
;
3187 prefixes
|= PREFIX_REPNZ
;
3190 prefixes
|= PREFIX_LOCK
;
3193 prefixes
|= PREFIX_CS
;
3196 prefixes
|= PREFIX_SS
;
3199 prefixes
|= PREFIX_DS
;
3202 prefixes
|= PREFIX_ES
;
3205 prefixes
|= PREFIX_FS
;
3208 prefixes
|= PREFIX_GS
;
3211 prefixes
|= PREFIX_DATA
;
3214 prefixes
|= PREFIX_ADDR
;
3217 /* fwait is really an instruction. If there are prefixes
3218 before the fwait, they belong to the fwait, *not* to the
3219 following instruction. */
3220 if (prefixes
|| rex
)
3222 prefixes
|= PREFIX_FWAIT
;
3226 prefixes
= PREFIX_FWAIT
;
3231 /* Rex is ignored when followed by another prefix. */
3242 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3246 prefix_name (int pref
, int sizeflag
)
3248 static const char *rexes
[16] =
3253 "rex.XB", /* 0x43 */
3255 "rex.RB", /* 0x45 */
3256 "rex.RX", /* 0x46 */
3257 "rex.RXB", /* 0x47 */
3259 "rex.WB", /* 0x49 */
3260 "rex.WX", /* 0x4a */
3261 "rex.WXB", /* 0x4b */
3262 "rex.WR", /* 0x4c */
3263 "rex.WRB", /* 0x4d */
3264 "rex.WRX", /* 0x4e */
3265 "rex.WRXB", /* 0x4f */
3270 /* REX prefixes family. */
3287 return rexes
[pref
- 0x40];
3307 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3309 if (address_mode
== mode_64bit
)
3310 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3312 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3320 static char op_out
[MAX_OPERANDS
][100];
3321 static int op_ad
, op_index
[MAX_OPERANDS
];
3322 static int two_source_ops
;
3323 static bfd_vma op_address
[MAX_OPERANDS
];
3324 static bfd_vma op_riprel
[MAX_OPERANDS
];
3325 static bfd_vma start_pc
;
3328 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3329 * (see topic "Redundant prefixes" in the "Differences from 8086"
3330 * section of the "Virtual 8086 Mode" chapter.)
3331 * 'pc' should be the address of this instruction, it will
3332 * be used to print the target address if this is a relative jump or call
3333 * The function returns the length of this instruction in bytes.
3336 static char intel_syntax
;
3337 static char open_char
;
3338 static char close_char
;
3339 static char separator_char
;
3340 static char scale_char
;
3342 /* Here for backwards compatibility. When gdb stops using
3343 print_insn_i386_att and print_insn_i386_intel these functions can
3344 disappear, and print_insn_i386 be merged into print_insn. */
3346 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
3350 return print_insn (pc
, info
);
3354 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
3358 return print_insn (pc
, info
);
3362 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3366 return print_insn (pc
, info
);
3370 print_i386_disassembler_options (FILE *stream
)
3372 fprintf (stream
, _("\n\
3373 The following i386/x86-64 specific disassembler options are supported for use\n\
3374 with the -M switch (multiple options should be separated by commas):\n"));
3376 fprintf (stream
, _(" x86-64 Disassemble in 64bit mode\n"));
3377 fprintf (stream
, _(" i386 Disassemble in 32bit mode\n"));
3378 fprintf (stream
, _(" i8086 Disassemble in 16bit mode\n"));
3379 fprintf (stream
, _(" att Display instruction in AT&T syntax\n"));
3380 fprintf (stream
, _(" intel Display instruction in Intel syntax\n"));
3381 fprintf (stream
, _(" addr64 Assume 64bit address size\n"));
3382 fprintf (stream
, _(" addr32 Assume 32bit address size\n"));
3383 fprintf (stream
, _(" addr16 Assume 16bit address size\n"));
3384 fprintf (stream
, _(" data32 Assume 32bit data size\n"));
3385 fprintf (stream
, _(" data16 Assume 16bit data size\n"));
3386 fprintf (stream
, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3390 print_insn (bfd_vma pc
, disassemble_info
*info
)
3392 const struct dis386
*dp
;
3394 char *op_txt
[MAX_OPERANDS
];
3396 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
3397 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
3400 struct dis_private priv
;
3403 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3404 || info
->mach
== bfd_mach_x86_64
)
3405 address_mode
= mode_64bit
;
3407 address_mode
= mode_32bit
;
3409 if (intel_syntax
== (char) -1)
3410 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3411 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3413 if (info
->mach
== bfd_mach_i386_i386
3414 || info
->mach
== bfd_mach_x86_64
3415 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3416 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3417 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3418 else if (info
->mach
== bfd_mach_i386_i8086
)
3419 priv
.orig_sizeflag
= 0;
3423 for (p
= info
->disassembler_options
; p
!= NULL
; )
3425 if (CONST_STRNEQ (p
, "x86-64"))
3427 address_mode
= mode_64bit
;
3428 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3430 else if (CONST_STRNEQ (p
, "i386"))
3432 address_mode
= mode_32bit
;
3433 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3435 else if (CONST_STRNEQ (p
, "i8086"))
3437 address_mode
= mode_16bit
;
3438 priv
.orig_sizeflag
= 0;
3440 else if (CONST_STRNEQ (p
, "intel"))
3444 else if (CONST_STRNEQ (p
, "att"))
3448 else if (CONST_STRNEQ (p
, "addr"))
3450 if (address_mode
== mode_64bit
)
3452 if (p
[4] == '3' && p
[5] == '2')
3453 priv
.orig_sizeflag
&= ~AFLAG
;
3454 else if (p
[4] == '6' && p
[5] == '4')
3455 priv
.orig_sizeflag
|= AFLAG
;
3459 if (p
[4] == '1' && p
[5] == '6')
3460 priv
.orig_sizeflag
&= ~AFLAG
;
3461 else if (p
[4] == '3' && p
[5] == '2')
3462 priv
.orig_sizeflag
|= AFLAG
;
3465 else if (CONST_STRNEQ (p
, "data"))
3467 if (p
[4] == '1' && p
[5] == '6')
3468 priv
.orig_sizeflag
&= ~DFLAG
;
3469 else if (p
[4] == '3' && p
[5] == '2')
3470 priv
.orig_sizeflag
|= DFLAG
;
3472 else if (CONST_STRNEQ (p
, "suffix"))
3473 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3475 p
= strchr (p
, ',');
3482 names64
= intel_names64
;
3483 names32
= intel_names32
;
3484 names16
= intel_names16
;
3485 names8
= intel_names8
;
3486 names8rex
= intel_names8rex
;
3487 names_seg
= intel_names_seg
;
3488 index16
= intel_index16
;
3491 separator_char
= '+';
3496 names64
= att_names64
;
3497 names32
= att_names32
;
3498 names16
= att_names16
;
3499 names8
= att_names8
;
3500 names8rex
= att_names8rex
;
3501 names_seg
= att_names_seg
;
3502 index16
= att_index16
;
3505 separator_char
= ',';
3509 /* The output looks better if we put 7 bytes on a line, since that
3510 puts most long word instructions on a single line. */
3511 info
->bytes_per_line
= 7;
3513 info
->private_data
= &priv
;
3514 priv
.max_fetched
= priv
.the_buffer
;
3515 priv
.insn_start
= pc
;
3518 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3526 start_codep
= priv
.the_buffer
;
3527 codep
= priv
.the_buffer
;
3529 if (setjmp (priv
.bailout
) != 0)
3533 /* Getting here means we tried for data but didn't get it. That
3534 means we have an incomplete instruction of some sort. Just
3535 print the first byte as a prefix or a .byte pseudo-op. */
3536 if (codep
> priv
.the_buffer
)
3538 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3540 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3543 /* Just print the first byte as a .byte instruction. */
3544 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3545 (unsigned int) priv
.the_buffer
[0]);
3558 sizeflag
= priv
.orig_sizeflag
;
3560 FETCH_DATA (info
, codep
+ 1);
3561 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3563 if (((prefixes
& PREFIX_FWAIT
)
3564 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3565 || (rex
&& rex_used
))
3569 /* fwait not followed by floating point instruction, or rex followed
3570 by other prefixes. Print the first prefix. */
3571 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3573 name
= INTERNAL_DISASSEMBLER_ERROR
;
3574 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3581 unsigned char threebyte
;
3582 FETCH_DATA (info
, codep
+ 2);
3583 threebyte
= *++codep
;
3584 dp
= &dis386_twobyte
[threebyte
];
3585 need_modrm
= twobyte_has_modrm
[*codep
];
3586 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[*codep
];
3587 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[*codep
];
3588 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[*codep
];
3589 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
3591 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3593 FETCH_DATA (info
, codep
+ 2);
3598 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3599 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3600 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3603 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3604 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3605 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3614 dp
= &dis386
[*codep
];
3615 need_modrm
= onebyte_has_modrm
[*codep
];
3616 uses_DATA_prefix
= 0;
3617 uses_REPNZ_prefix
= 0;
3618 /* pause is 0xf3 0x90. */
3619 uses_REPZ_prefix
= *codep
== 0x90;
3620 uses_LOCK_prefix
= 0;
3624 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3627 used_prefixes
|= PREFIX_REPZ
;
3629 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3632 used_prefixes
|= PREFIX_REPNZ
;
3635 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3638 used_prefixes
|= PREFIX_LOCK
;
3641 if (prefixes
& PREFIX_ADDR
)
3644 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3646 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3647 oappend ("addr32 ");
3649 oappend ("addr16 ");
3650 used_prefixes
|= PREFIX_ADDR
;
3654 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3657 if (dp
->op
[2].bytemode
== cond_jump_mode
3658 && dp
->op
[0].bytemode
== v_mode
3661 if (sizeflag
& DFLAG
)
3662 oappend ("data32 ");
3664 oappend ("data16 ");
3665 used_prefixes
|= PREFIX_DATA
;
3669 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3671 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3672 modrm
.mod
= (*codep
>> 6) & 3;
3673 modrm
.reg
= (*codep
>> 3) & 7;
3674 modrm
.rm
= *codep
& 7;
3676 else if (need_modrm
)
3678 FETCH_DATA (info
, codep
+ 1);
3679 modrm
.mod
= (*codep
>> 6) & 3;
3680 modrm
.reg
= (*codep
>> 3) & 7;
3681 modrm
.rm
= *codep
& 7;
3684 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3691 if (dp
->name
== NULL
)
3693 switch (dp
->op
[0].bytemode
)
3696 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3699 case USE_PREFIX_USER_TABLE
:
3701 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3702 if (prefixes
& PREFIX_REPZ
)
3706 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3707 before PREFIX_DATA. */
3708 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3709 if (prefixes
& PREFIX_REPNZ
)
3713 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3714 if (prefixes
& PREFIX_DATA
)
3718 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3721 case X86_64_SPECIAL
:
3722 index
= address_mode
== mode_64bit
? 1 : 0;
3723 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3727 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3732 if (putop (dp
->name
, sizeflag
) == 0)
3734 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3737 op_ad
= MAX_OPERANDS
- 1 - i
;
3739 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3744 /* See if any prefixes were not used. If so, print the first one
3745 separately. If we don't do this, we'll wind up printing an
3746 instruction stream which does not precisely correspond to the
3747 bytes we are disassembling. */
3748 if ((prefixes
& ~used_prefixes
) != 0)
3752 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3754 name
= INTERNAL_DISASSEMBLER_ERROR
;
3755 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3758 if (rex
& ~rex_used
)
3761 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3763 name
= INTERNAL_DISASSEMBLER_ERROR
;
3764 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3767 obufp
= obuf
+ strlen (obuf
);
3768 for (i
= strlen (obuf
); i
< 6; i
++)
3771 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3773 /* The enter and bound instructions are printed with operands in the same
3774 order as the intel book; everything else is printed in reverse order. */
3775 if (intel_syntax
|| two_source_ops
)
3779 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3780 op_txt
[i
] = op_out
[i
];
3782 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
3784 op_ad
= op_index
[i
];
3785 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
3786 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
3787 riprel
= op_riprel
[i
];
3788 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
3789 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
3794 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3795 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
3799 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3803 (*info
->fprintf_func
) (info
->stream
, ",");
3804 if (op_index
[i
] != -1 && !op_riprel
[i
])
3805 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
3807 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
3811 for (i
= 0; i
< MAX_OPERANDS
; i
++)
3812 if (op_index
[i
] != -1 && op_riprel
[i
])
3814 (*info
->fprintf_func
) (info
->stream
, " # ");
3815 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3816 + op_address
[op_index
[i
]]), info
);
3819 return codep
- priv
.the_buffer
;
3822 static const char *float_mem
[] = {
3897 static const unsigned char float_mem_mode
[] = {
3972 #define ST { OP_ST, 0 }
3973 #define STi { OP_STi, 0 }
3975 #define FGRPd9_2 NULL, { { NULL, 0 } }
3976 #define FGRPd9_4 NULL, { { NULL, 1 } }
3977 #define FGRPd9_5 NULL, { { NULL, 2 } }
3978 #define FGRPd9_6 NULL, { { NULL, 3 } }
3979 #define FGRPd9_7 NULL, { { NULL, 4 } }
3980 #define FGRPda_5 NULL, { { NULL, 5 } }
3981 #define FGRPdb_4 NULL, { { NULL, 6 } }
3982 #define FGRPde_3 NULL, { { NULL, 7 } }
3983 #define FGRPdf_4 NULL, { { NULL, 8 } }
3985 static const struct dis386 float_reg
[][8] = {
3988 { "fadd", { ST
, STi
} },
3989 { "fmul", { ST
, STi
} },
3990 { "fcom", { STi
} },
3991 { "fcomp", { STi
} },
3992 { "fsub", { ST
, STi
} },
3993 { "fsubr", { ST
, STi
} },
3994 { "fdiv", { ST
, STi
} },
3995 { "fdivr", { ST
, STi
} },
4000 { "fxch", { STi
} },
4002 { "(bad)", { XX
} },
4010 { "fcmovb", { ST
, STi
} },
4011 { "fcmove", { ST
, STi
} },
4012 { "fcmovbe",{ ST
, STi
} },
4013 { "fcmovu", { ST
, STi
} },
4014 { "(bad)", { XX
} },
4016 { "(bad)", { XX
} },
4017 { "(bad)", { XX
} },
4021 { "fcmovnb",{ ST
, STi
} },
4022 { "fcmovne",{ ST
, STi
} },
4023 { "fcmovnbe",{ ST
, STi
} },
4024 { "fcmovnu",{ ST
, STi
} },
4026 { "fucomi", { ST
, STi
} },
4027 { "fcomi", { ST
, STi
} },
4028 { "(bad)", { XX
} },
4032 { "fadd", { STi
, ST
} },
4033 { "fmul", { STi
, ST
} },
4034 { "(bad)", { XX
} },
4035 { "(bad)", { XX
} },
4037 { "fsub", { STi
, ST
} },
4038 { "fsubr", { STi
, ST
} },
4039 { "fdiv", { STi
, ST
} },
4040 { "fdivr", { STi
, ST
} },
4042 { "fsubr", { STi
, ST
} },
4043 { "fsub", { STi
, ST
} },
4044 { "fdivr", { STi
, ST
} },
4045 { "fdiv", { STi
, ST
} },
4050 { "ffree", { STi
} },
4051 { "(bad)", { XX
} },
4053 { "fstp", { STi
} },
4054 { "fucom", { STi
} },
4055 { "fucomp", { STi
} },
4056 { "(bad)", { XX
} },
4057 { "(bad)", { XX
} },
4061 { "faddp", { STi
, ST
} },
4062 { "fmulp", { STi
, ST
} },
4063 { "(bad)", { XX
} },
4066 { "fsubp", { STi
, ST
} },
4067 { "fsubrp", { STi
, ST
} },
4068 { "fdivp", { STi
, ST
} },
4069 { "fdivrp", { STi
, ST
} },
4071 { "fsubrp", { STi
, ST
} },
4072 { "fsubp", { STi
, ST
} },
4073 { "fdivrp", { STi
, ST
} },
4074 { "fdivp", { STi
, ST
} },
4079 { "ffreep", { STi
} },
4080 { "(bad)", { XX
} },
4081 { "(bad)", { XX
} },
4082 { "(bad)", { XX
} },
4084 { "fucomip", { ST
, STi
} },
4085 { "fcomip", { ST
, STi
} },
4086 { "(bad)", { XX
} },
4090 static char *fgrps
[][8] = {
4093 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4098 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4103 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4108 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4113 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4118 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4123 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4124 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4129 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4134 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4139 dofloat (int sizeflag
)
4141 const struct dis386
*dp
;
4142 unsigned char floatop
;
4144 floatop
= codep
[-1];
4148 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4150 putop (float_mem
[fp_indx
], sizeflag
);
4153 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4156 /* Skip mod/rm byte. */
4160 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4161 if (dp
->name
== NULL
)
4163 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4165 /* Instruction fnstsw is only one with strange arg. */
4166 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4167 strcpy (op_out
[0], names16
[0]);
4171 putop (dp
->name
, sizeflag
);
4176 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4181 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4186 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4188 oappend ("%st" + intel_syntax
);
4192 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4194 sprintf (scratchbuf
, "%%st(%d)", modrm
.rm
);
4195 oappend (scratchbuf
+ intel_syntax
);
4198 /* Capital letters in template are macros. */
4200 putop (const char *template, int sizeflag
)
4205 for (p
= template; *p
; p
++)
4216 if (address_mode
== mode_64bit
)
4224 /* Alternative not valid. */
4225 strcpy (obuf
, "(bad)");
4229 else if (*p
== '\0')
4250 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4256 if (sizeflag
& SUFFIX_ALWAYS
)
4260 if (intel_syntax
&& !alt
)
4262 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4264 if (sizeflag
& DFLAG
)
4265 *obufp
++ = intel_syntax
? 'd' : 'l';
4267 *obufp
++ = intel_syntax
? 'w' : 's';
4268 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4272 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4279 else if (sizeflag
& DFLAG
)
4280 *obufp
++ = intel_syntax
? 'd' : 'l';
4283 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4288 case 'E': /* For jcxz/jecxz */
4289 if (address_mode
== mode_64bit
)
4291 if (sizeflag
& AFLAG
)
4297 if (sizeflag
& AFLAG
)
4299 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4304 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4306 if (sizeflag
& AFLAG
)
4307 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4309 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4310 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4314 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4316 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4321 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4326 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4327 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4329 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4332 if (prefixes
& PREFIX_DS
)
4353 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4362 if (sizeflag
& SUFFIX_ALWAYS
)
4366 if ((prefixes
& PREFIX_FWAIT
) == 0)
4369 used_prefixes
|= PREFIX_FWAIT
;
4375 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4380 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4385 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4394 if ((prefixes
& PREFIX_DATA
)
4396 || (sizeflag
& SUFFIX_ALWAYS
))
4403 if (sizeflag
& DFLAG
)
4408 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4414 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4416 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4422 if (intel_syntax
&& !alt
)
4425 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4431 if (sizeflag
& DFLAG
)
4432 *obufp
++ = intel_syntax
? 'd' : 'l';
4436 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4443 else if (sizeflag
& DFLAG
)
4452 if (intel_syntax
&& !p
[1]
4453 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4456 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4461 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4463 if (sizeflag
& SUFFIX_ALWAYS
)
4471 if (sizeflag
& SUFFIX_ALWAYS
)
4477 if (sizeflag
& DFLAG
)
4481 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4486 if (prefixes
& PREFIX_DATA
)
4490 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4501 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4503 /* operand size flag for cwtl, cbtw */
4512 else if (sizeflag
& DFLAG
)
4517 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4527 oappend (const char *s
)
4530 obufp
+= strlen (s
);
4536 if (prefixes
& PREFIX_CS
)
4538 used_prefixes
|= PREFIX_CS
;
4539 oappend ("%cs:" + intel_syntax
);
4541 if (prefixes
& PREFIX_DS
)
4543 used_prefixes
|= PREFIX_DS
;
4544 oappend ("%ds:" + intel_syntax
);
4546 if (prefixes
& PREFIX_SS
)
4548 used_prefixes
|= PREFIX_SS
;
4549 oappend ("%ss:" + intel_syntax
);
4551 if (prefixes
& PREFIX_ES
)
4553 used_prefixes
|= PREFIX_ES
;
4554 oappend ("%es:" + intel_syntax
);
4556 if (prefixes
& PREFIX_FS
)
4558 used_prefixes
|= PREFIX_FS
;
4559 oappend ("%fs:" + intel_syntax
);
4561 if (prefixes
& PREFIX_GS
)
4563 used_prefixes
|= PREFIX_GS
;
4564 oappend ("%gs:" + intel_syntax
);
4569 OP_indirE (int bytemode
, int sizeflag
)
4573 OP_E (bytemode
, sizeflag
);
4577 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
4579 if (address_mode
== mode_64bit
)
4587 sprintf_vma (tmp
, disp
);
4588 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4589 strcpy (buf
+ 2, tmp
+ i
);
4593 bfd_signed_vma v
= disp
;
4600 /* Check for possible overflow on 0x8000000000000000. */
4603 strcpy (buf
, "9223372036854775808");
4617 tmp
[28 - i
] = (v
% 10) + '0';
4621 strcpy (buf
, tmp
+ 29 - i
);
4627 sprintf (buf
, "0x%x", (unsigned int) disp
);
4629 sprintf (buf
, "%d", (int) disp
);
4633 /* Put DISP in BUF as signed hex number. */
4636 print_displacement (char *buf
, bfd_vma disp
)
4638 bfd_signed_vma val
= disp
;
4647 /* Check for possible overflow. */
4650 switch (address_mode
)
4653 strcpy (buf
+ j
, "0x8000000000000000");
4656 strcpy (buf
+ j
, "0x80000000");
4659 strcpy (buf
+ j
, "0x8000");
4669 sprintf_vma (tmp
, val
);
4670 for (i
= 0; tmp
[i
] == '0'; i
++)
4674 strcpy (buf
+ j
, tmp
+ i
);
4678 intel_operand_size (int bytemode
, int sizeflag
)
4684 oappend ("BYTE PTR ");
4688 oappend ("WORD PTR ");
4691 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4693 oappend ("QWORD PTR ");
4694 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4702 oappend ("QWORD PTR ");
4703 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4704 oappend ("DWORD PTR ");
4706 oappend ("WORD PTR ");
4707 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4710 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4712 oappend ("WORD PTR ");
4714 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4718 oappend ("DWORD PTR ");
4721 oappend ("QWORD PTR ");
4724 if (address_mode
== mode_64bit
)
4725 oappend ("QWORD PTR ");
4727 oappend ("DWORD PTR ");
4730 if (sizeflag
& DFLAG
)
4731 oappend ("FWORD PTR ");
4733 oappend ("DWORD PTR ");
4734 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4737 oappend ("TBYTE PTR ");
4740 oappend ("XMMWORD PTR ");
4743 oappend ("OWORD PTR ");
4751 OP_E (int bytemode
, int sizeflag
)
4760 /* Skip mod/rm byte. */
4771 oappend (names8rex
[modrm
.rm
+ add
]);
4773 oappend (names8
[modrm
.rm
+ add
]);
4776 oappend (names16
[modrm
.rm
+ add
]);
4779 oappend (names32
[modrm
.rm
+ add
]);
4782 oappend (names64
[modrm
.rm
+ add
]);
4785 if (address_mode
== mode_64bit
)
4786 oappend (names64
[modrm
.rm
+ add
]);
4788 oappend (names32
[modrm
.rm
+ add
]);
4791 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4793 oappend (names64
[modrm
.rm
+ add
]);
4794 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4806 oappend (names64
[modrm
.rm
+ add
]);
4807 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4808 oappend (names32
[modrm
.rm
+ add
]);
4810 oappend (names16
[modrm
.rm
+ add
]);
4811 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4816 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4824 intel_operand_size (bytemode
, sizeflag
);
4827 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4829 /* 32/64 bit address mode */
4844 FETCH_DATA (the_info
, codep
+ 1);
4845 index
= (*codep
>> 3) & 7;
4846 if (address_mode
== mode_64bit
|| index
!= 0x4)
4847 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4848 scale
= (*codep
>> 6) & 3;
4860 if ((base
& 7) == 5)
4863 if (address_mode
== mode_64bit
&& !havesib
)
4869 FETCH_DATA (the_info
, codep
+ 1);
4871 if ((disp
& 0x80) != 0)
4879 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
4882 if (modrm
.mod
!= 0 || (base
& 7) == 5)
4884 if (havedisp
|| riprel
)
4885 print_displacement (scratchbuf
, disp
);
4887 print_operand_value (scratchbuf
, 1, disp
);
4888 oappend (scratchbuf
);
4896 if (havedisp
|| (intel_syntax
&& riprel
))
4898 *obufp
++ = open_char
;
4899 if (intel_syntax
&& riprel
)
4906 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4907 ? names64
[base
] : names32
[base
]);
4912 if (!intel_syntax
|| havebase
)
4914 *obufp
++ = separator_char
;
4917 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4918 ? names64
[index
] : names32
[index
]);
4920 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
4922 *obufp
++ = scale_char
;
4924 sprintf (scratchbuf
, "%d", 1 << scale
);
4925 oappend (scratchbuf
);
4929 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
4931 if ((bfd_signed_vma
) disp
>= 0)
4936 else if (modrm
.mod
!= 1)
4940 disp
= - (bfd_signed_vma
) disp
;
4943 print_displacement (scratchbuf
, disp
);
4944 oappend (scratchbuf
);
4947 *obufp
++ = close_char
;
4950 else if (intel_syntax
)
4952 if (modrm
.mod
!= 0 || (base
& 7) == 5)
4954 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4955 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
4959 oappend (names_seg
[ds_reg
- es_reg
]);
4962 print_operand_value (scratchbuf
, 1, disp
);
4963 oappend (scratchbuf
);
4968 { /* 16 bit address mode */
4975 if ((disp
& 0x8000) != 0)
4980 FETCH_DATA (the_info
, codep
+ 1);
4982 if ((disp
& 0x80) != 0)
4987 if ((disp
& 0x8000) != 0)
4993 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
4995 print_displacement (scratchbuf
, disp
);
4996 oappend (scratchbuf
);
4999 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5001 *obufp
++ = open_char
;
5003 oappend (index16
[modrm
.rm
]);
5005 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5007 if ((bfd_signed_vma
) disp
>= 0)
5012 else if (modrm
.mod
!= 1)
5016 disp
= - (bfd_signed_vma
) disp
;
5019 print_displacement (scratchbuf
, disp
);
5020 oappend (scratchbuf
);
5023 *obufp
++ = close_char
;
5026 else if (intel_syntax
)
5028 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5029 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5033 oappend (names_seg
[ds_reg
- es_reg
]);
5036 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
5037 oappend (scratchbuf
);
5043 OP_G (int bytemode
, int sizeflag
)
5054 oappend (names8rex
[modrm
.reg
+ add
]);
5056 oappend (names8
[modrm
.reg
+ add
]);
5059 oappend (names16
[modrm
.reg
+ add
]);
5062 oappend (names32
[modrm
.reg
+ add
]);
5065 oappend (names64
[modrm
.reg
+ add
]);
5074 oappend (names64
[modrm
.reg
+ add
]);
5075 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5076 oappend (names32
[modrm
.reg
+ add
]);
5078 oappend (names16
[modrm
.reg
+ add
]);
5079 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5082 if (address_mode
== mode_64bit
)
5083 oappend (names64
[modrm
.reg
+ add
]);
5085 oappend (names32
[modrm
.reg
+ add
]);
5088 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5101 FETCH_DATA (the_info
, codep
+ 8);
5102 a
= *codep
++ & 0xff;
5103 a
|= (*codep
++ & 0xff) << 8;
5104 a
|= (*codep
++ & 0xff) << 16;
5105 a
|= (*codep
++ & 0xff) << 24;
5106 b
= *codep
++ & 0xff;
5107 b
|= (*codep
++ & 0xff) << 8;
5108 b
|= (*codep
++ & 0xff) << 16;
5109 b
|= (*codep
++ & 0xff) << 24;
5110 x
= a
+ ((bfd_vma
) b
<< 32);
5118 static bfd_signed_vma
5121 bfd_signed_vma x
= 0;
5123 FETCH_DATA (the_info
, codep
+ 4);
5124 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5125 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5126 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5127 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5131 static bfd_signed_vma
5134 bfd_signed_vma x
= 0;
5136 FETCH_DATA (the_info
, codep
+ 4);
5137 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5138 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5139 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5140 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5142 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5152 FETCH_DATA (the_info
, codep
+ 2);
5153 x
= *codep
++ & 0xff;
5154 x
|= (*codep
++ & 0xff) << 8;
5159 set_op (bfd_vma op
, int riprel
)
5161 op_index
[op_ad
] = op_ad
;
5162 if (address_mode
== mode_64bit
)
5164 op_address
[op_ad
] = op
;
5165 op_riprel
[op_ad
] = riprel
;
5169 /* Mask to get a 32-bit address. */
5170 op_address
[op_ad
] = op
& 0xffffffff;
5171 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5176 OP_REG (int code
, int sizeflag
)
5186 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5187 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5188 s
= names16
[code
- ax_reg
+ add
];
5190 case es_reg
: case ss_reg
: case cs_reg
:
5191 case ds_reg
: case fs_reg
: case gs_reg
:
5192 s
= names_seg
[code
- es_reg
+ add
];
5194 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5195 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5198 s
= names8rex
[code
- al_reg
+ add
];
5200 s
= names8
[code
- al_reg
];
5202 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5203 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5204 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5206 s
= names64
[code
- rAX_reg
+ add
];
5209 code
+= eAX_reg
- rAX_reg
;
5211 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5212 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5215 s
= names64
[code
- eAX_reg
+ add
];
5216 else if (sizeflag
& DFLAG
)
5217 s
= names32
[code
- eAX_reg
+ add
];
5219 s
= names16
[code
- eAX_reg
+ add
];
5220 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5223 s
= INTERNAL_DISASSEMBLER_ERROR
;
5230 OP_IMREG (int code
, int sizeflag
)
5242 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5243 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5244 s
= names16
[code
- ax_reg
];
5246 case es_reg
: case ss_reg
: case cs_reg
:
5247 case ds_reg
: case fs_reg
: case gs_reg
:
5248 s
= names_seg
[code
- es_reg
];
5250 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5251 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5254 s
= names8rex
[code
- al_reg
];
5256 s
= names8
[code
- al_reg
];
5258 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5259 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5262 s
= names64
[code
- eAX_reg
];
5263 else if (sizeflag
& DFLAG
)
5264 s
= names32
[code
- eAX_reg
];
5266 s
= names16
[code
- eAX_reg
];
5267 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5270 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5275 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5278 s
= INTERNAL_DISASSEMBLER_ERROR
;
5285 OP_I (int bytemode
, int sizeflag
)
5288 bfd_signed_vma mask
= -1;
5293 FETCH_DATA (the_info
, codep
+ 1);
5298 if (address_mode
== mode_64bit
)
5308 else if (sizeflag
& DFLAG
)
5318 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5329 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5334 scratchbuf
[0] = '$';
5335 print_operand_value (scratchbuf
+ 1, 1, op
);
5336 oappend (scratchbuf
+ intel_syntax
);
5337 scratchbuf
[0] = '\0';
5341 OP_I64 (int bytemode
, int sizeflag
)
5344 bfd_signed_vma mask
= -1;
5346 if (address_mode
!= mode_64bit
)
5348 OP_I (bytemode
, sizeflag
);
5355 FETCH_DATA (the_info
, codep
+ 1);
5363 else if (sizeflag
& DFLAG
)
5373 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5380 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5385 scratchbuf
[0] = '$';
5386 print_operand_value (scratchbuf
+ 1, 1, op
);
5387 oappend (scratchbuf
+ intel_syntax
);
5388 scratchbuf
[0] = '\0';
5392 OP_sI (int bytemode
, int sizeflag
)
5395 bfd_signed_vma mask
= -1;
5400 FETCH_DATA (the_info
, codep
+ 1);
5402 if ((op
& 0x80) != 0)
5410 else if (sizeflag
& DFLAG
)
5419 if ((op
& 0x8000) != 0)
5422 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5427 if ((op
& 0x8000) != 0)
5431 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5435 scratchbuf
[0] = '$';
5436 print_operand_value (scratchbuf
+ 1, 1, op
);
5437 oappend (scratchbuf
+ intel_syntax
);
5441 OP_J (int bytemode
, int sizeflag
)
5445 bfd_vma segment
= 0;
5450 FETCH_DATA (the_info
, codep
+ 1);
5452 if ((disp
& 0x80) != 0)
5456 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5461 if ((disp
& 0x8000) != 0)
5463 /* In 16bit mode, address is wrapped around at 64k within
5464 the same segment. Otherwise, a data16 prefix on a jump
5465 instruction means that the pc is masked to 16 bits after
5466 the displacement is added! */
5468 if ((prefixes
& PREFIX_DATA
) == 0)
5469 segment
= ((start_pc
+ codep
- start_codep
)
5470 & ~((bfd_vma
) 0xffff));
5472 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5475 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5478 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5480 print_operand_value (scratchbuf
, 1, disp
);
5481 oappend (scratchbuf
);
5485 OP_SEG (int bytemode
, int sizeflag
)
5487 if (bytemode
== w_mode
)
5488 oappend (names_seg
[modrm
.reg
]);
5490 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5494 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5498 if (sizeflag
& DFLAG
)
5508 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5510 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
5512 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
5513 oappend (scratchbuf
);
5517 OP_OFF (int bytemode
, int sizeflag
)
5521 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5522 intel_operand_size (bytemode
, sizeflag
);
5525 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5532 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5533 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5535 oappend (names_seg
[ds_reg
- es_reg
]);
5539 print_operand_value (scratchbuf
, 1, off
);
5540 oappend (scratchbuf
);
5544 OP_OFF64 (int bytemode
, int sizeflag
)
5548 if (address_mode
!= mode_64bit
5549 || (prefixes
& PREFIX_ADDR
))
5551 OP_OFF (bytemode
, sizeflag
);
5555 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5556 intel_operand_size (bytemode
, sizeflag
);
5563 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5564 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5566 oappend (names_seg
[ds_reg
- es_reg
]);
5570 print_operand_value (scratchbuf
, 1, off
);
5571 oappend (scratchbuf
);
5575 ptr_reg (int code
, int sizeflag
)
5579 *obufp
++ = open_char
;
5580 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5581 if (address_mode
== mode_64bit
)
5583 if (!(sizeflag
& AFLAG
))
5584 s
= names32
[code
- eAX_reg
];
5586 s
= names64
[code
- eAX_reg
];
5588 else if (sizeflag
& AFLAG
)
5589 s
= names32
[code
- eAX_reg
];
5591 s
= names16
[code
- eAX_reg
];
5593 *obufp
++ = close_char
;
5598 OP_ESreg (int code
, int sizeflag
)
5604 case 0x6d: /* insw/insl */
5605 intel_operand_size (z_mode
, sizeflag
);
5607 case 0xa5: /* movsw/movsl/movsq */
5608 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5609 case 0xab: /* stosw/stosl */
5610 case 0xaf: /* scasw/scasl */
5611 intel_operand_size (v_mode
, sizeflag
);
5614 intel_operand_size (b_mode
, sizeflag
);
5617 oappend ("%es:" + intel_syntax
);
5618 ptr_reg (code
, sizeflag
);
5622 OP_DSreg (int code
, int sizeflag
)
5628 case 0x6f: /* outsw/outsl */
5629 intel_operand_size (z_mode
, sizeflag
);
5631 case 0xa5: /* movsw/movsl/movsq */
5632 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5633 case 0xad: /* lodsw/lodsl/lodsq */
5634 intel_operand_size (v_mode
, sizeflag
);
5637 intel_operand_size (b_mode
, sizeflag
);
5647 prefixes
|= PREFIX_DS
;
5649 ptr_reg (code
, sizeflag
);
5653 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5661 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5663 used_prefixes
|= PREFIX_LOCK
;
5666 sprintf (scratchbuf
, "%%cr%d", modrm
.reg
+ add
);
5667 oappend (scratchbuf
+ intel_syntax
);
5671 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5678 sprintf (scratchbuf
, "db%d", modrm
.reg
+ add
);
5680 sprintf (scratchbuf
, "%%db%d", modrm
.reg
+ add
);
5681 oappend (scratchbuf
);
5685 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5687 sprintf (scratchbuf
, "%%tr%d", modrm
.reg
);
5688 oappend (scratchbuf
+ intel_syntax
);
5692 OP_R (int bytemode
, int sizeflag
)
5695 OP_E (bytemode
, sizeflag
);
5701 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5703 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5704 if (prefixes
& PREFIX_DATA
)
5710 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5713 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5714 oappend (scratchbuf
+ intel_syntax
);
5718 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5724 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5725 oappend (scratchbuf
+ intel_syntax
);
5729 OP_EM (int bytemode
, int sizeflag
)
5733 if (intel_syntax
&& bytemode
== v_mode
)
5735 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5736 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5738 OP_E (bytemode
, sizeflag
);
5742 /* Skip mod/rm byte. */
5745 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5746 if (prefixes
& PREFIX_DATA
)
5753 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5756 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5757 oappend (scratchbuf
+ intel_syntax
);
5760 /* cvt* are the only instructions in sse2 which have
5761 both SSE and MMX operands and also have 0x66 prefix
5762 in their opcode. 0x66 was originally used to differentiate
5763 between SSE and MMX instruction(operands). So we have to handle the
5764 cvt* separately using OP_EMC and OP_MXC */
5766 OP_EMC (int bytemode
, int sizeflag
)
5770 if (intel_syntax
&& bytemode
== v_mode
)
5772 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5773 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5775 OP_E (bytemode
, sizeflag
);
5779 /* Skip mod/rm byte. */
5782 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5783 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5784 oappend (scratchbuf
+ intel_syntax
);
5788 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5790 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5791 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5792 oappend (scratchbuf
+ intel_syntax
);
5796 OP_EX (int bytemode
, int sizeflag
)
5801 if (intel_syntax
&& bytemode
== v_mode
)
5803 switch (prefixes
& (PREFIX_DATA
|PREFIX_REPZ
|PREFIX_REPNZ
))
5805 case 0: bytemode
= x_mode
; break;
5806 case PREFIX_REPZ
: bytemode
= d_mode
; used_prefixes
|= PREFIX_REPZ
; break;
5807 case PREFIX_DATA
: bytemode
= x_mode
; used_prefixes
|= PREFIX_DATA
; break;
5808 case PREFIX_REPNZ
: bytemode
= q_mode
; used_prefixes
|= PREFIX_REPNZ
; break;
5809 default: bytemode
= 0; break;
5812 OP_E (bytemode
, sizeflag
);
5819 /* Skip mod/rm byte. */
5822 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5823 oappend (scratchbuf
+ intel_syntax
);
5827 OP_MS (int bytemode
, int sizeflag
)
5830 OP_EM (bytemode
, sizeflag
);
5836 OP_XS (int bytemode
, int sizeflag
)
5839 OP_EX (bytemode
, sizeflag
);
5845 OP_M (int bytemode
, int sizeflag
)
5848 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5851 OP_E (bytemode
, sizeflag
);
5855 OP_0f07 (int bytemode
, int sizeflag
)
5857 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
5860 OP_E (bytemode
, sizeflag
);
5864 OP_0fae (int bytemode
, int sizeflag
)
5869 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
5871 if (modrm
.reg
< 5 || modrm
.rm
!= 0)
5873 BadOp (); /* bad sfence, mfence, or lfence */
5877 else if (modrm
.reg
!= 7)
5879 BadOp (); /* bad clflush */
5883 OP_E (bytemode
, sizeflag
);
5886 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5887 32bit mode and "xchg %rax,%rax" in 64bit mode. */
5890 NOP_Fixup1 (int bytemode
, int sizeflag
)
5892 if ((prefixes
& PREFIX_DATA
) != 0
5895 && address_mode
== mode_64bit
))
5896 OP_REG (bytemode
, sizeflag
);
5898 strcpy (obuf
, "nop");
5902 NOP_Fixup2 (int bytemode
, int sizeflag
)
5904 if ((prefixes
& PREFIX_DATA
) != 0
5907 && address_mode
== mode_64bit
))
5908 OP_IMREG (bytemode
, sizeflag
);
5911 static const char *const Suffix3DNow
[] = {
5912 /* 00 */ NULL
, NULL
, NULL
, NULL
,
5913 /* 04 */ NULL
, NULL
, NULL
, NULL
,
5914 /* 08 */ NULL
, NULL
, NULL
, NULL
,
5915 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
5916 /* 10 */ NULL
, NULL
, NULL
, NULL
,
5917 /* 14 */ NULL
, NULL
, NULL
, NULL
,
5918 /* 18 */ NULL
, NULL
, NULL
, NULL
,
5919 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
5920 /* 20 */ NULL
, NULL
, NULL
, NULL
,
5921 /* 24 */ NULL
, NULL
, NULL
, NULL
,
5922 /* 28 */ NULL
, NULL
, NULL
, NULL
,
5923 /* 2C */ NULL
, NULL
, NULL
, NULL
,
5924 /* 30 */ NULL
, NULL
, NULL
, NULL
,
5925 /* 34 */ NULL
, NULL
, NULL
, NULL
,
5926 /* 38 */ NULL
, NULL
, NULL
, NULL
,
5927 /* 3C */ NULL
, NULL
, NULL
, NULL
,
5928 /* 40 */ NULL
, NULL
, NULL
, NULL
,
5929 /* 44 */ NULL
, NULL
, NULL
, NULL
,
5930 /* 48 */ NULL
, NULL
, NULL
, NULL
,
5931 /* 4C */ NULL
, NULL
, NULL
, NULL
,
5932 /* 50 */ NULL
, NULL
, NULL
, NULL
,
5933 /* 54 */ NULL
, NULL
, NULL
, NULL
,
5934 /* 58 */ NULL
, NULL
, NULL
, NULL
,
5935 /* 5C */ NULL
, NULL
, NULL
, NULL
,
5936 /* 60 */ NULL
, NULL
, NULL
, NULL
,
5937 /* 64 */ NULL
, NULL
, NULL
, NULL
,
5938 /* 68 */ NULL
, NULL
, NULL
, NULL
,
5939 /* 6C */ NULL
, NULL
, NULL
, NULL
,
5940 /* 70 */ NULL
, NULL
, NULL
, NULL
,
5941 /* 74 */ NULL
, NULL
, NULL
, NULL
,
5942 /* 78 */ NULL
, NULL
, NULL
, NULL
,
5943 /* 7C */ NULL
, NULL
, NULL
, NULL
,
5944 /* 80 */ NULL
, NULL
, NULL
, NULL
,
5945 /* 84 */ NULL
, NULL
, NULL
, NULL
,
5946 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
5947 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
5948 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
5949 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
5950 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
5951 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
5952 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
5953 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
5954 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
5955 /* AC */ NULL
, NULL
, "pfacc", NULL
,
5956 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
5957 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
5958 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
5959 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
5960 /* C0 */ NULL
, NULL
, NULL
, NULL
,
5961 /* C4 */ NULL
, NULL
, NULL
, NULL
,
5962 /* C8 */ NULL
, NULL
, NULL
, NULL
,
5963 /* CC */ NULL
, NULL
, NULL
, NULL
,
5964 /* D0 */ NULL
, NULL
, NULL
, NULL
,
5965 /* D4 */ NULL
, NULL
, NULL
, NULL
,
5966 /* D8 */ NULL
, NULL
, NULL
, NULL
,
5967 /* DC */ NULL
, NULL
, NULL
, NULL
,
5968 /* E0 */ NULL
, NULL
, NULL
, NULL
,
5969 /* E4 */ NULL
, NULL
, NULL
, NULL
,
5970 /* E8 */ NULL
, NULL
, NULL
, NULL
,
5971 /* EC */ NULL
, NULL
, NULL
, NULL
,
5972 /* F0 */ NULL
, NULL
, NULL
, NULL
,
5973 /* F4 */ NULL
, NULL
, NULL
, NULL
,
5974 /* F8 */ NULL
, NULL
, NULL
, NULL
,
5975 /* FC */ NULL
, NULL
, NULL
, NULL
,
5979 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5981 const char *mnemonic
;
5983 FETCH_DATA (the_info
, codep
+ 1);
5984 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5985 place where an 8-bit immediate would normally go. ie. the last
5986 byte of the instruction. */
5987 obufp
= obuf
+ strlen (obuf
);
5988 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
5993 /* Since a variable sized modrm/sib chunk is between the start
5994 of the opcode (0x0f0f) and the opcode suffix, we need to do
5995 all the modrm processing first, and don't know until now that
5996 we have a bad opcode. This necessitates some cleaning up. */
5997 op_out
[0][0] = '\0';
5998 op_out
[1][0] = '\0';
6003 static const char *simd_cmp_op
[] = {
6015 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6017 unsigned int cmp_type
;
6019 FETCH_DATA (the_info
, codep
+ 1);
6020 obufp
= obuf
+ strlen (obuf
);
6021 cmp_type
= *codep
++ & 0xff;
6024 char suffix1
= 'p', suffix2
= 's';
6025 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6026 if (prefixes
& PREFIX_REPZ
)
6030 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6031 if (prefixes
& PREFIX_DATA
)
6035 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6036 if (prefixes
& PREFIX_REPNZ
)
6037 suffix1
= 's', suffix2
= 'd';
6040 sprintf (scratchbuf
, "cmp%s%c%c",
6041 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6042 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6043 oappend (scratchbuf
);
6047 /* We have a bad extension byte. Clean up. */
6048 op_out
[0][0] = '\0';
6049 op_out
[1][0] = '\0';
6055 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6057 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6058 forms of these instructions. */
6061 char *p
= obuf
+ strlen (obuf
);
6064 *(p
- 1) = *(p
- 2);
6065 *(p
- 2) = *(p
- 3);
6066 *(p
- 3) = extrachar
;
6071 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6073 if (modrm
.mod
== 3 && modrm
.reg
== 1 && modrm
.rm
<= 1)
6075 /* Override "sidt". */
6076 size_t olen
= strlen (obuf
);
6077 char *p
= obuf
+ olen
- 4;
6078 const char **names
= (address_mode
== mode_64bit
6079 ? names64
: names32
);
6081 /* We might have a suffix when disassembling with -Msuffix. */
6085 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6087 && (prefixes
& PREFIX_ADDR
)
6090 && CONST_STRNEQ (p
- 7, "addr")
6091 && (CONST_STRNEQ (p
- 3, "16")
6092 || CONST_STRNEQ (p
- 3, "32")))
6097 /* mwait %eax,%ecx */
6098 strcpy (p
, "mwait");
6100 strcpy (op_out
[0], names
[0]);
6104 /* monitor %eax,%ecx,%edx" */
6105 strcpy (p
, "monitor");
6108 const char **op1_names
;
6109 if (!(prefixes
& PREFIX_ADDR
))
6110 op1_names
= (address_mode
== mode_16bit
6114 op1_names
= (address_mode
!= mode_32bit
6115 ? names32
: names16
);
6116 used_prefixes
|= PREFIX_ADDR
;
6118 strcpy (op_out
[0], op1_names
[0]);
6119 strcpy (op_out
[2], names
[2]);
6124 strcpy (op_out
[1], names
[1]);
6135 SVME_Fixup (int bytemode
, int sizeflag
)
6167 OP_M (bytemode
, sizeflag
);
6170 /* Override "lidt". */
6171 p
= obuf
+ strlen (obuf
) - 4;
6172 /* We might have a suffix. */
6176 if (!(prefixes
& PREFIX_ADDR
))
6181 used_prefixes
|= PREFIX_ADDR
;
6185 strcpy (op_out
[1], names32
[1]);
6191 *obufp
++ = open_char
;
6192 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6196 strcpy (obufp
, alt
);
6197 obufp
+= strlen (alt
);
6198 *obufp
++ = close_char
;
6205 INVLPG_Fixup (int bytemode
, int sizeflag
)
6218 OP_M (bytemode
, sizeflag
);
6221 /* Override "invlpg". */
6222 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6229 /* Throw away prefixes and 1st. opcode byte. */
6230 codep
= insn_codep
+ 1;
6235 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6242 /* Override "sgdt". */
6243 char *p
= obuf
+ strlen (obuf
) - 4;
6245 /* We might have a suffix when disassembling with -Msuffix. */
6252 strcpy (p
, "vmcall");
6255 strcpy (p
, "vmlaunch");
6258 strcpy (p
, "vmresume");
6261 strcpy (p
, "vmxoff");
6272 OP_VMX (int bytemode
, int sizeflag
)
6274 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
6275 if (prefixes
& PREFIX_DATA
)
6276 strcpy (obuf
, "vmclear");
6277 else if (prefixes
& PREFIX_REPZ
)
6278 strcpy (obuf
, "vmxon");
6280 strcpy (obuf
, "vmptrld");
6281 OP_E (bytemode
, sizeflag
);
6285 REP_Fixup (int bytemode
, int sizeflag
)
6287 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6291 if (prefixes
& PREFIX_REPZ
)
6292 switch (*insn_codep
)
6294 case 0x6e: /* outsb */
6295 case 0x6f: /* outsw/outsl */
6296 case 0xa4: /* movsb */
6297 case 0xa5: /* movsw/movsl/movsq */
6303 case 0xaa: /* stosb */
6304 case 0xab: /* stosw/stosl/stosq */
6305 case 0xac: /* lodsb */
6306 case 0xad: /* lodsw/lodsl/lodsq */
6307 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
6312 case 0x6c: /* insb */
6313 case 0x6d: /* insl/insw */
6329 olen
= strlen (obuf
);
6330 p
= obuf
+ olen
- ilen
- 1 - 4;
6331 /* Handle "repz [addr16|addr32]". */
6332 if ((prefixes
& PREFIX_ADDR
))
6335 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
6343 OP_IMREG (bytemode
, sizeflag
);
6346 OP_ESreg (bytemode
, sizeflag
);
6349 OP_DSreg (bytemode
, sizeflag
);
6358 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6363 /* Change cmpxchg8b to cmpxchg16b. */
6364 char *p
= obuf
+ strlen (obuf
) - 2;
6368 OP_M (bytemode
, sizeflag
);
6372 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6374 sprintf (scratchbuf
, "%%xmm%d", reg
);
6375 oappend (scratchbuf
+ intel_syntax
);
6379 CRC32_Fixup (int bytemode
, int sizeflag
)
6381 /* Add proper suffix to "crc32". */
6382 char *p
= obuf
+ strlen (obuf
);
6399 else if (sizeflag
& DFLAG
)
6403 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6406 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6415 /* Skip mod/rm byte. */
6420 add
= (rex
& REX_B
) ? 8 : 0;
6421 if (bytemode
== b_mode
)
6425 oappend (names8rex
[modrm
.rm
+ add
]);
6427 oappend (names8
[modrm
.rm
+ add
]);
6433 oappend (names64
[modrm
.rm
+ add
]);
6434 else if ((prefixes
& PREFIX_DATA
))
6435 oappend (names16
[modrm
.rm
+ add
]);
6437 oappend (names32
[modrm
.rm
+ add
]);
6441 OP_E (bytemode
, sizeflag
);