3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
37 const char comment_chars
[] = ";";
38 const char line_comment_chars
[] = "#*;";
39 const char line_separator_chars
[] = "@";
41 const char EXP_CHARS
[] = "eE";
42 const char FLT_CHARS
[] = "dDfF";
44 const char *md_shortopts
= "";
48 OPTION_MARCH
= OPTION_MD_BASE
,
52 OPTION_MLITTLE_ENDIAN
,
58 struct option md_longopts
[] =
60 { "march", required_argument
, NULL
, OPTION_MARCH
},
61 { "matomic", no_argument
, NULL
, OPTION_MATOMIC
},
62 { "mno-atomic", no_argument
, NULL
, OPTION_MNO_ATOMIC
},
63 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
64 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
65 { "mdsbt", no_argument
, NULL
, OPTION_MDSBT
},
66 { "mno-dsbt", no_argument
, NULL
, OPTION_MNO_DSBT
},
67 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
68 { NULL
, no_argument
, NULL
, 0 }
70 size_t md_longopts_size
= sizeof (md_longopts
);
72 /* Whether to enable atomic instructions. 1 to enable them, 0 to
73 disable, -1 to default from architecture. */
74 static int tic6x_atomic
= -1;
76 /* The instructions enabled based only on the selected architecture
77 (all instructions, if no architecture specified). Atomic
78 instructions may be enabled or disabled separately. */
79 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
87 /* The instructions enabled based on the current set of features
88 (architecture, as modified by other options). */
89 static unsigned short tic6x_features
;
91 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
93 static int tic6x_arch_attribute
= C6XABI_Tag_ISA_none
;
95 /* Whether any instructions at all have been seen. Once any
96 instructions have been seen, architecture attributes merge into the
97 previous attribute value rather than replacing it. */
98 static bfd_boolean tic6x_seen_insns
= FALSE
;
100 /* The number of registers in each register file supported by the
101 current architecture. */
102 static unsigned int tic6x_num_registers
;
104 /* Whether predication on A0 is possible. */
105 static bfd_boolean tic6x_predicate_a0
;
107 /* Whether execute packets can cross fetch packet boundaries. */
108 static bfd_boolean tic6x_can_cross_fp_boundary
;
110 /* Whether there are constraints on simultaneous reads and writes of
112 static bfd_boolean tic6x_long_data_constraints
;
114 /* Whether compact instructions are available. */
115 static bfd_boolean tic6x_compact_insns
;
117 /* Whether to generate RELA relocations. */
118 static bfd_boolean tic6x_generate_rela
= TRUE
;
120 /* Whether the code uses DSBT addressing. */
121 static bfd_boolean tic6x_dsbt
;
123 /* Table of supported architecture variants. */
128 unsigned short features
;
130 static const tic6x_arch_table tic6x_arches
[] =
132 { "c62x", C6XABI_Tag_ISA_C62X
, TIC6X_INSN_C62X
},
133 { "c64x", C6XABI_Tag_ISA_C64X
, TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
134 { "c64x+", C6XABI_Tag_ISA_C64XP
, (TIC6X_INSN_C62X
136 | TIC6X_INSN_C64XP
) },
137 { "c67x", C6XABI_Tag_ISA_C67X
, TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
138 { "c67x+", C6XABI_Tag_ISA_C67XP
, (TIC6X_INSN_C62X
140 | TIC6X_INSN_C67XP
) },
141 { "c674x", C6XABI_Tag_ISA_C674X
, (TIC6X_INSN_C62X
146 | TIC6X_INSN_C674X
) }
149 /* Update the selected architecture based on ARCH, giving an error if
150 ARCH is an invalid value. Does not call tic6x_update_features; the
151 caller must do that if necessary. */
154 tic6x_use_arch (const char *arch
)
158 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
159 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
161 tic6x_arch_enable
= tic6x_arches
[i
].features
;
162 if (tic6x_seen_insns
)
164 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute
,
165 tic6x_arches
[i
].attr
);
167 tic6x_arch_attribute
= tic6x_arches
[i
].attr
;
171 as_bad (_("unknown architecture '%s'"), arch
);
174 /* Parse a target-specific option. */
177 md_parse_option (int c
, char *arg
)
182 tic6x_use_arch (arg
);
189 case OPTION_MNO_ATOMIC
:
193 case OPTION_MBIG_ENDIAN
:
194 target_big_endian
= 1;
197 case OPTION_MLITTLE_ENDIAN
:
198 target_big_endian
= 0;
205 case OPTION_MNO_DSBT
:
209 case OPTION_MGENERATE_REL
:
210 tic6x_generate_rela
= FALSE
;
220 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
224 fputc ('\n', stream
);
225 fprintf (stream
, _("TMS320C6000 options:\n"));
226 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
227 fprintf (stream
, _(" -matomic enable atomic operation instructions\n"));
228 fprintf (stream
, _(" -mno-atomic disable atomic operation instructions\n"));
229 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
230 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
231 fprintf (stream
, _(" -mdsbt code uses DSBT addressing\n"));
232 fprintf (stream
, _(" -mno-dsbt code does not use DSBT addressing\n"));
233 /* -mgenerate-rel is only for testsuite use and is deliberately
236 fputc ('\n', stream
);
237 fprintf (stream
, _("Supported ARCH values are:"));
238 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
239 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
240 fputc ('\n', stream
);
243 /* Update enabled features based on the current architecture and
246 tic6x_update_features (void)
248 switch (tic6x_atomic
)
251 tic6x_features
= tic6x_arch_enable
;
255 tic6x_features
= tic6x_arch_enable
& ~TIC6X_INSN_ATOMIC
;
259 tic6x_features
= tic6x_arch_enable
| TIC6X_INSN_ATOMIC
;
267 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
269 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
271 tic6x_can_cross_fp_boundary
273 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
275 tic6x_long_data_constraints
276 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
278 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
281 /* Do configuration after all options have been parsed. */
284 tic6x_after_parse_args (void)
286 tic6x_update_features ();
289 /* Parse a .arch directive. */
292 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
297 arch
= input_line_pointer
;
298 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
299 input_line_pointer
++;
300 c
= *input_line_pointer
;
301 *input_line_pointer
= 0;
303 tic6x_use_arch (arch
);
304 tic6x_update_features ();
305 *input_line_pointer
= c
;
306 demand_empty_rest_of_line ();
309 /* Parse a .atomic directive. */
312 s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED
)
315 tic6x_update_features ();
316 demand_empty_rest_of_line ();
319 /* Parse a .noatomic directive. */
322 s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED
)
325 tic6x_update_features ();
326 demand_empty_rest_of_line ();
329 /* Parse a .nocmp directive. */
332 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
334 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
335 demand_empty_rest_of_line ();
338 /* Track for each attribute whether it has been set explicitly (and so
339 should not have a default value set by the assembler). */
340 static bfd_boolean tic6x_attributes_set_explicitly
[NUM_KNOWN_OBJ_ATTRIBUTES
];
342 /* Parse a .c6xabi_attribute directive. */
345 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED
)
347 int tag
= s_vendor_attribute (OBJ_ATTR_PROC
);
349 if (tag
< NUM_KNOWN_OBJ_ATTRIBUTES
)
350 tic6x_attributes_set_explicitly
[tag
] = TRUE
;
357 } tic6x_attribute_table
;
359 static const tic6x_attribute_table tic6x_attributes
[] =
361 #define TAG(tag, value) { #tag, tag },
362 #include "elf/tic6x-attrs.h"
366 /* Convert an attribute name to a number. */
369 tic6x_convert_symbolic_attribute (const char *name
)
373 for (i
= 0; i
< ARRAY_SIZE (tic6x_attributes
); i
++)
374 if (strcmp (name
, tic6x_attributes
[i
].name
) == 0)
375 return tic6x_attributes
[i
].tag
;
380 const pseudo_typeS md_pseudo_table
[] =
382 { "arch", s_tic6x_arch
, 0 },
383 { "atomic", s_tic6x_atomic
, 0 },
384 { "c6xabi_attribute", s_tic6x_c6xabi_attribute
, 0 },
385 { "noatomic", s_tic6x_noatomic
, 0 },
386 { "nocmp", s_tic6x_nocmp
, 0 },
391 /* Hash table of opcodes. For each opcode name, this stores a pointer
392 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
393 table entries with that name. */
394 static struct hash_control
*opcode_hash
;
396 /* Initialize the assembler (called once at assembler startup). */
403 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
405 /* Insert opcodes into the hash table. */
406 opcode_hash
= hash_new ();
407 for (id
= 0; id
< tic6x_opcode_max
; id
++)
410 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
413 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
414 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
416 as_fatal ("%s", _(errmsg
));
420 /* Whether the current line being parsed had the "||" parallel bars. */
421 static bfd_boolean tic6x_line_parallel
;
423 /* Whether the current line being parsed started "||^" to indicate an
424 SPMASKed parallel instruction. */
425 static bfd_boolean tic6x_line_spmask
;
427 /* If the current line being parsed had an instruction predicate, the
428 creg value for that predicate (which must be nonzero); otherwise
430 static unsigned int tic6x_line_creg
;
432 /* If the current line being parsed had an instruction predicate, the
433 z value for that predicate; otherwise 0. */
434 static unsigned int tic6x_line_z
;
436 /* Return 1 (updating input_line_pointer as appropriate) if the line
437 starting with C (immediately before input_line_pointer) starts with
438 pre-opcode text appropriate for this target, 0 otherwise. */
441 tic6x_unrecognized_line (int c
)
446 bfd_boolean bad_predicate
;
451 if (input_line_pointer
[0] == '|')
453 if (input_line_pointer
[1] == '^')
455 tic6x_line_spmask
= TRUE
;
456 input_line_pointer
+= 2;
459 input_line_pointer
+= 1;
460 if (tic6x_line_parallel
)
461 as_bad (_("multiple '||' on same line"));
462 tic6x_line_parallel
= TRUE
;
464 as_bad (_("'||' after predicate"));
470 /* If it doesn't look like a predicate at all, just return 0.
471 If it looks like one but not a valid one, give a better
473 p
= input_line_pointer
;
474 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
479 p
= input_line_pointer
;
481 bad_predicate
= FALSE
;
487 if (*p
== 'A' || *p
== 'a')
489 else if (*p
== 'B' || *p
== 'b')
493 areg
= TRUE
; /* Avoid uninitialized warning. */
494 bad_predicate
= TRUE
;
499 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
500 bad_predicate
= TRUE
;
501 else if (p
[1] != ']')
502 bad_predicate
= TRUE
;
504 input_line_pointer
= p
+ 2;
508 as_bad (_("multiple predicates on same line"));
514 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
516 input_line_pointer
= endp
;
523 tic6x_line_creg
= (areg
? 6 : 1);
524 if (areg
&& !tic6x_predicate_a0
)
525 as_bad (_("predication on A0 not supported on this architecture"));
529 tic6x_line_creg
= (areg
? 4 : 2);
533 tic6x_line_creg
= (areg
? 5 : 3);
548 /* Do any target-specific handling of a label required. */
551 tic6x_frob_label (symbolS
*sym
)
553 segment_info_type
*si
;
554 tic6x_label_list
*list
;
556 if (tic6x_line_parallel
)
558 as_bad (_("label after '||'"));
559 tic6x_line_parallel
= FALSE
;
560 tic6x_line_spmask
= FALSE
;
564 as_bad (_("label after predicate"));
569 si
= seg_info (now_seg
);
570 list
= si
->tc_segment_info_data
.label_list
;
571 si
->tc_segment_info_data
.label_list
= xmalloc (sizeof (tic6x_label_list
));
572 si
->tc_segment_info_data
.label_list
->next
= list
;
573 si
->tc_segment_info_data
.label_list
->label
= sym
;
575 /* Defining tc_frob_label overrides the ELF definition of
576 obj_frob_label, so we need to apply its effects here. */
577 dwarf2_emit_label (sym
);
580 /* At end-of-line, give errors for start-of-line decorations that
581 needed an instruction but were not followed by one. */
584 tic6x_end_of_line (void)
586 if (tic6x_line_parallel
)
588 as_bad (_("'||' not followed by instruction"));
589 tic6x_line_parallel
= FALSE
;
590 tic6x_line_spmask
= FALSE
;
594 as_bad (_("predicate not followed by instruction"));
600 /* Do any target-specific handling of the start of a logical line. */
603 tic6x_start_line_hook (void)
605 tic6x_end_of_line ();
608 /* Do target-specific handling immediately after an input file from
609 the command line, and any other inputs it includes, have been
615 tic6x_end_of_line ();
618 /* Do target-specific initialization after arguments have been
619 processed and the output file created. */
622 tic6x_init_after_args (void)
624 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
627 /* Free LIST of labels (possibly NULL). */
630 tic6x_free_label_list (tic6x_label_list
*list
)
634 tic6x_label_list
*old
= list
;
641 /* Handle a data alignment of N bytes. */
644 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
646 segment_info_type
*seginfo
= seg_info (now_seg
);
648 /* Data means there is no current execute packet, and that any label
649 applies to that data rather than a subsequent instruction. */
650 tic6x_free_label_list (seginfo
->tc_segment_info_data
.label_list
);
651 seginfo
->tc_segment_info_data
.label_list
= NULL
;
652 seginfo
->tc_segment_info_data
.execute_packet_frag
= NULL
;
653 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
654 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
655 seginfo
->tc_segment_info_data
.func_units_used
= 0;
658 /* Handle an alignment directive. Return TRUE if the
659 machine-independent frag generation should be skipped. */
662 tic6x_do_align (int n
, char *fill
, int len ATTRIBUTE_UNUSED
, int max
)
664 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
665 them in the md_end pass by inserting NOPs in parallel with
666 previous instructions. We only do this in sections containing
667 nothing but instructions. Code alignments of 1 or 2 bytes have
668 no effect in such sections (but we record them with
669 machine-dependent frags anyway so they can be skipped or
670 converted to machine-independent), while those of more than 64
671 bytes cannot reliably be handled in this way. */
677 && subseg_text_p (now_seg
))
685 /* Machine-independent code would generate a frag here, but we
686 wish to handle it in a machine-dependent way. */
687 if (frag_now_fix () != 0)
689 if (frag_now
->fr_type
!= rs_machine_dependent
)
690 frag_wane (frag_now
);
695 align_frag
= frag_now
;
696 p
= frag_var (rs_machine_dependent
, 32, 32, max
, NULL
, n
, NULL
);
697 /* This must be the same as the frag to which a pointer was just
699 if (p
!= align_frag
->fr_literal
)
701 align_frag
->tc_frag_data
.is_insns
= FALSE
;
708 /* Types of operand for parsing purposes. These are used as bit-masks
709 to tell tic6x_parse_operand what forms of operand are
711 #define TIC6X_OP_EXP 0x0001u
712 #define TIC6X_OP_REG 0x0002u
713 #define TIC6X_OP_REGPAIR 0x0004u
714 #define TIC6X_OP_IRP 0x0008u
715 #define TIC6X_OP_NRP 0x0010u
716 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
717 interpreted as an expression, which may be a symbol with the same
718 name as a register that ends up being implicitly DP-relative. With
719 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
720 a register if they match one, and failing that as an expression,
721 which must be constant. */
722 #define TIC6X_OP_MEM_NOUNREG 0x0020u
723 #define TIC6X_OP_MEM_UNREG 0x0040u
724 #define TIC6X_OP_CTRL 0x0080u
725 #define TIC6X_OP_FUNC_UNIT 0x0100u
727 /* A register or register pair read by the assembler. */
730 /* The side the register is on (1 or 2). */
732 /* The register number (0 to 31). */
736 /* Types of modification of a base address. */
742 tic6x_mem_mod_preinc
,
743 tic6x_mem_mod_predec
,
744 tic6x_mem_mod_postinc
,
745 tic6x_mem_mod_postdec
748 /* Scaled [] or unscaled () nature of an offset. */
753 tic6x_offset_unscaled
756 /* A memory operand read by the assembler. */
759 /* The base register. */
760 tic6x_register base_reg
;
761 /* How the base register is modified. */
763 /* Whether there is an offset (required with plain "+" and "-"), and
764 whether it is scaled or unscaled if so. */
765 tic6x_mem_scaling scaled
;
766 /* Whether the offset is a register (TRUE) or an expression
768 bfd_boolean offset_is_reg
;
777 /* A functional unit in SPMASK operands read by the assembler. */
780 /* The basic unit. */
781 tic6x_func_unit_base base
;
782 /* The side (1 or 2). */
784 } tic6x_func_unit_operand
;
786 /* An operand read by the assembler. */
789 /* The syntactic form of the operand, as one of the bit-masks
792 /* The operand value. */
795 /* An expression: TIC6X_OP_EXP. */
797 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
799 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
800 TIC6X_OP_MEM_UNREG. */
802 /* A control register: TIC6X_OP_CTRL. */
804 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
805 tic6x_func_unit_operand func_unit
;
809 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
811 /* Parse a register operand, or part of an operand, starting at *P.
812 If syntactically OK (including that the number is in the range 0 to
813 31, but not necessarily in range for this architecture), return
814 TRUE, putting the register side and number in *REG and update *P to
815 point immediately after the register number; otherwise return FALSE
816 without changing *P (but possibly changing *REG). Do not print any
820 tic6x_parse_register (char **p
, tic6x_register
*reg
)
841 if (*r
>= '0' && *r
<= '9')
849 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
851 reg
->num
= reg
->num
* 10 + (*r
- '0');
855 if (*r
>= '0' && *r
<= '9')
864 /* Parse the initial two characters of a functional unit name starting
865 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
869 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
872 bfd_boolean good_func_unit
= TRUE
;
873 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
874 unsigned int maybe_side
= 0;
880 maybe_base
= tic6x_func_unit_d
;
885 maybe_base
= tic6x_func_unit_l
;
890 maybe_base
= tic6x_func_unit_m
;
895 maybe_base
= tic6x_func_unit_s
;
899 good_func_unit
= FALSE
;
915 good_func_unit
= FALSE
;
925 return good_func_unit
;
928 /* Parse an operand starting at *P. If the operand parses OK, return
929 TRUE and store the value in *OP; otherwise return FALSE (possibly
930 changing *OP). In any case, update *P to point to the following
931 comma or end of line. The possible operand forms are given by
932 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
933 starting at STR, length OPC_LEN. */
936 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
937 char *str
, int opc_len
, unsigned int opno
)
939 bfd_boolean operand_parsed
= FALSE
;
942 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
943 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
946 /* Check for functional unit names for SPMASK and SPMASKR. */
947 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
949 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
950 unsigned int side
= 0;
952 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
956 skip_whitespace (rq
);
957 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
959 op
->form
= TIC6X_OP_FUNC_UNIT
;
960 op
->value
.func_unit
.base
= base
;
961 op
->value
.func_unit
.side
= side
;
962 operand_parsed
= TRUE
;
968 /* Check for literal "irp". */
969 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
971 if ((q
[0] == 'i' || q
[0] == 'I')
972 && (q
[1] == 'r' || q
[1] == 'R')
973 && (q
[2] == 'p' || q
[2] == 'P'))
977 skip_whitespace (rq
);
978 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
980 op
->form
= TIC6X_OP_IRP
;
981 operand_parsed
= TRUE
;
987 /* Check for literal "nrp". */
988 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
990 if ((q
[0] == 'n' || q
[0] == 'N')
991 && (q
[1] == 'r' || q
[1] == 'R')
992 && (q
[2] == 'p' || q
[2] == 'P'))
996 skip_whitespace (rq
);
997 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
999 op
->form
= TIC6X_OP_NRP
;
1000 operand_parsed
= TRUE
;
1006 /* Check for control register names. */
1007 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
1011 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
1013 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
1015 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
1019 skip_whitespace (rq
);
1020 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1022 op
->form
= TIC6X_OP_CTRL
;
1023 op
->value
.ctrl
= crid
;
1024 operand_parsed
= TRUE
;
1026 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
1027 as_bad (_("control register '%s' not supported "
1028 "on this architecture"),
1029 tic6x_ctrl_table
[crid
].name
);
1035 /* See if this looks like a memory reference. */
1037 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
1039 bfd_boolean mem_ok
= TRUE
;
1041 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
1042 tic6x_register base_reg
;
1043 bfd_boolean require_offset
, permit_offset
;
1044 tic6x_mem_scaling scaled
;
1045 bfd_boolean offset_is_reg
;
1046 expressionS offset_exp
;
1047 tic6x_register offset_reg
;
1056 skip_whitespace (mq
);
1062 mem_mod
= tic6x_mem_mod_preinc
;
1067 mem_mod
= tic6x_mem_mod_plus
;
1075 mem_mod
= tic6x_mem_mod_predec
;
1080 mem_mod
= tic6x_mem_mod_minus
;
1092 skip_whitespace (mq
);
1093 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
1096 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
1098 skip_whitespace (mq
);
1099 if (mq
[0] == '+' && mq
[1] == '+')
1101 mem_mod
= tic6x_mem_mod_postinc
;
1104 else if (mq
[0] == '-' && mq
[1] == '-')
1106 mem_mod
= tic6x_mem_mod_postdec
;
1111 if (mem_mod
== tic6x_mem_mod_none
)
1112 permit_offset
= FALSE
;
1114 permit_offset
= TRUE
;
1115 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
1116 require_offset
= TRUE
;
1118 require_offset
= FALSE
;
1119 scaled
= tic6x_offset_none
;
1120 offset_is_reg
= FALSE
;
1122 if (mem_ok
&& permit_offset
)
1126 skip_whitespace (mq
);
1130 scaled
= tic6x_offset_scaled
;
1136 scaled
= tic6x_offset_unscaled
;
1144 if (scaled
!= tic6x_offset_none
)
1146 skip_whitespace (mq
);
1147 if (scaled
== tic6x_offset_scaled
1148 || (op_forms
& TIC6X_OP_MEM_UNREG
))
1153 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
1156 skip_whitespace (rq
);
1160 offset_is_reg
= TRUE
;
1166 char *save_input_line_pointer
;
1168 save_input_line_pointer
= input_line_pointer
;
1169 input_line_pointer
= mq
;
1170 expression (&offset_exp
);
1171 mq
= input_line_pointer
;
1172 input_line_pointer
= save_input_line_pointer
;
1174 skip_whitespace (mq
);
1182 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1187 skip_whitespace (mq
);
1188 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1194 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1195 op
->value
.mem
.base_reg
= base_reg
;
1196 op
->value
.mem
.mod
= mem_mod
;
1197 op
->value
.mem
.scaled
= scaled
;
1198 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1200 op
->value
.mem
.offset
.reg
= offset_reg
;
1202 op
->value
.mem
.offset
.exp
= offset_exp
;
1203 operand_parsed
= TRUE
;
1205 if (base_reg
.num
>= tic6x_num_registers
)
1206 as_bad (_("register number %u not supported on this architecture"),
1208 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1209 as_bad (_("register number %u not supported on this architecture"),
1214 /* See if this looks like a register or register pair. */
1215 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1217 tic6x_register first_reg
, second_reg
;
1221 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1225 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1228 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1231 skip_whitespace (rq
);
1232 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1234 if ((second_reg
.num
& 1)
1235 || (first_reg
.num
!= second_reg
.num
+ 1)
1236 || (first_reg
.side
!= second_reg
.side
))
1237 as_bad (_("register pair for operand %u of '%.*s'"
1238 " not a valid even/odd pair"), opno
,
1240 op
->form
= TIC6X_OP_REGPAIR
;
1241 op
->value
.reg
= second_reg
;
1242 operand_parsed
= TRUE
;
1247 else if (op_forms
& TIC6X_OP_REG
)
1249 skip_whitespace (rq
);
1250 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1252 op
->form
= TIC6X_OP_REG
;
1253 op
->value
.reg
= first_reg
;
1254 operand_parsed
= TRUE
;
1261 if (first_reg
.num
>= tic6x_num_registers
)
1262 as_bad (_("register number %u not supported on this architecture"),
1264 if (op
->form
== TIC6X_OP_REGPAIR
1265 && second_reg
.num
>= tic6x_num_registers
)
1266 as_bad (_("register number %u not supported on this architecture"),
1271 /* Otherwise, parse it as an expression. */
1272 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1274 char *save_input_line_pointer
;
1276 save_input_line_pointer
= input_line_pointer
;
1277 input_line_pointer
= q
;
1278 op
->form
= TIC6X_OP_EXP
;
1279 expression (&op
->value
.exp
);
1280 q
= input_line_pointer
;
1281 input_line_pointer
= save_input_line_pointer
;
1282 operand_parsed
= TRUE
;
1287 /* Now the operand has been parsed, there must be nothing more
1288 before the comma or end of line. */
1289 skip_whitespace (q
);
1290 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1292 operand_parsed
= FALSE
;
1293 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1295 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1301 /* This could not be parsed as any acceptable form of
1305 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1306 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1307 opno
, opc_len
, str
);
1310 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1312 as_bad (_("bad register for operand %u of '%.*s'"),
1313 opno
, opc_len
, str
);
1316 case TIC6X_OP_REGPAIR
:
1317 as_bad (_("bad register pair for operand %u of '%.*s'"),
1318 opno
, opc_len
, str
);
1321 case TIC6X_OP_FUNC_UNIT
:
1322 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1323 opno
, opc_len
, str
);
1327 as_bad (_("bad operand %u of '%.*s'"),
1328 opno
, opc_len
, str
);
1332 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1336 return operand_parsed
;
1339 /* Table of assembler operators and associated O_* values. */
1344 } tic6x_operator_table
;
1345 static const tic6x_operator_table tic6x_operators
[] = {
1346 #define O_dsbt_index O_md1
1347 { "dsbt_index", O_dsbt_index
},
1350 #define O_dpr_got O_md3
1351 { "dpr_got", O_dpr_got
},
1352 #define O_dpr_byte O_md4
1353 { "dpr_byte", O_dpr_byte
},
1354 #define O_dpr_hword O_md5
1355 { "dpr_hword", O_dpr_hword
},
1356 #define O_dpr_word O_md6
1357 { "dpr_word", O_dpr_word
},
1360 /* Parse a name in some machine-specific way. Used on C6X to handle
1361 assembler operators. */
1364 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1365 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1367 char *p
= input_line_pointer
;
1368 char c
, *name_start
, *name_end
;
1369 const char *inner_name
;
1371 operatorT op
= O_illegal
;
1377 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1378 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1380 op
= tic6x_operators
[i
].op
;
1384 if (op
== O_illegal
)
1387 *input_line_pointer
= *nextchar
;
1388 skip_whitespace (p
);
1392 *input_line_pointer
= 0;
1396 skip_whitespace (p
);
1398 if (!is_name_beginner (*p
))
1400 *input_line_pointer
= 0;
1406 while (is_part_of_name (*p
))
1409 skip_whitespace (p
);
1413 *input_line_pointer
= 0;
1417 input_line_pointer
= p
+ 1;
1418 *nextchar
= *input_line_pointer
;
1419 *input_line_pointer
= 0;
1423 inner_name
= name_start
;
1424 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1426 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1427 inner_name
= "__c6xabi_DSBT_BASE";
1429 sym
= symbol_find_or_make (inner_name
);
1433 exprP
->X_add_symbol
= sym
;
1434 exprP
->X_add_number
= 0;
1435 exprP
->X_op_symbol
= NULL
;
1441 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1442 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1443 fixes resolving to constants should have those constants implicitly
1444 shifted) and FALSE otherwise, but look for C6X-specific expression
1445 types and adjust the relocations or give errors accordingly. */
1448 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1449 int pcrel
, bfd_reloc_code_real_type r_type
,
1450 bfd_boolean fix_adda
)
1452 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1460 case BFD_RELOC_C6000_SBR_U15_W
:
1461 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1465 as_bad (_("$DSBT_INDEX not supported in this context"));
1473 case BFD_RELOC_C6000_SBR_U15_W
:
1474 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1478 as_bad (_("$GOT not supported in this context"));
1486 case BFD_RELOC_C6000_ABS_L16
:
1487 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1490 case BFD_RELOC_C6000_ABS_H16
:
1491 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1495 as_bad (_("$DPR_GOT not supported in this context"));
1503 case BFD_RELOC_C6000_ABS_S16
:
1504 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1507 case BFD_RELOC_C6000_ABS_L16
:
1508 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1511 case BFD_RELOC_C6000_ABS_H16
:
1512 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1516 as_bad (_("$DPR_BYTE not supported in this context"));
1524 case BFD_RELOC_C6000_ABS_L16
:
1525 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1528 case BFD_RELOC_C6000_ABS_H16
:
1529 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1533 as_bad (_("$DPR_HWORD not supported in this context"));
1541 case BFD_RELOC_C6000_ABS_L16
:
1542 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1545 case BFD_RELOC_C6000_ABS_H16
:
1546 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1550 as_bad (_("$DPR_WORD not supported in this context"));
1561 as_bad (_("invalid PC-relative operand"));
1567 if (new_reloc
== BFD_RELOC_UNUSED
)
1568 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1570 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1572 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1575 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1576 go through the error checking in tic6x_fix_new_exp. */
1579 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1581 bfd_reloc_code_real_type r_type
;
1586 r_type
= BFD_RELOC_8
;
1590 r_type
= BFD_RELOC_16
;
1594 r_type
= BFD_RELOC_32
;
1598 as_bad (_("no %d-byte relocations available"), size
);
1602 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1605 /* Initialize target-specific fix data. */
1608 tic6x_init_fix_data (fixS
*fixP
)
1610 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1613 /* Return true if the fix can be handled by GAS, false if it must
1614 be passed through to the linker. */
1617 tic6x_fix_adjustable (fixS
*fixP
)
1619 switch (fixP
->fx_r_type
)
1621 /* Adjust_reloc_syms doesn't know about the GOT. */
1622 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
1623 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
1624 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
1632 /* Given the fine-grained form of an operand, return the coarse
1636 tic6x_coarse_operand_form (tic6x_operand_form form
)
1640 case tic6x_operand_asm_const
:
1641 case tic6x_operand_link_const
:
1642 return TIC6X_OP_EXP
;
1644 case tic6x_operand_reg
:
1645 case tic6x_operand_xreg
:
1646 case tic6x_operand_dreg
:
1647 case tic6x_operand_areg
:
1648 case tic6x_operand_retreg
:
1649 return TIC6X_OP_REG
;
1651 case tic6x_operand_regpair
:
1652 case tic6x_operand_xregpair
:
1653 case tic6x_operand_dregpair
:
1654 return TIC6X_OP_REGPAIR
;
1656 case tic6x_operand_irp
:
1657 return TIC6X_OP_IRP
;
1659 case tic6x_operand_nrp
:
1660 return TIC6X_OP_NRP
;
1662 case tic6x_operand_ctrl
:
1663 return TIC6X_OP_CTRL
;
1665 case tic6x_operand_mem_short
:
1666 case tic6x_operand_mem_long
:
1667 case tic6x_operand_mem_deref
:
1668 return TIC6X_OP_MEM_NOUNREG
;
1670 case tic6x_operand_mem_ndw
:
1671 return TIC6X_OP_MEM_UNREG
;
1673 case tic6x_operand_func_unit
:
1674 return TIC6X_OP_FUNC_UNIT
;
1681 /* How an operand may match or not match a desired form. If different
1682 instruction alternatives fail in different ways, the first failure
1683 in this list determines the diagnostic. */
1687 tic6x_match_matches
,
1688 /* Bad coarse form. */
1691 tic6x_match_non_const
,
1692 /* Register on wrong side. */
1693 tic6x_match_wrong_side
,
1694 /* Not a valid address register. */
1695 tic6x_match_bad_address
,
1696 /* Not a valid return address register. */
1697 tic6x_match_bad_return
,
1698 /* Control register not readable. */
1699 tic6x_match_ctrl_write_only
,
1700 /* Control register not writable. */
1701 tic6x_match_ctrl_read_only
,
1702 /* Not a valid memory reference for this instruction. */
1704 } tic6x_operand_match
;
1706 /* Return whether an operand matches the given fine-grained form and
1707 read/write usage, and, if it does not match, how it fails to match.
1708 The main functional unit side is SIDE; the cross-path side is CROSS
1709 (the same as SIDE if a cross path not used); the data side is
1711 static tic6x_operand_match
1712 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1713 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1714 unsigned int data_side
)
1716 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1718 if (coarse
!= op
->form
)
1719 return tic6x_match_coarse
;
1723 case tic6x_operand_asm_const
:
1724 if (op
->value
.exp
.X_op
== O_constant
)
1725 return tic6x_match_matches
;
1727 return tic6x_match_non_const
;
1729 case tic6x_operand_link_const
:
1730 case tic6x_operand_irp
:
1731 case tic6x_operand_nrp
:
1732 case tic6x_operand_func_unit
:
1733 /* All expressions are link-time constants, although there may
1734 not be relocations to express them in the output file. "irp"
1735 and "nrp" are unique operand values. All parsed functional
1736 unit names are valid. */
1737 return tic6x_match_matches
;
1739 case tic6x_operand_reg
:
1740 case tic6x_operand_regpair
:
1741 if (op
->value
.reg
.side
== side
)
1742 return tic6x_match_matches
;
1744 return tic6x_match_wrong_side
;
1746 case tic6x_operand_xreg
:
1747 case tic6x_operand_xregpair
:
1748 if (op
->value
.reg
.side
== cross
)
1749 return tic6x_match_matches
;
1751 return tic6x_match_wrong_side
;
1753 case tic6x_operand_dreg
:
1754 case tic6x_operand_dregpair
:
1755 if (op
->value
.reg
.side
== data_side
)
1756 return tic6x_match_matches
;
1758 return tic6x_match_wrong_side
;
1760 case tic6x_operand_areg
:
1761 if (op
->value
.reg
.side
!= cross
)
1762 return tic6x_match_wrong_side
;
1763 else if (op
->value
.reg
.side
== 2
1764 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1765 return tic6x_match_matches
;
1767 return tic6x_match_bad_address
;
1769 case tic6x_operand_retreg
:
1770 if (op
->value
.reg
.side
!= side
)
1771 return tic6x_match_wrong_side
;
1772 else if (op
->value
.reg
.num
!= 3)
1773 return tic6x_match_bad_return
;
1775 return tic6x_match_matches
;
1777 case tic6x_operand_ctrl
:
1781 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
1782 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1783 return tic6x_match_matches
;
1785 return tic6x_match_ctrl_write_only
;
1787 case tic6x_rw_write
:
1788 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
1789 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1790 return tic6x_match_matches
;
1792 return tic6x_match_ctrl_read_only
;
1798 case tic6x_operand_mem_deref
:
1799 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
1800 return tic6x_match_bad_mem
;
1801 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1803 else if (op
->value
.mem
.base_reg
.side
!= side
)
1804 return tic6x_match_bad_mem
;
1806 return tic6x_match_matches
;
1808 case tic6x_operand_mem_short
:
1809 case tic6x_operand_mem_ndw
:
1810 if (op
->value
.mem
.base_reg
.side
!= side
)
1811 return tic6x_match_bad_mem
;
1812 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
1814 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1816 return tic6x_match_matches
;
1818 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1820 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
1821 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
1823 return tic6x_match_matches
;
1825 if (op
->value
.mem
.offset_is_reg
)
1827 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
1828 && form
!= tic6x_operand_mem_ndw
)
1830 if (op
->value
.mem
.offset
.reg
.side
== side
)
1831 return tic6x_match_matches
;
1833 return tic6x_match_bad_mem
;
1837 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
1838 return tic6x_match_matches
;
1840 return tic6x_match_bad_mem
;
1843 case tic6x_operand_mem_long
:
1844 if (op
->value
.mem
.base_reg
.side
== 2
1845 && (op
->value
.mem
.base_reg
.num
== 14
1846 || op
->value
.mem
.base_reg
.num
== 15))
1848 switch (op
->value
.mem
.mod
)
1850 case tic6x_mem_mod_none
:
1851 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1853 return tic6x_match_matches
;
1855 case tic6x_mem_mod_plus
:
1856 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1858 if (op
->value
.mem
.offset_is_reg
)
1859 return tic6x_match_bad_mem
;
1860 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
1861 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
1862 return tic6x_match_bad_mem
;
1864 return tic6x_match_matches
;
1866 case tic6x_mem_mod_minus
:
1867 case tic6x_mem_mod_preinc
:
1868 case tic6x_mem_mod_predec
:
1869 case tic6x_mem_mod_postinc
:
1870 case tic6x_mem_mod_postdec
:
1871 return tic6x_match_bad_mem
;
1879 return tic6x_match_bad_mem
;
1886 /* Return the number of bits shift used with DP-relative coding method
1890 tic6x_dpr_shift (tic6x_coding_method coding
)
1894 case tic6x_coding_ulcst_dpr_byte
:
1897 case tic6x_coding_ulcst_dpr_half
:
1900 case tic6x_coding_ulcst_dpr_word
:
1908 /* Return the relocation used with DP-relative coding method
1911 static bfd_reloc_code_real_type
1912 tic6x_dpr_reloc (tic6x_coding_method coding
)
1916 case tic6x_coding_ulcst_dpr_byte
:
1917 return BFD_RELOC_C6000_SBR_U15_B
;
1919 case tic6x_coding_ulcst_dpr_half
:
1920 return BFD_RELOC_C6000_SBR_U15_H
;
1922 case tic6x_coding_ulcst_dpr_word
:
1923 return BFD_RELOC_C6000_SBR_U15_W
;
1930 /* Given a memory reference *MEM_REF as originally parsed, fill in
1931 defaults for missing offsets. */
1934 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
1936 switch (mem_ref
->mod
)
1938 case tic6x_mem_mod_none
:
1939 if (mem_ref
->scaled
!= tic6x_offset_none
)
1941 mem_ref
->mod
= tic6x_mem_mod_plus
;
1942 mem_ref
->scaled
= tic6x_offset_unscaled
;
1943 mem_ref
->offset_is_reg
= FALSE
;
1944 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1945 mem_ref
->offset
.exp
.X_op
= O_constant
;
1946 mem_ref
->offset
.exp
.X_add_number
= 0;
1947 mem_ref
->offset
.exp
.X_unsigned
= 0;
1950 case tic6x_mem_mod_plus
:
1951 case tic6x_mem_mod_minus
:
1952 if (mem_ref
->scaled
== tic6x_offset_none
)
1956 case tic6x_mem_mod_preinc
:
1957 case tic6x_mem_mod_predec
:
1958 case tic6x_mem_mod_postinc
:
1959 case tic6x_mem_mod_postdec
:
1960 if (mem_ref
->scaled
!= tic6x_offset_none
)
1962 mem_ref
->scaled
= tic6x_offset_scaled
;
1963 mem_ref
->offset_is_reg
= FALSE
;
1964 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1965 mem_ref
->offset
.exp
.X_op
= O_constant
;
1966 mem_ref
->offset
.exp
.X_add_number
= 1;
1967 mem_ref
->offset
.exp
.X_unsigned
= 0;
1975 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
1976 instruction of the specified UNIT, side SIDE. */
1979 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
1983 case tic6x_func_unit_l
:
1984 return 1 << (side
- 1);
1986 case tic6x_func_unit_s
:
1987 return 1 << (side
+ 1);
1989 case tic6x_func_unit_d
:
1990 return 1 << (side
+ 3);
1992 case tic6x_func_unit_m
:
1993 return 1 << (side
+ 5);
2000 /* Try to encode the instruction with opcode number ID and operands
2001 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2002 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2003 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2004 SPLOOP_II is the ii value from the previous SPLOOP-family
2005 instruction, or 0 if not in such a loop; the only possible problems
2006 are operands being out of range (they already match the
2007 fine-grained form), and inappropriate predication. If this
2008 succeeds, return the encoding and set *OK to TRUE; otherwise return
2009 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2010 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2011 Print error messages for failure if PRINT_ERRORS is TRUE; the
2012 opcode starts at STR and has length OPC_LEN. */
2015 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
2016 unsigned int num_operands
, unsigned int this_line_creg
,
2017 unsigned int this_line_z
, unsigned int func_unit_side
,
2018 unsigned int func_unit_cross
,
2019 unsigned int func_unit_data_side
, int sploop_ii
,
2020 expressionS
**fix_exp
, int *fix_pcrel
,
2021 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
2022 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
2023 bfd_boolean print_errors
, char *str
, int opc_len
)
2025 const tic6x_opcode
*opct
;
2026 const tic6x_insn_format
*fmt
;
2027 unsigned int opcode_value
;
2030 opct
= &tic6x_opcode_table
[id
];
2031 fmt
= &tic6x_insn_format_table
[opct
->format
];
2032 opcode_value
= fmt
->cst_bits
;
2034 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
2036 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
2038 const tic6x_insn_field
*fldd
;
2039 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
2042 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
2046 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
2048 const tic6x_insn_field
*fldd
;
2054 unsigned int fcyc_bits
;
2059 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
2062 opno
= opct
->variable_fields
[fld
].operand_num
;
2063 switch (opct
->variable_fields
[fld
].coding_method
)
2065 case tic6x_coding_ucst
:
2066 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2068 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2070 ucexp
= operands
[opno
].value
.exp
;
2072 if (ucexp
.X_add_number
< 0
2073 || ucexp
.X_add_number
>= (1 << fldd
->width
))
2076 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2081 value
= ucexp
.X_add_number
;
2084 case tic6x_coding_scst
:
2085 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2087 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2090 /* Opcode table should not permit non-constants without
2091 a known relocation for them. */
2092 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2095 *fix_exp
= &operands
[opno
].value
.exp
;
2097 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
2101 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
2103 if (sign_value
< -(1 << (fldd
->width
- 1))
2104 || (sign_value
>= (1 << (fldd
->width
- 1))))
2107 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2112 value
= sign_value
+ (1 << (fldd
->width
- 1));
2113 value
^= (1 << (fldd
->width
- 1));
2116 case tic6x_coding_ucst_minus_one
:
2117 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2119 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2121 if (operands
[opno
].value
.exp
.X_add_number
<= 0
2122 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
2125 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2130 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
2133 case tic6x_coding_scst_negate
:
2134 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2136 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2138 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
2139 goto signed_constant
;
2141 case tic6x_coding_ulcst_dpr_byte
:
2142 case tic6x_coding_ulcst_dpr_half
:
2143 case tic6x_coding_ulcst_dpr_word
:
2144 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
2145 switch (operands
[opno
].form
)
2148 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2150 ucexp
= operands
[opno
].value
.exp
;
2151 goto unsigned_constant
;
2153 expp
= &operands
[opno
].value
.exp
;
2156 case TIC6X_OP_MEM_NOUNREG
:
2157 mem
= operands
[opno
].value
.mem
;
2158 tic6x_default_mem_ref (&mem
);
2159 if (mem
.offset_is_reg
)
2161 if (mem
.offset
.exp
.X_op
== O_constant
)
2163 ucexp
= mem
.offset
.exp
;
2164 if (mem
.scaled
== tic6x_offset_unscaled
)
2166 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
2169 as_bad (_("offset in operand %u of '%.*s' not "
2170 "divisible by %u"), opno
+ 1, opc_len
,
2175 ucexp
.X_add_number
>>= bits
;
2177 goto unsigned_constant
;
2179 if (mem
.scaled
!= tic6x_offset_unscaled
)
2181 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2182 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2183 || operands
[opno
].value
.mem
.offset_is_reg
)
2185 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2192 /* Opcode table should not use this encoding without a known
2194 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2196 /* We do not check for offset divisibility here; such a
2197 check is not needed at this point to encode the value,
2198 and if there is eventually a problem it will be detected
2199 either in md_apply_fix or at link time. */
2204 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2205 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2211 case tic6x_coding_lcst_low16
:
2212 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2214 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2215 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2219 /* Opcode table should not use this encoding without a
2220 known relocation. */
2221 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2224 *fix_exp
= &operands
[opno
].value
.exp
;
2226 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2231 case tic6x_coding_lcst_high16
:
2232 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2234 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2235 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2239 /* Opcode table should not use this encoding without a
2240 known relocation. */
2241 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2244 *fix_exp
= &operands
[opno
].value
.exp
;
2246 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2251 case tic6x_coding_pcrel
:
2252 case tic6x_coding_pcrel_half
:
2253 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2257 *fix_exp
= &operands
[opno
].value
.exp
;
2259 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2260 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2261 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2262 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2263 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2264 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2265 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2266 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2268 /* Opcode table should not use this encoding without a
2269 known relocation. */
2274 case tic6x_coding_reg
:
2275 switch (operands
[opno
].form
)
2278 case TIC6X_OP_REGPAIR
:
2279 value
= operands
[opno
].value
.reg
.num
;
2282 case TIC6X_OP_MEM_NOUNREG
:
2283 case TIC6X_OP_MEM_UNREG
:
2284 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2292 case tic6x_coding_areg
:
2293 switch (operands
[opno
].form
)
2296 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2299 case TIC6X_OP_MEM_NOUNREG
:
2300 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2308 case tic6x_coding_crlo
:
2309 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2311 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2314 case tic6x_coding_crhi
:
2315 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2320 case tic6x_coding_reg_shift
:
2321 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2323 value
= operands
[opno
].value
.reg
.num
>> 1;
2326 case tic6x_coding_mem_offset
:
2327 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2329 mem
= operands
[opno
].value
.mem
;
2330 tic6x_default_mem_ref (&mem
);
2331 if (mem
.offset_is_reg
)
2333 if (mem
.scaled
!= tic6x_offset_scaled
)
2335 value
= mem
.offset
.reg
.num
;
2341 if (mem
.offset
.exp
.X_op
!= O_constant
)
2345 case tic6x_offset_scaled
:
2349 case tic6x_offset_unscaled
:
2350 scale
= opct
->operand_info
[opno
].size
;
2351 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2358 if (mem
.offset
.exp
.X_add_number
< 0
2359 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2362 as_bad (_("offset in operand %u of '%.*s' out of range"),
2363 opno
+ 1, opc_len
, str
);
2367 if (mem
.offset
.exp
.X_add_number
% scale
)
2370 as_bad (_("offset in operand %u of '%.*s' not "
2372 opno
+ 1, opc_len
, str
, scale
);
2376 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2380 case tic6x_coding_mem_offset_noscale
:
2381 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2383 mem
= operands
[opno
].value
.mem
;
2384 tic6x_default_mem_ref (&mem
);
2385 if (mem
.offset_is_reg
)
2386 value
= mem
.offset
.reg
.num
;
2389 if (mem
.offset
.exp
.X_op
!= O_constant
)
2391 if (mem
.offset
.exp
.X_add_number
< 0
2392 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2395 as_bad (_("offset in operand %u of '%.*s' out of range"),
2396 opno
+ 1, opc_len
, str
);
2400 value
= mem
.offset
.exp
.X_add_number
;
2404 case tic6x_coding_mem_mode
:
2405 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2406 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2408 mem
= operands
[opno
].value
.mem
;
2409 tic6x_default_mem_ref (&mem
);
2412 case tic6x_mem_mod_plus
:
2416 case tic6x_mem_mod_minus
:
2420 case tic6x_mem_mod_preinc
:
2424 case tic6x_mem_mod_predec
:
2428 case tic6x_mem_mod_postinc
:
2432 case tic6x_mem_mod_postdec
:
2439 value
+= (mem
.offset_is_reg
? 4 : 0);
2442 case tic6x_coding_scaled
:
2443 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2445 mem
= operands
[opno
].value
.mem
;
2446 tic6x_default_mem_ref (&mem
);
2449 case tic6x_offset_unscaled
:
2453 case tic6x_offset_scaled
:
2462 case tic6x_coding_spmask
:
2463 /* The position of such a field is hardcoded in the handling
2465 if (fldd
->low_pos
!= 18)
2468 for (opno
= 0; opno
< num_operands
; opno
++)
2472 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2473 operands
[opno
].value
.func_unit
.side
);
2477 as_bad (_("functional unit already masked for operand "
2478 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2486 case tic6x_coding_reg_unused
:
2487 /* This is a placeholder; correct handling goes along with
2488 resource constraint checks. */
2492 case tic6x_coding_fstg
:
2493 case tic6x_coding_fcyc
:
2494 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2496 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2501 as_bad (_("'%.*s' instruction not in a software "
2510 else if (sploop_ii
<= 2)
2512 else if (sploop_ii
<= 4)
2514 else if (sploop_ii
<= 8)
2516 else if (sploop_ii
<= 14)
2520 if (fcyc_bits
> fldd
->width
)
2523 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2526 if (operands
[opno
].value
.exp
.X_add_number
< 0
2527 || (operands
[opno
].value
.exp
.X_add_number
2528 >= (1 << (fldd
->width
- fcyc_bits
))))
2531 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2536 value
= operands
[opno
].value
.exp
.X_add_number
;
2537 for (t
= 0, i
= fcyc_bits
; i
< fldd
->width
; i
++)
2539 t
= (t
<< 1) | (value
& 1);
2542 value
= t
<< fcyc_bits
;
2546 if (operands
[opno
].value
.exp
.X_add_number
< 0
2547 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2550 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2555 value
= operands
[opno
].value
.exp
.X_add_number
;
2559 case tic6x_coding_fu
:
2560 value
= func_unit_side
== 2 ? 1 : 0;
2563 case tic6x_coding_data_fu
:
2564 value
= func_unit_data_side
== 2 ? 1 : 0;
2567 case tic6x_coding_xpath
:
2568 value
= func_unit_cross
;
2575 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2576 if ((opct
->fixed_fields
[ffld
].field_id
2577 == opct
->variable_fields
[fld
].field_id
)
2578 && (value
< opct
->fixed_fields
[ffld
].min_val
2579 || value
> opct
->fixed_fields
[ffld
].max_val
))
2582 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2588 opcode_value
|= value
<< fldd
->low_pos
;
2593 const tic6x_insn_field
*creg
;
2594 const tic6x_insn_field
*z
;
2596 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2600 as_bad (_("instruction '%.*s' cannot be predicated"),
2605 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2606 /* If there is a creg field, there must be a z field; otherwise
2607 there is an error in the format table. */
2611 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2612 opcode_value
|= this_line_z
<< z
->low_pos
;
2616 return opcode_value
;
2619 /* Convert the target integer stored in N bytes in BUF to a host
2620 integer, returning that value. */
2623 md_chars_to_number (char *buf
, int n
)
2626 unsigned char *p
= (unsigned char *) buf
;
2628 if (target_big_endian
)
2633 result
|= (*p
++ & 0xff);
2641 result
|= (p
[n
] & 0xff);
2648 /* Assemble the instruction starting at STR (an opcode, with the
2649 opcode name all-lowercase). */
2652 md_assemble (char *str
)
2656 bfd_boolean this_line_parallel
;
2657 bfd_boolean this_line_spmask
;
2658 unsigned int this_line_creg
;
2659 unsigned int this_line_z
;
2660 tic6x_label_list
*this_insn_label_list
;
2661 segment_info_type
*seginfo
;
2662 tic6x_opcode_list
*opc_list
, *opc
;
2663 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2664 unsigned int func_unit_side
= 0;
2665 unsigned int func_unit_cross
= 0;
2666 unsigned int cross_side
= 0;
2667 unsigned int func_unit_data_side
= 0;
2668 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2669 tic6x_opcode_id
*opcm
= NULL
;
2670 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2671 const tic6x_opcode
*opct
= NULL
;
2672 int min_rank
, try_rank
, max_rank
;
2673 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2675 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2676 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2677 unsigned int max_num_operands
;
2678 unsigned int num_operands_read
;
2679 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2680 bfd_boolean bad_operands
= FALSE
;
2681 unsigned int opcode_value
;
2682 bfd_boolean encoded_ok
;
2683 bfd_boolean fix_needed
= FALSE
;
2684 expressionS
*fix_exp
= NULL
;
2686 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2687 bfd_boolean fix_adda
= FALSE
;
2692 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2695 /* This function should only have been called when there is actually
2696 an instruction to assemble. */
2700 /* Now an instruction has been seen, architecture attributes from
2701 .arch directives merge with rather than overriding the previous
2703 tic6x_seen_insns
= TRUE
;
2704 /* If no .arch directives or -march options have been seen, we are
2705 assessing instruction validity based on the C674X default, so set
2706 the attribute accordingly. */
2707 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
2708 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
2710 /* Reset global settings for parallel bars and predicates now to
2711 avoid extra errors if there are problems with this opcode. */
2712 this_line_parallel
= tic6x_line_parallel
;
2713 this_line_spmask
= tic6x_line_spmask
;
2714 this_line_creg
= tic6x_line_creg
;
2715 this_line_z
= tic6x_line_z
;
2716 tic6x_line_parallel
= FALSE
;
2717 tic6x_line_spmask
= FALSE
;
2718 tic6x_line_creg
= 0;
2720 seginfo
= seg_info (now_seg
);
2721 this_insn_label_list
= seginfo
->tc_segment_info_data
.label_list
;
2722 seginfo
->tc_segment_info_data
.label_list
= NULL
;
2724 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2725 if (opc_list
== NULL
)
2729 as_bad (_("unknown opcode '%s'"), str
);
2735 skip_whitespace (p
);
2737 /* See if there is something that looks like a functional unit
2741 bfd_boolean good_func_unit
;
2742 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2743 unsigned int maybe_side
= 0;
2744 unsigned int maybe_cross
= 0;
2745 unsigned int maybe_data_side
= 0;
2747 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2752 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2754 else if ((p
[3] == 'x' || p
[3] == 'X')
2755 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2760 else if (maybe_base
== tic6x_func_unit_d
2761 && (p
[3] == 't' || p
[3] == 'T')
2762 && (p
[4] == '1' || p
[4] == '2')
2763 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2765 maybe_data_side
= p
[4] - '0';
2769 good_func_unit
= FALSE
;
2774 func_unit_base
= maybe_base
;
2775 func_unit_side
= maybe_side
;
2776 func_unit_cross
= maybe_cross
;
2777 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2778 func_unit_data_side
= maybe_data_side
;
2781 skip_whitespace (p
);
2784 /* Determine which entries in the opcode table match, and the
2785 associated permitted forms of operands. */
2786 max_matching_opcodes
= 0;
2787 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2788 max_matching_opcodes
++;
2789 num_matching_opcodes
= 0;
2790 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
2791 max_num_operands
= 0;
2792 ok_this_arch
= FALSE
;
2794 ok_this_arch_fu
= FALSE
;
2795 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2797 unsigned int num_operands
;
2799 bfd_boolean this_opc_arch_ok
= TRUE
;
2800 bfd_boolean this_opc_fu_ok
= TRUE
;
2802 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
2805 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
2806 this_opc_arch_ok
= FALSE
;
2807 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
2808 this_opc_fu_ok
= FALSE
;
2809 if (func_unit_side
== 1
2810 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
2811 this_opc_fu_ok
= FALSE
;
2813 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
2814 this_opc_fu_ok
= FALSE
;
2815 if (!func_unit_data_side
2816 && (tic6x_opcode_table
[opc
->id
].flags
2817 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2818 this_opc_fu_ok
= FALSE
;
2819 if (func_unit_data_side
2820 && !(tic6x_opcode_table
[opc
->id
].flags
2821 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2822 this_opc_fu_ok
= FALSE
;
2823 if (func_unit_data_side
== 1
2824 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
2825 this_opc_fu_ok
= FALSE
;
2826 if (this_opc_arch_ok
)
2827 ok_this_arch
= TRUE
;
2830 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
2832 ok_this_arch_fu
= TRUE
;
2833 opcm
[num_matching_opcodes
] = opc
->id
;
2834 num_matching_opcodes
++;
2835 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
2837 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
2839 if (num_operands
!= 1
2840 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
2841 != tic6x_operand_func_unit
))
2844 for (i
= 0; i
< num_operands
; i
++)
2847 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
2848 num_operands_permitted
[i
] = TRUE
;
2853 for (i
= 0; i
< num_operands
; i
++)
2855 tic6x_operand_form f
2856 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
2858 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
2861 num_operands_permitted
[num_operands
] = TRUE
;
2862 if (num_operands
> max_num_operands
)
2863 max_num_operands
= num_operands
;
2868 as_bad (_("'%.*s' instruction not supported on this architecture"),
2876 as_bad (_("'%.*s' instruction not supported on this functional unit"),
2882 if (!ok_this_arch_fu
)
2884 as_bad (_("'%.*s' instruction not supported on this functional unit"
2885 " for this architecture"),
2891 /* If there were no instructions matching the above availability
2892 checks, we should now have given an error and returned. */
2893 if (num_matching_opcodes
== 0)
2896 num_operands_read
= 0;
2899 skip_whitespace (p
);
2900 if (is_end_of_line
[(unsigned char) *p
])
2902 if (num_operands_read
> 0)
2904 as_bad (_("missing operand after comma"));
2905 bad_operands
= TRUE
;
2910 if (max_num_operands
== 0)
2912 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2913 bad_operands
= TRUE
;
2917 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
2918 operand_forms
[num_operands_read
], str
, opc_len
,
2919 num_operands_read
+ 1))
2920 bad_operands
= TRUE
;
2921 num_operands_read
++;
2923 if (is_end_of_line
[(unsigned char) *p
])
2928 if (num_operands_read
== max_num_operands
)
2930 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2931 bad_operands
= TRUE
;
2937 /* Operand parsing should consume whole operands. */
2941 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
2943 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
2944 bad_operands
= TRUE
;
2949 /* Each operand is of the right syntactic form for some opcode
2950 choice, and the number of operands is valid. Check that each
2951 operand is OK in detail for some opcode choice with the right
2952 number of operands. */
2955 for (i
= 0; i
< num_operands_read
; i
++)
2957 bfd_boolean coarse_ok
= FALSE
;
2958 bfd_boolean fine_ok
= FALSE
;
2959 tic6x_operand_match fine_failure
= tic6x_match_matches
;
2962 for (j
= 0; j
< num_matching_opcodes
; j
++)
2964 tic6x_operand_form f
;
2967 tic6x_operand_match this_fine_failure
;
2969 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
2971 f
= tic6x_operand_func_unit
;
2976 if (tic6x_opcode_table
[opcm
[j
]].num_operands
2977 != num_operands_read
)
2980 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
2981 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
2983 cf
= tic6x_coarse_operand_form (f
);
2985 if (operands
[i
].form
!= cf
)
2990 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
2993 func_unit_data_side
);
2994 if (this_fine_failure
== tic6x_match_matches
)
2999 if (fine_failure
== tic6x_match_matches
3000 || fine_failure
> this_fine_failure
)
3001 fine_failure
= this_fine_failure
;
3004 /* No instructions should have operand syntactic forms only
3005 acceptable with certain numbers of operands, so no
3006 diagnostic for this case. */
3012 switch (fine_failure
)
3014 case tic6x_match_non_const
:
3015 as_bad (_("operand %u of '%.*s' not constant"),
3016 i
+ 1, opc_len
, str
);
3019 case tic6x_match_wrong_side
:
3020 as_bad (_("operand %u of '%.*s' on wrong side"),
3021 i
+ 1, opc_len
, str
);
3024 case tic6x_match_bad_return
:
3025 as_bad (_("operand %u of '%.*s' not a valid return "
3026 "address register"),
3027 i
+ 1, opc_len
, str
);
3030 case tic6x_match_ctrl_write_only
:
3031 as_bad (_("operand %u of '%.*s' is write-only"),
3032 i
+ 1, opc_len
, str
);
3035 case tic6x_match_ctrl_read_only
:
3036 as_bad (_("operand %u of '%.*s' is read-only"),
3037 i
+ 1, opc_len
, str
);
3040 case tic6x_match_bad_mem
:
3041 as_bad (_("operand %u of '%.*s' not a valid memory "
3043 i
+ 1, opc_len
, str
);
3046 case tic6x_match_bad_address
:
3047 as_bad (_("operand %u of '%.*s' not a valid base "
3048 "address register"),
3049 i
+ 1, opc_len
, str
);
3055 bad_operands
= TRUE
;
3063 /* Each operand is OK for some opcode choice, and the number of
3064 operands is valid. Check whether there is an opcode choice
3065 for which all operands are simultaneously valid. */
3067 bfd_boolean found_match
= FALSE
;
3069 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
3070 opc_rank
[i
] = (unsigned int) -1;
3072 min_rank
= TIC6X_NUM_PREFER
- 1;
3075 for (i
= 0; i
< num_matching_opcodes
; i
++)
3078 bfd_boolean this_matches
= TRUE
;
3080 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3081 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
3084 for (j
= 0; j
< num_operands_read
; j
++)
3086 tic6x_operand_form f
;
3089 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3091 f
= tic6x_operand_func_unit
;
3096 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
3097 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
3099 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
3102 func_unit_data_side
)
3103 != tic6x_match_matches
)
3105 this_matches
= FALSE
;
3112 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
3114 if (rank
< min_rank
)
3116 if (rank
> max_rank
)
3119 if (opc_rank
[rank
] == (unsigned int) -1)
3122 /* The opcode table should provide a total ordering
3123 for all cases where multiple matches may get
3133 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
3134 bad_operands
= TRUE
;
3146 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
3150 if (opc_rank
[try_rank
] == (unsigned int) -1)
3153 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
3154 num_operands_read
, this_line_creg
,
3155 this_line_z
, func_unit_side
,
3156 func_unit_cross
, func_unit_data_side
,
3157 seginfo
->tc_segment_info_data
.sploop_ii
,
3158 &fix_exp
, &fix_pcrel
, &fx_r_type
,
3159 &fix_adda
, &fix_needed
, &encoded_ok
,
3160 (try_rank
== min_rank
? TRUE
: FALSE
),
3164 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
3174 if (this_line_parallel
)
3176 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
;
3177 if (insn_frag
== NULL
)
3179 as_bad (_("parallel instruction not following another instruction"));
3183 if (insn_frag
->fr_fix
>= 32)
3185 as_bad (_("too many instructions in execute packet"));
3189 if (this_insn_label_list
!= NULL
)
3190 as_bad (_("label not at start of execute packet"));
3192 if (opct
->flags
& TIC6X_FLAG_FIRST
)
3193 as_bad (_("'%.*s' instruction not at start of execute packet"),
3196 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3197 output
= insn_frag
->fr_literal
+ insn_frag
->fr_fix
;
3201 tic6x_label_list
*l
;
3203 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3204 seginfo
->tc_segment_info_data
.func_units_used
= 0;
3206 /* Start a new frag for this execute packet. */
3207 if (frag_now_fix () != 0)
3209 if (frag_now
->fr_type
!= rs_machine_dependent
)
3210 frag_wane (frag_now
);
3215 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
= frag_now
;
3216 for (l
= this_insn_label_list
; l
; l
= l
->next
)
3218 symbol_set_frag (l
->label
, frag_now
);
3219 S_SET_VALUE (l
->label
, 0);
3220 S_SET_SEGMENT (l
->label
, now_seg
);
3222 tic6x_free_label_list (this_insn_label_list
);
3223 dwarf2_emit_insn (0);
3224 output
= frag_var (rs_machine_dependent
, 32, 32, 0, NULL
, 0, NULL
);
3225 /* This must be the same as the frag to which a pointer was just
3227 if (output
!= insn_frag
->fr_literal
)
3229 insn_frag
->tc_frag_data
.is_insns
= TRUE
;
3230 insn_frag
->tc_frag_data
.can_cross_fp_boundary
3231 = tic6x_can_cross_fp_boundary
;
3234 if (func_unit_base
!= tic6x_func_unit_nfu
)
3236 unsigned int func_unit_enc
;
3238 func_unit_enc
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3240 if (seginfo
->tc_segment_info_data
.func_units_used
& func_unit_enc
)
3241 as_bad (_("functional unit already used in this execute packet"));
3243 seginfo
->tc_segment_info_data
.func_units_used
|= func_unit_enc
;
3246 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3248 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3249 as_bad (_("nested software pipelined loop"));
3250 if (num_operands_read
!= 1
3251 || operands
[0].form
!= TIC6X_OP_EXP
3252 || operands
[0].value
.exp
.X_op
!= O_constant
)
3254 seginfo
->tc_segment_info_data
.sploop_ii
3255 = operands
[0].value
.exp
.X_add_number
;
3257 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3259 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3260 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3262 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3265 if (this_line_spmask
)
3267 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3268 as_bad (_("'||^' without previous SPMASK"));
3269 else if (func_unit_base
== tic6x_func_unit_nfu
)
3270 as_bad (_("cannot mask instruction using no functional unit"));
3273 unsigned int spmask_opcode
;
3274 unsigned int mask_bit
;
3277 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3279 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3281 if (spmask_opcode
& mask_bit
)
3282 as_bad (_("functional unit already masked"));
3283 spmask_opcode
|= mask_bit
;
3284 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3289 record_alignment (now_seg
, 5);
3290 md_number_to_chars (output
, opcode_value
, 4);
3292 tic6x_fix_new_exp (insn_frag
, output
- insn_frag
->fr_literal
, 4, fix_exp
,
3293 fix_pcrel
, fx_r_type
, fix_adda
);
3294 insn_frag
->fr_fix
+= 4;
3295 insn_frag
->fr_var
-= 4;
3296 seginfo
->tc_segment_info_data
.last_insn_lsb
3297 = (target_big_endian
? output
+ 3 : output
);
3298 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3299 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3302 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3303 and the least significant BITS bits taken, at position POS. */
3304 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3306 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3307 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3310 /* Apply a fixup to the object file. */
3313 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3315 offsetT value
= *valP
;
3316 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3318 value
= SEXT (value
);
3321 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3323 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3326 /* We do our own overflow checks. */
3327 fixP
->fx_no_overflow
= 1;
3329 switch (fixP
->fx_r_type
)
3331 case BFD_RELOC_NONE
:
3332 /* Force output to the object file. */
3337 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3338 md_number_to_chars (buf
, value
, 4);
3342 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3344 if (value
< -0x8000 || value
> 0xffff)
3345 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3346 _("value too large for 2-byte field"));
3347 md_number_to_chars (buf
, value
, 2);
3352 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3354 if (value
< -0x80 || value
> 0xff)
3355 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3356 _("value too large for 1-byte field"));
3357 md_number_to_chars (buf
, value
, 1);
3361 case BFD_RELOC_C6000_ABS_S16
:
3362 case BFD_RELOC_C6000_ABS_L16
:
3363 case BFD_RELOC_C6000_SBR_S16
:
3364 case BFD_RELOC_C6000_SBR_L16_B
:
3365 case BFD_RELOC_C6000_SBR_L16_H
:
3366 case BFD_RELOC_C6000_SBR_L16_W
:
3367 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3368 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3370 offsetT newval
= md_chars_to_number (buf
, 4);
3373 switch (fixP
->fx_r_type
)
3375 case BFD_RELOC_C6000_SBR_L16_H
:
3379 case BFD_RELOC_C6000_SBR_L16_W
:
3380 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3389 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3390 if ((value
< -0x8000 || value
> 0x7fff)
3391 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3392 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3393 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3394 _("immediate offset out of range"));
3396 md_number_to_chars (buf
, newval
, 4);
3399 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3400 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3404 case BFD_RELOC_C6000_ABS_H16
:
3405 case BFD_RELOC_C6000_SBR_H16_B
:
3406 case BFD_RELOC_C6000_SBR_H16_H
:
3407 case BFD_RELOC_C6000_SBR_H16_W
:
3408 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3409 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3411 offsetT newval
= md_chars_to_number (buf
, 4);
3414 switch (fixP
->fx_r_type
)
3416 case BFD_RELOC_C6000_SBR_H16_H
:
3420 case BFD_RELOC_C6000_SBR_H16_W
:
3421 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3430 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3432 md_number_to_chars (buf
, newval
, 4);
3434 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3438 case BFD_RELOC_C6000_SBR_U15_B
:
3439 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3441 offsetT newval
= md_chars_to_number (buf
, 4);
3443 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3444 if (value
< 0 || value
> 0x7fff)
3445 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3446 _("immediate offset out of range"));
3448 md_number_to_chars (buf
, newval
, 4);
3452 case BFD_RELOC_C6000_SBR_U15_H
:
3453 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3455 offsetT newval
= md_chars_to_number (buf
, 4);
3457 /* Constant ADDA operands, processed as constant when the
3458 instruction is parsed, are encoded as-is rather than
3459 shifted. If the operand of an ADDA instruction is now
3460 constant (for example, the difference between two labels
3461 found after the instruction), ensure it is encoded the
3462 same way it would have been if the constant value had
3463 been known when the instruction was parsed. */
3464 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3467 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3469 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3470 _("immediate offset not 2-byte-aligned"));
3471 if (value
< 0 || value
> 0xfffe)
3472 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3473 _("immediate offset out of range"));
3475 md_number_to_chars (buf
, newval
, 4);
3479 case BFD_RELOC_C6000_SBR_U15_W
:
3480 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3481 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3483 offsetT newval
= md_chars_to_number (buf
, 4);
3485 /* Constant ADDA operands, processed as constant when the
3486 instruction is parsed, are encoded as-is rather than
3487 shifted. If the operand of an ADDA instruction is now
3488 constant (for example, the difference between two labels
3489 found after the instruction), ensure it is encoded the
3490 same way it would have been if the constant value had
3491 been known when the instruction was parsed. */
3492 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3495 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3497 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3498 _("immediate offset not 4-byte-aligned"));
3499 if (value
< 0 || value
> 0x1fffc)
3500 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3501 _("immediate offset out of range"));
3503 md_number_to_chars (buf
, newval
, 4);
3505 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3509 case BFD_RELOC_C6000_DSBT_INDEX
:
3511 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3512 _("addend used with $DSBT_INDEX"));
3517 case BFD_RELOC_C6000_PCR_S21
:
3518 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3520 offsetT newval
= md_chars_to_number (buf
, 4);
3522 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3525 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3526 _("PC-relative offset not 4-byte-aligned"));
3527 if (value
< -0x400000 || value
> 0x3ffffc)
3528 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3529 _("PC-relative offset out of range"));
3531 md_number_to_chars (buf
, newval
, 4);
3535 case BFD_RELOC_C6000_PCR_S12
:
3536 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3538 offsetT newval
= md_chars_to_number (buf
, 4);
3540 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3543 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3544 _("PC-relative offset not 4-byte-aligned"));
3545 if (value
< -0x2000 || value
> 0x1ffc)
3546 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3547 _("PC-relative offset out of range"));
3549 md_number_to_chars (buf
, newval
, 4);
3553 case BFD_RELOC_C6000_PCR_S10
:
3554 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3556 offsetT newval
= md_chars_to_number (buf
, 4);
3558 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3561 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3562 _("PC-relative offset not 4-byte-aligned"));
3563 if (value
< -0x800 || value
> 0x7fc)
3564 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3565 _("PC-relative offset out of range"));
3567 md_number_to_chars (buf
, newval
, 4);
3571 case BFD_RELOC_C6000_PCR_S7
:
3572 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3574 offsetT newval
= md_chars_to_number (buf
, 4);
3576 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3579 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3580 _("PC-relative offset not 4-byte-aligned"));
3581 if (value
< -0x100 || value
> 0xfc)
3582 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3583 _("PC-relative offset out of range"));
3585 md_number_to_chars (buf
, newval
, 4);
3594 /* Convert a floating-point number to target (IEEE) format. */
3597 md_atof (int type
, char *litP
, int *sizeP
)
3599 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3602 /* Adjust the frags in SECTION (see tic6x_end). */
3605 tic6x_adjust_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT section
,
3606 void *dummy ATTRIBUTE_UNUSED
)
3608 segment_info_type
*info
;
3611 bfd_boolean have_code
= FALSE
;
3612 bfd_boolean have_non_code
= FALSE
;
3614 info
= seg_info (section
);
3618 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3619 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3620 switch (fragp
->fr_type
)
3622 case rs_machine_dependent
:
3623 if (fragp
->tc_frag_data
.is_insns
)
3629 if (fragp
->fr_fix
> 0)
3630 have_non_code
= TRUE
;
3634 have_non_code
= TRUE
;
3638 /* Process alignment requirements in a code-only section. */
3639 if (have_code
&& !have_non_code
)
3641 /* If we need to insert an odd number of instructions to meet an
3642 alignment requirement, there must have been an odd number of
3643 instructions since the last 8-byte-aligned execute packet
3644 boundary. So there must have been an execute packet with an
3645 odd number (and so a number fewer than 8) of instructions
3646 into which we can insert a NOP without breaking any previous
3649 If then we need to insert a number 2 mod 4 of instructions,
3650 the number of instructions since the last 16-byte-aligned
3651 execute packet boundary must be 2 mod 4. So between that
3652 boundary and the following 8-byte-aligned boundary there must
3653 either be at least one execute packet with 2-mod-4
3654 instructions, or at least two with an odd number of
3655 instructions; again, greedily inserting NOPs as soon as
3656 possible suffices to meet the alignment requirement.
3658 If then we need to insert 4 instructions, we look between the
3659 last 32-byte-aligned boundary and the following
3660 16-byte-aligned boundary. The sizes of the execute packets
3661 in this range total 4 instructions mod 8, so again there is
3662 room for greedy insertion of NOPs to meet the alignment
3663 requirement, and before any intermediate point with 8-byte
3664 (2-instruction) alignment requirement the sizes of execute
3665 packets (and so the room for NOPs) will total 2 instructions
3666 mod 4 so greedy insertion will not break such alignments.
3668 So we can always meet these alignment requirements by
3669 inserting NOPs in parallel with existing execute packets, and
3670 by induction the approach described above inserts the minimum
3671 number of such NOPs. */
3673 /* The number of NOPs we are currently looking to insert, if we
3674 have gone back to insert NOPs. */
3675 unsigned int want_insert
= 0;
3677 /* Out of that number, the number inserted so far in the current
3678 stage of the above algorithm. */
3679 unsigned int want_insert_done_so_far
= 0;
3681 /* The position mod 32 at the start of the current frag. */
3682 unsigned int pos
= 0;
3684 /* The locations in the frag chain of the most recent frags at
3685 the start of which there is the given alignment. */
3686 frchainS
*frchp_last32
, *frchp_last16
, *frchp_last8
;
3687 fragS
*fragp_last32
, *fragp_last16
, *fragp_last8
;
3688 unsigned int pos_last32
, pos_last16
, pos_last8
;
3690 frchp_last32
= frchp_last16
= frchp_last8
= info
->frchainP
;
3691 fragp_last32
= fragp_last16
= fragp_last8
= info
->frchainP
->frch_root
;
3692 pos_last32
= pos_last16
= pos_last8
= 0;
3694 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3695 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3698 bfd_boolean go_back
= FALSE
;
3699 frchainS
*frchp_next
;
3702 if (fragp
->fr_type
!= rs_machine_dependent
)
3705 if (fragp
->tc_frag_data
.is_insns
3706 && pos
+ fragp
->fr_fix
> 32
3707 && !fragp
->tc_frag_data
.can_cross_fp_boundary
)
3709 /* As described above, we should always have met an
3710 alignment requirement by the time we come back to
3717 want_insert
= (32 - pos
) >> 2;
3718 if (want_insert
> 7)
3720 want_insert_done_so_far
= 0;
3724 if (!fragp
->tc_frag_data
.is_insns
)
3726 unsigned int would_insert_bytes
;
3728 if (!(pos
& ((1 << fragp
->fr_offset
) - 1)))
3729 /* This alignment requirement is already met. */
3732 /* As described above, we should always have met an
3733 alignment requirement by the time we come back to
3738 /* We may not be able to meet this requirement within
3739 the given number of characters. */
3741 = ((1 << fragp
->fr_offset
)
3742 - (pos
& ((1 << fragp
->fr_offset
) - 1)));
3744 if (fragp
->fr_subtype
!= 0
3745 && would_insert_bytes
> fragp
->fr_subtype
)
3748 /* An unmet alignment must be 8, 16 or 32 bytes;
3749 smaller ones must always be met within code-only
3750 sections and larger ones cause the section not to
3752 if (fragp
->fr_offset
!= 3
3753 && fragp
->fr_offset
!= 4
3754 && fragp
->fr_offset
!= 5)
3757 if (would_insert_bytes
& 3)
3759 want_insert
= would_insert_bytes
>> 2;
3760 if (want_insert
> 7)
3762 want_insert_done_so_far
= 0;
3765 else if (want_insert
&& !go_back
)
3767 unsigned int num_insns
= fragp
->fr_fix
>> 2;
3768 unsigned int max_poss_nops
= 8 - num_insns
;
3772 unsigned int cur_want_nops
, max_want_nops
, do_nops
, i
;
3774 if (want_insert
& 1)
3776 else if (want_insert
& 2)
3778 else if (want_insert
& 4)
3783 max_want_nops
= cur_want_nops
- want_insert_done_so_far
;
3785 do_nops
= (max_poss_nops
< max_want_nops
3788 for (i
= 0; i
< do_nops
; i
++)
3790 md_number_to_chars (fragp
->fr_literal
+ fragp
->fr_fix
,
3792 if (target_big_endian
)
3793 fragp
->fr_literal
[fragp
->fr_fix
- 1] |= 0x1;
3795 fragp
->fr_literal
[fragp
->fr_fix
- 4] |= 0x1;
3799 want_insert_done_so_far
+= do_nops
;
3800 if (want_insert_done_so_far
== cur_want_nops
)
3802 want_insert
-= want_insert_done_so_far
;
3803 want_insert_done_so_far
= 0;
3811 if (want_insert
& 1)
3813 frchp
= frchp_last8
;
3814 fragp
= fragp_last8
;
3817 else if (want_insert
& 2)
3819 frchp
= frchp_last8
= frchp_last16
;
3820 fragp
= fragp_last8
= fragp_last16
;
3821 pos
= pos_last8
= pos_last16
;
3823 else if (want_insert
& 4)
3825 frchp
= frchp_last8
= frchp_last16
= frchp_last32
;
3826 fragp
= fragp_last8
= fragp_last16
= fragp_last32
;
3827 pos
= pos_last8
= pos_last16
= pos_last32
;
3835 /* Update current position for moving past a code
3837 pos
+= fragp
->fr_fix
;
3840 fragp_next
= fragp
->fr_next
;
3841 if (fragp_next
== NULL
)
3843 frchp_next
= frchp
->frch_next
;
3844 if (frchp_next
!= NULL
)
3845 fragp_next
= frchp_next
->frch_root
;
3849 frchp_last8
= frchp_next
;
3850 fragp_last8
= fragp_next
;
3855 frchp_last16
= frchp_next
;
3856 fragp_last16
= fragp_next
;
3861 frchp_last32
= frchp_next
;
3862 fragp_last32
= fragp_next
;
3868 /* Now convert the machine-dependent frags to machine-independent
3870 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3871 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3873 if (fragp
->fr_type
== rs_machine_dependent
)
3875 if (fragp
->tc_frag_data
.is_insns
)
3879 fragp
->fr_type
= rs_align_code
;
3881 *fragp
->fr_literal
= 0;
3887 /* Initialize the machine-dependent parts of a frag. */
3890 tic6x_frag_init (fragS
*fragp
)
3892 fragp
->tc_frag_data
.is_insns
= FALSE
;
3893 fragp
->tc_frag_data
.can_cross_fp_boundary
= FALSE
;
3896 /* Set an attribute if it has not already been set by the user. */
3899 tic6x_set_attribute_int (int tag
, int value
)
3902 || tag
>= NUM_KNOWN_OBJ_ATTRIBUTES
)
3904 if (!tic6x_attributes_set_explicitly
[tag
])
3905 bfd_elf_add_proc_attr_int (stdoutput
, tag
, value
);
3908 /* Set object attributes deduced from the input file and command line
3909 rather than given explicitly. */
3911 tic6x_set_attributes (void)
3913 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
3914 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
3916 tic6x_set_attribute_int (Tag_ISA
, tic6x_arch_attribute
);
3917 tic6x_set_attribute_int (Tag_ABI_DSBT
, tic6x_dsbt
);
3920 /* Do machine-dependent manipulations of the frag chains after all
3921 input has been read and before the machine-independent sizing and
3927 /* Set object attributes at this point if not explicitly set. */
3928 tic6x_set_attributes ();
3930 /* Meeting alignment requirements may require inserting NOPs in
3931 parallel in execute packets earlier in the segment. Future
3932 16-bit instruction generation involves whole-segment optimization
3933 to determine the best choice and ordering of 32-bit or 16-bit
3934 instructions. This doesn't fit will in the general relaxation
3935 framework, so handle alignment and 16-bit instruction generation
3937 bfd_map_over_sections (stdoutput
, tic6x_adjust_section
, NULL
);
3940 /* No machine-dependent frags at this stage; all converted in
3944 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
3945 fragS
*fragp ATTRIBUTE_UNUSED
)
3950 /* No machine-dependent frags at this stage; all converted in
3954 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
3955 segT seg ATTRIBUTE_UNUSED
)
3960 /* Put a number into target byte order. */
3963 md_number_to_chars (char *buf
, valueT val
, int n
)
3965 if (target_big_endian
)
3966 number_to_chars_bigendian (buf
, val
, n
);
3968 number_to_chars_littleendian (buf
, val
, n
);
3971 /* Machine-dependent operand parsing not currently needed. */
3974 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
3978 /* PC-relative operands are relative to the start of the fetch
3982 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
3984 if (fixp
->fx_addsy
!= NULL
3985 && (!S_IS_DEFINED (fixp
->fx_addsy
)
3986 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
3988 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
3991 /* Round up a section size to the appropriate boundary. */
3994 md_section_align (segT segment ATTRIBUTE_UNUSED
,
3997 /* Round up section sizes to ensure that text sections consist of
3998 whole fetch packets. */
3999 int align
= bfd_get_section_alignment (stdoutput
, segment
);
4000 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4003 /* No special undefined symbol handling needed for now. */
4006 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4011 /* Translate internal representation of relocation info to BFD target
4015 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4018 bfd_reloc_code_real_type r_type
;
4020 reloc
= xmalloc (sizeof (arelent
));
4021 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
4022 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4023 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4024 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
4025 r_type
= fixp
->fx_r_type
;
4026 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4028 if (reloc
->howto
== NULL
)
4030 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4031 _("Cannot represent relocation type %s"),
4032 bfd_get_reloc_code_name (r_type
));
4036 /* Correct for adjustments bfd_install_relocation will make. */
4037 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
4038 reloc
->addend
+= reloc
->address
;