1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
6 This file is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "floatformat.h"
23 #include "libiberty.h"
26 #include "opcode/m68k.h"
28 /* Local function prototypes */
31 fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
34 dummy_print_address
PARAMS ((bfd_vma
, struct disassemble_info
*));
37 fetch_arg
PARAMS ((unsigned char *, int, int, disassemble_info
*));
40 print_base
PARAMS ((int, bfd_vma
, disassemble_info
*));
42 static unsigned char *
43 print_indexed
PARAMS ((int, unsigned char *, bfd_vma
, disassemble_info
*));
46 print_insn_arg
PARAMS ((const char *, unsigned char *, unsigned char *,
47 bfd_vma
, disassemble_info
*));
49 const char * const fpcr_names
[] = {
50 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
51 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
54 static char *const reg_names
[] = {
55 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
56 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
60 /* Sign-extend an (unsigned char). */
62 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
64 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
67 /* Get a 1 byte signed integer. */
68 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
70 /* Get a 2 byte signed integer. */
71 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
73 (p += 2, FETCH_DATA (info, p), \
74 COERCE16 ((p[-2] << 8) + p[-1]))
76 /* Get a 4 byte signed integer. */
77 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
79 (p += 4, FETCH_DATA (info, p), \
80 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
82 /* Get a 4 byte unsigned integer. */
83 #define NEXTULONG(p) \
84 (p += 4, FETCH_DATA (info, p), \
85 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
87 /* Get a single precision float. */
88 #define NEXTSINGLE(val, p) \
89 (p += 4, FETCH_DATA (info, p), \
90 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
92 /* Get a double precision float. */
93 #define NEXTDOUBLE(val, p) \
94 (p += 8, FETCH_DATA (info, p), \
95 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
97 /* Get an extended precision float. */
98 #define NEXTEXTEND(val, p) \
99 (p += 12, FETCH_DATA (info, p), \
100 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
102 /* Need a function to convert from packed to double
103 precision. Actually, it's easier to print a
104 packed number than a double anyway, so maybe
105 there should be a special case to handle this... */
106 #define NEXTPACKED(p) \
107 (p += 12, FETCH_DATA (info, p), 0.0)
109 /* Maximum length of an instruction. */
115 /* Points to first byte not fetched. */
116 bfd_byte
*max_fetched
;
117 bfd_byte the_buffer
[MAXLEN
];
122 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
123 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
125 #define FETCH_DATA(info, addr) \
126 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
127 ? 1 : fetch_data ((info), (addr)))
130 fetch_data (info
, addr
)
131 struct disassemble_info
*info
;
135 struct private *priv
= (struct private *)info
->private_data
;
136 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
138 status
= (*info
->read_memory_func
) (start
,
140 addr
- priv
->max_fetched
,
144 (*info
->memory_error_func
) (status
, start
, info
);
145 longjmp (priv
->bailout
, 1);
148 priv
->max_fetched
= addr
;
152 /* This function is used to print to the bit-bucket. */
155 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
156 const char *format ATTRIBUTE_UNUSED
, ...)
159 FILE *file ATTRIBUTE_UNUSED
;
166 dummy_print_address (vma
, info
)
167 bfd_vma vma ATTRIBUTE_UNUSED
;
168 struct disassemble_info
*info ATTRIBUTE_UNUSED
;
172 /* Print the m68k instruction at address MEMADDR in debugged memory,
173 on INFO->STREAM. Returns length of the instruction, in bytes. */
176 print_insn_m68k (memaddr
, info
)
178 disassemble_info
*info
;
181 register unsigned char *p
;
182 unsigned char *save_p
;
183 register const char *d
;
184 register unsigned long bestmask
;
185 const struct m68k_opcode
*best
;
186 unsigned int arch_mask
;
188 bfd_byte
*buffer
= priv
.the_buffer
;
189 fprintf_ftype save_printer
= info
->fprintf_func
;
190 void (*save_print_address
) PARAMS ((bfd_vma
, struct disassemble_info
*))
191 = info
->print_address_func
;
193 static int numopcodes
[16];
194 static const struct m68k_opcode
**opcodes
[16];
198 /* Speed up the matching by sorting the opcode table on the upper
199 four bits of the opcode. */
200 const struct m68k_opcode
**opc_pointer
[16];
202 /* First count how many opcodes are in each of the sixteen buckets. */
203 for (i
= 0; i
< m68k_numopcodes
; i
++)
204 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
206 /* Then create a sorted table of pointers that point into the
208 opc_pointer
[0] = ((const struct m68k_opcode
**)
209 xmalloc (sizeof (struct m68k_opcode
*)
211 opcodes
[0] = opc_pointer
[0];
212 for (i
= 1; i
< 16; i
++)
214 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
215 opcodes
[i
] = opc_pointer
[i
];
218 for (i
= 0; i
< m68k_numopcodes
; i
++)
219 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
223 info
->private_data
= (PTR
) &priv
;
224 /* Tell objdump to use two bytes per chunk and six bytes per line for
225 displaying raw data. */
226 info
->bytes_per_chunk
= 2;
227 info
->bytes_per_line
= 6;
228 info
->display_endian
= BFD_ENDIAN_BIG
;
229 priv
.max_fetched
= priv
.the_buffer
;
230 priv
.insn_start
= memaddr
;
231 if (setjmp (priv
.bailout
) != 0)
240 arch_mask
= (unsigned int) -1;
242 case bfd_mach_m68000
:
243 arch_mask
= m68000
|m68881
|m68851
;
245 case bfd_mach_m68008
:
246 arch_mask
= m68008
|m68881
|m68851
;
248 case bfd_mach_m68010
:
249 arch_mask
= m68010
|m68881
|m68851
;
251 case bfd_mach_m68020
:
252 arch_mask
= m68020
|m68881
|m68851
;
254 case bfd_mach_m68030
:
255 arch_mask
= m68030
|m68881
|m68851
;
257 case bfd_mach_m68040
:
258 arch_mask
= m68040
|m68881
|m68851
;
260 case bfd_mach_m68060
:
261 arch_mask
= m68060
|m68881
|m68851
;
263 case bfd_mach_mcf5200
:
264 arch_mask
= mcfisa_a
;
266 case bfd_mach_mcf521x
:
267 case bfd_mach_mcf528x
:
268 arch_mask
= mcfisa_a
|mcfhwdiv
|mcfisa_aa
|mcfusp
|mcfemac
;
270 case bfd_mach_mcf5206e
:
271 arch_mask
= mcfisa_a
|mcfhwdiv
|mcfmac
;
273 case bfd_mach_mcf5249
:
274 arch_mask
= mcfisa_a
|mcfhwdiv
|mcfemac
;
276 case bfd_mach_mcf5307
:
277 arch_mask
= mcfisa_a
|mcfhwdiv
|mcfmac
;
279 case bfd_mach_mcf5407
:
280 arch_mask
= mcfisa_a
|mcfhwdiv
|mcfisa_b
|mcfmac
;
282 case bfd_mach_mcf547x
:
283 case bfd_mach_mcf548x
:
284 case bfd_mach_mcfv4e
:
285 arch_mask
= mcfisa_a
|mcfhwdiv
|mcfisa_b
|mcfusp
|cfloat
|mcfemac
;
290 FETCH_DATA (info
, buffer
+ 2);
291 major_opcode
= (buffer
[0] >> 4) & 15;
292 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
294 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
295 unsigned long opcode
= opc
->opcode
;
296 unsigned long match
= opc
->match
;
298 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
299 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
300 /* Only fetch the next two bytes if we need to. */
301 && (((0xffff & match
) == 0)
303 (FETCH_DATA (info
, buffer
+ 4)
304 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
305 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
307 && (opc
->arch
& arch_mask
) != 0)
309 /* Don't use for printout the variants of divul and divsl
310 that have the same register number in two places.
311 The more general variants will match instead. */
312 for (d
= opc
->args
; *d
; d
+= 2)
316 /* Don't use for printout the variants of most floating
317 point coprocessor instructions which use the same
318 register number in two places, as above. */
320 for (d
= opc
->args
; *d
; d
+= 2)
324 /* Don't match fmovel with more than one register; wait for
328 for (d
= opc
->args
; *d
; d
+= 2)
330 if (d
[0] == 's' && d
[1] == '8')
334 val
= fetch_arg (buffer
, d
[1], 3, info
);
335 if ((val
& (val
- 1)) != 0)
341 if (*d
== '\0' && match
> bestmask
)
352 /* Point at first word of argument data,
353 and at descriptor for first argument. */
356 /* Figure out how long the fixed-size portion of the instruction is.
357 The only place this is stored in the opcode table is
358 in the arguments--look for arguments which specify fields in the 2nd
359 or 3rd words of the instruction. */
360 for (d
= best
->args
; *d
; d
+= 2)
362 /* I don't think it is necessary to be checking d[0] here; I suspect
363 all this could be moved to the case statement below. */
366 if (d
[1] == 'l' && p
- buffer
< 6)
368 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
371 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
396 /* pflusha is an exceptions. It takes no arguments but is two words
397 long. Recognize it by looking at the lower 16 bits of the mask. */
398 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
401 /* lpstop is another exception. It takes a one word argument but is
404 && (best
->match
& 0xffff) == 0xffff
405 && best
->args
[0] == '#'
406 && best
->args
[1] == 'w')
408 /* Copy the one word argument into the usual location for a one
409 word argument, to simplify printing it. We can get away with
410 this because we know exactly what the second word is, and we
411 aren't going to print anything based on it. */
413 FETCH_DATA (info
, p
);
414 buffer
[2] = buffer
[4];
415 buffer
[3] = buffer
[5];
418 FETCH_DATA (info
, p
);
422 /* We scan the operands twice. The first time we don't print anything,
423 but look for errors. */
426 info
->print_address_func
= dummy_print_address
;
427 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
430 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
433 else if (eaten
== -1)
437 (*info
->fprintf_func
) (info
->stream
,
438 /* xgettext:c-format */
439 _("<internal error in opcode table: %s %s>\n"),
447 info
->fprintf_func
= save_printer
;
448 info
->print_address_func
= save_print_address
;
452 (*info
->fprintf_func
) (info
->stream
, "%s", best
->name
);
455 (*info
->fprintf_func
) (info
->stream
, " ");
459 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
461 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
462 (*info
->fprintf_func
) (info
->stream
, ",");
467 /* Handle undefined instructions. */
468 info
->fprintf_func
= save_printer
;
469 info
->print_address_func
= save_print_address
;
470 (*info
->fprintf_func
) (info
->stream
, "0%o",
471 (buffer
[0] << 8) + buffer
[1]);
475 /* Returns number of bytes "eaten" by the operand, or
476 return -1 if an invalid operand was found, or -2 if
477 an opcode tabe error was found. */
480 print_insn_arg (d
, buffer
, p0
, addr
, info
)
482 unsigned char *buffer
;
484 bfd_vma addr
; /* PC for this arg to be relative to */
485 disassemble_info
*info
;
487 register int val
= 0;
488 register int place
= d
[1];
489 register unsigned char *p
= p0
;
491 register const char *regname
;
492 register unsigned char *p1
;
500 case 'c': /* cache identifier */
502 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
503 val
= fetch_arg (buffer
, place
, 2, info
);
504 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
508 case 'a': /* address register indirect only. Cf. case '+'. */
510 (*info
->fprintf_func
)
513 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
517 case '_': /* 32-bit absolute address for move16. */
519 uval
= NEXTULONG (p
);
520 (*info
->print_address_func
) (uval
, info
);
525 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
529 (*info
->fprintf_func
) (info
->stream
, "%%sr");
533 (*info
->fprintf_func
) (info
->stream
, "%%usp");
537 (*info
->fprintf_func
) (info
->stream
, "%%acc");
541 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
545 (*info
->fprintf_func
) (info
->stream
, "%%mask");
550 /* FIXME: There's a problem here, different m68k processors call the
551 same address different names. This table can't get it right
552 because it doesn't know which processor it's disassembling for. */
553 static const struct { char *name
; int value
; } names
[]
554 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
555 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
556 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
557 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
558 {"%msp", 0x803}, {"%isp", 0x804},
559 {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
561 /* Should we be calling this psr like we do in case 'Y'? */
564 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
566 val
= fetch_arg (buffer
, place
, 12, info
);
567 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
568 if (names
[regno
].value
== val
)
570 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
574 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
579 val
= fetch_arg (buffer
, place
, 3, info
);
580 /* 0 means 8, except for the bkpt instruction... */
581 if (val
== 0 && d
[1] != 's')
583 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
587 val
= fetch_arg (buffer
, place
, 3, info
);
591 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
597 static char *const scalefactor_name
[] = { "<<", ">>" };
598 val
= fetch_arg (buffer
, place
, 1, info
);
599 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
603 val
= fetch_arg (buffer
, place
, 8, info
);
606 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
611 val
= fetch_arg (buffer
, place
, 4, info
);
612 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
616 (*info
->fprintf_func
) (info
->stream
, "%s",
617 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
621 (*info
->fprintf_func
)
623 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
627 (*info
->fprintf_func
)
629 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
633 regno
= fetch_arg (buffer
, place
, 4, info
);
635 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
637 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
641 (*info
->fprintf_func
)
642 (info
->stream
, "%%fp%d",
643 fetch_arg (buffer
, place
, 3, info
));
647 val
= fetch_arg (buffer
, place
, 6, info
);
649 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
651 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
655 (*info
->fprintf_func
)
656 (info
->stream
, "%s@+",
657 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
661 (*info
->fprintf_func
)
662 (info
->stream
, "%s@-",
663 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
668 (*info
->fprintf_func
)
669 (info
->stream
, "{%s}",
670 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
671 else if (place
== 'C')
673 val
= fetch_arg (buffer
, place
, 7, info
);
674 if (val
> 63) /* This is a signed constant. */
676 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
684 p1
= buffer
+ (*d
== '#' ? 2 : 4);
686 val
= fetch_arg (buffer
, place
, 4, info
);
687 else if (place
== 'C')
688 val
= fetch_arg (buffer
, place
, 7, info
);
689 else if (place
== '8')
690 val
= fetch_arg (buffer
, place
, 3, info
);
691 else if (place
== '3')
692 val
= fetch_arg (buffer
, place
, 8, info
);
693 else if (place
== 'b')
695 else if (place
== 'w' || place
== 'W')
697 else if (place
== 'l')
701 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
707 else if (place
== 'B')
708 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
709 else if (place
== 'w' || place
== 'W')
711 else if (place
== 'l' || place
== 'L' || place
== 'C')
713 else if (place
== 'g')
715 disp
= NEXTBYTE (buffer
);
721 else if (place
== 'c')
723 if (buffer
[1] & 0x40) /* If bit six is one, long offset */
731 (*info
->print_address_func
) (addr
+ disp
, info
);
736 (*info
->fprintf_func
)
737 (info
->stream
, "%s@(%d)",
738 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8], val
);
742 (*info
->fprintf_func
) (info
->stream
, "%s",
743 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
747 val
= fetch_arg(buffer
, place
, 2, info
);
748 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
752 val
= fetch_arg(buffer
, place
, 2, info
);
753 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
==0 ? "01" : "23");
757 val
= fetch_arg(buffer
, place
, 2, info
);
759 (*info
->fprintf_func
) (info
->stream
, "<<");
761 (*info
->fprintf_func
) (info
->stream
, ">>");
765 /* Get coprocessor ID... */
766 val
= fetch_arg (buffer
, 'd', 3, info
);
768 if (val
!= 1) /* Unusual coprocessor ID? */
769 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
798 val
= fetch_arg (buffer
, 'x', 6, info
);
799 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
802 val
= fetch_arg (buffer
, 's', 6, info
);
804 /* Get register number assuming address register. */
805 regno
= (val
& 7) + 8;
806 regname
= reg_names
[regno
];
810 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
814 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
818 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
822 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
826 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
831 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
835 p
= print_indexed (regno
, p
, addr
, info
);
843 (*info
->print_address_func
) (val
, info
);
847 uval
= NEXTULONG (p
);
848 (*info
->print_address_func
) (uval
, info
);
853 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
854 (*info
->print_address_func
) (addr
+ val
, info
);
855 (*info
->fprintf_func
) (info
->stream
, ")");
859 p
= print_indexed (-1, p
, addr
, info
);
863 flt_p
= 1; /* Assume it's a float... */
882 NEXTSINGLE (flval
, p
);
886 NEXTDOUBLE (flval
, p
);
890 NEXTEXTEND (flval
, p
);
894 flval
= NEXTPACKED (p
);
900 if (flt_p
) /* Print a float? */
901 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
903 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
911 /* If place is '/', then this is the case of the mask bit for
912 mac/emac loads. Now that the arg has been printed, grab the
913 mask bit and if set, add a '&' to the arg. */
916 val
= fetch_arg (buffer
, place
, 1, info
);
918 (*info
->fprintf_func
) (info
->stream
, "&");
929 /* Move the pointer ahead if this point is farther ahead
934 (*info
->fprintf_func
) (info
->stream
, "#0");
939 register int newval
= 0;
940 for (regno
= 0; regno
< 16; ++regno
)
941 if (val
& (0x8000 >> regno
))
942 newval
|= 1 << regno
;
947 for (regno
= 0; regno
< 16; ++regno
)
948 if (val
& (1 << regno
))
952 (*info
->fprintf_func
) (info
->stream
, "/");
954 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
956 while (val
& (1 << (regno
+ 1)))
958 if (regno
> first_regno
)
959 (*info
->fprintf_func
) (info
->stream
, "-%s",
963 else if (place
== '3')
967 val
= fetch_arg (buffer
, place
, 8, info
);
970 (*info
->fprintf_func
) (info
->stream
, "#0");
975 register int newval
= 0;
976 for (regno
= 0; regno
< 8; ++regno
)
977 if (val
& (0x80 >> regno
))
978 newval
|= 1 << regno
;
983 for (regno
= 0; regno
< 8; ++regno
)
984 if (val
& (1 << regno
))
988 (*info
->fprintf_func
) (info
->stream
, "/");
990 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
992 while (val
& (1 << (regno
+ 1)))
994 if (regno
> first_regno
)
995 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
998 else if (place
== '8')
1000 /* fmoveml for FP status registers */
1001 (*info
->fprintf_func
) (info
->stream
, "%s",
1002 fpcr_names
[fetch_arg (buffer
, place
, 3,
1019 int val
= fetch_arg (buffer
, place
, 5, info
);
1023 case 2: name
= "%tt0"; break;
1024 case 3: name
= "%tt1"; break;
1025 case 0x10: name
= "%tc"; break;
1026 case 0x11: name
= "%drp"; break;
1027 case 0x12: name
= "%srp"; break;
1028 case 0x13: name
= "%crp"; break;
1029 case 0x14: name
= "%cal"; break;
1030 case 0x15: name
= "%val"; break;
1031 case 0x16: name
= "%scc"; break;
1032 case 0x17: name
= "%ac"; break;
1033 case 0x18: name
= "%psr"; break;
1034 case 0x19: name
= "%pcsr"; break;
1038 int break_reg
= ((buffer
[3] >> 2) & 7);
1039 (*info
->fprintf_func
)
1040 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1045 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1048 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1054 int fc
= fetch_arg (buffer
, place
, 5, info
);
1056 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1058 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1060 /* xgettext:c-format */
1061 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1066 (*info
->fprintf_func
) (info
->stream
, "%%val");
1071 int level
= fetch_arg (buffer
, place
, 3, info
);
1072 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1079 int reg
= fetch_arg (buffer
, place
, 5, info
);
1086 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1088 is_upper
? "u" : "l");
1099 /* Fetch BITS bits from a position in the instruction specified by CODE.
1100 CODE is a "place to put an argument", or 'x' for a destination
1101 that is a general address (mode and register).
1102 BUFFER contains the instruction. */
1105 fetch_arg (buffer
, code
, bits
, info
)
1106 unsigned char *buffer
;
1109 disassemble_info
*info
;
1111 register int val
= 0;
1114 case '/': /* MAC/EMAC mask bit. */
1115 val
= buffer
[3] >> 5;
1118 case 'G': /* EMAC ACC load. */
1119 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[2] >> 7) & 0x1);
1122 case 'H': /* EMAC ACC !load. */
1123 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[2] >> 7) & 0x1);
1126 case ']': /* EMAC ACCEXT bit. */
1127 val
= buffer
[0] >> 2;
1130 case 'I': /* MAC/EMAC scale factor. */
1131 val
= buffer
[0] >> 1;
1134 case 'F': /* EMAC ACCx. */
1135 val
= buffer
[0] >> 1;
1146 case 'd': /* Destination, for register or quick. */
1147 val
= (buffer
[0] << 8) + buffer
[1];
1151 case 'x': /* Destination, for general arg */
1152 val
= (buffer
[0] << 8) + buffer
[1];
1157 FETCH_DATA (info
, buffer
+ 3);
1158 val
= (buffer
[3] >> 4);
1162 FETCH_DATA (info
, buffer
+ 3);
1167 FETCH_DATA (info
, buffer
+ 3);
1168 val
= (buffer
[2] << 8) + buffer
[3];
1173 FETCH_DATA (info
, buffer
+ 3);
1174 val
= (buffer
[2] << 8) + buffer
[3];
1180 FETCH_DATA (info
, buffer
+ 3);
1181 val
= (buffer
[2] << 8) + buffer
[3];
1185 FETCH_DATA (info
, buffer
+ 5);
1186 val
= (buffer
[4] << 8) + buffer
[5];
1191 FETCH_DATA (info
, buffer
+ 5);
1192 val
= (buffer
[4] << 8) + buffer
[5];
1197 FETCH_DATA (info
, buffer
+ 5);
1198 val
= (buffer
[4] << 8) + buffer
[5];
1202 FETCH_DATA (info
, buffer
+ 3);
1203 val
= (buffer
[2] << 8) + buffer
[3];
1208 FETCH_DATA (info
, buffer
+ 3);
1209 val
= (buffer
[2] << 8) + buffer
[3];
1214 FETCH_DATA (info
, buffer
+ 3);
1215 val
= (buffer
[2] << 8) + buffer
[3];
1220 val
= (buffer
[1] >> 6);
1224 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
1225 | ((buffer
[0] >> 1) & 0x7)
1226 | (buffer
[3] & 0x80 ? 0x10 : 0);
1230 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
1234 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
1238 val
= buffer
[1] | (buffer
[3] & 0x40 ? 0x10 : 0);
1242 val
= buffer
[3] | (buffer
[3] & 0x40 ? 0x10 : 0);
1246 val
= buffer
[2] >> 2;
1278 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
1279 P points to extension word, in buffer.
1280 ADDR is the nominal core address of that extension word. */
1282 static unsigned char *
1283 print_indexed (basereg
, p
, addr
, info
)
1287 disassemble_info
*info
;
1290 static char *const scales
[] = { "", ":2", ":4", ":8" };
1296 word
= NEXTWORD (p
);
1298 /* Generate the text for the index register.
1299 Where this will be output is not yet determined. */
1300 sprintf (buf
, "%s:%c%s",
1301 reg_names
[(word
>> 12) & 0xf],
1302 (word
& 0x800) ? 'l' : 'w',
1303 scales
[(word
>> 9) & 3]);
1305 /* Handle the 68000 style of indexing. */
1307 if ((word
& 0x100) == 0)
1309 base_disp
= word
& 0xff;
1310 if ((base_disp
& 0x80) != 0)
1314 print_base (basereg
, base_disp
, info
);
1315 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
1319 /* Handle the generalized kind. */
1320 /* First, compute the displacement to add to the base register. */
1332 switch ((word
>> 4) & 3)
1335 base_disp
= NEXTWORD (p
);
1338 base_disp
= NEXTLONG (p
);
1343 /* Handle single-level case (not indirect) */
1345 if ((word
& 7) == 0)
1347 print_base (basereg
, base_disp
, info
);
1349 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1350 (*info
->fprintf_func
) (info
->stream
, ")");
1354 /* Two level. Compute displacement to add after indirection. */
1360 outer_disp
= NEXTWORD (p
);
1363 outer_disp
= NEXTLONG (p
);
1366 print_base (basereg
, base_disp
, info
);
1367 if ((word
& 4) == 0 && buf
[0] != '\0')
1369 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1372 sprintf_vma (vmabuf
, outer_disp
);
1373 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
1375 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1376 (*info
->fprintf_func
) (info
->stream
, ")");
1381 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1382 REGNO = -1 for pc, -2 for none (suppressed). */
1385 print_base (regno
, disp
, info
)
1388 disassemble_info
*info
;
1392 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1393 (*info
->print_address_func
) (disp
, info
);
1400 (*info
->fprintf_func
) (info
->stream
, "@(");
1401 else if (regno
== -3)
1402 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
1404 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
1406 sprintf_vma (buf
, disp
);
1407 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);