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Don't emit symbols seen only in dynamic object, don't read duplicate
[binutils.git] / include / opcode / bfin.h
blob4466fdce7a491eaf9d3c79a2fe077c2b6710f366
1 /* bfin.h -- Header file for ADI Blackfin opcode table
2 Copyright 2005 Free Software Foundation, Inc.
3
4 This file is part of GDB, GAS, and the GNU binutils.
5
6 GDB, GAS, and the GNU binutils are free software; you can redistribute
7 them and/or modify them under the terms of the GNU General Public
8 License as published by the Free Software Foundation; either version
9 1, or (at your option) any later version.
10
11 GDB, GAS, and the GNU binutils are distributed in the hope that they
12 will be useful, but WITHOUT ANY WARRANTY; without even the implied
13 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
14 the GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this file; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
19
20 /* Common to all DSP32 instructions. */
21 #define BIT_MULTI_INS 0x0800
22
23 /* This just sets the multi instruction bit of a DSP32 instruction. */
24 #define SET_MULTI_INSTRUCTION_BIT(x) x->value |= BIT_MULTI_INS;
25
26
27 /* DSP instructions (32 bit) */
28
29 /* dsp32mac
30 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
31 | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
32 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
33 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
34 */
35
36 typedef struct
37 {
38 unsigned long opcode;
39 int bits_src1;
40 int mask_src1;
41 int bits_src0;
42 int mask_src0;
43 int bits_dst;
44 int mask_dst;
45 int bits_h10;
46 int mask_h10;
47 int bits_h00;
48 int mask_h00;
49 int bits_op0;
50 int mask_op0;
51 int bits_w0;
52 int mask_w0;
53 int bits_h11;
54 int mask_h11;
55 int bits_h01;
56 int mask_h01;
57 int bits_op1;
58 int mask_op1;
59 int bits_w1;
60 int mask_w1;
61 int bits_P;
62 int mask_P;
63 int bits_MM;
64 int mask_MM;
65 int bits_mmod;
66 int mask_mmod;
67 int bits_code2;
68 int mask_code2;
69 int bits_M;
70 int mask_M;
71 int bits_code;
72 int mask_code;
73 } DSP32Mac;
74
75 #define DSP32Mac_opcode 0xc0000000
76 #define DSP32Mac_src1_bits 0
77 #define DSP32Mac_src1_mask 0x7
78 #define DSP32Mac_src0_bits 3
79 #define DSP32Mac_src0_mask 0x7
80 #define DSP32Mac_dst_bits 6
81 #define DSP32Mac_dst_mask 0x7
82 #define DSP32Mac_h10_bits 9
83 #define DSP32Mac_h10_mask 0x1
84 #define DSP32Mac_h00_bits 10
85 #define DSP32Mac_h00_mask 0x1
86 #define DSP32Mac_op0_bits 11
87 #define DSP32Mac_op0_mask 0x3
88 #define DSP32Mac_w0_bits 13
89 #define DSP32Mac_w0_mask 0x1
90 #define DSP32Mac_h11_bits 14
91 #define DSP32Mac_h11_mask 0x1
92 #define DSP32Mac_h01_bits 15
93 #define DSP32Mac_h01_mask 0x1
94 #define DSP32Mac_op1_bits 16
95 #define DSP32Mac_op1_mask 0x3
96 #define DSP32Mac_w1_bits 18
97 #define DSP32Mac_w1_mask 0x1
98 #define DSP32Mac_p_bits 19
99 #define DSP32Mac_p_mask 0x1
100 #define DSP32Mac_MM_bits 20
101 #define DSP32Mac_MM_mask 0x1
102 #define DSP32Mac_mmod_bits 21
103 #define DSP32Mac_mmod_mask 0xf
104 #define DSP32Mac_code2_bits 25
105 #define DSP32Mac_code2_mask 0x3
106 #define DSP32Mac_M_bits 27
107 #define DSP32Mac_M_mask 0x1
108 #define DSP32Mac_code_bits 28
109 #define DSP32Mac_code_mask 0xf
110
111 #define init_DSP32Mac \
112 { \
113 DSP32Mac_opcode, \
114 DSP32Mac_src1_bits, DSP32Mac_src1_mask, \
115 DSP32Mac_src0_bits, DSP32Mac_src0_mask, \
116 DSP32Mac_dst_bits, DSP32Mac_dst_mask, \
117 DSP32Mac_h10_bits, DSP32Mac_h10_mask, \
118 DSP32Mac_h00_bits, DSP32Mac_h00_mask, \
119 DSP32Mac_op0_bits, DSP32Mac_op0_mask, \
120 DSP32Mac_w0_bits, DSP32Mac_w0_mask, \
121 DSP32Mac_h11_bits, DSP32Mac_h11_mask, \
122 DSP32Mac_h01_bits, DSP32Mac_h01_mask, \
123 DSP32Mac_op1_bits, DSP32Mac_op1_mask, \
124 DSP32Mac_w1_bits, DSP32Mac_w1_mask, \
125 DSP32Mac_p_bits, DSP32Mac_p_mask, \
126 DSP32Mac_MM_bits, DSP32Mac_MM_mask, \
127 DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \
128 DSP32Mac_code2_bits, DSP32Mac_code2_mask, \
129 DSP32Mac_M_bits, DSP32Mac_M_mask, \
130 DSP32Mac_code_bits, DSP32Mac_code_mask \
131 };
132
133 /* dsp32mult
134 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
135 | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...|
136 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
137 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
138 */
139
140 typedef DSP32Mac DSP32Mult;
141 #define DSP32Mult_opcode 0xc2000000
142
143 #define init_DSP32Mult \
144 { \
145 DSP32Mult_opcode, \
146 DSP32Mac_src1_bits, DSP32Mac_src1_mask, \
147 DSP32Mac_src0_bits, DSP32Mac_src0_mask, \
148 DSP32Mac_dst_bits, DSP32Mac_dst_mask, \
149 DSP32Mac_h10_bits, DSP32Mac_h10_mask, \
150 DSP32Mac_h00_bits, DSP32Mac_h00_mask, \
151 DSP32Mac_op0_bits, DSP32Mac_op0_mask, \
152 DSP32Mac_w0_bits, DSP32Mac_w0_mask, \
153 DSP32Mac_h11_bits, DSP32Mac_h11_mask, \
154 DSP32Mac_h01_bits, DSP32Mac_h01_mask, \
155 DSP32Mac_op1_bits, DSP32Mac_op1_mask, \
156 DSP32Mac_w1_bits, DSP32Mac_w1_mask, \
157 DSP32Mac_p_bits, DSP32Mac_p_mask, \
158 DSP32Mac_MM_bits, DSP32Mac_MM_mask, \
159 DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \
160 DSP32Mac_code2_bits, DSP32Mac_code2_mask, \
161 DSP32Mac_M_bits, DSP32Mac_M_mask, \
162 DSP32Mac_code_bits, DSP32Mac_code_mask \
163 };
164
165 /* dsp32alu
166 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
167 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
168 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
169 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
170 */
171
172 typedef struct
173 {
174 unsigned long opcode;
175 int bits_src1;
176 int mask_src1;
177 int bits_src0;
178 int mask_src0;
179 int bits_dst1;
180 int mask_dst1;
181 int bits_dst0;
182 int mask_dst0;
183 int bits_x;
184 int mask_x;
185 int bits_s;
186 int mask_s;
187 int bits_aop;
188 int mask_aop;
189 int bits_aopcde;
190 int mask_aopcde;
191 int bits_HL;
192 int mask_HL;
193 int bits_dontcare;
194 int mask_dontcare;
195 int bits_code2;
196 int mask_code2;
197 int bits_M;
198 int mask_M;
199 int bits_code;
200 int mask_code;
201 } DSP32Alu;
202
203 #define DSP32Alu_opcode 0xc4000000
204 #define DSP32Alu_src1_bits 0
205 #define DSP32Alu_src1_mask 0x7
206 #define DSP32Alu_src0_bits 3
207 #define DSP32Alu_src0_mask 0x7
208 #define DSP32Alu_dst1_bits 6
209 #define DSP32Alu_dst1_mask 0x7
210 #define DSP32Alu_dst0_bits 9
211 #define DSP32Alu_dst0_mask 0x7
212 #define DSP32Alu_x_bits 12
213 #define DSP32Alu_x_mask 0x1
214 #define DSP32Alu_s_bits 13
215 #define DSP32Alu_s_mask 0x1
216 #define DSP32Alu_aop_bits 14
217 #define DSP32Alu_aop_mask 0x3
218 #define DSP32Alu_aopcde_bits 16
219 #define DSP32Alu_aopcde_mask 0x1f
220 #define DSP32Alu_HL_bits 21
221 #define DSP32Alu_HL_mask 0x1
222 #define DSP32Alu_dontcare_bits 22
223 #define DSP32Alu_dontcare_mask 0x7
224 #define DSP32Alu_code2_bits 25
225 #define DSP32Alu_code2_mask 0x3
226 #define DSP32Alu_M_bits 27
227 #define DSP32Alu_M_mask 0x1
228 #define DSP32Alu_code_bits 28
229 #define DSP32Alu_code_mask 0xf
230
231 #define init_DSP32Alu \
232 { \
233 DSP32Alu_opcode, \
234 DSP32Alu_src1_bits, DSP32Alu_src1_mask, \
235 DSP32Alu_src0_bits, DSP32Alu_src0_mask, \
236 DSP32Alu_dst1_bits, DSP32Alu_dst1_mask, \
237 DSP32Alu_dst0_bits, DSP32Alu_dst0_mask, \
238 DSP32Alu_x_bits, DSP32Alu_x_mask, \
239 DSP32Alu_s_bits, DSP32Alu_s_mask, \
240 DSP32Alu_aop_bits, DSP32Alu_aop_mask, \
241 DSP32Alu_aopcde_bits, DSP32Alu_aopcde_mask, \
242 DSP32Alu_HL_bits, DSP32Alu_HL_mask, \
243 DSP32Alu_dontcare_bits, DSP32Alu_dontcare_mask, \
244 DSP32Alu_code2_bits, DSP32Alu_code2_mask, \
245 DSP32Alu_M_bits, DSP32Alu_M_mask, \
246 DSP32Alu_code_bits, DSP32Alu_code_mask \
247 };
248
249 /* dsp32shift
250 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
251 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
252 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
253 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
254 */
255
256 typedef struct
257 {
258 unsigned long opcode;
259 int bits_src1;
260 int mask_src1;
261 int bits_src0;
262 int mask_src0;
263 int bits_dst1;
264 int mask_dst1;
265 int bits_dst0;
266 int mask_dst0;
267 int bits_HLs;
268 int mask_HLs;
269 int bits_sop;
270 int mask_sop;
271 int bits_sopcde;
272 int mask_sopcde;
273 int bits_dontcare;
274 int mask_dontcare;
275 int bits_code2;
276 int mask_code2;
277 int bits_M;
278 int mask_M;
279 int bits_code;
280 int mask_code;
281 } DSP32Shift;
282
283 #define DSP32Shift_opcode 0xc6000000
284 #define DSP32Shift_src1_bits 0
285 #define DSP32Shift_src1_mask 0x7
286 #define DSP32Shift_src0_bits 3
287 #define DSP32Shift_src0_mask 0x7
288 #define DSP32Shift_dst1_bits 6
289 #define DSP32Shift_dst1_mask 0x7
290 #define DSP32Shift_dst0_bits 9
291 #define DSP32Shift_dst0_mask 0x7
292 #define DSP32Shift_HLs_bits 12
293 #define DSP32Shift_HLs_mask 0x3
294 #define DSP32Shift_sop_bits 14
295 #define DSP32Shift_sop_mask 0x3
296 #define DSP32Shift_sopcde_bits 16
297 #define DSP32Shift_sopcde_mask 0x1f
298 #define DSP32Shift_dontcare_bits 21
299 #define DSP32Shift_dontcare_mask 0x3
300 #define DSP32Shift_code2_bits 23
301 #define DSP32Shift_code2_mask 0xf
302 #define DSP32Shift_M_bits 27
303 #define DSP32Shift_M_mask 0x1
304 #define DSP32Shift_code_bits 28
305 #define DSP32Shift_code_mask 0xf
306
307 #define init_DSP32Shift \
308 { \
309 DSP32Shift_opcode, \
310 DSP32Shift_src1_bits, DSP32Shift_src1_mask, \
311 DSP32Shift_src0_bits, DSP32Shift_src0_mask, \
312 DSP32Shift_dst1_bits, DSP32Shift_dst1_mask, \
313 DSP32Shift_dst0_bits, DSP32Shift_dst0_mask, \
314 DSP32Shift_HLs_bits, DSP32Shift_HLs_mask, \
315 DSP32Shift_sop_bits, DSP32Shift_sop_mask, \
316 DSP32Shift_sopcde_bits, DSP32Shift_sopcde_mask, \
317 DSP32Shift_dontcare_bits, DSP32Shift_dontcare_mask, \
318 DSP32Shift_code2_bits, DSP32Shift_code2_mask, \
319 DSP32Shift_M_bits, DSP32Shift_M_mask, \
320 DSP32Shift_code_bits, DSP32Shift_code_mask \
321 };
322
323 /* dsp32shiftimm
324 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
325 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
326 |.sop...|.HLs...|.dst0......|.immag.................|.src1......|
327 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
328 */
329
330 typedef struct
331 {
332 unsigned long opcode;
333 int bits_src1;
334 int mask_src1;
335 int bits_immag;
336 int mask_immag;
337 int bits_dst0;
338 int mask_dst0;
339 int bits_HLs;
340 int mask_HLs;
341 int bits_sop;
342 int mask_sop;
343 int bits_sopcde;
344 int mask_sopcde;
345 int bits_dontcare;
346 int mask_dontcare;
347 int bits_code2;
348 int mask_code2;
349 int bits_M;
350 int mask_M;
351 int bits_code;
352 int mask_code;
353 } DSP32ShiftImm;
354
355 #define DSP32ShiftImm_opcode 0xc6800000
356 #define DSP32ShiftImm_src1_bits 0
357 #define DSP32ShiftImm_src1_mask 0x7
358 #define DSP32ShiftImm_immag_bits 3
359 #define DSP32ShiftImm_immag_mask 0x3f
360 #define DSP32ShiftImm_dst0_bits 9
361 #define DSP32ShiftImm_dst0_mask 0x7
362 #define DSP32ShiftImm_HLs_bits 12
363 #define DSP32ShiftImm_HLs_mask 0x3
364 #define DSP32ShiftImm_sop_bits 14
365 #define DSP32ShiftImm_sop_mask 0x3
366 #define DSP32ShiftImm_sopcde_bits 16
367 #define DSP32ShiftImm_sopcde_mask 0x1f
368 #define DSP32ShiftImm_dontcare_bits 21
369 #define DSP32ShiftImm_dontcare_mask 0x3
370 #define DSP32ShiftImm_code2_bits 23
371 #define DSP32ShiftImm_code2_mask 0xf
372 #define DSP32ShiftImm_M_bits 27
373 #define DSP32ShiftImm_M_mask 0x1
374 #define DSP32ShiftImm_code_bits 28
375 #define DSP32ShiftImm_code_mask 0xf
376
377 #define init_DSP32ShiftImm \
378 { \
379 DSP32ShiftImm_opcode, \
380 DSP32ShiftImm_src1_bits, DSP32ShiftImm_src1_mask, \
381 DSP32ShiftImm_immag_bits, DSP32ShiftImm_immag_mask, \
382 DSP32ShiftImm_dst0_bits, DSP32ShiftImm_dst0_mask, \
383 DSP32ShiftImm_HLs_bits, DSP32ShiftImm_HLs_mask, \
384 DSP32ShiftImm_sop_bits, DSP32ShiftImm_sop_mask, \
385 DSP32ShiftImm_sopcde_bits, DSP32ShiftImm_sopcde_mask, \
386 DSP32ShiftImm_dontcare_bits, DSP32ShiftImm_dontcare_mask, \
387 DSP32ShiftImm_code2_bits, DSP32ShiftImm_code2_mask, \
388 DSP32ShiftImm_M_bits, DSP32ShiftImm_M_mask, \
389 DSP32ShiftImm_code_bits, DSP32ShiftImm_code_mask \
390 };
391
392 /* LOAD / STORE */
393
394 /* LDSTidxI
395 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
396 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
397 |.offset........................................................|
398 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
399 */
400
401 typedef struct
402 {
403 unsigned long opcode;
404 int bits_offset;
405 int mask_offset;
406 int bits_reg;
407 int mask_reg;
408 int bits_ptr;
409 int mask_ptr;
410 int bits_sz;
411 int mask_sz;
412 int bits_Z;
413 int mask_Z;
414 int bits_W;
415 int mask_W;
416 int bits_code;
417 int mask_code;
418 } LDSTidxI;
419
420 #define LDSTidxI_opcode 0xe4000000
421 #define LDSTidxI_offset_bits 0
422 #define LDSTidxI_offset_mask 0xffff
423 #define LDSTidxI_reg_bits 16
424 #define LDSTidxI_reg_mask 0x7
425 #define LDSTidxI_ptr_bits 19
426 #define LDSTidxI_ptr_mask 0x7
427 #define LDSTidxI_sz_bits 22
428 #define LDSTidxI_sz_mask 0x3
429 #define LDSTidxI_Z_bits 24
430 #define LDSTidxI_Z_mask 0x1
431 #define LDSTidxI_W_bits 25
432 #define LDSTidxI_W_mask 0x1
433 #define LDSTidxI_code_bits 26
434 #define LDSTidxI_code_mask 0x3f
435
436 #define init_LDSTidxI \
437 { \
438 LDSTidxI_opcode, \
439 LDSTidxI_offset_bits, LDSTidxI_offset_mask, \
440 LDSTidxI_reg_bits, LDSTidxI_reg_mask, \
441 LDSTidxI_ptr_bits, LDSTidxI_ptr_mask, \
442 LDSTidxI_sz_bits, LDSTidxI_sz_mask, \
443 LDSTidxI_Z_bits, LDSTidxI_Z_mask, \
444 LDSTidxI_W_bits, LDSTidxI_W_mask, \
445 LDSTidxI_code_bits, LDSTidxI_code_mask \
446 };
447
448
449 /* LDST
450 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
451 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
452 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
453 */
454
455 typedef struct
456 {
457 unsigned short opcode;
458 int bits_reg;
459 int mask_reg;
460 int bits_ptr;
461 int mask_ptr;
462 int bits_Z;
463 int mask_Z;
464 int bits_aop;
465 int mask_aop;
466 int bits_W;
467 int mask_W;
468 int bits_sz;
469 int mask_sz;
470 int bits_code;
471 int mask_code;
472 } LDST;
473
474 #define LDST_opcode 0x9000
475 #define LDST_reg_bits 0
476 #define LDST_reg_mask 0x7
477 #define LDST_ptr_bits 3
478 #define LDST_ptr_mask 0x7
479 #define LDST_Z_bits 6
480 #define LDST_Z_mask 0x1
481 #define LDST_aop_bits 7
482 #define LDST_aop_mask 0x3
483 #define LDST_W_bits 9
484 #define LDST_W_mask 0x1
485 #define LDST_sz_bits 10
486 #define LDST_sz_mask 0x3
487 #define LDST_code_bits 12
488 #define LDST_code_mask 0xf
489
490 #define init_LDST \
491 { \
492 LDST_opcode, \
493 LDST_reg_bits, LDST_reg_mask, \
494 LDST_ptr_bits, LDST_ptr_mask, \
495 LDST_Z_bits, LDST_Z_mask, \
496 LDST_aop_bits, LDST_aop_mask, \
497 LDST_W_bits, LDST_W_mask, \
498 LDST_sz_bits, LDST_sz_mask, \
499 LDST_code_bits, LDST_code_mask \
500 };
501
502 /* LDSTii
503 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
504 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
505 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
506 */
507
508 typedef struct
509 {
510 unsigned short opcode;
511 int bits_reg;
512 int mask_reg;
513 int bits_ptr;
514 int mask_ptr;
515 int bits_offset;
516 int mask_offset;
517 int bits_op;
518 int mask_op;
519 int bits_W;
520 int mask_W;
521 int bits_code;
522 int mask_code;
523 } LDSTii;
524
525 #define LDSTii_opcode 0xa000
526 #define LDSTii_reg_bit 0
527 #define LDSTii_reg_mask 0x7
528 #define LDSTii_ptr_bit 3
529 #define LDSTii_ptr_mask 0x7
530 #define LDSTii_offset_bit 6
531 #define LDSTii_offset_mask 0xf
532 #define LDSTii_op_bit 10
533 #define LDSTii_op_mask 0x3
534 #define LDSTii_W_bit 12
535 #define LDSTii_W_mask 0x1
536 #define LDSTii_code_bit 13
537 #define LDSTii_code_mask 0x7
538
539 #define init_LDSTii \
540 { \
541 LDSTii_opcode, \
542 LDSTii_reg_bit, LDSTii_reg_mask, \
543 LDSTii_ptr_bit, LDSTii_ptr_mask, \
544 LDSTii_offset_bit, LDSTii_offset_mask, \
545 LDSTii_op_bit, LDSTii_op_mask, \
546 LDSTii_W_bit, LDSTii_W_mask, \
547 LDSTii_code_bit, LDSTii_code_mask \
548 };
549
550
551 /* LDSTiiFP
552 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
553 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
554 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
555 */
556
557 typedef struct
558 {
559 unsigned short opcode;
560 int bits_reg;
561 int mask_reg;
562 int bits_offset;
563 int mask_offset;
564 int bits_W;
565 int mask_W;
566 int bits_code;
567 int mask_code;
568 } LDSTiiFP;
569
570 #define LDSTiiFP_opcode 0xb800
571 #define LDSTiiFP_reg_bits 0
572 #define LDSTiiFP_reg_mask 0xf
573 #define LDSTiiFP_offset_bits 4
574 #define LDSTiiFP_offset_mask 0x1f
575 #define LDSTiiFP_W_bits 9
576 #define LDSTiiFP_W_mask 0x1
577 #define LDSTiiFP_code_bits 10
578 #define LDSTiiFP_code_mask 0x3f
579
580 #define init_LDSTiiFP \
581 { \
582 LDSTiiFP_opcode, \
583 LDSTiiFP_reg_bits, LDSTiiFP_reg_mask, \
584 LDSTiiFP_offset_bits, LDSTiiFP_offset_mask, \
585 LDSTiiFP_W_bits, LDSTiiFP_W_mask, \
586 LDSTiiFP_code_bits, LDSTiiFP_code_mask \
587 };
588
589 /* dspLDST
590 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
591 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
592 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
593 */
594
595 typedef struct
596 {
597 unsigned short opcode;
598 int bits_reg;
599 int mask_reg;
600 int bits_i;
601 int mask_i;
602 int bits_m;
603 int mask_m;
604 int bits_aop;
605 int mask_aop;
606 int bits_W;
607 int mask_W;
608 int bits_code;
609 int mask_code;
610 } DspLDST;
611
612 #define DspLDST_opcode 0x9c00
613 #define DspLDST_reg_bits 0
614 #define DspLDST_reg_mask 0x7
615 #define DspLDST_i_bits 3
616 #define DspLDST_i_mask 0x3
617 #define DspLDST_m_bits 5
618 #define DspLDST_m_mask 0x3
619 #define DspLDST_aop_bits 7
620 #define DspLDST_aop_mask 0x3
621 #define DspLDST_W_bits 9
622 #define DspLDST_W_mask 0x1
623 #define DspLDST_code_bits 10
624 #define DspLDST_code_mask 0x3f
625
626 #define init_DspLDST \
627 { \
628 DspLDST_opcode, \
629 DspLDST_reg_bits, DspLDST_reg_mask, \
630 DspLDST_i_bits, DspLDST_i_mask, \
631 DspLDST_m_bits, DspLDST_m_mask, \
632 DspLDST_aop_bits, DspLDST_aop_mask, \
633 DspLDST_W_bits, DspLDST_W_mask, \
634 DspLDST_code_bits, DspLDST_code_mask \
635 };
636
637
638 /* LDSTpmod
639 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
640 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
641 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
642 */
643
644 typedef struct
645 {
646 unsigned short opcode;
647 int bits_ptr;
648 int mask_ptr;
649 int bits_idx;
650 int mask_idx;
651 int bits_reg;
652 int mask_reg;
653 int bits_aop;
654 int mask_aop;
655 int bits_W;
656 int mask_W;
657 int bits_code;
658 int mask_code;
659 } LDSTpmod;
660
661 #define LDSTpmod_opcode 0x8000
662 #define LDSTpmod_ptr_bits 0
663 #define LDSTpmod_ptr_mask 0x7
664 #define LDSTpmod_idx_bits 3
665 #define LDSTpmod_idx_mask 0x7
666 #define LDSTpmod_reg_bits 6
667 #define LDSTpmod_reg_mask 0x7
668 #define LDSTpmod_aop_bits 9
669 #define LDSTpmod_aop_mask 0x3
670 #define LDSTpmod_W_bits 11
671 #define LDSTpmod_W_mask 0x1
672 #define LDSTpmod_code_bits 12
673 #define LDSTpmod_code_mask 0xf
674
675 #define init_LDSTpmod \
676 { \
677 LDSTpmod_opcode, \
678 LDSTpmod_ptr_bits, LDSTpmod_ptr_mask, \
679 LDSTpmod_idx_bits, LDSTpmod_idx_mask, \
680 LDSTpmod_reg_bits, LDSTpmod_reg_mask, \
681 LDSTpmod_aop_bits, LDSTpmod_aop_mask, \
682 LDSTpmod_W_bits, LDSTpmod_W_mask, \
683 LDSTpmod_code_bits, LDSTpmod_code_mask \
684 };
685
686
687 /* LOGI2op
688 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
689 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
690 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
691 */
692
693 typedef struct
694 {
695 unsigned short opcode;
696 int bits_dst;
697 int mask_dst;
698 int bits_src;
699 int mask_src;
700 int bits_opc;
701 int mask_opc;
702 int bits_code;
703 int mask_code;
704 } LOGI2op;
705
706 #define LOGI2op_opcode 0x4800
707 #define LOGI2op_dst_bits 0
708 #define LOGI2op_dst_mask 0x7
709 #define LOGI2op_src_bits 3
710 #define LOGI2op_src_mask 0x1f
711 #define LOGI2op_opc_bits 8
712 #define LOGI2op_opc_mask 0x7
713 #define LOGI2op_code_bits 11
714 #define LOGI2op_code_mask 0x1f
715
716 #define init_LOGI2op \
717 { \
718 LOGI2op_opcode, \
719 LOGI2op_dst_bits, LOGI2op_dst_mask, \
720 LOGI2op_src_bits, LOGI2op_src_mask, \
721 LOGI2op_opc_bits, LOGI2op_opc_mask, \
722 LOGI2op_code_bits, LOGI2op_code_mask \
723 };
724
725
726 /* ALU2op
727 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
728 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
729 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
730 */
731
732 typedef struct
733 {
734 unsigned short opcode;
735 int bits_dst;
736 int mask_dst;
737 int bits_src;
738 int mask_src;
739 int bits_opc;
740 int mask_opc;
741 int bits_code;
742 int mask_code;
743 } ALU2op;
744
745 #define ALU2op_opcode 0x4000
746 #define ALU2op_dst_bits 0
747 #define ALU2op_dst_mask 0x7
748 #define ALU2op_src_bits 3
749 #define ALU2op_src_mask 0x7
750 #define ALU2op_opc_bits 6
751 #define ALU2op_opc_mask 0xf
752 #define ALU2op_code_bits 10
753 #define ALU2op_code_mask 0x3f
754
755 #define init_ALU2op \
756 { \
757 ALU2op_opcode, \
758 ALU2op_dst_bits, ALU2op_dst_mask, \
759 ALU2op_src_bits, ALU2op_src_mask, \
760 ALU2op_opc_bits, ALU2op_opc_mask, \
761 ALU2op_code_bits, ALU2op_code_mask \
762 };
763
764
765 /* BRCC
766 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
767 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
768 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
769 */
770
771 typedef struct
772 {
773 unsigned short opcode;
774 int bits_offset;
775 int mask_offset;
776 int bits_B;
777 int mask_B;
778 int bits_T;
779 int mask_T;
780 int bits_code;
781 int mask_code;
782 } BRCC;
783
784 #define BRCC_opcode 0x1000
785 #define BRCC_offset_bits 0
786 #define BRCC_offset_mask 0x3ff
787 #define BRCC_B_bits 10
788 #define BRCC_B_mask 0x1
789 #define BRCC_T_bits 11
790 #define BRCC_T_mask 0x1
791 #define BRCC_code_bits 12
792 #define BRCC_code_mask 0xf
793
794 #define init_BRCC \
795 { \
796 BRCC_opcode, \
797 BRCC_offset_bits, BRCC_offset_mask, \
798 BRCC_B_bits, BRCC_B_mask, \
799 BRCC_T_bits, BRCC_T_mask, \
800 BRCC_code_bits, BRCC_code_mask \
801 };
802
803
804 /* UJUMP
805 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
806 | 0 | 0 | 1 | 0 |.offset........................................|
807 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
808 */
809
810 typedef struct
811 {
812 unsigned short opcode;
813 int bits_offset;
814 int mask_offset;
815 int bits_code;
816 int mask_code;
817 } UJump;
818
819 #define UJump_opcode 0x2000
820 #define UJump_offset_bits 0
821 #define UJump_offset_mask 0xfff
822 #define UJump_code_bits 12
823 #define UJump_code_mask 0xf
824
825 #define init_UJump \
826 { \
827 UJump_opcode, \
828 UJump_offset_bits, UJump_offset_mask, \
829 UJump_code_bits, UJump_code_mask \
830 };
831
832
833 /* ProgCtrl
834 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
835 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
836 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
837 */
838
839 typedef struct
840 {
841 unsigned short opcode;
842 int bits_poprnd;
843 int mask_poprnd;
844 int bits_prgfunc;
845 int mask_prgfunc;
846 int bits_code;
847 int mask_code;
848 } ProgCtrl;
849
850 #define ProgCtrl_opcode 0x0000
851 #define ProgCtrl_poprnd_bits 0
852 #define ProgCtrl_poprnd_mask 0xf
853 #define ProgCtrl_prgfunc_bits 4
854 #define ProgCtrl_prgfunc_mask 0xf
855 #define ProgCtrl_code_bits 8
856 #define ProgCtrl_code_mask 0xff
857
858 #define init_ProgCtrl \
859 { \
860 ProgCtrl_opcode, \
861 ProgCtrl_poprnd_bits, ProgCtrl_poprnd_mask, \
862 ProgCtrl_prgfunc_bits, ProgCtrl_prgfunc_mask, \
863 ProgCtrl_code_bits, ProgCtrl_code_mask \
864 };
865
866 /* CALLa
867 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
868 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
869 |.lsw...........................................................|
870 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
871 */
872
873
874 typedef struct
875 {
876 unsigned long opcode;
877 int bits_addr;
878 int mask_addr;
879 int bits_S;
880 int mask_S;
881 int bits_code;
882 int mask_code;
883 } CALLa;
884
885 #define CALLa_opcode 0xe2000000
886 #define CALLa_addr_bits 0
887 #define CALLa_addr_mask 0xffffff
888 #define CALLa_S_bits 24
889 #define CALLa_S_mask 0x1
890 #define CALLa_code_bits 25
891 #define CALLa_code_mask 0x7f
892
893 #define init_CALLa \
894 { \
895 CALLa_opcode, \
896 CALLa_addr_bits, CALLa_addr_mask, \
897 CALLa_S_bits, CALLa_S_mask, \
898 CALLa_code_bits, CALLa_code_mask \
899 };
900
901
902 /* pseudoDEBUG
903 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
904 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
905 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
906 */
907
908 typedef struct
909 {
910 unsigned short opcode;
911 int bits_reg;
912 int mask_reg;
913 int bits_grp;
914 int mask_grp;
915 int bits_fn;
916 int mask_fn;
917 int bits_code;
918 int mask_code;
919 } PseudoDbg;
920
921 #define PseudoDbg_opcode 0xf800
922 #define PseudoDbg_reg_bits 0
923 #define PseudoDbg_reg_mask 0x7
924 #define PseudoDbg_grp_bits 3
925 #define PseudoDbg_grp_mask 0x7
926 #define PseudoDbg_fn_bits 6
927 #define PseudoDbg_fn_mask 0x3
928 #define PseudoDbg_code_bits 8
929 #define PseudoDbg_code_mask 0xff
930
931 #define init_PseudoDbg \
932 { \
933 PseudoDbg_opcode, \
934 PseudoDbg_reg_bits, PseudoDbg_reg_mask, \
935 PseudoDbg_grp_bits, PseudoDbg_grp_mask, \
936 PseudoDbg_fn_bits, PseudoDbg_fn_mask, \
937 PseudoDbg_code_bits, PseudoDbg_code_mask \
938 };
939
940 /* PseudoDbg_assert
941 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
942 | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
943 |.expected......................................................|
944 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
945 */
946
947 typedef struct
948 {
949 unsigned long opcode;
950 int bits_expected;
951 int mask_expected;
952 int bits_regtest;
953 int mask_regtest;
954 int bits_dbgop;
955 int mask_dbgop;
956 int bits_dontcare;
957 int mask_dontcare;
958 int bits_code;
959 int mask_code;
960 } PseudoDbg_Assert;
961
962 #define PseudoDbg_Assert_opcode 0xf0000000
963 #define PseudoDbg_Assert_expected_bits 0
964 #define PseudoDbg_Assert_expected_mask 0xffff
965 #define PseudoDbg_Assert_regtest_bits 16
966 #define PseudoDbg_Assert_regtest_mask 0x7
967 #define PseudoDbg_Assert_dbgop_bits 19
968 #define PseudoDbg_Assert_dbgop_mask 0x7
969 #define PseudoDbg_Assert_dontcare_bits 22
970 #define PseudoDbg_Assert_dontcare_mask 0x1f
971 #define PseudoDbg_Assert_code_bits 27
972 #define PseudoDbg_Assert_code_mask 0x1f
973
974 #define init_PseudoDbg_Assert \
975 { \
976 PseudoDbg_Assert_opcode, \
977 PseudoDbg_Assert_expected_bits, PseudoDbg_Assert_expected_mask, \
978 PseudoDbg_Assert_regtest_bits, PseudoDbg_Assert_regtest_mask, \
979 PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, \
980 PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask, \
981 PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \
982 };
983
984 /* CaCTRL
985 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
986 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
987 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
988 */
989
990 typedef struct
991 {
992 unsigned short opcode;
993 int bits_reg;
994 int mask_reg;
995 int bits_op;
996 int mask_op;
997 int bits_a;
998 int mask_a;
999 int bits_code;
1000 int mask_code;
1001 } CaCTRL;
1002
1003 #define CaCTRL_opcode 0x0240
1004 #define CaCTRL_reg_bits 0
1005 #define CaCTRL_reg_mask 0x7
1006 #define CaCTRL_op_bits 3
1007 #define CaCTRL_op_mask 0x3
1008 #define CaCTRL_a_bits 5
1009 #define CaCTRL_a_mask 0x1
1010 #define CaCTRL_code_bits 6
1011 #define CaCTRL_code_mask 0x3fff
1012
1013 #define init_CaCTRL \
1014 { \
1015 CaCTRL_opcode, \
1016 CaCTRL_reg_bits, CaCTRL_reg_mask, \
1017 CaCTRL_op_bits, CaCTRL_op_mask, \
1018 CaCTRL_a_bits, CaCTRL_a_mask, \
1019 CaCTRL_code_bits, CaCTRL_code_mask \
1020 };
1021
1022 /* PushPopMultiple
1023 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1024 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
1025 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1026 */
1027
1028 typedef struct
1029 {
1030 unsigned short opcode;
1031 int bits_pr;
1032 int mask_pr;
1033 int bits_dr;
1034 int mask_dr;
1035 int bits_W;
1036 int mask_W;
1037 int bits_p;
1038 int mask_p;
1039 int bits_d;
1040 int mask_d;
1041 int bits_code;
1042 int mask_code;
1043 } PushPopMultiple;
1044
1045 #define PushPopMultiple_opcode 0x0400
1046 #define PushPopMultiple_pr_bits 0
1047 #define PushPopMultiple_pr_mask 0x7
1048 #define PushPopMultiple_dr_bits 3
1049 #define PushPopMultiple_dr_mask 0x7
1050 #define PushPopMultiple_W_bits 6
1051 #define PushPopMultiple_W_mask 0x1
1052 #define PushPopMultiple_p_bits 7
1053 #define PushPopMultiple_p_mask 0x1
1054 #define PushPopMultiple_d_bits 8
1055 #define PushPopMultiple_d_mask 0x1
1056 #define PushPopMultiple_code_bits 8
1057 #define PushPopMultiple_code_mask 0x1
1058
1059 #define init_PushPopMultiple \
1060 { \
1061 PushPopMultiple_opcode, \
1062 PushPopMultiple_pr_bits, PushPopMultiple_pr_mask, \
1063 PushPopMultiple_dr_bits, PushPopMultiple_dr_mask, \
1064 PushPopMultiple_W_bits, PushPopMultiple_W_mask, \
1065 PushPopMultiple_p_bits, PushPopMultiple_p_mask, \
1066 PushPopMultiple_d_bits, PushPopMultiple_d_mask, \
1067 PushPopMultiple_code_bits, PushPopMultiple_code_mask \
1068 };
1069
1070 /* PushPopReg
1071 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
1073 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1074 */
1075
1076 typedef struct
1077 {
1078 unsigned short opcode;
1079 int bits_reg;
1080 int mask_reg;
1081 int bits_grp;
1082 int mask_grp;
1083 int bits_W;
1084 int mask_W;
1085 int bits_code;
1086 int mask_code;
1087 } PushPopReg;
1088
1089 #define PushPopReg_opcode 0x0100
1090 #define PushPopReg_reg_bits 0
1091 #define PushPopReg_reg_mask 0x7
1092 #define PushPopReg_grp_bits 3
1093 #define PushPopReg_grp_mask 0x7
1094 #define PushPopReg_W_bits 6
1095 #define PushPopReg_W_mask 0x1
1096 #define PushPopReg_code_bits 7
1097 #define PushPopReg_code_mask 0x1ff
1098
1099 #define init_PushPopReg \
1100 { \
1101 PushPopReg_opcode, \
1102 PushPopReg_reg_bits, PushPopReg_reg_mask, \
1103 PushPopReg_grp_bits, PushPopReg_grp_mask, \
1104 PushPopReg_W_bits, PushPopReg_W_mask, \
1105 PushPopReg_code_bits, PushPopReg_code_mask, \
1106 };
1107
1108 /* linkage
1109 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1110 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
1111 |.framesize.....................................................|
1112 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1113 */
1114
1115 typedef struct
1116 {
1117 unsigned long opcode;
1118 int bits_framesize;
1119 int mask_framesize;
1120 int bits_R;
1121 int mask_R;
1122 int bits_code;
1123 int mask_code;
1124 } Linkage;
1125
1126 #define Linkage_opcode 0xe8000000
1127 #define Linkage_framesize_bits 0
1128 #define Linkage_framesize_mask 0xffff
1129 #define Linkage_R_bits 16
1130 #define Linkage_R_mask 0x1
1131 #define Linkage_code_bits 17
1132 #define Linkage_code_mask 0x7fff
1133
1134 #define init_Linkage \
1135 { \
1136 Linkage_opcode, \
1137 Linkage_framesize_bits, Linkage_framesize_mask, \
1138 Linkage_R_bits, Linkage_R_mask, \
1139 Linkage_code_bits, Linkage_code_mask \
1140 };
1141
1142 /* LoopSetup
1143 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1144 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
1145 |.reg...........| - | - |.eoffset...............................|
1146 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1147 */
1148
1149 typedef struct
1150 {
1151 unsigned long opcode;
1152 int bits_eoffset;
1153 int mask_eoffset;
1154 int bits_dontcare;
1155 int mask_dontcare;
1156 int bits_reg;
1157 int mask_reg;
1158 int bits_soffset;
1159 int mask_soffset;
1160 int bits_c;
1161 int mask_c;
1162 int bits_rop;
1163 int mask_rop;
1164 int bits_code;
1165 int mask_code;
1166 } LoopSetup;
1167
1168 #define LoopSetup_opcode 0xe0800000
1169 #define LoopSetup_eoffset_bits 0
1170 #define LoopSetup_eoffset_mask 0x3ff
1171 #define LoopSetup_dontcare_bits 10
1172 #define LoopSetup_dontcare_mask 0x3
1173 #define LoopSetup_reg_bits 12
1174 #define LoopSetup_reg_mask 0xf
1175 #define LoopSetup_soffset_bits 16
1176 #define LoopSetup_soffset_mask 0xf
1177 #define LoopSetup_c_bits 20
1178 #define LoopSetup_c_mask 0x1
1179 #define LoopSetup_rop_bits 21
1180 #define LoopSetup_rop_mask 0x3
1181 #define LoopSetup_code_bits 23
1182 #define LoopSetup_code_mask 0x1ff
1183
1184 #define init_LoopSetup \
1185 { \
1186 LoopSetup_opcode, \
1187 LoopSetup_eoffset_bits, LoopSetup_eoffset_mask, \
1188 LoopSetup_dontcare_bits, LoopSetup_dontcare_mask, \
1189 LoopSetup_reg_bits, LoopSetup_reg_mask, \
1190 LoopSetup_soffset_bits, LoopSetup_soffset_mask, \
1191 LoopSetup_c_bits, LoopSetup_c_mask, \
1192 LoopSetup_rop_bits, LoopSetup_rop_mask, \
1193 LoopSetup_code_bits, LoopSetup_code_mask \
1194 };
1195
1196 /* LDIMMhalf
1197 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1198 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
1199 |.hword.........................................................|
1200 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1201 */
1202
1203 typedef struct
1204 {
1205 unsigned long opcode;
1206 int bits_hword;
1207 int mask_hword;
1208 int bits_reg;
1209 int mask_reg;
1210 int bits_grp;
1211 int mask_grp;
1212 int bits_S;
1213 int mask_S;
1214 int bits_H;
1215 int mask_H;
1216 int bits_Z;
1217 int mask_Z;
1218 int bits_code;
1219 int mask_code;
1220 } LDIMMhalf;
1221
1222 #define LDIMMhalf_opcode 0xe1000000
1223 #define LDIMMhalf_hword_bits 0
1224 #define LDIMMhalf_hword_mask 0xffff
1225 #define LDIMMhalf_reg_bits 16
1226 #define LDIMMhalf_reg_mask 0x7
1227 #define LDIMMhalf_grp_bits 19
1228 #define LDIMMhalf_grp_mask 0x3
1229 #define LDIMMhalf_S_bits 21
1230 #define LDIMMhalf_S_mask 0x1
1231 #define LDIMMhalf_H_bits 22
1232 #define LDIMMhalf_H_mask 0x1
1233 #define LDIMMhalf_Z_bits 23
1234 #define LDIMMhalf_Z_mask 0x1
1235 #define LDIMMhalf_code_bits 24
1236 #define LDIMMhalf_code_mask 0xff
1237
1238 #define init_LDIMMhalf \
1239 { \
1240 LDIMMhalf_opcode, \
1241 LDIMMhalf_hword_bits, LDIMMhalf_hword_mask, \
1242 LDIMMhalf_reg_bits, LDIMMhalf_reg_mask, \
1243 LDIMMhalf_grp_bits, LDIMMhalf_grp_mask, \
1244 LDIMMhalf_S_bits, LDIMMhalf_S_mask, \
1245 LDIMMhalf_H_bits, LDIMMhalf_H_mask, \
1246 LDIMMhalf_Z_bits, LDIMMhalf_Z_mask, \
1247 LDIMMhalf_code_bits, LDIMMhalf_code_mask \
1248 };
1249
1250
1251 /* CC2dreg
1252 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1253 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1254 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1255 */
1256
1257 typedef struct
1258 {
1259 unsigned short opcode;
1260 int bits_reg;
1261 int mask_reg;
1262 int bits_op;
1263 int mask_op;
1264 int bits_code;
1265 int mask_code;
1266 } CC2dreg;
1267
1268 #define CC2dreg_opcode 0x0200
1269 #define CC2dreg_reg_bits 0
1270 #define CC2dreg_reg_mask 0x7
1271 #define CC2dreg_op_bits 3
1272 #define CC2dreg_op_mask 0x3
1273 #define CC2dreg_code_bits 5
1274 #define CC2dreg_code_mask 0x7fff
1275
1276 #define init_CC2dreg \
1277 { \
1278 CC2dreg_opcode, \
1279 CC2dreg_reg_bits, CC2dreg_reg_mask, \
1280 CC2dreg_op_bits, CC2dreg_op_mask, \
1281 CC2dreg_code_bits, CC2dreg_code_mask \
1282 };
1283
1284
1285 /* PTR2op
1286 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1287 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1288 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1289 */
1290
1291 typedef struct
1292 {
1293 unsigned short opcode;
1294 int bits_dst;
1295 int mask_dst;
1296 int bits_src;
1297 int mask_src;
1298 int bits_opc;
1299 int mask_opc;
1300 int bits_code;
1301 int mask_code;
1302 } PTR2op;
1303
1304 #define PTR2op_opcode 0x4400
1305 #define PTR2op_dst_bits 0
1306 #define PTR2op_dst_mask 0x7
1307 #define PTR2op_src_bits 3
1308 #define PTR2op_src_mask 0x7
1309 #define PTR2op_opc_bits 6
1310 #define PTR2op_opc_mask 0x7
1311 #define PTR2op_code_bits 9
1312 #define PTR2op_code_mask 0x7f
1313
1314 #define init_PTR2op \
1315 { \
1316 PTR2op_opcode, \
1317 PTR2op_dst_bits, PTR2op_dst_mask, \
1318 PTR2op_src_bits, PTR2op_src_mask, \
1319 PTR2op_opc_bits, PTR2op_opc_mask, \
1320 PTR2op_code_bits, PTR2op_code_mask \
1321 };
1322
1323
1324 /* COMP3op
1325 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1326 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1327 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1328 */
1329
1330 typedef struct
1331 {
1332 unsigned short opcode;
1333 int bits_src0;
1334 int mask_src0;
1335 int bits_src1;
1336 int mask_src1;
1337 int bits_dst;
1338 int mask_dst;
1339 int bits_opc;
1340 int mask_opc;
1341 int bits_code;
1342 int mask_code;
1343 } COMP3op;
1344
1345 #define COMP3op_opcode 0x5000
1346 #define COMP3op_src0_bits 0
1347 #define COMP3op_src0_mask 0x7
1348 #define COMP3op_src1_bits 3
1349 #define COMP3op_src1_mask 0x7
1350 #define COMP3op_dst_bits 6
1351 #define COMP3op_dst_mask 0x7
1352 #define COMP3op_opc_bits 9
1353 #define COMP3op_opc_mask 0x7
1354 #define COMP3op_code_bits 12
1355 #define COMP3op_code_mask 0xf
1356
1357 #define init_COMP3op \
1358 { \
1359 COMP3op_opcode, \
1360 COMP3op_src0_bits, COMP3op_src0_mask, \
1361 COMP3op_src1_bits, COMP3op_src1_mask, \
1362 COMP3op_dst_bits, COMP3op_dst_mask, \
1363 COMP3op_opc_bits, COMP3op_opc_mask, \
1364 COMP3op_code_bits, COMP3op_code_mask \
1365 };
1366
1367 /* ccMV
1368 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1369 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
1370 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1371 */
1372
1373 typedef struct
1374 {
1375 unsigned short opcode;
1376 int bits_src;
1377 int mask_src;
1378 int bits_dst;
1379 int mask_dst;
1380 int bits_s;
1381 int mask_s;
1382 int bits_d;
1383 int mask_d;
1384 int bits_T;
1385 int mask_T;
1386 int bits_code;
1387 int mask_code;
1388 } CCmv;
1389
1390 #define CCmv_opcode 0x0600
1391 #define CCmv_src_bits 0
1392 #define CCmv_src_mask 0x7
1393 #define CCmv_dst_bits 3
1394 #define CCmv_dst_mask 0x7
1395 #define CCmv_s_bits 6
1396 #define CCmv_s_mask 0x1
1397 #define CCmv_d_bits 7
1398 #define CCmv_d_mask 0x1
1399 #define CCmv_T_bits 8
1400 #define CCmv_T_mask 0x1
1401 #define CCmv_code_bits 9
1402 #define CCmv_code_mask 0x7f
1403
1404 #define init_CCmv \
1405 { \
1406 CCmv_opcode, \
1407 CCmv_src_bits, CCmv_src_mask, \
1408 CCmv_dst_bits, CCmv_dst_mask, \
1409 CCmv_s_bits, CCmv_s_mask, \
1410 CCmv_d_bits, CCmv_d_mask, \
1411 CCmv_T_bits, CCmv_T_mask, \
1412 CCmv_code_bits, CCmv_code_mask \
1413 };
1414
1415
1416 /* CCflag
1417 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1418 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
1419 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1420 */
1421
1422 typedef struct
1423 {
1424 unsigned short opcode;
1425 int bits_x;
1426 int mask_x;
1427 int bits_y;
1428 int mask_y;
1429 int bits_G;
1430 int mask_G;
1431 int bits_opc;
1432 int mask_opc;
1433 int bits_I;
1434 int mask_I;
1435 int bits_code;
1436 int mask_code;
1437 } CCflag;
1438
1439 #define CCflag_opcode 0x0800
1440 #define CCflag_x_bits 0
1441 #define CCflag_x_mask 0x7
1442 #define CCflag_y_bits 3
1443 #define CCflag_y_mask 0x7
1444 #define CCflag_G_bits 6
1445 #define CCflag_G_mask 0x1
1446 #define CCflag_opc_bits 7
1447 #define CCflag_opc_mask 0x7
1448 #define CCflag_I_bits 10
1449 #define CCflag_I_mask 0x1
1450 #define CCflag_code_bits 11
1451 #define CCflag_code_mask 0x1f
1452
1453 #define init_CCflag \
1454 { \
1455 CCflag_opcode, \
1456 CCflag_x_bits, CCflag_x_mask, \
1457 CCflag_y_bits, CCflag_y_mask, \
1458 CCflag_G_bits, CCflag_G_mask, \
1459 CCflag_opc_bits, CCflag_opc_mask, \
1460 CCflag_I_bits, CCflag_I_mask, \
1461 CCflag_code_bits, CCflag_code_mask, \
1462 };
1463
1464
1465 /* CC2stat
1466 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1467 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1468 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1469 */
1470
1471 typedef struct
1472 {
1473 unsigned short opcode;
1474 int bits_cbit;
1475 int mask_cbit;
1476 int bits_op;
1477 int mask_op;
1478 int bits_D;
1479 int mask_D;
1480 int bits_code;
1481 int mask_code;
1482 } CC2stat;
1483
1484 #define CC2stat_opcode 0x0300
1485 #define CC2stat_cbit_bits 0
1486 #define CC2stat_cbit_mask 0x1f
1487 #define CC2stat_op_bits 5
1488 #define CC2stat_op_mask 0x3
1489 #define CC2stat_D_bits 7
1490 #define CC2stat_D_mask 0x1
1491 #define CC2stat_code_bits 8
1492 #define CC2stat_code_mask 0xff
1493
1494 #define init_CC2stat \
1495 { \
1496 CC2stat_opcode, \
1497 CC2stat_cbit_bits, CC2stat_cbit_mask, \
1498 CC2stat_op_bits, CC2stat_op_mask, \
1499 CC2stat_D_bits, CC2stat_D_mask, \
1500 CC2stat_code_bits, CC2stat_code_mask \
1501 };
1502
1503
1504 /* REGMV
1505 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1506 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1507 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1508 */
1509
1510 typedef struct
1511 {
1512 unsigned short opcode;
1513 int bits_src;
1514 int mask_src;
1515 int bits_dst;
1516 int mask_dst;
1517 int bits_gs;
1518 int mask_gs;
1519 int bits_gd;
1520 int mask_gd;
1521 int bits_code;
1522 int mask_code;
1523 } RegMv;
1524
1525 #define RegMv_opcode 0x3000
1526 #define RegMv_src_bits 0
1527 #define RegMv_src_mask 0x7
1528 #define RegMv_dst_bits 3
1529 #define RegMv_dst_mask 0x7
1530 #define RegMv_gs_bits 6
1531 #define RegMv_gs_mask 0x7
1532 #define RegMv_gd_bits 9
1533 #define RegMv_gd_mask 0x7
1534 #define RegMv_code_bits 12
1535 #define RegMv_code_mask 0xf
1536
1537 #define init_RegMv \
1538 { \
1539 RegMv_opcode, \
1540 RegMv_src_bits, RegMv_src_mask, \
1541 RegMv_dst_bits, RegMv_dst_mask, \
1542 RegMv_gs_bits, RegMv_gs_mask, \
1543 RegMv_gd_bits, RegMv_gd_mask, \
1544 RegMv_code_bits, RegMv_code_mask \
1545 };
1546
1547
1548 /* COMPI2opD
1549 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1550 | 0 | 1 | 1 | 0 | 0 |.op|.isrc......................|.dst.......|
1551 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1552 */
1553
1554 typedef struct
1555 {
1556 unsigned short opcode;
1557 int bits_dst;
1558 int mask_dst;
1559 int bits_src;
1560 int mask_src;
1561 int bits_op;
1562 int mask_op;
1563 int bits_code;
1564 int mask_code;
1565 } COMPI2opD;
1566
1567 #define COMPI2opD_opcode 0x6000
1568 #define COMPI2opD_dst_bits 0
1569 #define COMPI2opD_dst_mask 0x7
1570 #define COMPI2opD_src_bits 3
1571 #define COMPI2opD_src_mask 0x7f
1572 #define COMPI2opD_op_bits 10
1573 #define COMPI2opD_op_mask 0x1
1574 #define COMPI2opD_code_bits 11
1575 #define COMPI2opD_code_mask 0x1f
1576
1577 #define init_COMPI2opD \
1578 { \
1579 COMPI2opD_opcode, \
1580 COMPI2opD_dst_bits, COMPI2opD_dst_mask, \
1581 COMPI2opD_src_bits, COMPI2opD_src_mask, \
1582 COMPI2opD_op_bits, COMPI2opD_op_mask, \
1583 COMPI2opD_code_bits, COMPI2opD_code_mask \
1584 };
1585
1586 /* COMPI2opP
1587 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1588 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1589 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1590 */
1591
1592 typedef COMPI2opD COMPI2opP;
1593
1594 #define COMPI2opP_opcode 0x6800
1595 #define COMPI2opP_dst_bits 0
1596 #define COMPI2opP_dst_mask 0x7
1597 #define COMPI2opP_src_bits 3
1598 #define COMPI2opP_src_mask 0x7f
1599 #define COMPI2opP_op_bits 10
1600 #define COMPI2opP_op_mask 0x1
1601 #define COMPI2opP_code_bits 11
1602 #define COMPI2opP_code_mask 0x1f
1603
1604 #define init_COMPI2opP \
1605 { \
1606 COMPI2opP_opcode, \
1607 COMPI2opP_dst_bits, COMPI2opP_dst_mask, \
1608 COMPI2opP_src_bits, COMPI2opP_src_mask, \
1609 COMPI2opP_op_bits, COMPI2opP_op_mask, \
1610 COMPI2opP_code_bits, COMPI2opP_code_mask \
1611 };
1612
1613
1614 /* dagMODim
1615 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1616 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
1617 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1618 */
1619
1620 typedef struct
1621 {
1622 unsigned short opcode;
1623 int bits_i;
1624 int mask_i;
1625 int bits_m;
1626 int mask_m;
1627 int bits_op;
1628 int mask_op;
1629 int bits_code2;
1630 int mask_code2;
1631 int bits_br;
1632 int mask_br;
1633 int bits_code;
1634 int mask_code;
1635 } DagMODim;
1636
1637 #define DagMODim_opcode 0x9e60
1638 #define DagMODim_i_bits 0
1639 #define DagMODim_i_mask 0x3
1640 #define DagMODim_m_bits 2
1641 #define DagMODim_m_mask 0x3
1642 #define DagMODim_op_bits 4
1643 #define DagMODim_op_mask 0x1
1644 #define DagMODim_code2_bits 5
1645 #define DagMODim_code2_mask 0x3
1646 #define DagMODim_br_bits 7
1647 #define DagMODim_br_mask 0x1
1648 #define DagMODim_code_bits 8
1649 #define DagMODim_code_mask 0xff
1650
1651 #define init_DagMODim \
1652 { \
1653 DagMODim_opcode, \
1654 DagMODim_i_bits, DagMODim_i_mask, \
1655 DagMODim_m_bits, DagMODim_m_mask, \
1656 DagMODim_op_bits, DagMODim_op_mask, \
1657 DagMODim_code2_bits, DagMODim_code2_mask, \
1658 DagMODim_br_bits, DagMODim_br_mask, \
1659 DagMODim_code_bits, DagMODim_code_mask \
1660 };
1661
1662 /* dagMODik
1663 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1664 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
1665 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1666 */
1667
1668 typedef struct
1669 {
1670 unsigned short opcode;
1671 int bits_i;
1672 int mask_i;
1673 int bits_op;
1674 int mask_op;
1675 int bits_code;
1676 int mask_code;
1677 } DagMODik;
1678
1679 #define DagMODik_opcode 0x9f60
1680 #define DagMODik_i_bits 0
1681 #define DagMODik_i_mask 0x3
1682 #define DagMODik_op_bits 2
1683 #define DagMODik_op_mask 0x3
1684 #define DagMODik_code_bits 3
1685 #define DagMODik_code_mask 0xfff
1686
1687 #define init_DagMODik \
1688 { \
1689 DagMODik_opcode, \
1690 DagMODik_i_bits, DagMODik_i_mask, \
1691 DagMODik_op_bits, DagMODik_op_mask, \
1692 DagMODik_code_bits, DagMODik_code_mask \
1693 };
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