| blob | e39501622822de5371793e1d50ddab4e249cee2c |
1 2006-08-12 Thiemo Seufer <ths@networkno.de>
3 * config/tc-mips.c (mips16_ip): Fix argument register handling
4 for restore instruction.
6 2006-08-08 Bob Wilson <bob.wilson@acm.org>
8 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
9 (out_sleb128): New.
10 (out_fixed_inc_line_addr): New.
11 (process_entries): Use out_fixed_inc_line_addr when
12 DWARF2_USE_FIXED_ADVANCE_PC is set.
13 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
15 2006-08-08 DJ Delorie <dj@redhat.com>
17 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
18 vs full symbols so that we never have more than one pointer value
19 for any given symbol in our symbol table.
21 2006-08-08 Sterling Augustine <sterling@tensilica.com>
23 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
24 and emit DW_AT_ranges when code in compilation unit is not
25 contiguous.
26 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
27 is not contiguous.
28 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
29 (out_debug_ranges): New function to emit .debug_ranges section
30 when code is not contiguous.
32 2006-08-08 Nick Clifton <nickc@redhat.com>
34 * config/tc-arm.c (WARN_DEPRECATED): Enable.
36 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
38 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
39 only block.
40 (pe_directive_secrel) [TE_PE]: New function.
41 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
42 loc, loc_mark_labels.
43 [TE_PE]: Handle secrel32.
44 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
45 call.
46 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
47 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
48 (md_section_align): Only round section sizes here for AOUT
49 targets.
50 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
51 (tc_pe_dwarf2_emit_offset): New function.
52 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
53 (cons_fix_new_arm): Handle O_secrel.
54 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
55 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
56 of OBJ_ELF only block.
57 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
58 tc_pe_dwarf2_emit_offset.
60 2006-08-04 Richard Sandiford <richard@codesourcery.com>
62 * config/tc-sh.c (apply_full_field_fix): New function.
63 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
64 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
65 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
66 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
68 2006-08-03 Nick Clifton <nickc@redhat.com>
70 PR gas/2991
71 * config.in: Regenerate.
73 2006-08-03 Joseph Myers <joseph@codesourcery.com>
75 * config/tc-arm.c (parse_operands): Handle invalid register name
76 for OP_RIWR_RIWC.
78 2006-08-03 Joseph Myers <joseph@codesourcery.com>
80 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
81 (parse_operands): Handle it.
82 (insns): Use it for tmcr and tmrc.
84 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
86 PR binutils/2983
87 * config/tc-i386.c (md_parse_option): Treat any target starting
88 with elf64_x86_64 as a viable target for the -64 switch.
89 (i386_target_format): For 64-bit ELF flavoured output use
90 ELF_TARGET_FORMAT64.
91 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
93 2006-08-02 Nick Clifton <nickc@redhat.com>
95 PR gas/2991
96 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
97 bfd/aclocal.m4.
98 * configure.in: Run BFD_BINARY_FOPEN.
99 * configure: Regenerate.
100 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
101 file to include.
103 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
105 * config/tc-i386.c (md_assemble): Don't update
106 cpu_arch_isa_flags.
108 2006-08-01 Thiemo Seufer <ths@mips.com>
110 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
112 2006-08-01 Thiemo Seufer <ths@mips.com>
114 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
115 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
116 BFD_RELOC_32 and BFD_RELOC_16.
117 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
118 md_convert_frag, md_obj_end): Fix comment formatting.
120 2006-07-31 Thiemo Seufer <ths@mips.com>
122 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
123 handling for BFD_RELOC_MIPS16_JMP.
125 2006-07-24 Andreas Schwab <schwab@suse.de>
127 PR/2756
128 * read.c (read_a_source_file): Ignore unknown text after line
129 comment character. Fix misleading comment.
131 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
133 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
134 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
135 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
136 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
137 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
138 doc/c-z80.texi, doc/internals.texi: Fix some typos.
140 2006-07-21 Nick Clifton <nickc@redhat.com>
142 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
143 linker testsuite.
145 2006-07-20 Thiemo Seufer <ths@mips.com>
146 Nigel Stephens <nigel@mips.com>
148 * config/tc-mips.c (md_parse_option): Don't infer optimisation
149 options from debug options.
151 2006-07-20 Thiemo Seufer <ths@mips.com>
153 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
154 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
156 2006-07-19 Paul Brook <paul@codesourcery.com>
158 * config/tc-arm.c (insns): Fix rbit Arm opcode.
160 2006-07-18 Paul Brook <paul@codesourcery.com>
162 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
163 (md_convert_frag): Use correct reloc for add_pc. Use
164 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
165 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
166 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
168 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
170 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
171 when file and line unknown.
173 2006-07-17 Thiemo Seufer <ths@mips.com>
175 * read.c (s_struct): Use IS_ELF.
176 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
177 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
178 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
179 s_mips_mask): Likewise.
181 2006-07-16 Thiemo Seufer <ths@mips.com>
182 David Ung <davidu@mips.com>
184 * read.c (s_struct): Handle ELF section changing.
185 * config/tc-mips.c (s_align): Leave enabling auto-align to the
186 generic code.
187 (s_change_sec): Try section changing only if we output ELF.
189 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
191 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
192 CpuAmdFam10.
193 (smallest_imm_type): Remove Cpu086.
194 (i386_target_format): Likewise.
196 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
197 Update CpuXXX.
199 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
200 Michael Meissner <michael.meissner@amd.com>
202 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
203 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
204 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
205 architecture.
206 (i386_align_code): Ditto.
207 (md_assemble_code): Add support for insertq/extrq instructions,
208 swapping as needed for intel syntax.
209 (swap_imm_operands): New function to swap immediate operands.
210 (swap_operands): Deal with 4 operand instructions.
211 (build_modrm_byte): Add support for insertq instruction.
213 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
215 * config/tc-i386.h (Size64): Fix a typo in comment.
217 2006-07-12 Nick Clifton <nickc@redhat.com>
219 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
220 fixup_segment() to repeat a range check on a value that has
221 already been checked here.
223 2006-07-07 James E Wilson <wilson@specifix.com>
225 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
227 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
228 Nick Clifton <nickc@redhat.com>
230 PR binutils/2877
231 * doc/as.texi: Fix spelling typo: branchs => branches.
232 * doc/c-m68hc11.texi: Likewise.
233 * config/tc-m68hc11.c: Likewise.
234 Support old spelling of command line switch for backwards
235 compatibility.
237 2006-07-04 Thiemo Seufer <ths@mips.com>
238 David Ung <davidu@mips.com>
240 * config/tc-mips.c (s_is_linkonce): New function.
241 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
242 weak, external, and linkonce symbols.
243 (pic_need_relax): Use s_is_linkonce.
245 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
247 * doc/as.texinfo (Org): Remove space.
248 (P2align): Add "@var{abs-expr},".
250 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
252 * config/tc-i386.c (cpu_arch_tune_set): New.
253 (cpu_arch_isa): Likewise.
254 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
255 nops with short or long nop sequences based on -march=/.arch
256 and -mtune=.
257 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
258 set cpu_arch_tune and cpu_arch_tune_flags.
259 (md_parse_option): For -march=, set cpu_arch_isa and set
260 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
261 0. Set cpu_arch_tune_set to 1 for -mtune=.
262 (i386_target_format): Don't set cpu_arch_tune.
264 2006-06-23 Nigel Stephens <nigel@mips.com>
266 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
267 generated .sbss.* and .gnu.linkonce.sb.*.
269 2006-06-23 Thiemo Seufer <ths@mips.com>
270 David Ung <davidu@mips.com>
272 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
273 label_list.
274 * config/tc-mips.c (label_list): Define per-segment label_list.
275 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
276 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
277 mips_from_file_after_relocs, mips_define_label): Use per-segment
278 label_list.
280 2006-06-22 Thiemo Seufer <ths@mips.com>
282 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
283 (append_insn): Use it.
284 (md_apply_fix): Whitespace formatting.
285 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
286 mips16_extended_frag): Remove register specifier.
287 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
288 constants.
290 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
292 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
293 a directive saving VFP registers for ARMv6 or later.
294 (s_arm_unwind_save): Add parameter arch_v6 and call
295 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
296 appropriate.
297 (md_pseudo_table): Add entry for new "vsave" directive.
298 * doc/c-arm.texi: Correct error in example for "save"
299 directive (fstmdf -> fstmdx). Also document "vsave" directive.
301 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
302 Anatoly Sokolov <aesok@post.ru>
304 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
305 and atmega644p devices. Rename atmega164/atmega324 devices to
306 atmega164p/atmega324p.
307 * doc/c-avr.texi: Document new mcu and arch options.
309 2006-06-17 Nick Clifton <nickc@redhat.com>
311 * config/tc-arm.c (enum parse_operand_result): Move outside of
312 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
314 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
316 * config/tc-i386.h (processor_type): New.
317 (arch_entry): Add type.
319 * config/tc-i386.c (cpu_arch_tune): New.
320 (cpu_arch_tune_flags): Likewise.
321 (cpu_arch_isa_flags): Likewise.
322 (cpu_arch): Updated.
323 (set_cpu_arch): Also update cpu_arch_isa_flags.
324 (md_assemble): Update cpu_arch_isa_flags.
325 (OPTION_MARCH): New.
326 (OPTION_MTUNE): Likewise.
327 (md_longopts): Add -march= and -mtune=.
328 (md_parse_option): Support -march= and -mtune=.
329 (md_show_usage): Add -march=CPU/-mtune=CPU.
330 (i386_target_format): Also update cpu_arch_isa_flags,
331 cpu_arch_tune and cpu_arch_tune_flags.
333 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
335 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
337 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
339 * config/tc-arm.c (enum parse_operand_result): New.
340 (struct group_reloc_table_entry): New.
341 (enum group_reloc_type): New.
342 (group_reloc_table): New array.
343 (find_group_reloc_table_entry): New function.
344 (parse_shifter_operand_group_reloc): New function.
345 (parse_address_main): New function, incorporating code
346 from the old parse_address function. To be used via...
347 (parse_address): wrapper for parse_address_main; and
348 (parse_address_group_reloc): new function, likewise.
349 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
350 OP_ADDRGLDRS, OP_ADDRGLDC.
351 (parse_operands): Support for these new operand codes.
352 New macro po_misc_or_fail_no_backtrack.
353 (encode_arm_cp_address): Preserve group relocations.
354 (insns): Modify to use the above operand codes where group
355 relocations are permitted.
356 (md_apply_fix): Handle the group relocations
357 ALU_PC_G0_NC through LDC_SB_G2.
358 (tc_gen_reloc): Likewise.
359 (arm_force_relocation): Leave group relocations for the linker.
360 (arm_fix_adjustable): Likewise.
362 2006-06-15 Julian Brown <julian@codesourcery.com>
364 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
365 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
366 relocs properly.
368 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
370 * config/tc-i386.c (process_suffix): Don't add rex64 for
371 "xchg %rax,%rax".
373 2006-06-09 Thiemo Seufer <ths@mips.com>
375 * config/tc-mips.c (mips_ip): Maintain argument count.
377 2006-06-09 Alan Modra <amodra@bigpond.net.au>
379 * config/tc-iq2000.c: Include sb.h.
381 2006-06-08 Nigel Stephens <nigel@mips.com>
383 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
384 aliases for better compatibility with SGI tools.
386 2006-06-08 Alan Modra <amodra@bigpond.net.au>
388 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
389 * Makefile.am (GASLIBS): Expand @BFDLIB@.
390 (BFDVER_H): Delete.
391 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
392 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
393 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
394 Run "make dep-am".
395 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
396 * Makefile.in: Regenerate.
397 * doc/Makefile.in: Regenerate.
398 * configure: Regenerate.
400 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
402 * po/Make-in (pdf, ps): New dummy targets.
404 2006-06-07 Julian Brown <julian@codesourcery.com>
406 * config/tc-arm.c (stdarg.h): include.
407 (arm_it): Add uncond_value field. Add isvec and issingle to operand
408 array.
409 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
410 REG_TYPE_NSDQ (single, double or quad vector reg).
411 (reg_expected_msgs): Update.
412 (BAD_FPU): Add macro for unsupported FPU instruction error.
413 (parse_neon_type): Support 'd' as an alias for .f64.
414 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
415 sets of registers.
416 (parse_vfp_reg_list): Don't update first arg on error.
417 (parse_neon_mov): Support extra syntax for VFP moves.
418 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
419 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
420 (parse_operands): Support isvec, issingle operands fields, new parse
421 codes above.
422 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
423 msr variants.
424 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
425 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
426 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
427 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
428 shapes.
429 (neon_shape): Redefine in terms of above.
430 (neon_shape_class): New enumeration, table of shape classes.
431 (neon_shape_el): New enumeration. One element of a shape.
432 (neon_shape_el_size): Register widths of above, where appropriate.
433 (neon_shape_info): New struct. Info for shape table.
434 (neon_shape_tab): New array.
435 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
436 (neon_check_shape): Rewrite as...
437 (neon_select_shape): New function to classify instruction shapes,
438 driven by new table neon_shape_tab array.
439 (neon_quad): New function. Return 1 if shape should set Q flag in
440 instructions (or equivalent), 0 otherwise.
441 (type_chk_of_el_type): Support F64.
442 (el_type_of_type_chk): Likewise.
443 (neon_check_type): Add support for VFP type checking (VFP data
444 elements fill their containing registers).
445 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
446 in thumb mode for VFP instructions.
447 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
448 and encode the current instruction as if it were that opcode.
449 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
450 arguments, call function in PFN.
451 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
452 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
453 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
454 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
455 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
456 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
457 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
458 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
459 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
460 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
461 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
462 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
463 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
464 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
465 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
466 neon_quad.
467 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
468 between VFP and Neon turns out to belong to Neon. Perform
469 architecture check and fill in condition field if appropriate.
470 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
471 (do_neon_cvt): Add support for VFP variants of instructions.
472 (neon_cvt_flavour): Extend to cover VFP conversions.
473 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
474 vmov variants.
475 (do_neon_ldr_str): Handle single-precision VFP load/store.
476 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
477 NS_NULL not NS_IGNORE.
478 (opcode_tag): Add OT_csuffixF for operands which either take a
479 conditional suffix, or have 0xF in the condition field.
480 (md_assemble): Add support for OT_csuffixF.
481 (NCE): Replace macro with...
482 (NCE_tag, NCE, NCEF): New macros.
483 (nCE): Replace macro with...
484 (nCE_tag, nCE, nCEF): New macros.
485 (insns): Add support for VFP insns or VFP versions of insns msr,
486 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
487 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
488 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
489 VFP/Neon insns together.
491 2006-06-07 Alan Modra <amodra@bigpond.net.au>
492 Ladislav Michl <ladis@linux-mips.org>
494 * app.c: Don't include headers already included by as.h.
495 * as.c: Likewise.
496 * atof-generic.c: Likewise.
497 * cgen.c: Likewise.
498 * dwarf2dbg.c: Likewise.
499 * expr.c: Likewise.
500 * input-file.c: Likewise.
501 * input-scrub.c: Likewise.
502 * macro.c: Likewise.
503 * output-file.c: Likewise.
504 * read.c: Likewise.
505 * sb.c: Likewise.
506 * config/bfin-lex.l: Likewise.
507 * config/obj-coff.h: Likewise.
508 * config/obj-elf.h: Likewise.
509 * config/obj-som.h: Likewise.
510 * config/tc-arc.c: Likewise.
511 * config/tc-arm.c: Likewise.
512 * config/tc-avr.c: Likewise.
513 * config/tc-bfin.c: Likewise.
514 * config/tc-cris.c: Likewise.
515 * config/tc-d10v.c: Likewise.
516 * config/tc-d30v.c: Likewise.
517 * config/tc-dlx.h: Likewise.
518 * config/tc-fr30.c: Likewise.
519 * config/tc-frv.c: Likewise.
520 * config/tc-h8300.c: Likewise.
521 * config/tc-hppa.c: Likewise.
522 * config/tc-i370.c: Likewise.
523 * config/tc-i860.c: Likewise.
524 * config/tc-i960.c: Likewise.
525 * config/tc-ip2k.c: Likewise.
526 * config/tc-iq2000.c: Likewise.
527 * config/tc-m32c.c: Likewise.
528 * config/tc-m32r.c: Likewise.
529 * config/tc-maxq.c: Likewise.
530 * config/tc-mcore.c: Likewise.
531 * config/tc-mips.c: Likewise.
532 * config/tc-mmix.c: Likewise.
533 * config/tc-mn10200.c: Likewise.
534 * config/tc-mn10300.c: Likewise.
535 * config/tc-msp430.c: Likewise.
536 * config/tc-mt.c: Likewise.
537 * config/tc-ns32k.c: Likewise.
538 * config/tc-openrisc.c: Likewise.
539 * config/tc-ppc.c: Likewise.
540 * config/tc-s390.c: Likewise.
541 * config/tc-sh.c: Likewise.
542 * config/tc-sh64.c: Likewise.
543 * config/tc-sparc.c: Likewise.
544 * config/tc-tic30.c: Likewise.
545 * config/tc-tic4x.c: Likewise.
546 * config/tc-tic54x.c: Likewise.
547 * config/tc-v850.c: Likewise.
548 * config/tc-vax.c: Likewise.
549 * config/tc-xc16x.c: Likewise.
550 * config/tc-xstormy16.c: Likewise.
551 * config/tc-xtensa.c: Likewise.
552 * config/tc-z80.c: Likewise.
553 * config/tc-z8k.c: Likewise.
554 * macro.h: Don't include sb.h or ansidecl.h.
555 * sb.h: Don't include stdio.h or ansidecl.h.
556 * cond.c: Include sb.h.
557 * itbl-lex.l: Include as.h instead of other system headers.
558 * itbl-parse.y: Likewise.
559 * itbl-ops.c: Similarly.
560 * itbl-ops.h: Don't include as.h or ansidecl.h.
561 * config/bfin-defs.h: Don't include bfd.h or as.h.
562 * config/bfin-parse.y: Include as.h instead of other system headers.
564 2006-06-06 Ben Elliston <bje@au.ibm.com>
565 Anton Blanchard <anton@samba.org>
567 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
568 (md_show_usage): Document it.
569 (ppc_setup_opcodes): Test power6 opcode flag bits.
570 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
572 2006-06-06 Thiemo Seufer <ths@mips.com>
573 Chao-ying Fu <fu@mips.com>
575 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
576 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
577 (macro_build): Update comment.
578 (mips_ip): Allow DSP64 instructions for MIPS64R2.
579 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
580 CPU_HAS_MDMX.
581 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
582 MIPS_CPU_ASE_MDMX flags for sb1.
584 2006-06-05 Thiemo Seufer <ths@mips.com>
586 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
587 appropriate.
588 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
589 (mips_ip): Make overflowed/underflowed constant arguments in DSP
590 and MT instructions a fatal error. Use INSERT_OPERAND where
591 appropriate. Improve warnings for break and wait code overflows.
592 Use symbolic constant of OP_MASK_COPZ.
593 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
595 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
597 * po/Make-in (top_builddir): Define.
599 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
601 * doc/Makefile.am (TEXI2DVI): Define.
602 * doc/Makefile.in: Regenerate.
603 * doc/c-arc.texi: Fix typo.
605 2006-06-01 Alan Modra <amodra@bigpond.net.au>
607 * config/obj-ieee.c: Delete.
608 * config/obj-ieee.h: Delete.
609 * Makefile.am (OBJ_FORMATS): Remove ieee.
610 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
611 (obj-ieee.o): Remove rule.
612 * Makefile.in: Regenerate.
613 * configure.in (atof): Remove tahoe.
614 (OBJ_MAYBE_IEEE): Don't define.
615 * configure: Regenerate.
616 * config.in: Regenerate.
617 * doc/Makefile.in: Regenerate.
618 * po/POTFILES.in: Regenerate.
620 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
622 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
623 and LIBINTL_DEP everywhere.
624 (INTLLIBS): Remove.
625 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
626 * acinclude.m4: Include new gettext macros.
627 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
628 Remove local code for po/Makefile.
629 * Makefile.in, configure, doc/Makefile.in: Regenerated.
631 2006-05-30 Nick Clifton <nickc@redhat.com>
633 * po/es.po: Updated Spanish translation.
635 2006-05-06 Denis Chertykov <denisc@overta.ru>
637 * doc/c-avr.texi: New file.
638 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
639 * doc/all.texi: Set AVR
640 * doc/as.texinfo: Include c-avr.texi
642 2006-05-28 Jie Zhang <jie.zhang@analog.com>
644 * config/bfin-parse.y (check_macfunc): Loose the condition of
645 calling check_multiply_halfregs ().
647 2006-05-25 Jie Zhang <jie.zhang@analog.com>
649 * config/bfin-parse.y (asm_1): Better check and deal with
650 vector and scalar Multiply 16-Bit Operands instructions.
652 2006-05-24 Nick Clifton <nickc@redhat.com>
654 * config/tc-hppa.c: Convert to ISO C90 format.
655 * config/tc-hppa.h: Likewise.
657 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
658 Randolph Chung <randolph@tausq.org>
660 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
661 is_tls_ieoff, is_tls_leoff): Define.
662 (fix_new_hppa): Handle TLS.
663 (cons_fix_new_hppa): Likewise.
664 (pa_ip): Likewise.
665 (md_apply_fix): Handle TLS relocs.
666 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
668 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
670 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
672 2006-05-23 Thiemo Seufer <ths@mips.com>
673 David Ung <davidu@mips.com>
674 Nigel Stephens <nigel@mips.com>
676 [ gas/ChangeLog ]
677 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
678 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
679 ISA_HAS_MXHC1): New macros.
680 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
681 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
682 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
683 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
684 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
685 (mips_after_parse_args): Change default handling of float register
686 size to account for 32bit code with 64bit FP. Better sanity checking
687 of ISA/ASE/ABI option combinations.
688 (s_mipsset): Support switching of GPR and FPR sizes via
689 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
690 options.
691 (mips_elf_final_processing): We should record the use of 64bit FP
692 registers in 32bit code but we don't, because ELF header flags are
693 a scarce ressource.
694 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
695 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
696 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
697 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
698 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
699 missing -march options. Document .set arch=CPU. Move .set smartmips
700 to ASE page. Use @code for .set FOO examples.
702 2006-05-23 Jie Zhang <jie.zhang@analog.com>
704 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
705 if needed.
707 2006-05-23 Jie Zhang <jie.zhang@analog.com>
709 * config/bfin-defs.h (bfin_equals): Remove declaration.
710 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
711 * config/tc-bfin.c (bfin_name_is_register): Remove.
712 (bfin_equals): Remove.
713 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
714 (bfin_name_is_register): Remove declaration.
716 2006-05-19 Thiemo Seufer <ths@mips.com>
717 Nigel Stephens <nigel@mips.com>
719 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
720 (mips_oddfpreg_ok): New function.
721 (mips_ip): Use it.
723 2006-05-19 Thiemo Seufer <ths@mips.com>
724 David Ung <davidu@mips.com>
726 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
727 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
728 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
729 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
730 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
731 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
732 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
733 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
734 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
735 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
736 reg_names_o32, reg_names_n32n64): Define register classes.
737 (reg_lookup): New function, use register classes.
738 (md_begin): Reserve register names in the symbol table. Simplify
739 OBJ_ELF defines.
740 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
741 Use reg_lookup.
742 (mips16_ip): Use reg_lookup.
743 (tc_get_register): Likewise.
744 (tc_mips_regname_to_dw2regnum): New function.
746 2006-05-19 Thiemo Seufer <ths@mips.com>
748 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
749 Un-constify string argument.
750 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
751 Likewise.
752 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
753 Likewise.
754 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
755 Likewise.
756 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
757 Likewise.
758 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
759 Likewise.
760 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
761 Likewise.
763 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
765 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
766 cfloat/m68881 to correct architecture before using it.
768 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
770 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
771 constant values.
773 2006-05-15 Paul Brook <paul@codesourcery.com>
775 * config/tc-arm.c (arm_adjust_symtab): Use
776 bfd_is_arm_special_symbol_name.
778 2006-05-15 Bob Wilson <bob.wilson@acm.org>
780 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
781 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
782 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
783 Handle errors from calls to xtensa_opcode_is_* functions.
785 2006-05-14 Thiemo Seufer <ths@mips.com>
787 * config/tc-mips.c (macro_build): Test for currently active
788 mips16 option.
789 (mips16_ip): Reject invalid opcodes.
791 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
793 * doc/as.texinfo: Rename "Index" to "AS Index",
794 and "ABORT" to "ABORT (COFF)".
796 2006-05-11 Paul Brook <paul@codesourcery.com>
798 * config/tc-arm.c (parse_half): New function.
799 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
800 (parse_operands): Ditto.
801 (do_mov16): Reject invalid relocations.
802 (do_t_mov16): Ditto. Use Thumb reloc numbers.
803 (insns): Replace Iffff with HALF.
804 (md_apply_fix): Add MOVW and MOVT relocs.
805 (tc_gen_reloc): Ditto.
806 * doc/c-arm.texi: Document relocation operators
808 2006-05-11 Paul Brook <paul@codesourcery.com>
810 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
812 2006-05-11 Thiemo Seufer <ths@mips.com>
814 * config/tc-mips.c (append_insn): Don't check the range of j or
815 jal addresses.
817 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
819 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
820 relocs against external symbols for WinCE targets.
821 (md_apply_fix): Likewise.
823 2006-05-09 David Ung <davidu@mips.com>
825 * config/tc-mips.c (append_insn): Only warn about an out-of-range
826 j or jal address.
828 2006-05-09 Nick Clifton <nickc@redhat.com>
830 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
831 against symbols which are not going to be placed into the symbol
832 table.
834 2006-05-09 Ben Elliston <bje@au.ibm.com>
836 * expr.c (operand): Remove `if (0 && ..)' statement and
837 subsequently unused target_op label. Collapse `if (1 || ..)'
838 statement.
839 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
840 separately above the switch.
842 2006-05-08 Nick Clifton <nickc@redhat.com>
844 PR gas/2623
845 * config/tc-msp430.c (line_separator_character): Define as |.
847 2006-05-08 Thiemo Seufer <ths@mips.com>
848 Nigel Stephens <nigel@mips.com>
849 David Ung <davidu@mips.com>
851 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
852 (mips_opts): Likewise.
853 (file_ase_smartmips): New variable.
854 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
855 (macro_build): Handle SmartMIPS instructions.
856 (mips_ip): Likewise.
857 (md_longopts): Add argument handling for smartmips.
858 (md_parse_options, mips_after_parse_args): Likewise.
859 (s_mipsset): Add .set smartmips support.
860 (md_show_usage): Document -msmartmips/-mno-smartmips.
861 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
862 .set smartmips.
863 * doc/c-mips.texi: Likewise.
865 2006-05-08 Alan Modra <amodra@bigpond.net.au>
867 * write.c (relax_segment): Add pass count arg. Don't error on
868 negative org/space on first two passes.
869 (relax_seg_info): New struct.
870 (relax_seg, write_object_file): Adjust.
871 * write.h (relax_segment): Update prototype.
873 2006-05-05 Julian Brown <julian@codesourcery.com>
875 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
876 checking.
877 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
878 architecture version checks.
879 (insns): Allow overlapping instructions to be used in VFP mode.
881 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
883 PR gas/2598
884 * config/obj-elf.c (obj_elf_change_section): Allow user
885 specified SHF_ALPHA_GPREL.
887 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
889 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
890 for PMEM related expressions.
892 2006-05-05 Nick Clifton <nickc@redhat.com>
894 PR gas/2582
895 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
896 insertion of a directory separator character into a string at a
897 given offset. Uses heuristics to decide when to use a backslash
898 character rather than a forward-slash character.
899 (dwarf2_directive_loc): Use the macro.
900 (out_debug_info): Likewise.
902 2006-05-05 Thiemo Seufer <ths@mips.com>
903 David Ung <davidu@mips.com>
905 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
906 instruction.
907 (macro): Add new case M_CACHE_AB.
909 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
911 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
912 (opcode_lookup): Issue a warning for opcode with
913 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
914 identical to OT_cinfix3.
915 (TxC3w, TC3w, tC3w): New.
916 (insns): Use tC3w and TC3w for comparison instructions with
917 's' suffix.
919 2006-05-04 Alan Modra <amodra@bigpond.net.au>
921 * subsegs.h (struct frchain): Delete frch_seg.
922 (frchain_root): Delete.
923 (seg_info): Define as macro.
924 * subsegs.c (frchain_root): Delete.
925 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
926 (subsegs_begin, subseg_change): Adjust for above.
927 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
928 rather than to one big list.
929 (subseg_get): Don't special case abs, und sections.
930 (subseg_new, subseg_force_new): Don't set frchainP here.
931 (seg_info): Delete.
932 (subsegs_print_statistics): Adjust frag chain control list traversal.
933 * debug.c (dmp_frags): Likewise.
934 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
935 at frchain_root. Make use of known frchain ordering.
936 (last_frag_for_seg): Likewise.
937 (get_frag_fix): Likewise. Add seg param.
938 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
939 * write.c (chain_frchains_together_1): Adjust for struct frchain.
940 (SUB_SEGMENT_ALIGN): Likewise.
941 (subsegs_finish): Adjust frchain list traversal.
942 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
943 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
944 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
945 (xtensa_fix_b_j_loop_end_frags): Likewise.
946 (xtensa_fix_close_loop_end_frags): Likewise.
947 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
948 (retrieve_segment_info): Delete frch_seg initialisation.
950 2006-05-03 Alan Modra <amodra@bigpond.net.au>
952 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
953 * config/obj-elf.h (obj_sec_set_private_data): Delete.
954 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
955 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
957 2006-05-02 Joseph Myers <joseph@codesourcery.com>
959 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
960 here.
961 (md_apply_fix3): Multiply offset by 4 here for
962 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
964 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
965 Jan Beulich <jbeulich@novell.com>
967 * config/tc-i386.c (output_invalid_buf): Change size for
968 unsigned char.
969 * config/tc-tic30.c (output_invalid_buf): Likewise.
971 * config/tc-i386.c (output_invalid): Cast none-ascii char to
972 unsigned char.
973 * config/tc-tic30.c (output_invalid): Likewise.
975 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
977 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
978 (TEXI2POD): Use AM_MAKEINFOFLAGS.
979 (asconfig.texi): Don't set top_srcdir.
980 * doc/as.texinfo: Don't use top_srcdir.
981 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
983 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
985 * config/tc-i386.c (output_invalid_buf): Change size to 16.
986 * config/tc-tic30.c (output_invalid_buf): Likewise.
988 * config/tc-i386.c (output_invalid): Use snprintf instead of
989 sprintf.
990 * config/tc-ia64.c (declare_register_set): Likewise.
991 (emit_one_bundle): Likewise.
992 (check_dependencies): Likewise.
993 * config/tc-tic30.c (output_invalid): Likewise.
995 2006-05-02 Paul Brook <paul@codesourcery.com>
997 * config/tc-arm.c (arm_optimize_expr): New function.
998 * config/tc-arm.h (md_optimize_expr): Define
999 (arm_optimize_expr): Add prototype.
1000 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1002 2006-05-02 Ben Elliston <bje@au.ibm.com>
1004 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1005 field unsigned.
1007 * sb.h (sb_list_vector): Move to sb.c.
1008 * sb.c (free_list): Use type of sb_list_vector directly.
1009 (sb_build): Fix off-by-one error in assertion about `size'.
1011 2006-05-01 Ben Elliston <bje@au.ibm.com>
1013 * listing.c (listing_listing): Remove useless loop.
1014 * macro.c (macro_expand): Remove is_positional local variable.
1015 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1016 and simplify surrounding expressions, where possible.
1017 (assign_symbol): Likewise.
1018 (s_weakref): Likewise.
1019 * symbols.c (colon): Likewise.
1021 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1023 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1025 2006-04-30 Thiemo Seufer <ths@mips.com>
1026 David Ung <davidu@mips.com>
1028 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1029 (mips_immed): New table that records various handling of udi
1030 instruction patterns.
1031 (mips_ip): Adds udi handling.
1033 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1035 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1036 of list rather than beginning.
1038 2006-04-26 Julian Brown <julian@codesourcery.com>
1040 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1041 (is_quarter_float): Rename from above. Simplify slightly.
1042 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1043 number.
1044 (parse_neon_mov): Parse floating-point constants.
1045 (neon_qfloat_bits): Fix encoding.
1046 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1047 preference to integer encoding when using the F32 type.
1049 2006-04-26 Julian Brown <julian@codesourcery.com>
1051 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1052 zero-initialising structures containing it will lead to invalid types).
1053 (arm_it): Add vectype to each operand.
1054 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1055 defined field.
1056 (neon_typed_alias): New structure. Extra information for typed
1057 register aliases.
1058 (reg_entry): Add neon type info field.
1059 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1060 Break out alternative syntax for coprocessor registers, etc. into...
1061 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1062 out from arm_reg_parse.
1063 (parse_neon_type): Move. Return SUCCESS/FAIL.
1064 (first_error): New function. Call to ensure first error which occurs is
1065 reported.
1066 (parse_neon_operand_type): Parse exactly one type.
1067 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1068 (parse_typed_reg_or_scalar): New function. Handle core of both
1069 arm_typed_reg_parse and parse_scalar.
1070 (arm_typed_reg_parse): Parse a register with an optional type.
1071 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1072 result.
1073 (parse_scalar): Parse a Neon scalar with optional type.
1074 (parse_reg_list): Use first_error.
1075 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1076 (neon_alias_types_same): New function. Return true if two (alias) types
1077 are the same.
1078 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1079 of elements.
1080 (insert_reg_alias): Return new reg_entry not void.
1081 (insert_neon_reg_alias): New function. Insert type/index information as
1082 well as register for alias.
1083 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1084 make typed register aliases accordingly.
1085 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1086 of line.
1087 (s_unreq): Delete type information if present.
1088 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1089 (s_arm_unwind_save_mmxwcg): Likewise.
1090 (s_arm_unwind_movsp): Likewise.
1091 (s_arm_unwind_setfp): Likewise.
1092 (parse_shift): Likewise.
1093 (parse_shifter_operand): Likewise.
1094 (parse_address): Likewise.
1095 (parse_tb): Likewise.
1096 (tc_arm_regname_to_dw2regnum): Likewise.
1097 (md_pseudo_table): Add dn, qn.
1098 (parse_neon_mov): Handle typed operands.
1099 (parse_operands): Likewise.
1100 (neon_type_mask): Add N_SIZ.
1101 (N_ALLMODS): New macro.
1102 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1103 (el_type_of_type_chk): Add some safeguards.
1104 (modify_types_allowed): Fix logic bug.
1105 (neon_check_type): Handle operands with types.
1106 (neon_three_same): Remove redundant optional arg handling.
1107 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1108 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1109 (do_neon_step): Adjust accordingly.
1110 (neon_cmode_for_logic_imm): Use first_error.
1111 (do_neon_bitfield): Call neon_check_type.
1112 (neon_dyadic): Rename to...
1113 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1114 to allow modification of type of the destination.
1115 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1116 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1117 (do_neon_compare): Make destination be an untyped bitfield.
1118 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1119 (neon_mul_mac): Return early in case of errors.
1120 (neon_move_immediate): Use first_error.
1121 (neon_mac_reg_scalar_long): Fix type to include scalar.
1122 (do_neon_dup): Likewise.
1123 (do_neon_mov): Likewise (in several places).
1124 (do_neon_tbl_tbx): Fix type.
1125 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1126 (do_neon_ld_dup): Exit early in case of errors and/or use
1127 first_error.
1128 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1129 Handle .dn/.qn directives.
1130 (REGDEF): Add zero for reg_entry neon field.
1132 2006-04-26 Julian Brown <julian@codesourcery.com>
1134 * config/tc-arm.c (limits.h): Include.
1135 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1136 (fpu_vfp_v3_or_neon_ext): Declare constants.
1137 (neon_el_type): New enumeration of types for Neon vector elements.
1138 (neon_type_el): New struct. Define type and size of a vector element.
1139 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1140 instruction.
1141 (neon_type): Define struct. The type of an instruction.
1142 (arm_it): Add 'vectype' for the current instruction.
1143 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1144 (vfp_sp_reg_pos): Rename to...
1145 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1146 tags.
1147 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1148 (Neon D or Q register).
1149 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1150 register.
1151 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1152 (my_get_expression): Allow above constant as argument to accept
1153 64-bit constants with optional prefix.
1154 (arm_reg_parse): Add extra argument to return the specific type of
1155 register in when either a D or Q register (REG_TYPE_NDQ) is
1156 requested. Can be NULL.
1157 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1158 (parse_reg_list): Update for new arm_reg_parse args.
1159 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1160 (parse_neon_el_struct_list): New function. Parse element/structure
1161 register lists for VLD<n>/VST<n> instructions.
1162 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1163 (s_arm_unwind_save_mmxwr): Likewise.
1164 (s_arm_unwind_save_mmxwcg): Likewise.
1165 (s_arm_unwind_movsp): Likewise.
1166 (s_arm_unwind_setfp): Likewise.
1167 (parse_big_immediate): New function. Parse an immediate, which may be
1168 64 bits wide. Put results in inst.operands[i].
1169 (parse_shift): Update for new arm_reg_parse args.
1170 (parse_address): Likewise. Add parsing of alignment specifiers.
1171 (parse_neon_mov): Parse the operands of a VMOV instruction.
1172 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1173 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1174 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1175 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1176 (parse_operands): Handle new codes above.
1177 (encode_arm_vfp_sp_reg): Rename to...
1178 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1179 selected VFP version only supports D0-D15.
1180 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1181 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1182 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1183 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1184 encode_arm_vfp_reg name, and allow 32 D regs.
1185 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1186 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1187 regs.
1188 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1189 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1190 constant-load and conversion insns introduced with VFPv3.
1191 (neon_tab_entry): New struct.
1192 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1193 those which are the targets of pseudo-instructions.
1194 (neon_opc): Enumerate opcodes, use as indices into...
1195 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1196 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1197 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1198 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1199 neon_enc_tab.
1200 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1201 Neon instructions.
1202 (neon_type_mask): New. Compact type representation for type checking.
1203 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1204 permitted type combinations.
1205 (N_IGNORE_TYPE): New macro.
1206 (neon_check_shape): New function. Check an instruction shape for
1207 multiple alternatives. Return the specific shape for the current
1208 instruction.
1209 (neon_modify_type_size): New function. Modify a vector type and size,
1210 depending on the bit mask in argument 1.
1211 (neon_type_promote): New function. Convert a given "key" type (of an
1212 operand) into the correct type for a different operand, based on a bit
1213 mask.
1214 (type_chk_of_el_type): New function. Convert a type and size into the
1215 compact representation used for type checking.
1216 (el_type_of_type_ckh): New function. Reverse of above (only when a
1217 single bit is set in the bit mask).
1218 (modify_types_allowed): New function. Alter a mask of allowed types
1219 based on a bit mask of modifications.
1220 (neon_check_type): New function. Check the type of the current
1221 instruction against the variable argument list. The "key" type of the
1222 instruction is returned.
1223 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1224 a Neon data-processing instruction depending on whether we're in ARM
1225 mode or Thumb-2 mode.
1226 (neon_logbits): New function.
1227 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1228 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1229 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1230 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1231 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1232 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1233 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1234 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1235 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1236 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1237 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1238 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1239 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1240 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1241 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1242 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1243 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1244 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1245 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1246 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1247 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1248 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1249 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1250 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1251 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1252 helpers.
1253 (parse_neon_type): New function. Parse Neon type specifier.
1254 (opcode_lookup): Allow parsing of Neon type specifiers.
1255 (REGNUM2, REGSETH, REGSET2): New macros.
1256 (reg_names): Add new VFPv3 and Neon registers.
1257 (NUF, nUF, NCE, nCE): New macros for opcode table.
1258 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1259 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1260 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1261 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1262 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1263 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1264 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1265 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1266 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1267 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1268 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1269 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1270 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1271 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1272 fto[us][lh][sd].
1273 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1274 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1275 (arm_option_cpu_value): Add vfp3 and neon.
1276 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1277 VFPv1 attribute.
1279 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1281 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1282 syntax instead of hardcoded opcodes with ".w18" suffixes.
1283 (wide_branch_opcode): New.
1284 (build_transition): Use it to check for wide branch opcodes with
1285 either ".w18" or ".w15" suffixes.
1287 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1289 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1290 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1291 frag's is_literal flag.
1293 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1295 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1297 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1299 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1300 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1301 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1302 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1303 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1305 2005-04-20 Paul Brook <paul@codesourcery.com>
1307 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1308 all targets.
1309 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1311 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1313 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1314 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1315 Make some cpus unsupported on ELF. Run "make dep-am".
1316 * Makefile.in: Regenerate.
1318 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1320 * configure.in (--enable-targets): Indent help message.
1321 * configure: Regenerate.
1323 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1325 PR gas/2533
1326 * config/tc-i386.c (i386_immediate): Check illegal immediate
1327 register operand.
1329 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1331 * config/tc-i386.c: Formatting.
1332 (output_disp, output_imm): ISO C90 params.
1334 * frags.c (frag_offset_fixed_p): Constify args.
1335 * frags.h (frag_offset_fixed_p): Ditto.
1337 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1338 (COFF_MAGIC): Delete.
1340 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1342 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1344 * po/POTFILES.in: Regenerated.
1346 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1348 * doc/as.texinfo: Mention that some .type syntaxes are not
1349 supported on all architectures.
1351 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1353 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1354 instructions when such transformations have been disabled.
1356 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1358 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1359 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1360 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1361 decoding the loop instructions. Remove current_offset variable.
1362 (xtensa_fix_short_loop_frags): Likewise.
1363 (min_bytes_to_other_loop_end): Remove current_offset argument.
1365 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1367 * config/tc-z80.c (z80_optimize_expr): Removed.
1368 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1370 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1372 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1373 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1374 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1375 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1376 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1377 at90can64, at90usb646, at90usb647, at90usb1286 and
1378 at90usb1287.
1379 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1381 2006-04-07 Paul Brook <paul@codesourcery.com>
1383 * config/tc-arm.c (parse_operands): Set default error message.
1385 2006-04-07 Paul Brook <paul@codesourcery.com>
1387 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1389 2006-04-07 Paul Brook <paul@codesourcery.com>
1391 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1393 2006-04-07 Paul Brook <paul@codesourcery.com>
1395 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1396 (move_or_literal_pool): Handle Thumb-2 instructions.
1397 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1399 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1401 PR 2512.
1402 * config/tc-i386.c (match_template): Move 64-bit operand tests
1403 inside loop.
1405 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1407 * po/Make-in: Add install-html target.
1408 * Makefile.am: Add install-html and install-html-recursive targets.
1409 * Makefile.in: Regenerate.
1410 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1411 * configure: Regenerate.
1412 * doc/Makefile.am: Add install-html and install-html-am targets.
1413 * doc/Makefile.in: Regenerate.
1415 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1417 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1418 second scan.
1420 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1421 Daniel Jacobowitz <dan@codesourcery.com>
1423 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1424 (GOTT_BASE, GOTT_INDEX): New.
1425 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1426 GOTT_INDEX when generating VxWorks PIC.
1427 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1428 use the generic *-*-vxworks* stanza instead.
1430 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1432 PR 997
1433 * frags.c (frag_offset_fixed_p): New function.
1434 * frags.h (frag_offset_fixed_p): Declare.
1435 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1436 (resolve_expression): Likewise.
1438 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1440 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1441 of the same length but different numbers of slots.
1443 2006-03-30 Andreas Schwab <schwab@suse.de>
1445 * configure.in: Fix help string for --enable-targets option.
1446 * configure: Regenerate.
1448 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1450 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1451 (m68k_ip): ... here. Use for all chips. Protect against buffer
1452 overrun and avoid excessive copying.
1454 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1455 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1456 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1457 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1458 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1459 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1460 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1461 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1462 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1463 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1464 (struct m68k_cpu): Change chip field to control_regs.
1465 (current_chip): Remove.
1466 (control_regs): New.
1467 (m68k_archs, m68k_extensions): Adjust.
1468 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1469 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1470 (find_cf_chip): Reimplement for new organization of cpu table.
1471 (select_control_regs): Remove.
1472 (mri_chip): Adjust.
1473 (struct save_opts): Save control regs, not chip.
1474 (s_save, s_restore): Adjust.
1475 (m68k_lookup_cpu): Give deprecated warning when necessary.
1476 (m68k_init_arch): Adjust.
1477 (md_show_usage): Adjust for new cpu table organization.
1479 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1481 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1482 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1483 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1484 "elf/bfin.h".
1485 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1486 (any_gotrel): New rule.
1487 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1488 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1489 "elf/bfin.h".
1490 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1491 (bfin_pic_ptr): New function.
1492 (md_pseudo_table): Add it for ".picptr".
1493 (OPTION_FDPIC): New macro.
1494 (md_longopts): Add -mfdpic.
1495 (md_parse_option): Handle it.
1496 (md_begin): Set BFD flags.
1497 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1498 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1499 us for GOT relocs.
1500 * Makefile.am (bfin-parse.o): Update dependencies.
1501 (DEPTC_bfin_elf): Likewise.
1502 * Makefile.in: Regenerate.
1504 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1506 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1507 mcfemac instead of mcfmac.
1509 2006-03-23 Michael Matz <matz@suse.de>
1511 * config/tc-i386.c (type_names): Correct placement of 'static'.
1512 (reloc): Map some more relocs to their 64 bit counterpart when
1513 size is 8.
1514 (output_insn): Work around breakage if DEBUG386 is defined.
1515 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1516 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1517 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1518 different from i386.
1519 (output_imm): Ditto.
1520 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1521 Imm64.
1522 (md_convert_frag): Jumps can now be larger than 2GB away, error
1523 out in that case.
1524 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1525 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1527 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1528 Daniel Jacobowitz <dan@codesourcery.com>
1529 Phil Edwards <phil@codesourcery.com>
1530 Zack Weinberg <zack@codesourcery.com>
1531 Mark Mitchell <mark@codesourcery.com>
1532 Nathan Sidwell <nathan@codesourcery.com>
1534 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1535 (md_begin): Complain about -G being used for PIC. Don't change
1536 the text, data and bss alignments on VxWorks.
1537 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1538 generating VxWorks PIC.
1539 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1540 (macro): Likewise, but do not treat la $25 specially for
1541 VxWorks PIC, and do not handle jal.
1542 (OPTION_MVXWORKS_PIC): New macro.
1543 (md_longopts): Add -mvxworks-pic.
1544 (md_parse_option): Don't complain about using PIC and -G together here.
1545 Handle OPTION_MVXWORKS_PIC.
1546 (md_estimate_size_before_relax): Always use the first relaxation
1547 sequence on VxWorks.
1548 * config/tc-mips.h (VXWORKS_PIC): New.
1550 2006-03-21 Paul Brook <paul@codesourcery.com>
1552 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1554 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1556 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1557 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1558 (get_loop_align_size): New.
1559 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1560 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1561 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1562 (get_noop_aligned_address): Use get_loop_align_size.
1563 (get_aligned_diff): Likewise.
1565 2006-03-21 Paul Brook <paul@codesourcery.com>
1567 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1569 2006-03-20 Paul Brook <paul@codesourcery.com>
1571 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1572 (do_t_branch): Encode branches inside IT blocks as unconditional.
1573 (do_t_cps): New function.
1574 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1575 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1576 (opcode_lookup): Allow conditional suffixes on all instructions in
1577 Thumb mode.
1578 (md_assemble): Advance condexec state before checking for errors.
1579 (insns): Use do_t_cps.
1581 2006-03-20 Paul Brook <paul@codesourcery.com>
1583 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1584 outputting the insn.
1586 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1588 * config/tc-vax.c: Update copyright year.
1589 * config/tc-vax.h: Likewise.
1591 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1593 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1594 make it static.
1595 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1597 2006-03-17 Paul Brook <paul@codesourcery.com>
1599 * config/tc-arm.c (insns): Add ldm and stm.
1601 2006-03-17 Ben Elliston <bje@au.ibm.com>
1603 PR gas/2446
1604 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1606 2006-03-16 Paul Brook <paul@codesourcery.com>
1608 * config/tc-arm.c (insns): Add "svc".
1610 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1612 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1613 flag and avoid double underscore prefixes.
1615 2006-03-10 Paul Brook <paul@codesourcery.com>
1617 * config/tc-arm.c (md_begin): Handle EABIv5.
1618 (arm_eabis): Add EF_ARM_EABI_VER5.
1619 * doc/c-arm.texi: Document -meabi=5.
1621 2006-03-10 Ben Elliston <bje@au.ibm.com>
1623 * app.c (do_scrub_chars): Simplify string handling.
1625 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1626 Daniel Jacobowitz <dan@codesourcery.com>
1627 Zack Weinberg <zack@codesourcery.com>
1628 Nathan Sidwell <nathan@codesourcery.com>
1629 Paul Brook <paul@codesourcery.com>
1630 Ricardo Anguiano <anguiano@codesourcery.com>
1631 Phil Edwards <phil@codesourcery.com>
1633 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1634 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1635 R_ARM_ABS12 reloc.
1636 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1637 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1638 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1640 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1642 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1643 even when using the text-section-literals option.
1645 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1647 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1648 and cf.
1649 (m68k_ip): <case 'J'> Check we have some control regs.
1650 (md_parse_option): Allow raw arch switch.
1651 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1652 whether 68881 or cfloat was meant by -mfloat.
1653 (md_show_usage): Adjust extension display.
1654 (m68k_elf_final_processing): Adjust.
1656 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1658 * config/tc-avr.c (avr_mod_hash_value): New function.
1659 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1660 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1661 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1662 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1663 of (int).
1664 (tc_gen_reloc): Handle substractions of symbols, if possible do
1665 fixups, abort otherwise.
1666 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1667 tc_fix_adjustable): Define.
1669 2006-03-02 James E Wilson <wilson@specifix.com>
1671 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1672 change the template, then clear md.slot[curr].end_of_insn_group.
1674 2006-02-28 Jan Beulich <jbeulich@novell.com>
1676 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1678 2006-02-28 Jan Beulich <jbeulich@novell.com>
1680 PR/1070
1681 * macro.c (getstring): Don't treat parentheses special anymore.
1682 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1683 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1684 characters.
1686 2006-02-28 Mat <mat@csail.mit.edu>
1688 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1690 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1692 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1693 field.
1694 (CFI_signal_frame): Define.
1695 (cfi_pseudo_table): Add .cfi_signal_frame.
1696 (dot_cfi): Handle CFI_signal_frame.
1697 (output_cie): Handle cie->signal_frame.
1698 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1699 different. Copy signal_frame from FDE to newly created CIE.
1700 * doc/as.texinfo: Document .cfi_signal_frame.
1702 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1704 * doc/Makefile.am: Add html target.
1705 * doc/Makefile.in: Regenerate.
1706 * po/Make-in: Add html target.
1708 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1710 * config/tc-i386.c (output_insn): Support Intel Merom New
1711 Instructions.
1713 * config/tc-i386.h (CpuMNI): New.
1714 (CpuUnknownFlags): Add CpuMNI.
1716 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1718 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1719 (hpriv_reg_table): New table for hyperprivileged registers.
1720 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1721 register encoding.
1723 2006-02-24 DJ Delorie <dj@redhat.com>
1725 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1726 (tc_gen_reloc): Don't define.
1727 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1728 (OPTION_LINKRELAX): New.
1729 (md_longopts): Add it.
1730 (m32c_relax): New.
1731 (md_parse_options): Set it.
1732 (md_assemble): Emit relaxation relocs as needed.
1733 (md_convert_frag): Emit relaxation relocs as needed.
1734 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1735 (m32c_apply_fix): New.
1736 (tc_gen_reloc): New.
1737 (m32c_force_relocation): Force out jump relocs when relaxing.
1738 (m32c_fix_adjustable): Return false if relaxing.
1740 2006-02-24 Paul Brook <paul@codesourcery.com>
1742 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1743 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1744 (struct asm_barrier_opt): Define.
1745 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1746 (parse_psr): Accept V7M psr names.
1747 (parse_barrier): New function.
1748 (enum operand_parse_code): Add OP_oBARRIER.
1749 (parse_operands): Implement OP_oBARRIER.
1750 (do_barrier): New function.
1751 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1752 (do_t_cpsi): Add V7M restrictions.
1753 (do_t_mrs, do_t_msr): Validate V7M variants.
1754 (md_assemble): Check for NULL variants.
1755 (v7m_psrs, barrier_opt_names): New tables.
1756 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1757 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1758 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1759 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1760 (struct cpu_arch_ver_table): Define.
1761 (cpu_arch_ver): New.
1762 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1763 Tag_CPU_arch_profile.
1764 * doc/c-arm.texi: Document new cpu and arch options.
1766 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1768 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1770 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1772 * config/tc-ia64.c: Update copyright years.
1774 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1776 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1777 SDM 2.2.
1779 2005-02-22 Paul Brook <paul@codesourcery.com>
1781 * config/tc-arm.c (do_pld): Remove incorrect write to
1782 inst.instruction.
1783 (encode_thumb32_addr_mode): Use correct operand.
1785 2006-02-21 Paul Brook <paul@codesourcery.com>
1787 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1789 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1790 Anil Paranjape <anilp1@kpitcummins.com>
1791 Shilin Shakti <shilins@kpitcummins.com>
1793 * Makefile.am: Add xc16x related entry.
1794 * Makefile.in: Regenerate.
1795 * configure.in: Added xc16x related entry.
1796 * configure: Regenerate.
1797 * config/tc-xc16x.h: New file
1798 * config/tc-xc16x.c: New file
1799 * doc/c-xc16x.texi: New file for xc16x
1800 * doc/all.texi: Entry for xc16x
1801 * doc/Makefile.texi: Added c-xc16x.texi
1802 * NEWS: Announce the support for the new target.
1804 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1806 * configure.tgt: set emulation for mips-*-netbsd*
1808 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1810 * config.in: Rebuilt.
1812 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1814 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1815 from 1, not 0, in error messages.
1816 (md_assemble): Simplify special-case check for ENTRY instructions.
1817 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1818 operand in error message.
1820 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1822 * configure.tgt (arm-*-linux-gnueabi*): Change to
1823 arm-*-linux-*eabi*.
1825 2006-02-10 Nick Clifton <nickc@redhat.com>
1827 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1828 32-bit value is propagated into the upper bits of a 64-bit long.
1830 * config/tc-arc.c (init_opcode_tables): Fix cast.
1831 (arc_extoper, md_operand): Likewise.
1833 2006-02-09 David Heine <dlheine@tensilica.com>
1835 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1836 each relaxation step.
1838 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1840 * configure.in (CHECK_DECLS): Add vsnprintf.
1841 * configure: Regenerate.
1842 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1843 include/declare here, but...
1844 * as.h: Move code detecting VARARGS idiom to the top.
1845 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1846 (vsnprintf): Declare if not already declared.
1848 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1850 * as.c (close_output_file): New.
1851 (main): Register close_output_file with xatexit before
1852 dump_statistics. Don't call output_file_close.
1854 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1856 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1857 mcf5329_control_regs): New.
1858 (not_current_architecture, selected_arch, selected_cpu): New.
1859 (m68k_archs, m68k_extensions): New.
1860 (archs): Renamed to ...
1861 (m68k_cpus): ... here. Adjust.
1862 (n_arches): Remove.
1863 (md_pseudo_table): Add arch and cpu directives.
1864 (find_cf_chip, m68k_ip): Adjust table scanning.
1865 (no_68851, no_68881): Remove.
1866 (md_assemble): Lazily initialize.
1867 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1868 (md_init_after_args): Move functionality to m68k_init_arch.
1869 (mri_chip): Adjust table scanning.
1870 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1871 options with saner parsing.
1872 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1873 m68k_init_arch): New.
1874 (s_m68k_cpu, s_m68k_arch): New.
1875 (md_show_usage): Adjust.
1876 (m68k_elf_final_processing): Set CF EF flags.
1877 * config/tc-m68k.h (m68k_init_after_args): Remove.
1878 (tc_init_after_args): Remove.
1879 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1880 (M68k-Directives): Document .arch and .cpu directives.
1882 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1884 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1885 synonyms for equ and defl.
1886 (z80_cons_fix_new): New function.
1887 (emit_byte): Disallow relative jumps to absolute locations.
1888 (emit_data): Only handle defb, prototype changed, because defb is
1889 now handled as pseudo-op rather than an instruction.
1890 (instab): Entries for defb,defw,db,dw moved from here...
1891 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1892 Add entries for def24,def32,d24,d32.
1893 (md_assemble): Improved error handling.
1894 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1895 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1896 (z80_cons_fix_new): Declare.
1897 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1898 (def24,d24,def32,d32): New pseudo-ops.
1900 2006-02-02 Paul Brook <paul@codesourcery.com>
1902 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1904 2005-02-02 Paul Brook <paul@codesourcery.com>
1906 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1907 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1908 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1909 T2_OPCODE_RSB): Define.
1910 (thumb32_negate_data_op): New function.
1911 (md_apply_fix): Use it.
1913 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1915 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1916 fields.
1917 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1918 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1919 subtracted symbols.
1920 (relaxation_requirements): Add pfinish_frag argument and use it to
1921 replace setting tinsn->record_fix fields.
1922 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1923 and vinsn_to_insnbuf. Remove references to record_fix and
1924 slot_sub_symbols fields.
1925 (xtensa_mark_narrow_branches): Delete unused code.
1926 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1927 a symbol.
1928 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1929 record_fix fields.
1930 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1931 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1932 of the record_fix field. Simplify error messages for unexpected
1933 symbolic operands.
1934 (set_expr_symbol_offset_diff): Delete.
1936 2006-01-31 Paul Brook <paul@codesourcery.com>
1938 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1940 2006-01-31 Paul Brook <paul@codesourcery.com>
1941 Richard Earnshaw <rearnsha@arm.com>
1943 * config/tc-arm.c: Use arm_feature_set.
1944 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1945 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1946 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1947 New variables.
1948 (insns): Use them.
1949 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1950 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1951 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1952 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1953 feature flags.
1954 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1955 (arm_opts): Move old cpu/arch options from here...
1956 (arm_legacy_opts): ... to here.
1957 (md_parse_option): Search arm_legacy_opts.
1958 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1959 (arm_float_abis, arm_eabis): Make const.
1961 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1963 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1965 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1967 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1968 in load immediate intruction.
1970 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1972 * config/bfin-parse.y (value_match): Use correct conversion
1973 specifications in template string for __FILE__ and __LINE__.
1974 (binary): Ditto.
1975 (unary): Ditto.
1977 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1979 Introduce TLS descriptors for i386 and x86_64.
1980 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1981 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1982 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1983 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1984 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1985 displacement bits.
1986 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1987 (lex_got): Handle @tlsdesc and @tlscall.
1988 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1990 2006-01-11 Nick Clifton <nickc@redhat.com>
1992 Fixes for building on 64-bit hosts:
1993 * config/tc-avr.c (mod_index): New union to allow conversion
1994 between pointers and integers.
1995 (md_begin, avr_ldi_expression): Use it.
1996 * config/tc-i370.c (md_assemble): Add cast for argument to print
1997 statement.
1998 * config/tc-tic54x.c (subsym_substitute): Likewise.
1999 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2000 opindex field of fr_cgen structure into a pointer so that it can
2001 be stored in a frag.
2002 * config/tc-mn10300.c (md_assemble): Likewise.
2003 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2004 types.
2005 * config/tc-v850.c: Replace uses of (int) casts with correct
2006 types.
2008 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2010 PR gas/2117
2011 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2013 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2015 PR gas/2101
2016 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2017 a local-label reference.
2019 For older changes see ChangeLog-2005
2020 \f
2021 Local Variables:
2022 mode: change-log
2023 left-margin: 8
2024 fill-column: 74
2025 version-control: never
2026 End: