opcodes/xstormy16-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-dis.in isn't
   6
   7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
   8
   9 This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2, or (at your option)
  14 any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software Foundation, Inc.,
  23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "xstormy16-desc.h"
  35 #include "xstormy16-opc.h"
  36 #include "opintl.h"
  37
  38 /* Default text to print if an instruction isn't recognized.  */
  39 #define UNKNOWN_INSN_MSG _("*unknown*")
  40
  41 static void print_normal
  42      PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
  43 static void print_address
  44      PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
  45 static void print_keyword
  46      PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
  47 static void print_insn_normal
  48      PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
  49               bfd_vma, int));
  50 static int print_insn
  51      PARAMS ((CGEN_CPU_DESC, bfd_vma,  disassemble_info *, char *, unsigned));
  52 static int default_print_insn
  53      PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
  54 static int read_insn
  55      PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
  56               CGEN_EXTRACT_INFO *, unsigned long *));
  57 \f
  58 /* -- disassembler routines inserted here */
  59
  60
  61 void xstormy16_cgen_print_operand
  62   PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
  63            void const *, bfd_vma, int));
  64
  65 /* Main entry point for printing operands.
  66    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
  67    of dis-asm.h on cgen.h.
  68
  69    This function is basically just a big switch statement.  Earlier versions
  70    used tables to look up the function to use, but
  71    - if the table contains both assembler and disassembler functions then
  72      the disassembler contains much of the assembler and vice-versa,
  73    - there's a lot of inlining possibilities as things grow,
  74    - using a switch statement avoids the function call overhead.
  75
  76    This function could be moved into `print_insn_normal', but keeping it
  77    separate makes clear the interface between `print_insn_normal' and each of
  78    the handlers.  */
  79
  80 void
  81 xstormy16_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
  82      CGEN_CPU_DESC cd;
  83      int opindex;
  84      PTR xinfo;
  85      CGEN_FIELDS *fields;
  86      void const *attrs ATTRIBUTE_UNUSED;
  87      bfd_vma pc;
  88      int length;
  89 {
  90  disassemble_info *info = (disassemble_info *) xinfo;
  91
  92   switch (opindex)
  93     {
  94     case XSTORMY16_OPERAND_RB :
  95       print_keyword (cd, info, & xstormy16_cgen_opval_gr_Rb_names, fields->f_Rb, 0);
  96       break;
  97     case XSTORMY16_OPERAND_RBJ :
  98       print_keyword (cd, info, & xstormy16_cgen_opval_gr_Rb_names, fields->f_Rbj, 0);
  99       break;
 100     case XSTORMY16_OPERAND_RD :
 101       print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rd, 0);
 102       break;
 103     case XSTORMY16_OPERAND_RDM :
 104       print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rdm, 0);
 105       break;
 106     case XSTORMY16_OPERAND_RM :
 107       print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rm, 0);
 108       break;
 109     case XSTORMY16_OPERAND_RS :
 110       print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rs, 0);
 111       break;
 112     case XSTORMY16_OPERAND_ABS24 :
 113       print_normal (cd, info, fields->f_abs24, 0|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 114       break;
 115     case XSTORMY16_OPERAND_BCOND2 :
 116       print_keyword (cd, info, & xstormy16_cgen_opval_h_branchcond, fields->f_op2, 0);
 117       break;
 118     case XSTORMY16_OPERAND_BCOND5 :
 119       print_keyword (cd, info, & xstormy16_cgen_opval_h_branchcond, fields->f_op5, 0);
 120       break;
 121     case XSTORMY16_OPERAND_HMEM8 :
 122       print_normal (cd, info, fields->f_hmem8, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
 123       break;
 124     case XSTORMY16_OPERAND_IMM12 :
 125       print_normal (cd, info, fields->f_imm12, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 126       break;
 127     case XSTORMY16_OPERAND_IMM16 :
 128       print_normal (cd, info, fields->f_imm16, 0|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
 129       break;
 130     case XSTORMY16_OPERAND_IMM2 :
 131       print_normal (cd, info, fields->f_imm2, 0, pc, length);
 132       break;
 133     case XSTORMY16_OPERAND_IMM3 :
 134       print_normal (cd, info, fields->f_imm3, 0, pc, length);
 135       break;
 136     case XSTORMY16_OPERAND_IMM3B :
 137       print_normal (cd, info, fields->f_imm3b, 0, pc, length);
 138       break;
 139     case XSTORMY16_OPERAND_IMM4 :
 140       print_normal (cd, info, fields->f_imm4, 0, pc, length);
 141       break;
 142     case XSTORMY16_OPERAND_IMM8 :
 143       print_normal (cd, info, fields->f_imm8, 0, pc, length);
 144       break;
 145     case XSTORMY16_OPERAND_IMM8SMALL :
 146       print_normal (cd, info, fields->f_imm8, 0, pc, length);
 147       break;
 148     case XSTORMY16_OPERAND_LMEM8 :
 149       print_normal (cd, info, fields->f_lmem8, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
 150       break;
 151     case XSTORMY16_OPERAND_REL12 :
 152       print_normal (cd, info, fields->f_rel12, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 153       break;
 154     case XSTORMY16_OPERAND_REL12A :
 155       print_normal (cd, info, fields->f_rel12a, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 156       break;
 157     case XSTORMY16_OPERAND_REL8_2 :
 158       print_normal (cd, info, fields->f_rel8_2, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 159       break;
 160     case XSTORMY16_OPERAND_REL8_4 :
 161       print_normal (cd, info, fields->f_rel8_4, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 162       break;
 163     case XSTORMY16_OPERAND_WS2 :
 164       print_keyword (cd, info, & xstormy16_cgen_opval_h_wordsize, fields->f_op2m, 0);
 165       break;
 166
 167     default :
 168       /* xgettext:c-format */
 169       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 170                opindex);
 171     abort ();
 172   }
 173 }
 174
 175 cgen_print_fn * const xstormy16_cgen_print_handlers[] =
 176 {
 177   print_insn_normal,
 178 };
 179
 180
 181 void
 182 xstormy16_cgen_init_dis (cd)
 183      CGEN_CPU_DESC cd;
 184 {
 185   xstormy16_cgen_init_opcode_table (cd);
 186   xstormy16_cgen_init_ibld_table (cd);
 187   cd->print_handlers = & xstormy16_cgen_print_handlers[0];
 188   cd->print_operand = xstormy16_cgen_print_operand;
 189 }
 190
 191 \f
 192 /* Default print handler.  */
 193
 194 static void
 195 print_normal (cd, dis_info, value, attrs, pc, length)
 196      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 197      PTR dis_info;
 198      long value;
 199      unsigned int attrs;
 200      bfd_vma pc ATTRIBUTE_UNUSED;
 201      int length ATTRIBUTE_UNUSED;
 202 {
 203   disassemble_info *info = (disassemble_info *) dis_info;
 204
 205 #ifdef CGEN_PRINT_NORMAL
 206   CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
 207 #endif
 208
 209   /* Print the operand as directed by the attributes.  */
 210   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 211     ; /* nothing to do */
 212   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 213     (*info->fprintf_func) (info->stream, "%ld", value);
 214   else
 215     (*info->fprintf_func) (info->stream, "0x%lx", value);
 216 }
 217
 218 /* Default address handler.  */
 219
 220 static void
 221 print_address (cd, dis_info, value, attrs, pc, length)
 222      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 223      PTR dis_info;
 224      bfd_vma value;
 225      unsigned int attrs;
 226      bfd_vma pc ATTRIBUTE_UNUSED;
 227      int length ATTRIBUTE_UNUSED;
 228 {
 229   disassemble_info *info = (disassemble_info *) dis_info;
 230
 231 #ifdef CGEN_PRINT_ADDRESS
 232   CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
 233 #endif
 234
 235   /* Print the operand as directed by the attributes.  */
 236   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 237     ; /* nothing to do */
 238   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 239     (*info->print_address_func) (value, info);
 240   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 241     (*info->print_address_func) (value, info);
 242   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 243     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 244   else
 245     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 246 }
 247
 248 /* Keyword print handler.  */
 249
 250 static void
 251 print_keyword (cd, dis_info, keyword_table, value, attrs)
 252      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 253      PTR dis_info;
 254      CGEN_KEYWORD *keyword_table;
 255      long value;
 256      unsigned int attrs ATTRIBUTE_UNUSED;
 257 {
 258   disassemble_info *info = (disassemble_info *) dis_info;
 259   const CGEN_KEYWORD_ENTRY *ke;
 260
 261   ke = cgen_keyword_lookup_value (keyword_table, value);
 262   if (ke != NULL)
 263     (*info->fprintf_func) (info->stream, "%s", ke->name);
 264   else
 265     (*info->fprintf_func) (info->stream, "???");
 266 }
 267 \f
 268 /* Default insn printer.
 269
 270    DIS_INFO is defined as `PTR' so the disassembler needn't know anything
 271    about disassemble_info.  */
 272
 273 static void
 274 print_insn_normal (cd, dis_info, insn, fields, pc, length)
 275      CGEN_CPU_DESC cd;
 276      PTR dis_info;
 277      const CGEN_INSN *insn;
 278      CGEN_FIELDS *fields;
 279      bfd_vma pc;
 280      int length;
 281 {
 282   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 283   disassemble_info *info = (disassemble_info *) dis_info;
 284   const CGEN_SYNTAX_CHAR_TYPE *syn;
 285
 286   CGEN_INIT_PRINT (cd);
 287
 288   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 289     {
 290       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 291         {
 292           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 293           continue;
 294         }
 295       if (CGEN_SYNTAX_CHAR_P (*syn))
 296         {
 297           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 298           continue;
 299         }
 300
 301       /* We have an operand.  */
 302       xstormy16_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 303                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 304     }
 305 }
 306 \f
 307 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 308    the extract info.
 309    Returns 0 if all is well, non-zero otherwise.  */
 310
 311 static int
 312 read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
 313      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 314      bfd_vma pc;
 315      disassemble_info *info;
 316      char *buf;
 317      int buflen;
 318      CGEN_EXTRACT_INFO *ex_info;
 319      unsigned long *insn_value;
 320 {
 321   int status = (*info->read_memory_func) (pc, buf, buflen, info);
 322   if (status != 0)
 323     {
 324       (*info->memory_error_func) (status, pc, info);
 325       return -1;
 326     }
 327
 328   ex_info->dis_info = info;
 329   ex_info->valid = (1 << buflen) - 1;
 330   ex_info->insn_bytes = buf;
 331
 332   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
 333   return 0;
 334 }
 335
 336 /* Utility to print an insn.
 337    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
 338    The result is the size of the insn in bytes or zero for an unknown insn
 339    or -1 if an error occurs fetching data (memory_error_func will have
 340    been called).  */
 341
 342 static int
 343 print_insn (cd, pc, info, buf, buflen)
 344      CGEN_CPU_DESC cd;
 345      bfd_vma pc;
 346      disassemble_info *info;
 347      char *buf;
 348      unsigned int buflen;
 349 {
 350   CGEN_INSN_INT insn_value;
 351   const CGEN_INSN_LIST *insn_list;
 352   CGEN_EXTRACT_INFO ex_info;
 353   int basesize;
 354
 355   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
 356   basesize = cd->base_insn_bitsize < buflen * 8 ?
 357                                      cd->base_insn_bitsize : buflen * 8;
 358   insn_value = cgen_get_insn_value (cd, buf, basesize);
 359
 360
 361   /* Fill in ex_info fields like read_insn would.  Don't actually call
 362      read_insn, since the incoming buffer is already read (and possibly
 363      modified a la m32r).  */
 364   ex_info.valid = (1 << buflen) - 1;
 365   ex_info.dis_info = info;
 366   ex_info.insn_bytes = buf;
 367
 368   /* The instructions are stored in hash lists.
 369      Pick the first one and keep trying until we find the right one.  */
 370
 371   insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
 372   while (insn_list != NULL)
 373     {
 374       const CGEN_INSN *insn = insn_list->insn;
 375       CGEN_FIELDS fields;
 376       int length;
 377       unsigned long insn_value_cropped;
 378
 379 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 380       /* Not needed as insn shouldn't be in hash lists if not supported.  */
 381       /* Supported by this cpu?  */
 382       if (! xstormy16_cgen_insn_supported (cd, insn))
 383         {
 384           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 385           continue;
 386         }
 387 #endif
 388
 389       /* Basic bit mask must be correct.  */
 390       /* ??? May wish to allow target to defer this check until the extract
 391          handler.  */
 392
 393       /* Base size may exceed this instruction's size.  Extract the
 394          relevant part from the buffer. */
 395       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
 396           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 397         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
 398                                            info->endian == BFD_ENDIAN_BIG);
 399       else
 400         insn_value_cropped = insn_value;
 401
 402       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 403           == CGEN_INSN_BASE_VALUE (insn))
 404         {
 405           /* Printing is handled in two passes.  The first pass parses the
 406              machine insn and extracts the fields.  The second pass prints
 407              them.  */
 408
 409           /* Make sure the entire insn is loaded into insn_value, if it
 410              can fit.  */
 411           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
 412               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 413             {
 414               unsigned long full_insn_value;
 415               int rc = read_insn (cd, pc, info, buf,
 416                                   CGEN_INSN_BITSIZE (insn) / 8,
 417                                   & ex_info, & full_insn_value);
 418               if (rc != 0)
 419                 return rc;
 420               length = CGEN_EXTRACT_FN (cd, insn)
 421                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
 422             }
 423           else
 424             length = CGEN_EXTRACT_FN (cd, insn)
 425               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 426
 427           /* length < 0 -> error */
 428           if (length < 0)
 429             return length;
 430           if (length > 0)
 431             {
 432               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
 433               /* length is in bits, result is in bytes */
 434               return length / 8;
 435             }
 436         }
 437
 438       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 439     }
 440
 441   return 0;
 442 }
 443
 444 /* Default value for CGEN_PRINT_INSN.
 445    The result is the size of the insn in bytes or zero for an unknown insn
 446    or -1 if an error occured fetching bytes.  */
 447
 448 #ifndef CGEN_PRINT_INSN
 449 #define CGEN_PRINT_INSN default_print_insn
 450 #endif
 451
 452 static int
 453 default_print_insn (cd, pc, info)
 454      CGEN_CPU_DESC cd;
 455      bfd_vma pc;
 456      disassemble_info *info;
 457 {
 458   char buf[CGEN_MAX_INSN_SIZE];
 459   int buflen;
 460   int status;
 461
 462   /* Attempt to read the base part of the insn.  */
 463   buflen = cd->base_insn_bitsize / 8;
 464   status = (*info->read_memory_func) (pc, buf, buflen, info);
 465
 466   /* Try again with the minimum part, if min < base.  */
 467   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
 468     {
 469       buflen = cd->min_insn_bitsize / 8;
 470       status = (*info->read_memory_func) (pc, buf, buflen, info);
 471     }
 472
 473   if (status != 0)
 474     {
 475       (*info->memory_error_func) (status, pc, info);
 476       return -1;
 477     }
 478
 479   return print_insn (cd, pc, info, buf, buflen);
 480 }
 481
 482 /* Main entry point.
 483    Print one instruction from PC on INFO->STREAM.
 484    Return the size of the instruction (in bytes).  */
 485
 486 typedef struct cpu_desc_list {
 487   struct cpu_desc_list *next;
 488   int isa;
 489   int mach;
 490   int endian;
 491   CGEN_CPU_DESC cd;
 492 } cpu_desc_list;
 493
 494 int
 495 print_insn_xstormy16 (pc, info)
 496      bfd_vma pc;
 497      disassemble_info *info;
 498 {
 499   static cpu_desc_list *cd_list = 0;
 500   cpu_desc_list *cl = 0;
 501   static CGEN_CPU_DESC cd = 0;
 502   static int prev_isa;
 503   static int prev_mach;
 504   static int prev_endian;
 505   int length;
 506   int isa,mach;
 507   int endian = (info->endian == BFD_ENDIAN_BIG
 508                 ? CGEN_ENDIAN_BIG
 509                 : CGEN_ENDIAN_LITTLE);
 510   enum bfd_architecture arch;
 511
 512   /* ??? gdb will set mach but leave the architecture as "unknown" */
 513 #ifndef CGEN_BFD_ARCH
 514 #define CGEN_BFD_ARCH bfd_arch_xstormy16
 515 #endif
 516   arch = info->arch;
 517   if (arch == bfd_arch_unknown)
 518     arch = CGEN_BFD_ARCH;
 519
 520   /* There's no standard way to compute the machine or isa number
 521      so we leave it to the target.  */
 522 #ifdef CGEN_COMPUTE_MACH
 523   mach = CGEN_COMPUTE_MACH (info);
 524 #else
 525   mach = info->mach;
 526 #endif
 527
 528 #ifdef CGEN_COMPUTE_ISA
 529   isa = CGEN_COMPUTE_ISA (info);
 530 #else
 531   isa = info->insn_sets;
 532 #endif
 533
 534   /* If we've switched cpu's, try to find a handle we've used before */
 535   if (cd
 536       && (isa != prev_isa
 537           || mach != prev_mach
 538           || endian != prev_endian))
 539     {
 540       cd = 0;
 541       for (cl = cd_list; cl; cl = cl->next)
 542         {
 543           if (cl->isa == isa &&
 544               cl->mach == mach &&
 545               cl->endian == endian)
 546             {
 547               cd = cl->cd;
 548               break;
 549             }
 550         }
 551     }
 552
 553   /* If we haven't initialized yet, initialize the opcode table.  */
 554   if (! cd)
 555     {
 556       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
 557       const char *mach_name;
 558
 559       if (!arch_type)
 560         abort ();
 561       mach_name = arch_type->printable_name;
 562
 563       prev_isa = isa;
 564       prev_mach = mach;
 565       prev_endian = endian;
 566       cd = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
 567                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
 568                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
 569                                  CGEN_CPU_OPEN_END);
 570       if (!cd)
 571         abort ();
 572
 573       /* save this away for future reference */
 574       cl = xmalloc (sizeof (struct cpu_desc_list));
 575       cl->cd = cd;
 576       cl->isa = isa;
 577       cl->mach = mach;
 578       cl->endian = endian;
 579       cl->next = cd_list;
 580       cd_list = cl;
 581
 582       xstormy16_cgen_init_dis (cd);
 583     }
 584
 585   /* We try to have as much common code as possible.
 586      But at this point some targets need to take over.  */
 587   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
 588      but if not possible try to move this hook elsewhere rather than
 589      have two hooks.  */
 590   length = CGEN_PRINT_INSN (cd, pc, info);
 591   if (length > 0)
 592     return length;
 593   if (length < 0)
 594     return -1;
 595
 596   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 597   return cd->default_insn_bitsize / 8;
 598 }