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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
[binutils.git] / gas / config / tc-avr.c
blobdfac293c56385f5286a92001b5c8c14d25957aad
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27
28 struct avr_opcodes_s
29 {
30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
35 };
36
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
39
40 struct avr_opcodes_s avr_opcodes[] =
41 {
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44 };
45
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
49
50 const char *md_shortopts = "m:";
51 struct mcu_type_s
52 {
53 char *name;
54 int isa;
55 int mach;
56 };
57
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility. */
60
61 static struct mcu_type_s mcu_types[] =
62 {
63 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
64 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
65 but set to AVR_ISA_AVR25 for some following version
66 of GCC (from 4.3) for backward compatibility. */
67 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
68 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
69 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
70 but set to AVR_ISA_AVR3_ALL for some following version
71 of GCC (from 4.3) for backward compatibility. */
72 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
73 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
74 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
75 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
76 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
77 but set to AVR_ISA_AVR51 for some following version
78 of GCC (from 4.3) for backward compatibility. */
79 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
80 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
81 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
82 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
83 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
84 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
85 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
86 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
87 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
88 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
89 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
90 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
91 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
92 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
93 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
94 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
95 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
96 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
97 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
98 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
100 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
101 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
102 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
103 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
104 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
105 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
106 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
107 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
108 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
109 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
114 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
115 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
116 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
117 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
118 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
119 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
120 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
121 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
122 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
123 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
124 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
125 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
126 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
127 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
128 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
129 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
130 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
131 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
132 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
133 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
134 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
135 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
136 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
137 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
138 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
139 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
140 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
141 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
142 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
143 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
144 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
145 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
146 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
147 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
148 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
149 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
150 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
151 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
152 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
153 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
154 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
155 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
156 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
157 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
158 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
159 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
160 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
161 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
162 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
163 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
164 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
165 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
166 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
167 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
168 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
169 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
170 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
176 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
177 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
178 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
179 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
180 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
181 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
182 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
183 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
184 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
185 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
186 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
187 {NULL, 0, 0}
188 };
189
190 /* Current MCU type. */
191 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
192 static struct mcu_type_s * avr_mcu = & default_mcu;
193
194 /* AVR target-specific switches. */
195 struct avr_opt_s
196 {
197 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
198 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
199 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
200 };
201
202 static struct avr_opt_s avr_opt = { 0, 0, 0 };
203
204 const char EXP_CHARS[] = "eE";
205 const char FLT_CHARS[] = "dD";
206
207 static void avr_set_arch (int);
208
209 /* The target specific pseudo-ops which we support. */
210 const pseudo_typeS md_pseudo_table[] =
211 {
212 {"arch", avr_set_arch, 0},
213 { NULL, NULL, 0}
214 };
215
216 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
217
218 #define EXP_MOD_NAME(i) exp_mod[i].name
219 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
220 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
221 #define HAVE_PM_P(i) exp_mod[i].have_pm
222
223 struct exp_mod_s
224 {
225 char * name;
226 bfd_reloc_code_real_type reloc;
227 bfd_reloc_code_real_type neg_reloc;
228 int have_pm;
229 };
230
231 static struct exp_mod_s exp_mod[] =
232 {
233 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
234 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
235 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
236 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
237 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
238 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
239 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
240 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
241 };
242
243 /* A union used to store indicies into the exp_mod[] array
244 in a hash table which expects void * data types. */
245 typedef union
246 {
247 void * ptr;
248 int index;
249 } mod_index;
250
251 /* Opcode hash table. */
252 static struct hash_control *avr_hash;
253
254 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
255 static struct hash_control *avr_mod_hash;
256
257 #define OPTION_MMCU 'm'
258 enum options
259 {
260 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
261 OPTION_NO_SKIP_BUG,
262 OPTION_NO_WRAP
263 };
264
265 struct option md_longopts[] =
266 {
267 { "mmcu", required_argument, NULL, OPTION_MMCU },
268 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
269 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
270 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
271 { NULL, no_argument, NULL, 0 }
272 };
273
274 size_t md_longopts_size = sizeof (md_longopts);
275
276 /* Display nicely formatted list of known MCU names. */
277
278 static void
279 show_mcu_list (FILE *stream)
280 {
281 int i, x;
282
283 fprintf (stream, _("Known MCU names:"));
284 x = 1000;
285
286 for (i = 0; mcu_types[i].name; i++)
287 {
288 int len = strlen (mcu_types[i].name);
289
290 x += len + 1;
291
292 if (x < 75)
293 fprintf (stream, " %s", mcu_types[i].name);
294 else
295 {
296 fprintf (stream, "\n %s", mcu_types[i].name);
297 x = len + 2;
298 }
299 }
300
301 fprintf (stream, "\n");
302 }
303
304 static inline char *
305 skip_space (char *s)
306 {
307 while (*s == ' ' || *s == '\t')
308 ++s;
309 return s;
310 }
311
312 /* Extract one word from FROM and copy it to TO. */
313
314 static char *
315 extract_word (char *from, char *to, int limit)
316 {
317 char *op_start;
318 char *op_end;
319 int size = 0;
320
321 /* Drop leading whitespace. */
322 from = skip_space (from);
323 *to = 0;
324
325 /* Find the op code end. */
326 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
327 {
328 to[size++] = *op_end++;
329 if (size + 1 >= limit)
330 break;
331 }
332
333 to[size] = 0;
334 return op_end;
335 }
336
337 int
338 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
339 asection *seg ATTRIBUTE_UNUSED)
340 {
341 abort ();
342 return 0;
343 }
344
345 void
346 md_show_usage (FILE *stream)
347 {
348 fprintf (stream,
349 _("AVR options:\n"
350 " -mmcu=[avr-name] select microcontroller variant\n"
351 " [avr-name] can be:\n"
352 " avr1 - classic AVR core without data RAM\n"
353 " avr2 - classic AVR core with up to 8K program memory\n"
354 " avr25 - classic AVR core with up to 8K program memory\n"
355 " plus the MOVW instruction\n"
356 " avr3 - classic AVR core with up to 64K program memory\n"
357 " avr31 - classic AVR core with up to 128K program memory\n"
358 " avr35 - classic AVR core with up to 64K program memory\n"
359 " plus the MOVW instruction\n"
360 " avr4 - enhanced AVR core with up to 8K program memory\n"
361 " avr5 - enhanced AVR core with up to 64K program memory\n"
362 " avr51 - enhanced AVR core with up to 128K program memory\n"
363 " avr6 - enhanced AVR core with up to 256K program memory\n"
364 " or immediate microcontroller name.\n"));
365 fprintf (stream,
366 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
367 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
368 " (default for avr4, avr5)\n"
369 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
370 " (default for avr3, avr5)\n"));
371 show_mcu_list (stream);
372 }
373
374 static void
375 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
376 {
377 char str[20];
378
379 input_line_pointer = extract_word (input_line_pointer, str, 20);
380 md_parse_option (OPTION_MMCU, str);
381 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
382 }
383
384 int
385 md_parse_option (int c, char *arg)
386 {
387 switch (c)
388 {
389 case OPTION_MMCU:
390 {
391 int i;
392 char *s = alloca (strlen (arg) + 1);
393
394 {
395 char *t = s;
396 char *arg1 = arg;
397
398 do
399 *t = TOLOWER (*arg1++);
400 while (*t++);
401 }
402
403 for (i = 0; mcu_types[i].name; ++i)
404 if (strcmp (mcu_types[i].name, s) == 0)
405 break;
406
407 if (!mcu_types[i].name)
408 {
409 show_mcu_list (stderr);
410 as_fatal (_("unknown MCU: %s\n"), arg);
411 }
412
413 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
414 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
415 as .arch ... in the asm output at the same time. */
416 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
417 avr_mcu = &mcu_types[i];
418 else
419 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
420 avr_mcu->name, mcu_types[i].name);
421 return 1;
422 }
423 case OPTION_ALL_OPCODES:
424 avr_opt.all_opcodes = 1;
425 return 1;
426 case OPTION_NO_SKIP_BUG:
427 avr_opt.no_skip_bug = 1;
428 return 1;
429 case OPTION_NO_WRAP:
430 avr_opt.no_wrap = 1;
431 return 1;
432 }
433
434 return 0;
435 }
436
437 symbolS *
438 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
439 {
440 return NULL;
441 }
442
443 char *
444 md_atof (int type, char *litP, int *sizeP)
445 {
446 return ieee_md_atof (type, litP, sizeP, FALSE);
447 }
448
449 void
450 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
451 asection *sec ATTRIBUTE_UNUSED,
452 fragS *fragP ATTRIBUTE_UNUSED)
453 {
454 abort ();
455 }
456
457 void
458 md_begin (void)
459 {
460 unsigned int i;
461 struct avr_opcodes_s *opcode;
462
463 avr_hash = hash_new ();
464
465 /* Insert unique names into hash table. This hash table then provides a
466 quick index to the first opcode with a particular name in the opcode
467 table. */
468 for (opcode = avr_opcodes; opcode->name; opcode++)
469 hash_insert (avr_hash, opcode->name, (char *) opcode);
470
471 avr_mod_hash = hash_new ();
472
473 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
474 {
475 mod_index m;
476
477 m.index = i + 10;
478 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
479 }
480
481 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
482 }
483
484 /* Resolve STR as a constant expression and return the result.
485 If result greater than MAX then error. */
486
487 static unsigned int
488 avr_get_constant (char *str, int max)
489 {
490 expressionS ex;
491
492 str = skip_space (str);
493 input_line_pointer = str;
494 expression (& ex);
495
496 if (ex.X_op != O_constant)
497 as_bad (_("constant value required"));
498
499 if (ex.X_add_number > max || ex.X_add_number < 0)
500 as_bad (_("number must be positive and less than %d"), max + 1);
501
502 return ex.X_add_number;
503 }
504
505 /* Parse for ldd/std offset. */
506
507 static void
508 avr_offset_expression (expressionS *exp)
509 {
510 char *str = input_line_pointer;
511 char *tmp;
512 char op[8];
513
514 tmp = str;
515 str = extract_word (str, op, sizeof (op));
516
517 input_line_pointer = tmp;
518 expression (exp);
519
520 /* Warn about expressions that fail to use lo8 (). */
521 if (exp->X_op == O_constant)
522 {
523 int x = exp->X_add_number;
524
525 if (x < -255 || x > 255)
526 as_warn (_("constant out of 8-bit range: %d"), x);
527 }
528 }
529
530 /* Parse ordinary expression. */
531
532 static char *
533 parse_exp (char *s, expressionS *op)
534 {
535 input_line_pointer = s;
536 expression (op);
537 if (op->X_op == O_absent)
538 as_bad (_("missing operand"));
539 return input_line_pointer;
540 }
541
542 /* Parse special expressions (needed for LDI command):
543 xx8 (address)
544 xx8 (-address)
545 pm_xx8 (address)
546 pm_xx8 (-address)
547 where xx is: hh, hi, lo. */
548
549 static bfd_reloc_code_real_type
550 avr_ldi_expression (expressionS *exp)
551 {
552 char *str = input_line_pointer;
553 char *tmp;
554 char op[8];
555 int mod;
556 int linker_stubs_should_be_generated = 0;
557
558 tmp = str;
559
560 str = extract_word (str, op, sizeof (op));
561
562 if (op[0])
563 {
564 mod_index m;
565
566 m.ptr = hash_find (avr_mod_hash, op);
567 mod = m.index;
568
569 if (mod)
570 {
571 int closes = 0;
572
573 mod -= 10;
574 str = skip_space (str);
575
576 if (*str == '(')
577 {
578 bfd_reloc_code_real_type reloc_to_return;
579 int neg_p = 0;
580
581 ++str;
582
583 if (strncmp ("pm(", str, 3) == 0
584 || strncmp ("gs(",str,3) == 0
585 || strncmp ("-(gs(",str,5) == 0
586 || strncmp ("-(pm(", str, 5) == 0)
587 {
588 if (HAVE_PM_P (mod))
589 {
590 ++mod;
591 ++closes;
592 }
593 else
594 as_bad (_("illegal expression"));
595
596 if (str[0] == 'g' || str[2] == 'g')
597 linker_stubs_should_be_generated = 1;
598
599 if (*str == '-')
600 {
601 neg_p = 1;
602 ++closes;
603 str += 5;
604 }
605 else
606 str += 3;
607 }
608
609 if (*str == '-' && *(str + 1) == '(')
610 {
611 neg_p ^= 1;
612 ++closes;
613 str += 2;
614 }
615
616 input_line_pointer = str;
617 expression (exp);
618
619 do
620 {
621 if (*input_line_pointer != ')')
622 {
623 as_bad (_("`)' required"));
624 break;
625 }
626 input_line_pointer++;
627 }
628 while (closes--);
629
630 reloc_to_return =
631 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
632 if (linker_stubs_should_be_generated)
633 {
634 switch (reloc_to_return)
635 {
636 case BFD_RELOC_AVR_LO8_LDI_PM:
637 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
638 break;
639 case BFD_RELOC_AVR_HI8_LDI_PM:
640 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
641 break;
642
643 default:
644 /* PR 5523: Do not generate a warning here,
645 legitimate code can trigger this case. */
646 break;
647 }
648 }
649 return reloc_to_return;
650 }
651 }
652 }
653
654 input_line_pointer = tmp;
655 expression (exp);
656
657 /* Warn about expressions that fail to use lo8 (). */
658 if (exp->X_op == O_constant)
659 {
660 int x = exp->X_add_number;
661
662 if (x < -255 || x > 255)
663 as_warn (_("constant out of 8-bit range: %d"), x);
664 }
665
666 return BFD_RELOC_AVR_LDI;
667 }
668
669 /* Parse one instruction operand.
670 Return operand bitmask. Also fixups can be generated. */
671
672 static unsigned int
673 avr_operand (struct avr_opcodes_s *opcode,
674 int where,
675 char *op,
676 char **line)
677 {
678 expressionS op_expr;
679 unsigned int op_mask = 0;
680 char *str = skip_space (*line);
681
682 switch (*op)
683 {
684 /* Any register operand. */
685 case 'w':
686 case 'd':
687 case 'r':
688 case 'a':
689 case 'v':
690 if (*str == 'r' || *str == 'R')
691 {
692 char r_name[20];
693
694 str = extract_word (str, r_name, sizeof (r_name));
695 op_mask = 0xff;
696 if (ISDIGIT (r_name[1]))
697 {
698 if (r_name[2] == '\0')
699 op_mask = r_name[1] - '0';
700 else if (r_name[1] != '0'
701 && ISDIGIT (r_name[2])
702 && r_name[3] == '\0')
703 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
704 }
705 }
706 else
707 {
708 op_mask = avr_get_constant (str, 31);
709 str = input_line_pointer;
710 }
711
712 if (op_mask <= 31)
713 {
714 switch (*op)
715 {
716 case 'a':
717 if (op_mask < 16 || op_mask > 23)
718 as_bad (_("register r16-r23 required"));
719 op_mask -= 16;
720 break;
721
722 case 'd':
723 if (op_mask < 16)
724 as_bad (_("register number above 15 required"));
725 op_mask -= 16;
726 break;
727
728 case 'v':
729 if (op_mask & 1)
730 as_bad (_("even register number required"));
731 op_mask >>= 1;
732 break;
733
734 case 'w':
735 if ((op_mask & 1) || op_mask < 24)
736 as_bad (_("register r24, r26, r28 or r30 required"));
737 op_mask = (op_mask - 24) >> 1;
738 break;
739 }
740 break;
741 }
742 as_bad (_("register name or number from 0 to 31 required"));
743 break;
744
745 case 'e':
746 {
747 char c;
748
749 if (*str == '-')
750 {
751 str = skip_space (str + 1);
752 op_mask = 0x1002;
753 }
754 c = TOLOWER (*str);
755 if (c == 'x')
756 op_mask |= 0x100c;
757 else if (c == 'y')
758 op_mask |= 0x8;
759 else if (c != 'z')
760 as_bad (_("pointer register (X, Y or Z) required"));
761
762 str = skip_space (str + 1);
763 if (*str == '+')
764 {
765 ++str;
766 if (op_mask & 2)
767 as_bad (_("cannot both predecrement and postincrement"));
768 op_mask |= 0x1001;
769 }
770
771 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
772 registers, no predecrement, no postincrement. */
773 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
774 && !(avr_mcu->isa & AVR_ISA_SRAM))
775 as_bad (_("addressing mode not supported"));
776 }
777 break;
778
779 case 'z':
780 if (*str == '-')
781 as_bad (_("can't predecrement"));
782
783 if (! (*str == 'z' || *str == 'Z'))
784 as_bad (_("pointer register Z required"));
785
786 str = skip_space (str + 1);
787
788 if (*str == '+')
789 {
790 ++str;
791 op_mask |= 1;
792 }
793
794 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
795 if (!avr_opt.all_opcodes
796 && (op_mask & 0x0001)
797 && !(avr_mcu->isa & AVR_ISA_MOVW))
798 as_bad (_("postincrement not supported"));
799 break;
800
801 case 'b':
802 {
803 char c = TOLOWER (*str++);
804
805 if (c == 'y')
806 op_mask |= 0x8;
807 else if (c != 'z')
808 as_bad (_("pointer register (Y or Z) required"));
809 str = skip_space (str);
810 if (*str++ == '+')
811 {
812 input_line_pointer = str;
813 avr_offset_expression (& op_expr);
814 str = input_line_pointer;
815 fix_new_exp (frag_now, where, 3,
816 &op_expr, FALSE, BFD_RELOC_AVR_6);
817 }
818 }
819 break;
820
821 case 'h':
822 str = parse_exp (str, &op_expr);
823 fix_new_exp (frag_now, where, opcode->insn_size * 2,
824 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
825 break;
826
827 case 'L':
828 str = parse_exp (str, &op_expr);
829 fix_new_exp (frag_now, where, opcode->insn_size * 2,
830 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
831 break;
832
833 case 'l':
834 str = parse_exp (str, &op_expr);
835 fix_new_exp (frag_now, where, opcode->insn_size * 2,
836 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
837 break;
838
839 case 'i':
840 str = parse_exp (str, &op_expr);
841 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
842 &op_expr, FALSE, BFD_RELOC_16);
843 break;
844
845 case 'M':
846 {
847 bfd_reloc_code_real_type r_type;
848
849 input_line_pointer = str;
850 r_type = avr_ldi_expression (&op_expr);
851 str = input_line_pointer;
852 fix_new_exp (frag_now, where, 3,
853 &op_expr, FALSE, r_type);
854 }
855 break;
856
857 case 'n':
858 {
859 unsigned int x;
860
861 x = ~avr_get_constant (str, 255);
862 str = input_line_pointer;
863 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
864 }
865 break;
866
867 case 'K':
868 input_line_pointer = str;
869 avr_offset_expression (& op_expr);
870 str = input_line_pointer;
871 fix_new_exp (frag_now, where, 3,
872 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
873 break;
874
875 case 'S':
876 case 's':
877 {
878 unsigned int x;
879
880 x = avr_get_constant (str, 7);
881 str = input_line_pointer;
882 if (*op == 'S')
883 x <<= 4;
884 op_mask |= x;
885 }
886 break;
887
888 case 'P':
889 {
890 unsigned int x;
891
892 x = avr_get_constant (str, 63);
893 str = input_line_pointer;
894 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
895 }
896 break;
897
898 case 'p':
899 {
900 unsigned int x;
901
902 x = avr_get_constant (str, 31);
903 str = input_line_pointer;
904 op_mask |= x << 3;
905 }
906 break;
907
908 case '?':
909 break;
910
911 default:
912 as_bad (_("unknown constraint `%c'"), *op);
913 }
914
915 *line = str;
916 return op_mask;
917 }
918
919 /* Parse instruction operands.
920 Return binary opcode. */
921
922 static unsigned int
923 avr_operands (struct avr_opcodes_s *opcode, char **line)
924 {
925 char *op = opcode->constraints;
926 unsigned int bin = opcode->bin_opcode;
927 char *frag = frag_more (opcode->insn_size * 2);
928 char *str = *line;
929 int where = frag - frag_now->fr_literal;
930 static unsigned int prev = 0; /* Previous opcode. */
931
932 /* Opcode have operands. */
933 if (*op)
934 {
935 unsigned int reg1 = 0;
936 unsigned int reg2 = 0;
937 int reg1_present = 0;
938 int reg2_present = 0;
939
940 /* Parse first operand. */
941 if (REGISTER_P (*op))
942 reg1_present = 1;
943 reg1 = avr_operand (opcode, where, op, &str);
944 ++op;
945
946 /* Parse second operand. */
947 if (*op)
948 {
949 if (*op == ',')
950 ++op;
951
952 if (*op == '=')
953 {
954 reg2 = reg1;
955 reg2_present = 1;
956 }
957 else
958 {
959 if (REGISTER_P (*op))
960 reg2_present = 1;
961
962 str = skip_space (str);
963 if (*str++ != ',')
964 as_bad (_("`,' required"));
965 str = skip_space (str);
966
967 reg2 = avr_operand (opcode, where, op, &str);
968 }
969
970 if (reg1_present && reg2_present)
971 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
972 else if (reg2_present)
973 reg2 <<= 4;
974 }
975 if (reg1_present)
976 reg1 <<= 4;
977 bin |= reg1 | reg2;
978 }
979
980 /* Detect undefined combinations (like ld r31,Z+). */
981 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
982 as_warn (_("undefined combination of operands"));
983
984 if (opcode->insn_size == 2)
985 {
986 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
987 (AVR core bug, fixed in the newer devices). */
988 if (!(avr_opt.no_skip_bug ||
989 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
990 && AVR_SKIP_P (prev))
991 as_warn (_("skipping two-word instruction"));
992
993 bfd_putl32 ((bfd_vma) bin, frag);
994 }
995 else
996 bfd_putl16 ((bfd_vma) bin, frag);
997
998 prev = bin;
999 *line = str;
1000 return bin;
1001 }
1002
1003 /* GAS will call this function for each section at the end of the assembly,
1004 to permit the CPU backend to adjust the alignment of a section. */
1005
1006 valueT
1007 md_section_align (asection *seg, valueT addr)
1008 {
1009 int align = bfd_get_section_alignment (stdoutput, seg);
1010 return ((addr + (1 << align) - 1) & (-1 << align));
1011 }
1012
1013 /* If you define this macro, it should return the offset between the
1014 address of a PC relative fixup and the position from which the PC
1015 relative adjustment should be made. On many processors, the base
1016 of a PC relative instruction is the next instruction, so this
1017 macro would return the length of an instruction. */
1018
1019 long
1020 md_pcrel_from_section (fixS *fixp, segT sec)
1021 {
1022 if (fixp->fx_addsy != (symbolS *) NULL
1023 && (!S_IS_DEFINED (fixp->fx_addsy)
1024 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1025 return 0;
1026
1027 return fixp->fx_frag->fr_address + fixp->fx_where;
1028 }
1029
1030 /* GAS will call this for each fixup. It should store the correct
1031 value in the object file. */
1032
1033 void
1034 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1035 {
1036 unsigned char *where;
1037 unsigned long insn;
1038 long value = *valP;
1039
1040 if (fixP->fx_addsy == (symbolS *) NULL)
1041 fixP->fx_done = 1;
1042
1043 else if (fixP->fx_pcrel)
1044 {
1045 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1046
1047 if (s == seg || s == absolute_section)
1048 {
1049 value += S_GET_VALUE (fixP->fx_addsy);
1050 fixP->fx_done = 1;
1051 }
1052 }
1053
1054 /* We don't actually support subtracting a symbol. */
1055 if (fixP->fx_subsy != (symbolS *) NULL)
1056 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1057
1058 switch (fixP->fx_r_type)
1059 {
1060 default:
1061 fixP->fx_no_overflow = 1;
1062 break;
1063 case BFD_RELOC_AVR_7_PCREL:
1064 case BFD_RELOC_AVR_13_PCREL:
1065 case BFD_RELOC_32:
1066 case BFD_RELOC_16:
1067 case BFD_RELOC_AVR_CALL:
1068 break;
1069 }
1070
1071 if (fixP->fx_done)
1072 {
1073 /* Fetch the instruction, insert the fully resolved operand
1074 value, and stuff the instruction back again. */
1075 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1076 insn = bfd_getl16 (where);
1077
1078 switch (fixP->fx_r_type)
1079 {
1080 case BFD_RELOC_AVR_7_PCREL:
1081 if (value & 1)
1082 as_bad_where (fixP->fx_file, fixP->fx_line,
1083 _("odd address operand: %ld"), value);
1084
1085 /* Instruction addresses are always right-shifted by 1. */
1086 value >>= 1;
1087 --value; /* Correct PC. */
1088
1089 if (value < -64 || value > 63)
1090 as_bad_where (fixP->fx_file, fixP->fx_line,
1091 _("operand out of range: %ld"), value);
1092 value = (value << 3) & 0x3f8;
1093 bfd_putl16 ((bfd_vma) (value | insn), where);
1094 break;
1095
1096 case BFD_RELOC_AVR_13_PCREL:
1097 if (value & 1)
1098 as_bad_where (fixP->fx_file, fixP->fx_line,
1099 _("odd address operand: %ld"), value);
1100
1101 /* Instruction addresses are always right-shifted by 1. */
1102 value >>= 1;
1103 --value; /* Correct PC. */
1104
1105 if (value < -2048 || value > 2047)
1106 {
1107 /* No wrap for devices with >8K of program memory. */
1108 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1109 as_bad_where (fixP->fx_file, fixP->fx_line,
1110 _("operand out of range: %ld"), value);
1111 }
1112
1113 value &= 0xfff;
1114 bfd_putl16 ((bfd_vma) (value | insn), where);
1115 break;
1116
1117 case BFD_RELOC_32:
1118 bfd_putl16 ((bfd_vma) value, where);
1119 break;
1120
1121 case BFD_RELOC_16:
1122 bfd_putl16 ((bfd_vma) value, where);
1123 break;
1124
1125 case BFD_RELOC_AVR_16_PM:
1126 bfd_putl16 ((bfd_vma) (value >> 1), where);
1127 break;
1128
1129 case BFD_RELOC_AVR_LDI:
1130 if (value > 255)
1131 as_bad_where (fixP->fx_file, fixP->fx_line,
1132 _("operand out of range: %ld"), value);
1133 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1134 break;
1135
1136 case BFD_RELOC_AVR_6:
1137 if ((value > 63) || (value < 0))
1138 as_bad_where (fixP->fx_file, fixP->fx_line,
1139 _("operand out of range: %ld"), value);
1140 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1141 break;
1142
1143 case BFD_RELOC_AVR_6_ADIW:
1144 if ((value > 63) || (value < 0))
1145 as_bad_where (fixP->fx_file, fixP->fx_line,
1146 _("operand out of range: %ld"), value);
1147 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1148 break;
1149
1150 case BFD_RELOC_AVR_LO8_LDI:
1151 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1152 break;
1153
1154 case BFD_RELOC_AVR_HI8_LDI:
1155 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1156 break;
1157
1158 case BFD_RELOC_AVR_MS8_LDI:
1159 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1160 break;
1161
1162 case BFD_RELOC_AVR_HH8_LDI:
1163 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1164 break;
1165
1166 case BFD_RELOC_AVR_LO8_LDI_NEG:
1167 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1168 break;
1169
1170 case BFD_RELOC_AVR_HI8_LDI_NEG:
1171 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1172 break;
1173
1174 case BFD_RELOC_AVR_MS8_LDI_NEG:
1175 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1176 break;
1177
1178 case BFD_RELOC_AVR_HH8_LDI_NEG:
1179 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1180 break;
1181
1182 case BFD_RELOC_AVR_LO8_LDI_PM:
1183 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1184 break;
1185
1186 case BFD_RELOC_AVR_HI8_LDI_PM:
1187 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1188 break;
1189
1190 case BFD_RELOC_AVR_HH8_LDI_PM:
1191 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1192 break;
1193
1194 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1195 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1196 break;
1197
1198 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1199 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1200 break;
1201
1202 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1203 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1204 break;
1205
1206 case BFD_RELOC_AVR_CALL:
1207 {
1208 unsigned long x;
1209
1210 x = bfd_getl16 (where);
1211 if (value & 1)
1212 as_bad_where (fixP->fx_file, fixP->fx_line,
1213 _("odd address operand: %ld"), value);
1214 value >>= 1;
1215 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1216 bfd_putl16 ((bfd_vma) x, where);
1217 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1218 }
1219 break;
1220
1221 default:
1222 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1223 fixP->fx_line, fixP->fx_r_type);
1224 break;
1225 }
1226 }
1227 else
1228 {
1229 switch (fixP->fx_r_type)
1230 {
1231 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1232 case -BFD_RELOC_AVR_HI8_LDI:
1233 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1234 case -BFD_RELOC_AVR_LO8_LDI:
1235 as_bad_where (fixP->fx_file, fixP->fx_line,
1236 _("only constant expression allowed"));
1237 fixP->fx_done = 1;
1238 break;
1239 default:
1240 break;
1241 }
1242 }
1243 }
1244
1245 /* GAS will call this to generate a reloc, passing the resulting reloc
1246 to `bfd_install_relocation'. This currently works poorly, as
1247 `bfd_install_relocation' often does the wrong thing, and instances of
1248 `tc_gen_reloc' have been written to work around the problems, which
1249 in turns makes it difficult to fix `bfd_install_relocation'. */
1250
1251 /* If while processing a fixup, a reloc really needs to be created
1252 then it is done here. */
1253
1254 arelent *
1255 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1256 fixS *fixp)
1257 {
1258 arelent *reloc;
1259
1260 if (fixp->fx_addsy && fixp->fx_subsy)
1261 {
1262 long value = 0;
1263
1264 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1265 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1266 {
1267 as_bad_where (fixp->fx_file, fixp->fx_line,
1268 "Difference of symbols in different sections is not supported");
1269 return NULL;
1270 }
1271
1272 /* We are dealing with two symbols defined in the same section.
1273 Let us fix-up them here. */
1274 value += S_GET_VALUE (fixp->fx_addsy);
1275 value -= S_GET_VALUE (fixp->fx_subsy);
1276
1277 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1278 only takes it's second operands for the fixup value. */
1279 fixp->fx_addsy = NULL;
1280 fixp->fx_subsy = NULL;
1281 md_apply_fix (fixp, (valueT *) &value, NULL);
1282
1283 return NULL;
1284 }
1285
1286 reloc = xmalloc (sizeof (arelent));
1287
1288 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1289 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1290
1291 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1292 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1293 if (reloc->howto == (reloc_howto_type *) NULL)
1294 {
1295 as_bad_where (fixp->fx_file, fixp->fx_line,
1296 _("reloc %d not supported by object file format"),
1297 (int) fixp->fx_r_type);
1298 return NULL;
1299 }
1300
1301 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1302 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1303 reloc->address = fixp->fx_offset;
1304
1305 reloc->addend = fixp->fx_offset;
1306
1307 return reloc;
1308 }
1309
1310 void
1311 md_assemble (char *str)
1312 {
1313 struct avr_opcodes_s *opcode;
1314 char op[11];
1315
1316 str = skip_space (extract_word (str, op, sizeof (op)));
1317
1318 if (!op[0])
1319 as_bad (_("can't find opcode "));
1320
1321 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1322
1323 if (opcode == NULL)
1324 {
1325 as_bad (_("unknown opcode `%s'"), op);
1326 return;
1327 }
1328
1329 /* Special case for opcodes with optional operands (lpm, elpm) -
1330 version with operands exists in avr_opcodes[] in the next entry. */
1331
1332 if (*str && *opcode->constraints == '?')
1333 ++opcode;
1334
1335 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1336 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1337
1338 /* We used to set input_line_pointer to the result of get_operands,
1339 but that is wrong. Our caller assumes we don't change it. */
1340 {
1341 char *t = input_line_pointer;
1342
1343 avr_operands (opcode, &str);
1344 if (*skip_space (str))
1345 as_bad (_("garbage at end of line"));
1346 input_line_pointer = t;
1347 }
1348 }
1349
1350 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1351 `avr_cons_fix_new'. */
1352 static int exp_mod_pm = 0;
1353
1354 /* Parse special CONS expression: pm (expression)
1355 or alternatively: gs (expression).
1356 These are used for addressing program memory.
1357 Relocation: BFD_RELOC_AVR_16_PM. */
1358
1359 void
1360 avr_parse_cons_expression (expressionS *exp, int nbytes)
1361 {
1362 char *tmp;
1363
1364 exp_mod_pm = 0;
1365
1366 tmp = input_line_pointer = skip_space (input_line_pointer);
1367
1368 if (nbytes == 2)
1369 {
1370 char *pm_name1 = "pm";
1371 char *pm_name2 = "gs";
1372 int len = strlen (pm_name1);
1373 /* len must be the same for both pm identifiers. */
1374
1375 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1376 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1377 {
1378 input_line_pointer = skip_space (input_line_pointer + len);
1379
1380 if (*input_line_pointer == '(')
1381 {
1382 input_line_pointer = skip_space (input_line_pointer + 1);
1383 exp_mod_pm = 1;
1384 expression (exp);
1385
1386 if (*input_line_pointer == ')')
1387 ++input_line_pointer;
1388 else
1389 {
1390 as_bad (_("`)' required"));
1391 exp_mod_pm = 0;
1392 }
1393
1394 return;
1395 }
1396
1397 input_line_pointer = tmp;
1398 }
1399 }
1400
1401 expression (exp);
1402 }
1403
1404 void
1405 avr_cons_fix_new (fragS *frag,
1406 int where,
1407 int nbytes,
1408 expressionS *exp)
1409 {
1410 if (exp_mod_pm == 0)
1411 {
1412 if (nbytes == 2)
1413 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1414 else if (nbytes == 4)
1415 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1416 else
1417 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1418 }
1419 else
1420 {
1421 if (nbytes == 2)
1422 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1423 else
1424 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1425 exp_mod_pm = 0;
1426 }
1427 }
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