| blob | c590a1876488e76724bb6a7a29cb030823386ad2 |
1 2006-06-08 Alan Modra <amodra@bigpond.net.au>
3 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
4 * Makefile.am (GASLIBS): Expand @BFDLIB@.
5 (BFDVER_H): Delete.
6 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
7 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
8 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
9 Run "make dep-am".
10 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
11 * Makefile.in: Regenerate.
12 * doc/Makefile.in: Regenerate.
13 * configure: Regenerate.
15 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
17 * po/Make-in (pdf, ps): New dummy targets.
19 2006-06-07 Julian Brown <julian@codesourcery.com>
21 * config/tc-arm.c (stdarg.h): include.
22 (arm_it): Add uncond_value field. Add isvec and issingle to operand
23 array.
24 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
25 REG_TYPE_NSDQ (single, double or quad vector reg).
26 (reg_expected_msgs): Update.
27 (BAD_FPU): Add macro for unsupported FPU instruction error.
28 (parse_neon_type): Support 'd' as an alias for .f64.
29 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
30 sets of registers.
31 (parse_vfp_reg_list): Don't update first arg on error.
32 (parse_neon_mov): Support extra syntax for VFP moves.
33 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
34 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
35 (parse_operands): Support isvec, issingle operands fields, new parse
36 codes above.
37 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
38 msr variants.
39 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
40 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
41 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
42 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
43 shapes.
44 (neon_shape): Redefine in terms of above.
45 (neon_shape_class): New enumeration, table of shape classes.
46 (neon_shape_el): New enumeration. One element of a shape.
47 (neon_shape_el_size): Register widths of above, where appropriate.
48 (neon_shape_info): New struct. Info for shape table.
49 (neon_shape_tab): New array.
50 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
51 (neon_check_shape): Rewrite as...
52 (neon_select_shape): New function to classify instruction shapes,
53 driven by new table neon_shape_tab array.
54 (neon_quad): New function. Return 1 if shape should set Q flag in
55 instructions (or equivalent), 0 otherwise.
56 (type_chk_of_el_type): Support F64.
57 (el_type_of_type_chk): Likewise.
58 (neon_check_type): Add support for VFP type checking (VFP data
59 elements fill their containing registers).
60 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
61 in thumb mode for VFP instructions.
62 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
63 and encode the current instruction as if it were that opcode.
64 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
65 arguments, call function in PFN.
66 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
67 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
68 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
69 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
70 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
71 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
72 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
73 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
74 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
75 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
76 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
77 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
78 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
79 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
80 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
81 neon_quad.
82 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
83 between VFP and Neon turns out to belong to Neon. Perform
84 architecture check and fill in condition field if appropriate.
85 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
86 (do_neon_cvt): Add support for VFP variants of instructions.
87 (neon_cvt_flavour): Extend to cover VFP conversions.
88 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
89 vmov variants.
90 (do_neon_ldr_str): Handle single-precision VFP load/store.
91 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
92 NS_NULL not NS_IGNORE.
93 (opcode_tag): Add OT_csuffixF for operands which either take a
94 conditional suffix, or have 0xF in the condition field.
95 (md_assemble): Add support for OT_csuffixF.
96 (NCE): Replace macro with...
97 (NCE_tag, NCE, NCEF): New macros.
98 (nCE): Replace macro with...
99 (nCE_tag, nCE, nCEF): New macros.
100 (insns): Add support for VFP insns or VFP versions of insns msr,
101 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
102 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
103 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
104 VFP/Neon insns together.
106 2006-06-07 Alan Modra <amodra@bigpond.net.au>
107 Ladislav Michl <ladis@linux-mips.org>
109 * app.c: Don't include headers already included by as.h.
110 * as.c: Likewise.
111 * atof-generic.c: Likewise.
112 * cgen.c: Likewise.
113 * dwarf2dbg.c: Likewise.
114 * expr.c: Likewise.
115 * input-file.c: Likewise.
116 * input-scrub.c: Likewise.
117 * macro.c: Likewise.
118 * output-file.c: Likewise.
119 * read.c: Likewise.
120 * sb.c: Likewise.
121 * config/bfin-lex.l: Likewise.
122 * config/obj-coff.h: Likewise.
123 * config/obj-elf.h: Likewise.
124 * config/obj-som.h: Likewise.
125 * config/tc-arc.c: Likewise.
126 * config/tc-arm.c: Likewise.
127 * config/tc-avr.c: Likewise.
128 * config/tc-bfin.c: Likewise.
129 * config/tc-cris.c: Likewise.
130 * config/tc-d10v.c: Likewise.
131 * config/tc-d30v.c: Likewise.
132 * config/tc-dlx.h: Likewise.
133 * config/tc-fr30.c: Likewise.
134 * config/tc-frv.c: Likewise.
135 * config/tc-h8300.c: Likewise.
136 * config/tc-hppa.c: Likewise.
137 * config/tc-i370.c: Likewise.
138 * config/tc-i860.c: Likewise.
139 * config/tc-i960.c: Likewise.
140 * config/tc-ip2k.c: Likewise.
141 * config/tc-iq2000.c: Likewise.
142 * config/tc-m32c.c: Likewise.
143 * config/tc-m32r.c: Likewise.
144 * config/tc-maxq.c: Likewise.
145 * config/tc-mcore.c: Likewise.
146 * config/tc-mips.c: Likewise.
147 * config/tc-mmix.c: Likewise.
148 * config/tc-mn10200.c: Likewise.
149 * config/tc-mn10300.c: Likewise.
150 * config/tc-msp430.c: Likewise.
151 * config/tc-mt.c: Likewise.
152 * config/tc-ns32k.c: Likewise.
153 * config/tc-openrisc.c: Likewise.
154 * config/tc-ppc.c: Likewise.
155 * config/tc-s390.c: Likewise.
156 * config/tc-sh.c: Likewise.
157 * config/tc-sh64.c: Likewise.
158 * config/tc-sparc.c: Likewise.
159 * config/tc-tic30.c: Likewise.
160 * config/tc-tic4x.c: Likewise.
161 * config/tc-tic54x.c: Likewise.
162 * config/tc-v850.c: Likewise.
163 * config/tc-vax.c: Likewise.
164 * config/tc-xc16x.c: Likewise.
165 * config/tc-xstormy16.c: Likewise.
166 * config/tc-xtensa.c: Likewise.
167 * config/tc-z80.c: Likewise.
168 * config/tc-z8k.c: Likewise.
169 * macro.h: Don't include sb.h or ansidecl.h.
170 * sb.h: Don't include stdio.h or ansidecl.h.
171 * cond.c: Include sb.h.
172 * itbl-lex.l: Include as.h instead of other system headers.
173 * itbl-parse.y: Likewise.
174 * itbl-ops.c: Similarly.
175 * itbl-ops.h: Don't include as.h or ansidecl.h.
176 * config/bfin-defs.h: Don't include bfd.h or as.h.
177 * config/bfin-parse.y: Include as.h instead of other system headers.
179 2006-06-06 Ben Elliston <bje@au.ibm.com>
180 Anton Blanchard <anton@samba.org>
182 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
183 (md_show_usage): Document it.
184 (ppc_setup_opcodes): Test power6 opcode flag bits.
185 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
187 2006-06-06 Thiemo Seufer <ths@mips.com>
188 Chao-ying Fu <fu@mips.com>
190 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
191 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
192 (macro_build): Update comment.
193 (mips_ip): Allow DSP64 instructions for MIPS64R2.
194 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
195 CPU_HAS_MDMX.
196 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
197 MIPS_CPU_ASE_MDMX flags for sb1.
199 2006-06-05 Thiemo Seufer <ths@mips.com>
201 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
202 appropriate.
203 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
204 (mips_ip): Make overflowed/underflowed constant arguments in DSP
205 and MT instructions a fatal error. Use INSERT_OPERAND where
206 appropriate. Improve warnings for break and wait code overflows.
207 Use symbolic constant of OP_MASK_COPZ.
208 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
210 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
212 * po/Make-in (top_builddir): Define.
214 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
216 * doc/Makefile.am (TEXI2DVI): Define.
217 * doc/Makefile.in: Regenerate.
218 * doc/c-arc.texi: Fix typo.
220 2006-06-01 Alan Modra <amodra@bigpond.net.au>
222 * config/obj-ieee.c: Delete.
223 * config/obj-ieee.h: Delete.
224 * Makefile.am (OBJ_FORMATS): Remove ieee.
225 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
226 (obj-ieee.o): Remove rule.
227 * Makefile.in: Regenerate.
228 * configure.in (atof): Remove tahoe.
229 (OBJ_MAYBE_IEEE): Don't define.
230 * configure: Regenerate.
231 * config.in: Regenerate.
232 * doc/Makefile.in: Regenerate.
233 * po/POTFILES.in: Regenerate.
235 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
237 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
238 and LIBINTL_DEP everywhere.
239 (INTLLIBS): Remove.
240 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
241 * acinclude.m4: Include new gettext macros.
242 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
243 Remove local code for po/Makefile.
244 * Makefile.in, configure, doc/Makefile.in: Regenerated.
246 2006-05-30 Nick Clifton <nickc@redhat.com>
248 * po/es.po: Updated Spanish translation.
250 2006-05-06 Denis Chertykov <denisc@overta.ru>
252 * doc/c-avr.texi: New file.
253 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
254 * doc/all.texi: Set AVR
255 * doc/as.texinfo: Include c-avr.texi
257 2006-05-28 Jie Zhang <jie.zhang@analog.com>
259 * config/bfin-parse.y (check_macfunc): Loose the condition of
260 calling check_multiply_halfregs ().
262 2006-05-25 Jie Zhang <jie.zhang@analog.com>
264 * config/bfin-parse.y (asm_1): Better check and deal with
265 vector and scalar Multiply 16-Bit Operands instructions.
267 2006-05-24 Nick Clifton <nickc@redhat.com>
269 * config/tc-hppa.c: Convert to ISO C90 format.
270 * config/tc-hppa.h: Likewise.
272 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
273 Randolph Chung <randolph@tausq.org>
275 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
276 is_tls_ieoff, is_tls_leoff): Define.
277 (fix_new_hppa): Handle TLS.
278 (cons_fix_new_hppa): Likewise.
279 (pa_ip): Likewise.
280 (md_apply_fix): Handle TLS relocs.
281 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
283 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
285 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
287 2006-05-23 Thiemo Seufer <ths@mips.com>
288 David Ung <davidu@mips.com>
289 Nigel Stephens <nigel@mips.com>
291 [ gas/ChangeLog ]
292 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
293 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
294 ISA_HAS_MXHC1): New macros.
295 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
296 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
297 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
298 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
299 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
300 (mips_after_parse_args): Change default handling of float register
301 size to account for 32bit code with 64bit FP. Better sanity checking
302 of ISA/ASE/ABI option combinations.
303 (s_mipsset): Support switching of GPR and FPR sizes via
304 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
305 options.
306 (mips_elf_final_processing): We should record the use of 64bit FP
307 registers in 32bit code but we don't, because ELF header flags are
308 a scarce ressource.
309 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
310 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
311 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
312 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
313 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
314 missing -march options. Document .set arch=CPU. Move .set smartmips
315 to ASE page. Use @code for .set FOO examples.
317 2006-05-23 Jie Zhang <jie.zhang@analog.com>
319 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
320 if needed.
322 2006-05-23 Jie Zhang <jie.zhang@analog.com>
324 * config/bfin-defs.h (bfin_equals): Remove declaration.
325 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
326 * config/tc-bfin.c (bfin_name_is_register): Remove.
327 (bfin_equals): Remove.
328 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
329 (bfin_name_is_register): Remove declaration.
331 2006-05-19 Thiemo Seufer <ths@mips.com>
332 Nigel Stephens <nigel@mips.com>
334 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
335 (mips_oddfpreg_ok): New function.
336 (mips_ip): Use it.
338 2006-05-19 Thiemo Seufer <ths@mips.com>
339 David Ung <davidu@mips.com>
341 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
342 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
343 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
344 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
345 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
346 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
347 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
348 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
349 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
350 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
351 reg_names_o32, reg_names_n32n64): Define register classes.
352 (reg_lookup): New function, use register classes.
353 (md_begin): Reserve register names in the symbol table. Simplify
354 OBJ_ELF defines.
355 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
356 Use reg_lookup.
357 (mips16_ip): Use reg_lookup.
358 (tc_get_register): Likewise.
359 (tc_mips_regname_to_dw2regnum): New function.
361 2006-05-19 Thiemo Seufer <ths@mips.com>
363 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
364 Un-constify string argument.
365 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
366 Likewise.
367 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
368 Likewise.
369 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
370 Likewise.
371 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
372 Likewise.
373 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
374 Likewise.
375 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
376 Likewise.
378 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
380 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
381 cfloat/m68881 to correct architecture before using it.
383 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
385 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
386 constant values.
388 2006-05-15 Paul Brook <paul@codesourcery.com>
390 * config/tc-arm.c (arm_adjust_symtab): Use
391 bfd_is_arm_special_symbol_name.
393 2006-05-15 Bob Wilson <bob.wilson@acm.org>
395 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
396 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
397 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
398 Handle errors from calls to xtensa_opcode_is_* functions.
400 2006-05-14 Thiemo Seufer <ths@mips.com>
402 * config/tc-mips.c (macro_build): Test for currently active
403 mips16 option.
404 (mips16_ip): Reject invalid opcodes.
406 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
408 * doc/as.texinfo: Rename "Index" to "AS Index",
409 and "ABORT" to "ABORT (COFF)".
411 2006-05-11 Paul Brook <paul@codesourcery.com>
413 * config/tc-arm.c (parse_half): New function.
414 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
415 (parse_operands): Ditto.
416 (do_mov16): Reject invalid relocations.
417 (do_t_mov16): Ditto. Use Thumb reloc numbers.
418 (insns): Replace Iffff with HALF.
419 (md_apply_fix): Add MOVW and MOVT relocs.
420 (tc_gen_reloc): Ditto.
421 * doc/c-arm.texi: Document relocation operators
423 2006-05-11 Paul Brook <paul@codesourcery.com>
425 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
427 2006-05-11 Thiemo Seufer <ths@mips.com>
429 * config/tc-mips.c (append_insn): Don't check the range of j or
430 jal addresses.
432 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
434 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
435 relocs against external symbols for WinCE targets.
436 (md_apply_fix): Likewise.
438 2006-05-09 David Ung <davidu@mips.com>
440 * config/tc-mips.c (append_insn): Only warn about an out-of-range
441 j or jal address.
443 2006-05-09 Nick Clifton <nickc@redhat.com>
445 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
446 against symbols which are not going to be placed into the symbol
447 table.
449 2006-05-09 Ben Elliston <bje@au.ibm.com>
451 * expr.c (operand): Remove `if (0 && ..)' statement and
452 subsequently unused target_op label. Collapse `if (1 || ..)'
453 statement.
454 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
455 separately above the switch.
457 2006-05-08 Nick Clifton <nickc@redhat.com>
459 PR gas/2623
460 * config/tc-msp430.c (line_separator_character): Define as |.
462 2006-05-08 Thiemo Seufer <ths@mips.com>
463 Nigel Stephens <nigel@mips.com>
464 David Ung <davidu@mips.com>
466 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
467 (mips_opts): Likewise.
468 (file_ase_smartmips): New variable.
469 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
470 (macro_build): Handle SmartMIPS instructions.
471 (mips_ip): Likewise.
472 (md_longopts): Add argument handling for smartmips.
473 (md_parse_options, mips_after_parse_args): Likewise.
474 (s_mipsset): Add .set smartmips support.
475 (md_show_usage): Document -msmartmips/-mno-smartmips.
476 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
477 .set smartmips.
478 * doc/c-mips.texi: Likewise.
480 2006-05-08 Alan Modra <amodra@bigpond.net.au>
482 * write.c (relax_segment): Add pass count arg. Don't error on
483 negative org/space on first two passes.
484 (relax_seg_info): New struct.
485 (relax_seg, write_object_file): Adjust.
486 * write.h (relax_segment): Update prototype.
488 2006-05-05 Julian Brown <julian@codesourcery.com>
490 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
491 checking.
492 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
493 architecture version checks.
494 (insns): Allow overlapping instructions to be used in VFP mode.
496 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
498 PR gas/2598
499 * config/obj-elf.c (obj_elf_change_section): Allow user
500 specified SHF_ALPHA_GPREL.
502 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
504 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
505 for PMEM related expressions.
507 2006-05-05 Nick Clifton <nickc@redhat.com>
509 PR gas/2582
510 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
511 insertion of a directory separator character into a string at a
512 given offset. Uses heuristics to decide when to use a backslash
513 character rather than a forward-slash character.
514 (dwarf2_directive_loc): Use the macro.
515 (out_debug_info): Likewise.
517 2006-05-05 Thiemo Seufer <ths@mips.com>
518 David Ung <davidu@mips.com>
520 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
521 instruction.
522 (macro): Add new case M_CACHE_AB.
524 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
526 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
527 (opcode_lookup): Issue a warning for opcode with
528 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
529 identical to OT_cinfix3.
530 (TxC3w, TC3w, tC3w): New.
531 (insns): Use tC3w and TC3w for comparison instructions with
532 's' suffix.
534 2006-05-04 Alan Modra <amodra@bigpond.net.au>
536 * subsegs.h (struct frchain): Delete frch_seg.
537 (frchain_root): Delete.
538 (seg_info): Define as macro.
539 * subsegs.c (frchain_root): Delete.
540 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
541 (subsegs_begin, subseg_change): Adjust for above.
542 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
543 rather than to one big list.
544 (subseg_get): Don't special case abs, und sections.
545 (subseg_new, subseg_force_new): Don't set frchainP here.
546 (seg_info): Delete.
547 (subsegs_print_statistics): Adjust frag chain control list traversal.
548 * debug.c (dmp_frags): Likewise.
549 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
550 at frchain_root. Make use of known frchain ordering.
551 (last_frag_for_seg): Likewise.
552 (get_frag_fix): Likewise. Add seg param.
553 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
554 * write.c (chain_frchains_together_1): Adjust for struct frchain.
555 (SUB_SEGMENT_ALIGN): Likewise.
556 (subsegs_finish): Adjust frchain list traversal.
557 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
558 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
559 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
560 (xtensa_fix_b_j_loop_end_frags): Likewise.
561 (xtensa_fix_close_loop_end_frags): Likewise.
562 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
563 (retrieve_segment_info): Delete frch_seg initialisation.
565 2006-05-03 Alan Modra <amodra@bigpond.net.au>
567 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
568 * config/obj-elf.h (obj_sec_set_private_data): Delete.
569 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
570 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
572 2006-05-02 Joseph Myers <joseph@codesourcery.com>
574 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
575 here.
576 (md_apply_fix3): Multiply offset by 4 here for
577 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
579 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
580 Jan Beulich <jbeulich@novell.com>
582 * config/tc-i386.c (output_invalid_buf): Change size for
583 unsigned char.
584 * config/tc-tic30.c (output_invalid_buf): Likewise.
586 * config/tc-i386.c (output_invalid): Cast none-ascii char to
587 unsigned char.
588 * config/tc-tic30.c (output_invalid): Likewise.
590 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
592 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
593 (TEXI2POD): Use AM_MAKEINFOFLAGS.
594 (asconfig.texi): Don't set top_srcdir.
595 * doc/as.texinfo: Don't use top_srcdir.
596 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
598 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
600 * config/tc-i386.c (output_invalid_buf): Change size to 16.
601 * config/tc-tic30.c (output_invalid_buf): Likewise.
603 * config/tc-i386.c (output_invalid): Use snprintf instead of
604 sprintf.
605 * config/tc-ia64.c (declare_register_set): Likewise.
606 (emit_one_bundle): Likewise.
607 (check_dependencies): Likewise.
608 * config/tc-tic30.c (output_invalid): Likewise.
610 2006-05-02 Paul Brook <paul@codesourcery.com>
612 * config/tc-arm.c (arm_optimize_expr): New function.
613 * config/tc-arm.h (md_optimize_expr): Define
614 (arm_optimize_expr): Add prototype.
615 (TC_FORCE_RELOCATION_SUB_SAME): Define.
617 2006-05-02 Ben Elliston <bje@au.ibm.com>
619 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
620 field unsigned.
622 * sb.h (sb_list_vector): Move to sb.c.
623 * sb.c (free_list): Use type of sb_list_vector directly.
624 (sb_build): Fix off-by-one error in assertion about `size'.
626 2006-05-01 Ben Elliston <bje@au.ibm.com>
628 * listing.c (listing_listing): Remove useless loop.
629 * macro.c (macro_expand): Remove is_positional local variable.
630 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
631 and simplify surrounding expressions, where possible.
632 (assign_symbol): Likewise.
633 (s_weakref): Likewise.
634 * symbols.c (colon): Likewise.
636 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
638 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
640 2006-04-30 Thiemo Seufer <ths@mips.com>
641 David Ung <davidu@mips.com>
643 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
644 (mips_immed): New table that records various handling of udi
645 instruction patterns.
646 (mips_ip): Adds udi handling.
648 2006-04-28 Alan Modra <amodra@bigpond.net.au>
650 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
651 of list rather than beginning.
653 2006-04-26 Julian Brown <julian@codesourcery.com>
655 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
656 (is_quarter_float): Rename from above. Simplify slightly.
657 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
658 number.
659 (parse_neon_mov): Parse floating-point constants.
660 (neon_qfloat_bits): Fix encoding.
661 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
662 preference to integer encoding when using the F32 type.
664 2006-04-26 Julian Brown <julian@codesourcery.com>
666 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
667 zero-initialising structures containing it will lead to invalid types).
668 (arm_it): Add vectype to each operand.
669 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
670 defined field.
671 (neon_typed_alias): New structure. Extra information for typed
672 register aliases.
673 (reg_entry): Add neon type info field.
674 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
675 Break out alternative syntax for coprocessor registers, etc. into...
676 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
677 out from arm_reg_parse.
678 (parse_neon_type): Move. Return SUCCESS/FAIL.
679 (first_error): New function. Call to ensure first error which occurs is
680 reported.
681 (parse_neon_operand_type): Parse exactly one type.
682 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
683 (parse_typed_reg_or_scalar): New function. Handle core of both
684 arm_typed_reg_parse and parse_scalar.
685 (arm_typed_reg_parse): Parse a register with an optional type.
686 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
687 result.
688 (parse_scalar): Parse a Neon scalar with optional type.
689 (parse_reg_list): Use first_error.
690 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
691 (neon_alias_types_same): New function. Return true if two (alias) types
692 are the same.
693 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
694 of elements.
695 (insert_reg_alias): Return new reg_entry not void.
696 (insert_neon_reg_alias): New function. Insert type/index information as
697 well as register for alias.
698 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
699 make typed register aliases accordingly.
700 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
701 of line.
702 (s_unreq): Delete type information if present.
703 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
704 (s_arm_unwind_save_mmxwcg): Likewise.
705 (s_arm_unwind_movsp): Likewise.
706 (s_arm_unwind_setfp): Likewise.
707 (parse_shift): Likewise.
708 (parse_shifter_operand): Likewise.
709 (parse_address): Likewise.
710 (parse_tb): Likewise.
711 (tc_arm_regname_to_dw2regnum): Likewise.
712 (md_pseudo_table): Add dn, qn.
713 (parse_neon_mov): Handle typed operands.
714 (parse_operands): Likewise.
715 (neon_type_mask): Add N_SIZ.
716 (N_ALLMODS): New macro.
717 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
718 (el_type_of_type_chk): Add some safeguards.
719 (modify_types_allowed): Fix logic bug.
720 (neon_check_type): Handle operands with types.
721 (neon_three_same): Remove redundant optional arg handling.
722 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
723 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
724 (do_neon_step): Adjust accordingly.
725 (neon_cmode_for_logic_imm): Use first_error.
726 (do_neon_bitfield): Call neon_check_type.
727 (neon_dyadic): Rename to...
728 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
729 to allow modification of type of the destination.
730 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
731 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
732 (do_neon_compare): Make destination be an untyped bitfield.
733 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
734 (neon_mul_mac): Return early in case of errors.
735 (neon_move_immediate): Use first_error.
736 (neon_mac_reg_scalar_long): Fix type to include scalar.
737 (do_neon_dup): Likewise.
738 (do_neon_mov): Likewise (in several places).
739 (do_neon_tbl_tbx): Fix type.
740 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
741 (do_neon_ld_dup): Exit early in case of errors and/or use
742 first_error.
743 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
744 Handle .dn/.qn directives.
745 (REGDEF): Add zero for reg_entry neon field.
747 2006-04-26 Julian Brown <julian@codesourcery.com>
749 * config/tc-arm.c (limits.h): Include.
750 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
751 (fpu_vfp_v3_or_neon_ext): Declare constants.
752 (neon_el_type): New enumeration of types for Neon vector elements.
753 (neon_type_el): New struct. Define type and size of a vector element.
754 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
755 instruction.
756 (neon_type): Define struct. The type of an instruction.
757 (arm_it): Add 'vectype' for the current instruction.
758 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
759 (vfp_sp_reg_pos): Rename to...
760 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
761 tags.
762 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
763 (Neon D or Q register).
764 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
765 register.
766 (GE_OPT_PREFIX_BIG): Define constant, for use in...
767 (my_get_expression): Allow above constant as argument to accept
768 64-bit constants with optional prefix.
769 (arm_reg_parse): Add extra argument to return the specific type of
770 register in when either a D or Q register (REG_TYPE_NDQ) is
771 requested. Can be NULL.
772 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
773 (parse_reg_list): Update for new arm_reg_parse args.
774 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
775 (parse_neon_el_struct_list): New function. Parse element/structure
776 register lists for VLD<n>/VST<n> instructions.
777 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
778 (s_arm_unwind_save_mmxwr): Likewise.
779 (s_arm_unwind_save_mmxwcg): Likewise.
780 (s_arm_unwind_movsp): Likewise.
781 (s_arm_unwind_setfp): Likewise.
782 (parse_big_immediate): New function. Parse an immediate, which may be
783 64 bits wide. Put results in inst.operands[i].
784 (parse_shift): Update for new arm_reg_parse args.
785 (parse_address): Likewise. Add parsing of alignment specifiers.
786 (parse_neon_mov): Parse the operands of a VMOV instruction.
787 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
788 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
789 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
790 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
791 (parse_operands): Handle new codes above.
792 (encode_arm_vfp_sp_reg): Rename to...
793 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
794 selected VFP version only supports D0-D15.
795 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
796 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
797 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
798 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
799 encode_arm_vfp_reg name, and allow 32 D regs.
800 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
801 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
802 regs.
803 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
804 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
805 constant-load and conversion insns introduced with VFPv3.
806 (neon_tab_entry): New struct.
807 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
808 those which are the targets of pseudo-instructions.
809 (neon_opc): Enumerate opcodes, use as indices into...
810 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
811 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
812 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
813 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
814 neon_enc_tab.
815 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
816 Neon instructions.
817 (neon_type_mask): New. Compact type representation for type checking.
818 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
819 permitted type combinations.
820 (N_IGNORE_TYPE): New macro.
821 (neon_check_shape): New function. Check an instruction shape for
822 multiple alternatives. Return the specific shape for the current
823 instruction.
824 (neon_modify_type_size): New function. Modify a vector type and size,
825 depending on the bit mask in argument 1.
826 (neon_type_promote): New function. Convert a given "key" type (of an
827 operand) into the correct type for a different operand, based on a bit
828 mask.
829 (type_chk_of_el_type): New function. Convert a type and size into the
830 compact representation used for type checking.
831 (el_type_of_type_ckh): New function. Reverse of above (only when a
832 single bit is set in the bit mask).
833 (modify_types_allowed): New function. Alter a mask of allowed types
834 based on a bit mask of modifications.
835 (neon_check_type): New function. Check the type of the current
836 instruction against the variable argument list. The "key" type of the
837 instruction is returned.
838 (neon_dp_fixup): New function. Fill in and modify instruction bits for
839 a Neon data-processing instruction depending on whether we're in ARM
840 mode or Thumb-2 mode.
841 (neon_logbits): New function.
842 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
843 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
844 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
845 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
846 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
847 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
848 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
849 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
850 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
851 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
852 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
853 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
854 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
855 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
856 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
857 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
858 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
859 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
860 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
861 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
862 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
863 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
864 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
865 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
866 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
867 helpers.
868 (parse_neon_type): New function. Parse Neon type specifier.
869 (opcode_lookup): Allow parsing of Neon type specifiers.
870 (REGNUM2, REGSETH, REGSET2): New macros.
871 (reg_names): Add new VFPv3 and Neon registers.
872 (NUF, nUF, NCE, nCE): New macros for opcode table.
873 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
874 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
875 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
876 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
877 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
878 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
879 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
880 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
881 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
882 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
883 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
884 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
885 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
886 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
887 fto[us][lh][sd].
888 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
889 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
890 (arm_option_cpu_value): Add vfp3 and neon.
891 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
892 VFPv1 attribute.
894 2006-04-25 Bob Wilson <bob.wilson@acm.org>
896 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
897 syntax instead of hardcoded opcodes with ".w18" suffixes.
898 (wide_branch_opcode): New.
899 (build_transition): Use it to check for wide branch opcodes with
900 either ".w18" or ".w15" suffixes.
902 2006-04-25 Bob Wilson <bob.wilson@acm.org>
904 * config/tc-xtensa.c (xtensa_create_literal_symbol,
905 xg_assemble_literal, xg_assemble_literal_space): Do not set the
906 frag's is_literal flag.
908 2006-04-25 Bob Wilson <bob.wilson@acm.org>
910 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
912 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
914 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
915 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
916 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
917 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
918 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
920 2005-04-20 Paul Brook <paul@codesourcery.com>
922 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
923 all targets.
924 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
926 2006-04-19 Alan Modra <amodra@bigpond.net.au>
928 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
929 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
930 Make some cpus unsupported on ELF. Run "make dep-am".
931 * Makefile.in: Regenerate.
933 2006-04-19 Alan Modra <amodra@bigpond.net.au>
935 * configure.in (--enable-targets): Indent help message.
936 * configure: Regenerate.
938 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
940 PR gas/2533
941 * config/tc-i386.c (i386_immediate): Check illegal immediate
942 register operand.
944 2006-04-18 Alan Modra <amodra@bigpond.net.au>
946 * config/tc-i386.c: Formatting.
947 (output_disp, output_imm): ISO C90 params.
949 * frags.c (frag_offset_fixed_p): Constify args.
950 * frags.h (frag_offset_fixed_p): Ditto.
952 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
953 (COFF_MAGIC): Delete.
955 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
957 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
959 * po/POTFILES.in: Regenerated.
961 2006-04-16 Mark Mitchell <mark@codesourcery.com>
963 * doc/as.texinfo: Mention that some .type syntaxes are not
964 supported on all architectures.
966 2006-04-14 Sterling Augustine <sterling@tensilica.com>
968 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
969 instructions when such transformations have been disabled.
971 2006-04-10 Sterling Augustine <sterling@tensilica.com>
973 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
974 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
975 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
976 decoding the loop instructions. Remove current_offset variable.
977 (xtensa_fix_short_loop_frags): Likewise.
978 (min_bytes_to_other_loop_end): Remove current_offset argument.
980 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
982 * config/tc-z80.c (z80_optimize_expr): Removed.
983 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
985 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
987 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
988 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
989 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
990 atmega644, atmega329, atmega3290, atmega649, atmega6490,
991 atmega406, atmega640, atmega1280, atmega1281, at90can32,
992 at90can64, at90usb646, at90usb647, at90usb1286 and
993 at90usb1287.
994 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
996 2006-04-07 Paul Brook <paul@codesourcery.com>
998 * config/tc-arm.c (parse_operands): Set default error message.
1000 2006-04-07 Paul Brook <paul@codesourcery.com>
1002 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1004 2006-04-07 Paul Brook <paul@codesourcery.com>
1006 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1008 2006-04-07 Paul Brook <paul@codesourcery.com>
1010 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1011 (move_or_literal_pool): Handle Thumb-2 instructions.
1012 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1014 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1016 PR 2512.
1017 * config/tc-i386.c (match_template): Move 64-bit operand tests
1018 inside loop.
1020 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1022 * po/Make-in: Add install-html target.
1023 * Makefile.am: Add install-html and install-html-recursive targets.
1024 * Makefile.in: Regenerate.
1025 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1026 * configure: Regenerate.
1027 * doc/Makefile.am: Add install-html and install-html-am targets.
1028 * doc/Makefile.in: Regenerate.
1030 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1032 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1033 second scan.
1035 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1036 Daniel Jacobowitz <dan@codesourcery.com>
1038 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1039 (GOTT_BASE, GOTT_INDEX): New.
1040 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1041 GOTT_INDEX when generating VxWorks PIC.
1042 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1043 use the generic *-*-vxworks* stanza instead.
1045 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1047 PR 997
1048 * frags.c (frag_offset_fixed_p): New function.
1049 * frags.h (frag_offset_fixed_p): Declare.
1050 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1051 (resolve_expression): Likewise.
1053 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1055 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1056 of the same length but different numbers of slots.
1058 2006-03-30 Andreas Schwab <schwab@suse.de>
1060 * configure.in: Fix help string for --enable-targets option.
1061 * configure: Regenerate.
1063 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1065 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1066 (m68k_ip): ... here. Use for all chips. Protect against buffer
1067 overrun and avoid excessive copying.
1069 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1070 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1071 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1072 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1073 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1074 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1075 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1076 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1077 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1078 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1079 (struct m68k_cpu): Change chip field to control_regs.
1080 (current_chip): Remove.
1081 (control_regs): New.
1082 (m68k_archs, m68k_extensions): Adjust.
1083 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1084 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1085 (find_cf_chip): Reimplement for new organization of cpu table.
1086 (select_control_regs): Remove.
1087 (mri_chip): Adjust.
1088 (struct save_opts): Save control regs, not chip.
1089 (s_save, s_restore): Adjust.
1090 (m68k_lookup_cpu): Give deprecated warning when necessary.
1091 (m68k_init_arch): Adjust.
1092 (md_show_usage): Adjust for new cpu table organization.
1094 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1096 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1097 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1098 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1099 "elf/bfin.h".
1100 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1101 (any_gotrel): New rule.
1102 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1103 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1104 "elf/bfin.h".
1105 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1106 (bfin_pic_ptr): New function.
1107 (md_pseudo_table): Add it for ".picptr".
1108 (OPTION_FDPIC): New macro.
1109 (md_longopts): Add -mfdpic.
1110 (md_parse_option): Handle it.
1111 (md_begin): Set BFD flags.
1112 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1113 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1114 us for GOT relocs.
1115 * Makefile.am (bfin-parse.o): Update dependencies.
1116 (DEPTC_bfin_elf): Likewise.
1117 * Makefile.in: Regenerate.
1119 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1121 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1122 mcfemac instead of mcfmac.
1124 2006-03-23 Michael Matz <matz@suse.de>
1126 * config/tc-i386.c (type_names): Correct placement of 'static'.
1127 (reloc): Map some more relocs to their 64 bit counterpart when
1128 size is 8.
1129 (output_insn): Work around breakage if DEBUG386 is defined.
1130 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1131 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1132 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1133 different from i386.
1134 (output_imm): Ditto.
1135 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1136 Imm64.
1137 (md_convert_frag): Jumps can now be larger than 2GB away, error
1138 out in that case.
1139 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1140 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1142 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1143 Daniel Jacobowitz <dan@codesourcery.com>
1144 Phil Edwards <phil@codesourcery.com>
1145 Zack Weinberg <zack@codesourcery.com>
1146 Mark Mitchell <mark@codesourcery.com>
1147 Nathan Sidwell <nathan@codesourcery.com>
1149 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1150 (md_begin): Complain about -G being used for PIC. Don't change
1151 the text, data and bss alignments on VxWorks.
1152 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1153 generating VxWorks PIC.
1154 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1155 (macro): Likewise, but do not treat la $25 specially for
1156 VxWorks PIC, and do not handle jal.
1157 (OPTION_MVXWORKS_PIC): New macro.
1158 (md_longopts): Add -mvxworks-pic.
1159 (md_parse_option): Don't complain about using PIC and -G together here.
1160 Handle OPTION_MVXWORKS_PIC.
1161 (md_estimate_size_before_relax): Always use the first relaxation
1162 sequence on VxWorks.
1163 * config/tc-mips.h (VXWORKS_PIC): New.
1165 2006-03-21 Paul Brook <paul@codesourcery.com>
1167 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1169 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1171 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1172 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1173 (get_loop_align_size): New.
1174 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1175 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1176 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1177 (get_noop_aligned_address): Use get_loop_align_size.
1178 (get_aligned_diff): Likewise.
1180 2006-03-21 Paul Brook <paul@codesourcery.com>
1182 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1184 2006-03-20 Paul Brook <paul@codesourcery.com>
1186 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1187 (do_t_branch): Encode branches inside IT blocks as unconditional.
1188 (do_t_cps): New function.
1189 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1190 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1191 (opcode_lookup): Allow conditional suffixes on all instructions in
1192 Thumb mode.
1193 (md_assemble): Advance condexec state before checking for errors.
1194 (insns): Use do_t_cps.
1196 2006-03-20 Paul Brook <paul@codesourcery.com>
1198 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1199 outputting the insn.
1201 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1203 * config/tc-vax.c: Update copyright year.
1204 * config/tc-vax.h: Likewise.
1206 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1208 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1209 make it static.
1210 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1212 2006-03-17 Paul Brook <paul@codesourcery.com>
1214 * config/tc-arm.c (insns): Add ldm and stm.
1216 2006-03-17 Ben Elliston <bje@au.ibm.com>
1218 PR gas/2446
1219 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1221 2006-03-16 Paul Brook <paul@codesourcery.com>
1223 * config/tc-arm.c (insns): Add "svc".
1225 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1227 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1228 flag and avoid double underscore prefixes.
1230 2006-03-10 Paul Brook <paul@codesourcery.com>
1232 * config/tc-arm.c (md_begin): Handle EABIv5.
1233 (arm_eabis): Add EF_ARM_EABI_VER5.
1234 * doc/c-arm.texi: Document -meabi=5.
1236 2006-03-10 Ben Elliston <bje@au.ibm.com>
1238 * app.c (do_scrub_chars): Simplify string handling.
1240 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1241 Daniel Jacobowitz <dan@codesourcery.com>
1242 Zack Weinberg <zack@codesourcery.com>
1243 Nathan Sidwell <nathan@codesourcery.com>
1244 Paul Brook <paul@codesourcery.com>
1245 Ricardo Anguiano <anguiano@codesourcery.com>
1246 Phil Edwards <phil@codesourcery.com>
1248 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1249 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1250 R_ARM_ABS12 reloc.
1251 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1252 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1253 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1255 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1257 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1258 even when using the text-section-literals option.
1260 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1262 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1263 and cf.
1264 (m68k_ip): <case 'J'> Check we have some control regs.
1265 (md_parse_option): Allow raw arch switch.
1266 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1267 whether 68881 or cfloat was meant by -mfloat.
1268 (md_show_usage): Adjust extension display.
1269 (m68k_elf_final_processing): Adjust.
1271 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1273 * config/tc-avr.c (avr_mod_hash_value): New function.
1274 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1275 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1276 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1277 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1278 of (int).
1279 (tc_gen_reloc): Handle substractions of symbols, if possible do
1280 fixups, abort otherwise.
1281 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1282 tc_fix_adjustable): Define.
1284 2006-03-02 James E Wilson <wilson@specifix.com>
1286 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1287 change the template, then clear md.slot[curr].end_of_insn_group.
1289 2006-02-28 Jan Beulich <jbeulich@novell.com>
1291 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1293 2006-02-28 Jan Beulich <jbeulich@novell.com>
1295 PR/1070
1296 * macro.c (getstring): Don't treat parentheses special anymore.
1297 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1298 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1299 characters.
1301 2006-02-28 Mat <mat@csail.mit.edu>
1303 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1305 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1307 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1308 field.
1309 (CFI_signal_frame): Define.
1310 (cfi_pseudo_table): Add .cfi_signal_frame.
1311 (dot_cfi): Handle CFI_signal_frame.
1312 (output_cie): Handle cie->signal_frame.
1313 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1314 different. Copy signal_frame from FDE to newly created CIE.
1315 * doc/as.texinfo: Document .cfi_signal_frame.
1317 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1319 * doc/Makefile.am: Add html target.
1320 * doc/Makefile.in: Regenerate.
1321 * po/Make-in: Add html target.
1323 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1325 * config/tc-i386.c (output_insn): Support Intel Merom New
1326 Instructions.
1328 * config/tc-i386.h (CpuMNI): New.
1329 (CpuUnknownFlags): Add CpuMNI.
1331 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1333 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1334 (hpriv_reg_table): New table for hyperprivileged registers.
1335 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1336 register encoding.
1338 2006-02-24 DJ Delorie <dj@redhat.com>
1340 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1341 (tc_gen_reloc): Don't define.
1342 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1343 (OPTION_LINKRELAX): New.
1344 (md_longopts): Add it.
1345 (m32c_relax): New.
1346 (md_parse_options): Set it.
1347 (md_assemble): Emit relaxation relocs as needed.
1348 (md_convert_frag): Emit relaxation relocs as needed.
1349 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1350 (m32c_apply_fix): New.
1351 (tc_gen_reloc): New.
1352 (m32c_force_relocation): Force out jump relocs when relaxing.
1353 (m32c_fix_adjustable): Return false if relaxing.
1355 2006-02-24 Paul Brook <paul@codesourcery.com>
1357 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1358 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1359 (struct asm_barrier_opt): Define.
1360 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1361 (parse_psr): Accept V7M psr names.
1362 (parse_barrier): New function.
1363 (enum operand_parse_code): Add OP_oBARRIER.
1364 (parse_operands): Implement OP_oBARRIER.
1365 (do_barrier): New function.
1366 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1367 (do_t_cpsi): Add V7M restrictions.
1368 (do_t_mrs, do_t_msr): Validate V7M variants.
1369 (md_assemble): Check for NULL variants.
1370 (v7m_psrs, barrier_opt_names): New tables.
1371 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1372 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1373 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1374 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1375 (struct cpu_arch_ver_table): Define.
1376 (cpu_arch_ver): New.
1377 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1378 Tag_CPU_arch_profile.
1379 * doc/c-arm.texi: Document new cpu and arch options.
1381 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1383 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1385 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1387 * config/tc-ia64.c: Update copyright years.
1389 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1391 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1392 SDM 2.2.
1394 2005-02-22 Paul Brook <paul@codesourcery.com>
1396 * config/tc-arm.c (do_pld): Remove incorrect write to
1397 inst.instruction.
1398 (encode_thumb32_addr_mode): Use correct operand.
1400 2006-02-21 Paul Brook <paul@codesourcery.com>
1402 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1404 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1405 Anil Paranjape <anilp1@kpitcummins.com>
1406 Shilin Shakti <shilins@kpitcummins.com>
1408 * Makefile.am: Add xc16x related entry.
1409 * Makefile.in: Regenerate.
1410 * configure.in: Added xc16x related entry.
1411 * configure: Regenerate.
1412 * config/tc-xc16x.h: New file
1413 * config/tc-xc16x.c: New file
1414 * doc/c-xc16x.texi: New file for xc16x
1415 * doc/all.texi: Entry for xc16x
1416 * doc/Makefile.texi: Added c-xc16x.texi
1417 * NEWS: Announce the support for the new target.
1419 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1421 * configure.tgt: set emulation for mips-*-netbsd*
1423 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1425 * config.in: Rebuilt.
1427 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1429 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1430 from 1, not 0, in error messages.
1431 (md_assemble): Simplify special-case check for ENTRY instructions.
1432 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1433 operand in error message.
1435 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1437 * configure.tgt (arm-*-linux-gnueabi*): Change to
1438 arm-*-linux-*eabi*.
1440 2006-02-10 Nick Clifton <nickc@redhat.com>
1442 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1443 32-bit value is propagated into the upper bits of a 64-bit long.
1445 * config/tc-arc.c (init_opcode_tables): Fix cast.
1446 (arc_extoper, md_operand): Likewise.
1448 2006-02-09 David Heine <dlheine@tensilica.com>
1450 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1451 each relaxation step.
1453 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1455 * configure.in (CHECK_DECLS): Add vsnprintf.
1456 * configure: Regenerate.
1457 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1458 include/declare here, but...
1459 * as.h: Move code detecting VARARGS idiom to the top.
1460 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1461 (vsnprintf): Declare if not already declared.
1463 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1465 * as.c (close_output_file): New.
1466 (main): Register close_output_file with xatexit before
1467 dump_statistics. Don't call output_file_close.
1469 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1471 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1472 mcf5329_control_regs): New.
1473 (not_current_architecture, selected_arch, selected_cpu): New.
1474 (m68k_archs, m68k_extensions): New.
1475 (archs): Renamed to ...
1476 (m68k_cpus): ... here. Adjust.
1477 (n_arches): Remove.
1478 (md_pseudo_table): Add arch and cpu directives.
1479 (find_cf_chip, m68k_ip): Adjust table scanning.
1480 (no_68851, no_68881): Remove.
1481 (md_assemble): Lazily initialize.
1482 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1483 (md_init_after_args): Move functionality to m68k_init_arch.
1484 (mri_chip): Adjust table scanning.
1485 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1486 options with saner parsing.
1487 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1488 m68k_init_arch): New.
1489 (s_m68k_cpu, s_m68k_arch): New.
1490 (md_show_usage): Adjust.
1491 (m68k_elf_final_processing): Set CF EF flags.
1492 * config/tc-m68k.h (m68k_init_after_args): Remove.
1493 (tc_init_after_args): Remove.
1494 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1495 (M68k-Directives): Document .arch and .cpu directives.
1497 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1499 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1500 synonyms for equ and defl.
1501 (z80_cons_fix_new): New function.
1502 (emit_byte): Disallow relative jumps to absolute locations.
1503 (emit_data): Only handle defb, prototype changed, because defb is
1504 now handled as pseudo-op rather than an instruction.
1505 (instab): Entries for defb,defw,db,dw moved from here...
1506 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1507 Add entries for def24,def32,d24,d32.
1508 (md_assemble): Improved error handling.
1509 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1510 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1511 (z80_cons_fix_new): Declare.
1512 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1513 (def24,d24,def32,d32): New pseudo-ops.
1515 2006-02-02 Paul Brook <paul@codesourcery.com>
1517 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1519 2005-02-02 Paul Brook <paul@codesourcery.com>
1521 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1522 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1523 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1524 T2_OPCODE_RSB): Define.
1525 (thumb32_negate_data_op): New function.
1526 (md_apply_fix): Use it.
1528 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1530 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1531 fields.
1532 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1533 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1534 subtracted symbols.
1535 (relaxation_requirements): Add pfinish_frag argument and use it to
1536 replace setting tinsn->record_fix fields.
1537 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1538 and vinsn_to_insnbuf. Remove references to record_fix and
1539 slot_sub_symbols fields.
1540 (xtensa_mark_narrow_branches): Delete unused code.
1541 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1542 a symbol.
1543 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1544 record_fix fields.
1545 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1546 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1547 of the record_fix field. Simplify error messages for unexpected
1548 symbolic operands.
1549 (set_expr_symbol_offset_diff): Delete.
1551 2006-01-31 Paul Brook <paul@codesourcery.com>
1553 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1555 2006-01-31 Paul Brook <paul@codesourcery.com>
1556 Richard Earnshaw <rearnsha@arm.com>
1558 * config/tc-arm.c: Use arm_feature_set.
1559 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1560 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1561 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1562 New variables.
1563 (insns): Use them.
1564 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1565 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1566 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1567 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1568 feature flags.
1569 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1570 (arm_opts): Move old cpu/arch options from here...
1571 (arm_legacy_opts): ... to here.
1572 (md_parse_option): Search arm_legacy_opts.
1573 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1574 (arm_float_abis, arm_eabis): Make const.
1576 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1578 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1580 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1582 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1583 in load immediate intruction.
1585 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1587 * config/bfin-parse.y (value_match): Use correct conversion
1588 specifications in template string for __FILE__ and __LINE__.
1589 (binary): Ditto.
1590 (unary): Ditto.
1592 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1594 Introduce TLS descriptors for i386 and x86_64.
1595 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1596 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1597 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1598 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1599 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1600 displacement bits.
1601 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1602 (lex_got): Handle @tlsdesc and @tlscall.
1603 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1605 2006-01-11 Nick Clifton <nickc@redhat.com>
1607 Fixes for building on 64-bit hosts:
1608 * config/tc-avr.c (mod_index): New union to allow conversion
1609 between pointers and integers.
1610 (md_begin, avr_ldi_expression): Use it.
1611 * config/tc-i370.c (md_assemble): Add cast for argument to print
1612 statement.
1613 * config/tc-tic54x.c (subsym_substitute): Likewise.
1614 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1615 opindex field of fr_cgen structure into a pointer so that it can
1616 be stored in a frag.
1617 * config/tc-mn10300.c (md_assemble): Likewise.
1618 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1619 types.
1620 * config/tc-v850.c: Replace uses of (int) casts with correct
1621 types.
1623 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1625 PR gas/2117
1626 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1628 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1630 PR gas/2101
1631 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1632 a local-label reference.
1634 For older changes see ChangeLog-2005
1635 \f
1636 Local Variables:
1637 mode: change-log
1638 left-margin: 8
1639 fill-column: 74
1640 version-control: never
1641 End: