gdb/aarch64-nat.c

   1 /* Native-dependent code for AArch64.
   2
   3    Copyright (C) 2011-2024 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "gdbarch.h"
  21 #include "inferior.h"
  22 #include "cli/cli-cmds.h"
  23 #include "aarch64-nat.h"
  24
  25 #include <unordered_map>
  26
  27 /* Hash table storing per-process data.  We don't bind this to a
  28    per-inferior registry because of targets like x86 GNU/Linux that
  29    need to keep track of processes that aren't bound to any inferior
  30    (e.g., fork children, checkpoints).  */
  31
  32 static std::unordered_map<pid_t, aarch64_debug_reg_state>
  33 aarch64_debug_process_state;
  34
  35 /* See aarch64-nat.h.  */
  36
  37 struct aarch64_debug_reg_state *
  38 aarch64_lookup_debug_reg_state (pid_t pid)
  39 {
  40   auto it = aarch64_debug_process_state.find (pid);
  41   if (it != aarch64_debug_process_state.end ())
  42     return &it->second;
  43
  44   return nullptr;
  45 }
  46
  47 /* See aarch64-nat.h.  */
  48
  49 struct aarch64_debug_reg_state *
  50 aarch64_get_debug_reg_state (pid_t pid)
  51 {
  52   return &aarch64_debug_process_state[pid];
  53 }
  54
  55 /* See aarch64-nat.h.  */
  56
  57 void
  58 aarch64_remove_debug_reg_state (pid_t pid)
  59 {
  60   aarch64_debug_process_state.erase (pid);
  61 }
  62
  63 /* Returns the number of hardware watchpoints of type TYPE that we can
  64    set.  Value is positive if we can set CNT watchpoints, zero if
  65    setting watchpoints of type TYPE is not supported, and negative if
  66    CNT is more than the maximum number of watchpoints of type TYPE
  67    that we can support.  TYPE is one of bp_hardware_watchpoint,
  68    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
  69    CNT is the number of such watchpoints used so far (including this
  70    one).  OTHERTYPE is non-zero if other types of watchpoints are
  71    currently enabled.  */
  72
  73 int
  74 aarch64_can_use_hw_breakpoint (enum bptype type, int cnt, int othertype)
  75 {
  76   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
  77       || type == bp_access_watchpoint || type == bp_watchpoint)
  78     {
  79       if (aarch64_num_wp_regs == 0)
  80         return 0;
  81     }
  82   else if (type == bp_hardware_breakpoint)
  83     {
  84       if (aarch64_num_bp_regs == 0)
  85         return 0;
  86     }
  87   else
  88     gdb_assert_not_reached ("unexpected breakpoint type");
  89
  90   /* We always return 1 here because we don't have enough information
  91      about possible overlap of addresses that they want to watch.  As an
  92      extreme example, consider the case where all the watchpoints watch
  93      the same address and the same region length: then we can handle a
  94      virtually unlimited number of watchpoints, due to debug register
  95      sharing implemented via reference counts.  */
  96   return 1;
  97 }
  98
  99 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 100    Return 0 on success, -1 on failure.  */
 101
 102 int
 103 aarch64_insert_hw_breakpoint (struct gdbarch *gdbarch,
 104                               struct bp_target_info *bp_tgt)
 105 {
 106   int ret;
 107   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 108   int len;
 109   const enum target_hw_bp_type type = hw_execute;
 110   struct aarch64_debug_reg_state *state
 111     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 112
 113   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 114
 115   if (show_debug_regs)
 116     gdb_printf (gdb_stdlog,
 117                 "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 118                 (unsigned long) addr, len);
 119
 120   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */,
 121                                    inferior_ptid, state);
 122
 123   if (show_debug_regs)
 124     {
 125       aarch64_show_debug_reg_state (state,
 126                                     "insert_hw_breakpoint", addr, len, type);
 127     }
 128
 129   return ret;
 130 }
 131
 132 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 133    Return 0 on success, -1 on failure.  */
 134
 135 int
 136 aarch64_remove_hw_breakpoint (struct gdbarch *gdbarch,
 137                               struct bp_target_info *bp_tgt)
 138 {
 139   int ret;
 140   CORE_ADDR addr = bp_tgt->placed_address;
 141   int len = 4;
 142   const enum target_hw_bp_type type = hw_execute;
 143   struct aarch64_debug_reg_state *state
 144     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 145
 146   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 147
 148   if (show_debug_regs)
 149     gdb_printf (gdb_stdlog,
 150                 "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 151                 (unsigned long) addr, len);
 152
 153   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */,
 154                                    inferior_ptid, state);
 155
 156   if (show_debug_regs)
 157     {
 158       aarch64_show_debug_reg_state (state,
 159                                     "remove_hw_watchpoint", addr, len, type);
 160     }
 161
 162   return ret;
 163 }
 164
 165 /* Insert a watchpoint to watch a memory region which starts at
 166    address ADDR and whose length is LEN bytes.  Watch memory accesses
 167    of the type TYPE.  Return 0 on success, -1 on failure.  */
 168
 169 int
 170 aarch64_insert_watchpoint (CORE_ADDR addr, int len, enum target_hw_bp_type type,
 171                            struct expression *cond)
 172 {
 173   int ret;
 174   struct aarch64_debug_reg_state *state
 175     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 176
 177   if (show_debug_regs)
 178     gdb_printf (gdb_stdlog,
 179                 "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 180                 (unsigned long) addr, len);
 181
 182   gdb_assert (type != hw_execute);
 183
 184   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */,
 185                                    inferior_ptid, state);
 186
 187   if (show_debug_regs)
 188     {
 189       aarch64_show_debug_reg_state (state,
 190                                     "insert_watchpoint", addr, len, type);
 191     }
 192
 193   return ret;
 194 }
 195
 196 /* Remove a watchpoint that watched the memory region which starts at
 197    address ADDR, whose length is LEN bytes, and for accesses of the
 198    type TYPE.  Return 0 on success, -1 on failure.  */
 199
 200 int
 201 aarch64_remove_watchpoint (CORE_ADDR addr, int len, enum target_hw_bp_type type,
 202                            struct expression *cond)
 203 {
 204   int ret;
 205   struct aarch64_debug_reg_state *state
 206     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 207
 208   if (show_debug_regs)
 209     gdb_printf (gdb_stdlog,
 210                 "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 211                 (unsigned long) addr, len);
 212
 213   gdb_assert (type != hw_execute);
 214
 215   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */,
 216                                    inferior_ptid, state);
 217
 218   if (show_debug_regs)
 219     {
 220       aarch64_show_debug_reg_state (state,
 221                                     "remove_watchpoint", addr, len, type);
 222     }
 223
 224   return ret;
 225 }
 226
 227 /* See aarch64-nat.h.  */
 228
 229 bool
 230 aarch64_stopped_data_address (const struct aarch64_debug_reg_state *state,
 231                               CORE_ADDR addr_trap, CORE_ADDR *addr_p)
 232 {
 233   bool found = false;
 234   for (int phase = 0; phase <= 1; ++phase)
 235     for (int i = aarch64_num_wp_regs - 1; i >= 0; --i)
 236       {
 237         if (!(state->dr_ref_count_wp[i]
 238               && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])))
 239           {
 240             /* Watchpoint disabled.  */
 241             continue;
 242           }
 243
 244         const enum target_hw_bp_type type
 245           = aarch64_watchpoint_type (state->dr_ctrl_wp[i]);
 246         if (type == hw_execute)
 247           {
 248             /* Watchpoint disabled.  */
 249             continue;
 250           }
 251
 252         if (phase == 0)
 253           {
 254             /* Phase 0: No hw_write.  */
 255             if (type == hw_write)
 256               continue;
 257           }
 258         else
 259           {
 260             /* Phase 1: Only hw_write.  */
 261             if (type != hw_write)
 262               continue;
 263           }
 264
 265         const unsigned int offset
 266           = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 267         const unsigned int len
 268           = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 269         const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 270         const CORE_ADDR addr_watch_aligned
 271           = align_down (state->dr_addr_wp[i], AARCH64_HWP_MAX_LEN_PER_REG);
 272         const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 273
 274         /* ADDR_TRAP reports the first address of the memory range
 275            accessed by the CPU, regardless of what was the memory
 276            range watched.  Thus, a large CPU access that straddles
 277            the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 278            ADDR_TRAP that is lower than the
 279            ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 280
 281            addr: |   4   |   5   |   6   |   7   |   8   |
 282                                  |---- range watched ----|
 283                  |----------- range accessed ------------|
 284
 285            In this case, ADDR_TRAP will be 4.
 286
 287            The access size also can be larger than that of the watchpoint
 288            itself.  For instance, the access size of an stp instruction is 16.
 289            So, if we use stp to store to address p, and set a watchpoint on
 290            address p + 8, the reported ADDR_TRAP can be p + 8 (observed on
 291            RK3399 SOC). But it also can be p (observed on M1 SOC).  Checking
 292            for this situation introduces the possibility of false positives,
 293            so we only do this for hw_write watchpoints.  */
 294         const CORE_ADDR max_access_size = type == hw_write ? 16 : 8;
 295         const CORE_ADDR addr_watch_base = addr_watch_aligned -
 296           (max_access_size - AARCH64_HWP_MAX_LEN_PER_REG);
 297         if (!(addr_trap >= addr_watch_base
 298               && addr_trap < addr_watch + len))
 299           {
 300             /* Not a match.  */
 301             continue;
 302           }
 303
 304         /* To match a watchpoint known to GDB core, we must never
 305            report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 306            range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 307            positive on kernels older than 4.10.  See PR
 308            external/20207.  */
 309         if (addr_p != nullptr)
 310           *addr_p = addr_orig;
 311
 312         if (phase == 0)
 313           {
 314             /* Phase 0: Return first match.  */
 315             return true;
 316           }
 317
 318         /* Phase 1.  */
 319         if (addr_p == nullptr)
 320           {
 321             /* First match, and we don't need to report an address.  No need
 322                to look for other matches.  */
 323             return true;
 324           }
 325
 326         if (!found)
 327           {
 328             /* First match, and we need to report an address.  Look for other
 329                matches.  */
 330             found = true;
 331             continue;
 332           }
 333
 334         /* More than one match, and we need to return an address.  No need to
 335            look for further matches.  */
 336         return false;
 337       }
 338
 339   return found;
 340 }
 341
 342 /* Define AArch64 maintenance commands.  */
 343
 344 static void
 345 add_show_debug_regs_command (void)
 346 {
 347   /* A maintenance command to enable printing the internal DRi mirror
 348      variables.  */
 349   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 350                            &show_debug_regs, _("\
 351 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 352 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 353 Use \"on\" to enable, \"off\" to disable.\n\
 354 If enabled, the debug registers values are shown when GDB inserts\n\
 355 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 356 triggers a breakpoint or watchpoint."),
 357                            NULL,
 358                            NULL,
 359                            &maintenance_set_cmdlist,
 360                            &maintenance_show_cmdlist);
 361 }
 362
 363 void
 364 aarch64_initialize_hw_point ()
 365 {
 366   add_show_debug_regs_command ();
 367 }