gdb/nat/aarch64-scalable-linux-sigcontext.h

   1 /* Linux Kernel sigcontext definitions for AArch64 Scalable Extensions
   2    (SVE/SME).
   3
   4    Copyright (C) 2018-2023 Free Software Foundation, Inc.
   5    Contributed by Arm Ltd.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef NAT_AARCH64_SCALABLE_LINUX_SIGCONTEXT_H
  23 #define NAT_AARCH64_SCALABLE_LINUX_SIGCONTEXT_H
  24
  25 #ifndef SVE_SIG_ZREGS_SIZE
  26
  27 #define SVE_MAGIC       0x53564501
  28
  29
  30 struct sve_context {
  31         struct _aarch64_ctx head;
  32         __u16 vl;
  33         /* Holds flags.  This field was defined for SME support.  Prior to it,
  34            this used to be a reserved 16-bit value.  */
  35         __u16 flags;
  36         __u16 __reserved[2];
  37 };
  38
  39 /*
  40  * The SVE architecture leaves space for future expansion of the
  41  * vector length beyond its initial architectural limit of 2048 bits
  42  * (16 quadwords).
  43  *
  44  * See linux/Documentation/arm64/sve.txt for a description of the VL/VQ
  45  * terminology.
  46  */
  47 #define SVE_VQ_BYTES            16      /* number of bytes per quadword */
  48
  49 #define SVE_VQ_MIN              1
  50 #define SVE_VQ_MAX              512
  51
  52 #define SVE_VL_MIN              (SVE_VQ_MIN * SVE_VQ_BYTES)
  53 #define SVE_VL_MAX              (SVE_VQ_MAX * SVE_VQ_BYTES)
  54
  55 #define SVE_NUM_ZREGS           32
  56 #define SVE_NUM_PREGS           16
  57
  58 #define sve_vl_valid(vl) \
  59         ((vl) % SVE_VQ_BYTES == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
  60
  61 /*
  62  * If the SVE registers are currently live for the thread at signal delivery,
  63  * sve_context.head.size >=
  64  *      SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl))
  65  * and the register data may be accessed using the SVE_SIG_*() macros.
  66  *
  67  * If sve_context.head.size <
  68  *      SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)),
  69  * the SVE registers were not live for the thread and no register data
  70  * is included: in this case, the SVE_SIG_*() macros should not be
  71  * used except for this check.
  72  *
  73  * The same convention applies when returning from a signal: a caller
  74  * will need to remove or resize the sve_context block if it wants to
  75  * make the SVE registers live when they were previously non-live or
  76  * vice-versa.  This may require the caller to allocate fresh
  77  * memory and/or move other context blocks in the signal frame.
  78  *
  79  * Changing the vector length during signal return is not permitted:
  80  * sve_context.vl must equal the thread's current vector length when
  81  * doing a sigreturn.
  82  *
  83  *
  84  * Note: for all these macros, the "vq" argument denotes the SVE
  85  * vector length in quadwords (i.e., units of 128 bits).
  86  *
  87  * The correct way to obtain vq is to use sve_vq_from_vl(vl).  The
  88  * result is valid if and only if sve_vl_valid(vl) is true.  This is
  89  * guaranteed for a struct sve_context written by the kernel.
  90  *
  91  *
  92  * Additional macros describe the contents and layout of the payload.
  93  * For each, SVE_SIG_x_OFFSET(args) is the start offset relative to
  94  * the start of struct sve_context, and SVE_SIG_x_SIZE(args) is the
  95  * size in bytes:
  96  *
  97  *      x       type                            description
  98  *      -       ----                            -----------
  99  *      REGS                                    the entire SVE context
 100  *
 101  *      ZREGS   __uint128_t[SVE_NUM_ZREGS][vq]  all Z-registers
 102  *      ZREG    __uint128_t[vq]                 individual Z-register Zn
 103  *
 104  *      PREGS   uint16_t[SVE_NUM_PREGS][vq]     all P-registers
 105  *      PREG    uint16_t[vq]                    individual P-register Pn
 106  *
 107  *      FFR     uint16_t[vq]                    first-fault status register
 108  *
 109  * Additional data might be appended in the future.
 110  */
 111
 112 #define SVE_SIG_ZREG_SIZE(vq)   ((__u32)(vq) * SVE_VQ_BYTES)
 113 #define SVE_SIG_PREG_SIZE(vq)   ((__u32)(vq) * (SVE_VQ_BYTES / 8))
 114 #define SVE_SIG_FFR_SIZE(vq)    SVE_SIG_PREG_SIZE(vq)
 115
 116 #define SVE_SIG_REGS_OFFSET                                     \
 117         ((sizeof(struct sve_context) + (SVE_VQ_BYTES - 1))      \
 118                 / SVE_VQ_BYTES * SVE_VQ_BYTES)
 119
 120 #define SVE_SIG_ZREGS_OFFSET    SVE_SIG_REGS_OFFSET
 121 #define SVE_SIG_ZREG_OFFSET(vq, n) \
 122         (SVE_SIG_ZREGS_OFFSET + SVE_SIG_ZREG_SIZE(vq) * (n))
 123 #define SVE_SIG_ZREGS_SIZE(vq) \
 124         (SVE_SIG_ZREG_OFFSET(vq, SVE_NUM_ZREGS) - SVE_SIG_ZREGS_OFFSET)
 125
 126 #define SVE_SIG_PREGS_OFFSET(vq) \
 127         (SVE_SIG_ZREGS_OFFSET + SVE_SIG_ZREGS_SIZE(vq))
 128 #define SVE_SIG_PREG_OFFSET(vq, n) \
 129         (SVE_SIG_PREGS_OFFSET(vq) + SVE_SIG_PREG_SIZE(vq) * (n))
 130 #define SVE_SIG_PREGS_SIZE(vq) \
 131         (SVE_SIG_PREG_OFFSET(vq, SVE_NUM_PREGS) - SVE_SIG_PREGS_OFFSET(vq))
 132
 133 #define SVE_SIG_FFR_OFFSET(vq) \
 134         (SVE_SIG_PREGS_OFFSET(vq) + SVE_SIG_PREGS_SIZE(vq))
 135
 136 #define SVE_SIG_REGS_SIZE(vq) \
 137         (SVE_SIG_FFR_OFFSET(vq) + SVE_SIG_FFR_SIZE(vq) - SVE_SIG_REGS_OFFSET)
 138
 139 #define SVE_SIG_CONTEXT_SIZE(vq) (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq))
 140
 141 /* SVE/FP/SIMD state (NT_ARM_SVE and NT_ARM_SSVE) */
 142
 143 struct user_sve_header {
 144         __u32 size; /* total meaningful regset content in bytes */
 145         __u32 max_size; /* maximum possible size for this thread */
 146         __u16 vl; /* current vector length */
 147         __u16 max_vl; /* maximum possible vector length */
 148         __u16 flags;
 149         __u16 __reserved;
 150 };
 151
 152 /* Definitions for user_sve_header.flags: */
 153 #define SVE_PT_REGS_MASK                (1 << 0)
 154
 155 #define SVE_PT_REGS_FPSIMD              0
 156 #define SVE_PT_REGS_SVE                 SVE_PT_REGS_MASK
 157
 158 /*
 159  * Common SVE_PT_* flags:
 160  * These must be kept in sync with prctl interface in <linux/ptrace.h>
 161  */
 162 #define SVE_PT_VL_INHERIT               (PR_SVE_VL_INHERIT >> 16)
 163 #define SVE_PT_VL_ONEXEC                (PR_SVE_SET_VL_ONEXEC >> 16)
 164
 165
 166 /*
 167  * The remainder of the SVE state follows struct user_sve_header.  The
 168  * total size of the SVE state (including header) depends on the
 169  * metadata in the header:  SVE_PT_SIZE(vq, flags) gives the total size
 170  * of the state in bytes, including the header.
 171  *
 172  * Refer to <asm/sigcontext.h> for details of how to pass the correct
 173  * "vq" argument to these macros.
 174  */
 175
 176 /* Offset from the start of struct user_sve_header to the register data */
 177 #define SVE_PT_REGS_OFFSET                                      \
 178         ((sizeof(struct user_sve_header) + (SVE_VQ_BYTES - 1))  \
 179                 / SVE_VQ_BYTES * SVE_VQ_BYTES)
 180
 181 /*
 182  * The register data content and layout depends on the value of the
 183  * flags field.
 184  */
 185
 186 /*
 187  * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD case:
 188  *
 189  * The payload starts at offset SVE_PT_FPSIMD_OFFSET, and is of type
 190  * struct user_fpsimd_state.  Additional data might be appended in the
 191  * future: use SVE_PT_FPSIMD_SIZE(vq, flags) to compute the total size.
 192  * SVE_PT_FPSIMD_SIZE(vq, flags) will never be less than
 193  * sizeof(struct user_fpsimd_state).
 194  */
 195
 196 #define SVE_PT_FPSIMD_OFFSET            SVE_PT_REGS_OFFSET
 197
 198 #define SVE_PT_FPSIMD_SIZE(vq, flags)   (sizeof(struct user_fpsimd_state))
 199
 200 /*
 201  * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE case:
 202  *
 203  * The payload starts at offset SVE_PT_SVE_OFFSET, and is of size
 204  * SVE_PT_SVE_SIZE(vq, flags).
 205  *
 206  * Additional macros describe the contents and layout of the payload.
 207  * For each, SVE_PT_SVE_x_OFFSET(args) is the start offset relative to
 208  * the start of struct user_sve_header, and SVE_PT_SVE_x_SIZE(args) is
 209  * the size in bytes:
 210  *
 211  *      x       type                            description
 212  *      -       ----                            -----------
 213  *      ZREGS           \
 214  *      ZREG            |
 215  *      PREGS           | refer to <asm/sigcontext.h>
 216  *      PREG            |
 217  *      FFR             /
 218  *
 219  *      FPSR    uint32_t                        FPSR
 220  *      FPCR    uint32_t                        FPCR
 221  *
 222  * Additional data might be appended in the future.
 223  */
 224
 225 #define SVE_PT_SVE_ZREG_SIZE(vq)        SVE_SIG_ZREG_SIZE(vq)
 226 #define SVE_PT_SVE_PREG_SIZE(vq)        SVE_SIG_PREG_SIZE(vq)
 227 #define SVE_PT_SVE_FFR_SIZE(vq)         SVE_SIG_FFR_SIZE(vq)
 228 #define SVE_PT_SVE_FPSR_SIZE            sizeof(__u32)
 229 #define SVE_PT_SVE_FPCR_SIZE            sizeof(__u32)
 230
 231 #define __SVE_SIG_TO_PT(offset) \
 232         ((offset) - SVE_SIG_REGS_OFFSET + SVE_PT_REGS_OFFSET)
 233
 234 #define SVE_PT_SVE_OFFSET               SVE_PT_REGS_OFFSET
 235
 236 #define SVE_PT_SVE_ZREGS_OFFSET \
 237         __SVE_SIG_TO_PT(SVE_SIG_ZREGS_OFFSET)
 238 #define SVE_PT_SVE_ZREG_OFFSET(vq, n) \
 239         __SVE_SIG_TO_PT(SVE_SIG_ZREG_OFFSET(vq, n))
 240 #define SVE_PT_SVE_ZREGS_SIZE(vq) \
 241         (SVE_PT_SVE_ZREG_OFFSET(vq, SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET)
 242
 243 #define SVE_PT_SVE_PREGS_OFFSET(vq) \
 244         __SVE_SIG_TO_PT(SVE_SIG_PREGS_OFFSET(vq))
 245 #define SVE_PT_SVE_PREG_OFFSET(vq, n) \
 246         __SVE_SIG_TO_PT(SVE_SIG_PREG_OFFSET(vq, n))
 247 #define SVE_PT_SVE_PREGS_SIZE(vq) \
 248         (SVE_PT_SVE_PREG_OFFSET(vq, SVE_NUM_PREGS) - \
 249                 SVE_PT_SVE_PREGS_OFFSET(vq))
 250
 251 /* For streaming mode SVE (SSVE) FFR must be read and written as zero.  */
 252 #define SVE_PT_SVE_FFR_OFFSET(vq) \
 253         __SVE_SIG_TO_PT(SVE_SIG_FFR_OFFSET(vq))
 254
 255 #define SVE_PT_SVE_FPSR_OFFSET(vq)                              \
 256         ((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) + \
 257                         (SVE_VQ_BYTES - 1))                     \
 258                 / SVE_VQ_BYTES * SVE_VQ_BYTES)
 259 #define SVE_PT_SVE_FPCR_OFFSET(vq) \
 260         (SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE)
 261
 262 /*
 263  * Any future extension appended after FPCR must be aligned to the next
 264  * 128-bit boundary.
 265  */
 266
 267 #define SVE_PT_SVE_SIZE(vq, flags)                                      \
 268         ((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE             \
 269                         - SVE_PT_SVE_OFFSET + (SVE_VQ_BYTES - 1))       \
 270                 / SVE_VQ_BYTES * SVE_VQ_BYTES)
 271
 272 #define SVE_PT_SIZE(vq, flags)                                          \
 273          (((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ?             \
 274                   SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags)        \
 275                 : SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags))
 276
 277 #endif /* SVE_SIG_ZREGS_SIZE */
 278
 279 /* Scalable Matrix Extensions (SME) definitions.  */
 280
 281 /* Make sure we only define these if the kernel header doesn't.  */
 282 #ifndef ZA_PT_SIZE
 283
 284 /* ZA state (NT_ARM_ZA) */
 285 struct user_za_header {
 286         __u32 size; /* total meaningful regset content in bytes */
 287         __u32 max_size; /* maximum possible size for this thread */
 288         __u16 vl; /* current vector length */
 289         __u16 max_vl; /* maximum possible vector length */
 290         __u16 flags;
 291         __u16 __reserved;
 292 };
 293
 294 /* The remainder of the ZA state follows struct user_za_header.  The
 295    total size of the ZA state (including header) depends on the
 296    metadata in the header:  ZA_PT_SIZE(vq, flags) gives the total size
 297    of the state in bytes, including the header.
 298
 299    Refer to arch/arm64/include/uapi/asm/sigcontext.h from the Linux kernel
 300    for details of how to pass the correct "vq" argument to these macros.  */
 301
 302 /* Offset from the start of struct user_za_header to the register data */
 303 #define ZA_PT_ZA_OFFSET                                           \
 304         ((sizeof (struct user_za_header) + (SVE_VQ_BYTES - 1))  \
 305                 / SVE_VQ_BYTES * SVE_VQ_BYTES)
 306
 307 /* The payload starts at offset ZA_PT_ZA_OFFSET, and is of size
 308    ZA_PT_ZA_SIZE(vq, flags).
 309
 310    The ZA array is stored as a sequence of horizontal vectors ZAV of SVL/8
 311    bytes each, starting from vector 0.
 312
 313    Additional data might be appended in the future.
 314
 315    The ZA matrix is represented in memory in an endianness-invariant layout
 316    which differs from the layout used for the FPSIMD V-registers on big-endian
 317    systems: see sigcontext.h for more explanation.  */
 318
 319 #define ZA_PT_ZAV_OFFSET(vq, n)                         \
 320         (ZA_PT_ZA_OFFSET + ((vq * SVE_VQ_BYTES) * n))
 321
 322 #define ZA_PT_ZA_SIZE(vq) ((vq * SVE_VQ_BYTES) * (vq * SVE_VQ_BYTES))
 323
 324 #define ZA_PT_SIZE(vq)                        \
 325         (ZA_PT_ZA_OFFSET + ZA_PT_ZA_SIZE(vq))
 326 #endif /* ZA_PT_SIZE */
 327
 328 #endif /* NAT_AARCH64_SCALABLE_LINUX_SIGCONTEXT_H */